HP LA-1701, Compaq nx7000, Compaq nx7010, Compaq Presario X1000, Pavilion zt3000 Schematic

A

1 1

2 2

B

C

D

E

Compal confidential

Schematics Document

Mobile Banias uFCBGA/uFCPGA with Intel
ODEM_MCH+ICH4-M core logic

3 3

4 4

A

B

2003-05-12

REV:1.0

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

Title

Size Document Number Rev

D

Date: Sheet of

Compal Electronics, Inc.

LA-1701

Cover Sheet

E

1 49Monday, May 12, 2003

1.0

A

B

C

D

E

Compal confidential

File Name : LA-1701

1 1

CRT & TV-OUT Conn.

page 14

VGA Board Connector

page 13

2 2

3.3V 33 MHz

IDSEL:AD17
(PIRQB#,GNT#1,REQ#1)

IEEE 1394
VT6307S

page 20

IDSEL:AD16
(PIRQA#,GNT#0,REQ#0)

Mini PCI
socket

page 25

IDSEL:AD18,AD22
(PIRQC/D#,GNT#3/4,REQ#3/4)

LAN

RTL 8139CL+

RJ45/11 CONN

3 3

RTC CKT.

page 16

Power OK CKT.

page 32

Power On/Off CKT.

page 28

Touch Pad

EC I/O Buffer

DC/DC Interface CKT.

4 4

page 34

page 19

page 19

page 28

page 30

Fan Control

page 4

AGP BUS

PCI BUS

IDSEL:AD20
(PIRQA#,GNT#2,REQ#2)

CardBus Controller

ENE CB1410

page 21

Slot 0

page 21

EC NS87591L

page 29

Int.KBD

BIOS

Mobile Banias

uFCBGA-479/uFCPGA-478 CPU

page 4,5

H_A#(3..31)

PSB

400MHz

Intel ODEM MCH-M

uFCBGA-593

Intel ICH4-M

BGA-421

page 28

page 30

page 6,7,8

Hub-Link

page 15,16,17

LPC BUS

SD Connector

H_D#(0..63)

page 31

Thermal Sensor
ADM1032AR

page 4

Memory BUS(DDR)

2.5V DDR- 200/266

USB2.0

AC-LINK

Primary IDE

ATA-100

Secondary IDE

ATA-100

PARALLEL

Clock Generator

ICS 950810

DDR-SO-DIMM X2

BANK 0, 1, 2, 3

page 9,10,11

USB conn

page 27

Audio CKT

AD1981B

page 23

MDC & BT Conn

page 28

page 31

Mini-PCI solt

page 25

HDD
Connector

page 18

CDROM
Connector

page 18

SMsC LPC47N227

Super I/O

page 26

page 12

page 22

AMP & Audio Jack

FIR

page 26

page 24

SPR CONN.

page 33

*RJ45 CONN
*PS2 x2 CONN
*CRT CONN
*LINE IN JACK
*LINE OUT JACK
*1394 CONN
*SPDIF CONN
*DVI CONN
*DC JACK
*TVOUT CONN
*PRINTER PORT
*COM PORT
*USB CONN x2

Power Circuit DC/DC

page
35,36,37,38,39,40,41,42

A

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

LA-1701

Block Diagram

E

2 49Monday, May 12, 2003

1.0

A

Voltage Rails

Power Plane

VIN
B+
+CPU_CORE
+VCCP
+1.25VS
+1.2VS
+1.5VALW
+1.5VS
+1.8VS
+2.5V
+2.5VS
+3VALW
+3V

+5VALW
+5V
+5VS
+12VALW
+12V
+12VS
RTCVCC

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

1 1

Internal PCI Devices

DEVICE

HUB
USB
AC97 MODEM
AC97
ATA 100
ETHERNET
LPC I/F
SMBUS

Description

Adapter power supply (19V)
AC or battery power rail for power circuit
Core voltage for CPU

1.05V rail for Processor I/O

1.25V switched power rail for DDR Vtt

1.2V switched power rail for MCH core power

1.5V always on power rail

1.5V switched power rail for AGP interface

1.8V switched power rail for CPU PLL & Hub-Link

2.5V power rail for DDR

2.5V switched power rail

3.3V always on power rail
3V power rail

3.3V switched power rail+3VS
5V always on power rail
5V power rail
5V switched power rail
12V always on power rail
12V power rail
12Vswitched power rail on power rail
RTC power

PCI Device ID

D30
D29
D31
D31
D31
D8 (AD24)
D31
D31

S0-S1

N/A

ON OFF
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON

S3

N/A
N/A

OFF
OFF
OFF
ON
OFF
OFF
ON
OFF
ON
ON
OFF
ON
ON
OFF
ON
ON
OFF
ON

S5

N/A
N/AN/A
OFF
OFF
OFF
OFF
ON*
OFF
OFF
OFF
OFF
ON*
OFF
OFF
ON*
OFF
OFF
ON*
OFF
OFF
ONON

Symbol note:

:means digital ground.

:means analog ground.

:means reserved.@

External PCI Devices

DEVICE

1394
LAN
CARD BUS
Wireless LAN
Mini-PCI
AGP BUS

PCI Device ID

D0
D1
D4
D2
D6
N/A

I2C / SMBUS ADDRESSING

DEVICE

DDR SO-DIMM 0
DDR SO-DIMM 1
CLOCK GENERATOR (EXT.)

HEX

A0
A2
D2

IDSEL #

AD16
AD17
AD20
AD18
AD22
AGP_DEVSEL#

ADDRESS

1 0 1 0 0 0 0 X
1 0 1 0 0 0 1 X
1 1 0 1 0 0 1 X

REQ/GNT #

0
1
2
3
4

N/A

PIRQ

A
B
C
D
D
A

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

LA-1701

Notes List

3 49Monday, May 12, 2003

1.0

A

H_A#[3..31]<6>

4 4

H_REQ#[0:4]<6>

CLK_CPU_ITP<12>
CLK_CPU_ITP#<12>

3 3

1 2

+VCCP

R112
56_0402_5%

+3VALW

ITP_DBRESET#<16>

2 2

+VCCP

H_CPUPWRGD<15>

1 1

330_0402_5%

PROCHOT#<29>

MMBT3904_SOT23

H_A#[3..31]

H_REQ#[0..4]

H_ADSTB#0<6>
H_ADSTB#1<6>

R137 0_0402_5%

1 2

R136 0_0402_5%

1 2

CLK_CPU_BCLK<12>
CLK_CPU_BCLK#<12>

H_ADS#<6>
H_BNR#<6>
H_BPRI#<6>
H_BR0#<6>

H_DEFER#<6>

H_DRDY#<6>

H_HIT#<6>

H_HITM#<6>

H_LOCK#<6>

H_CPURST#<6>

H_RS#0<6>

H_RS#1<6>

H_RS#2<6>

H_TRDY#<6>

R110

1 2

150_0402_5%

ITP_DBRESET#

1 2

+3VALW

R124

R111 0_0402_5%

H_DBSY#<6>
H_DPSLP#<7,15>

H_DPWR#<7>

R121
330_0402_5%

H_CPUSLP#<15>

R105 @1K_0402_5%
R107 @1K_0402_5%

R120

1 2

1K_0402_5%

1 2

Q22

2

3 1

Q21

MMBT3904_SOT23

3 1

A

1 2

1 2

2

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

CLK_CPUITP
CLK_CPUITP#

H_IERR#
H_CPURST#

H_RS#0
H_RS#1
H_RS#2

ITP_BPM#0
ITP_BPM#1
ITP_BPM#2
ITP_BPM#3

ITP_BPM#4
ITP_BPM#5
H_PROCHOT#

H_CPUPWRGD
H_CPUSLP#

ITP_TCK
ITP_TDI
ITP_TDO

TEST1

TEST2
ITP_TMS
ITP_TRST#

H_THERMDA
H_THERMDC
H_THERMTRIP#

+VCCP

R109

1 2

330_0402_5%

P4
U4
V3
R3
V2

W1

T4

W2

Y4
Y1
U1

AA3

Y3
AA2
AF4
AC4
AC7
AC3
AD3
AE4
AD2
AB4
AC6
AD5
AE2
AD6
AF3
AE1
AF1

R2

P3

T2

P1

T1

U3
AE5

A16
A15

B15
B14

N2

L1

J3

N4

L4

H2

K3

K4

A4

J2
B11

H1

K1

L2

M3

C8

B8

A9

C9

A7

M2

B7
C19
A10
B10
B17

E4

A6
A13
C12
A12

C5
F23
C11
B13

B18
A18
C17

R102
56 _0402_1%

H_PROCHOT#

U9A

A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#

ADDR GROUP

A25#
A26#
A27#
A28#
A29#
A30#
A31#

REQ0#
REQ1#
REQ2#
REQ3#
REQ4#

ADSTB0#
ADSTB1#

ITP_CLK0
ITP_CLK1

BCLK0
BCLK1

ADS#
BNR#
BPRI#
BR0#
DEFER#
DRDY#
HIT#
HITM#
IERR#
LOCK#
RESET#

RS0#
RS1#
RS2#
TRDY#

BPM0#
BPM1#
BPM2#
BPM3#

DBR#
DBSY#
DPSLP#
DPWR#
PRDY#
PREQ#
PROCHOT#

PWRGOOD
SLP#
TCK
TDI
TDO
TEST1
TEST2
TMS
TRST#

THERMDA
THERMDC
THERMTRIP#

mFCBGA479

HOST CLK

CONTROL GROUP

Banias

MISC

THERMAL
DIODE

B

DATA GROUP

LINT0/INTR

LEGACY CPU

B

D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#

DINV0#
DINV1#
DINV2#
DINV3#

DSTBN0#
DSTBN1#
DSTBN2#
DSTBN3#
DSTBP0#
DSTBP1#
DSTBP2#
DSTBP3#

A20M#
FERR#

IGNNE#

INIT#

LINT1/NMI

STPCLK#

SMI#

H_D#[0..63]

H_D#0

A19

D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#

+VCCP

A25
A22
B21
A24
B26
A21
B20
C20
B24
D24
E24
C26
B23
E23
C25
H23
G25
L23
M26
H24
F25
G24
J23
M23
J25
L26
N24
M25
H26
N25
K25
Y26
AA24
T25
U23
V23
R24
R26
R23
AA23
U26
V24
U25
V26
Y23
AA26
Y25
AB25
AC23
AB24
AC20
AC22
AC25
AD23
AE22
AF23
AD24
AF20
AE21
AD21
AF25
AF22
AF26

D25
J26
T24
AD20

C23
K24
W25
AE24
C22
L24
W24
AE25

C2
D3
A3
B5
D1
D4

C6
B4

+VCCP

H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_DINV#0 <6>
H_DINV#1 <6>
H_DINV#2 <6>
H_DINV#3 <6>

H_DSTBN#0 <6>
H_DSTBN#1 <6>
H_DSTBN#2 <6>
H_DSTBN#3 <6>
H_DSTBP#0 <6>
H_DSTBP#1 <6>
H_DSTBP#2 <6>
H_DSTBP#3 <6>

H_A20M#
H_IGNNE#

H_INIT#
H_INTR
H_NMI

H_STPCLK#
H_SMI#

1 2

R101
330_0402_5%

1 2

C139
1U_0603_10V6K

1 2

H_THERMTRIP#

H_A20M# <15>
H_FERR# <15>
H_IGNNE# <15>
H_INIT# <15>
H_INTR <15>
H_NMI <15>

H_STPCLK# <15>
H_SMI# <15>

2

B

R108
56_0402_5%

C

H_D#[0..63] <6>

ITP700FLEX FOR BANIAS

ITP_TDI
ITP_TMS
ITP_TCK
ITP_TDO_R

RESETITP#
ITP_TCK
CLK_CPU_ITP#

CLK_CPU_ITP

1

C

E

3

MAINPWON <35,37,42>

Q20

@2SC2411K_SOT23

12

R118
56_0402_5%

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

THRMTRIP# <16>

JP29

1

TDI

2

TMS

5

TCK

7

TDO

3

TRST#

12

RESET#

11

FBO

8

BCLK#

9

BCLK

10

GND0

14

GND1

16

GND2

18

GND3

20

GND4

22

GND5

@ITP700-FLEXCON

VTT0
VTT1
VTAP

DBR#
DBA#

BPM#0
BPM#1
BPM#2
BPM#3
BPM#4
BPM#5

NC1
NC2

27
28
26

25
24

23
21
19
17
15
13

4
6

12

R114
@10K_0402_5%

2200P_0402_25V7K

13K_0603_1%

D

+VCCP

C145

1 2

R138

ITP_BPM#0
ITP_BPM#1
ITP_BPM#2
ITP_BPM#3
ITP_BPM#4
ITP_BPM#5

@0.1U_0402_16V7K

ITP_DBRESET#ITP_TRST#

@0_0402_5%

+VCCP

R104

54.9_0402_1%

1 2

H_CPURST# RESETITP# ITP_TDO

1 2

R135 39.2_0603_1%

1 2

R134 150_0402_1%

Thermal Sensor ADM1032AR

+3VS

C129

W=15mil

1

2

H_THERMDA
H_THERMDC

2

C131

1

0.1U_0402_10V6K

1
2
3

U13

VDD
D+
D­THERM#4GND

ADM1032AR_SOP8

Address:1001_100X

Fan Control circuit

+12VS

2

C140

0.1U_0402_10V6K

EN_FAN1<29>

R342

1 2

D

1

5

U14

1

P

+

O

3

-

G

LM321MF_SOT23-5

2

C448

1 2

@2200P_0603_16V7K

1 2

R340 7.32K_0603_1%

D23

RB751V_SOD323

1

G

FAN1_ON

3

4

2 1

Title

Size Document Number Rev

Date: Sheet of

E

+VCCP+VCCP

12

R119

22.6_0402_1%

ITP_TMS

ITP_TDI

SCLK

SDATA

ALERT#

+5VS

6

2

D

S

4 5

FAN1_VOUT

1

C422
10U_1206_10V4Z

2

8
7
6
5

Q23

SI3456DV-T1_TSOP6

FANSPEED1<29>

1 2

R129 680_0402_5%

1 2

R154 27.4_0402_1%

1

C427

@10000P

2

C439

@10000P

Compal Electronics, Inc.

INTEL CPU BANIAS (1 of 2)

LA-1701

Monday, May 12, 2003

E

1 2

+5VS

12

1

2

R149
@54.9_0402_1%

12

R153

@22.6_0402_1%

ITP_TRST#

ITP_TCK

EC_SMC_2 <29>
EC_SMD_2 <29>

R341
10K_0402_5%

JP15

53398-0310

4 49

ITP_TDO_R

1
2
3

1.0

A

B

C

D

E

1

C92
10U_1206_6.3V7K

2

0.1U_0402_16V7K

1

C428

2

+CPU_CORE

1

C372

2

0.1U_0402_16V7K

Title

Size Document Number Rev

Date: Sheet of

C564

C

+CPU_CORE

+CPU_CORE

+CPU_CORE

10U_1206_6.3V7K

+CPU_CORE

10U_1206_6.3V7K

+CPU_CORE

10U_1206_6.3V7K

+CPU_CORE

10U_1206_6.3V7K

Vcc-core
Decoupling
SPCAP,Polymer

+CPU_VCCA

1

C64

2

+VCCP

1

+

2

1

+

C280
220U_D2_2VM

2

10U_1206_6.3V7K

1

1

C67

2

2

10U_1206_6.3V7K

10U_1206_6.3V7K

1

1

C105

2

2

10U_1206_6.3V7K

1

1

C328

2

2

10U_1206_6.3V7K

1

1

C385

2

2

10U_1206_6.3V7K

1

1

C121

2

2

10U_1206_6.3V7K

1

C126

2

0.01U_0402_16V7K

0.1U_0402_16V7K

1

C348

2

0.1U_0402_16V7K

1

2

C68

10U_1206_6.3V7K

C104

10U_1206_6.3V7K

C327

10U_1206_6.3V7K

C386

10U_1206_6.3V7K

C117

10U_1206_6.3V7K

1

C356

2

1

C359

2

+

C281
220U_D2_2VM

1

C69

2

1

C103

2

1

C326

2

1

C387

2

1

C50

2

10U_1206_6.3V7K

1

2

0.1U_0402_16V7K

1

+

2

10U_1206_6.3V7K

1

C70

2

10U_1206_6.3V7K

10U_1206_6.3V7K

1

C102

2

10U_1206_6.3V7K

10U_1206_6.3V7K

1

C325

2

10U_1206_6.3V7K

10U_1206_6.3V7K

1

C388

2

10U_1206_6.3V7K

10U_1206_6.3V7K

1

C350

2

10U_1206_6.3V7K

1

C127

C362

2

0.01U_0402_16V7K

0.1U_0402_16V7K

1

1

C363

2

2

C110
220U_D2_2VM

10U_1206_6.3V7K

1

C71

2

1

C101

2

10U_1206_6.3V7K

1

C324

2

10U_1206_6.3V7K

1

C389

2

1

C349

2

ESR, mohm

12m ohm/4
5m ohm/35MLCC 0805 X5R

10U_1206_6.3V7K

1

C72

2

0.01U_0402_16V7K

1

C430

C431

2

0.1U_0402_16V7K

1

+

C62
220U_D2_2VM

2

1

C82

2

10U_1206_6.3V7K

1

C81

2

1

C351

2

1

C365

2

10U_1206_6.3V7K

1

C122

2

1

C98

2

0.1U_0402_16V7K

1

C429

2

D

1

C88
10U_1206_6.3V7K

2

1

C87
10U_1206_6.3V7K

2

1

C364
10U_1206_6.3V7K

2

1

C352
10U_1206_6.3V7K

2

1

C49
10U_1206_6.3V7K

2

ESL,nHC,uF

3.5nH/44X220uF

0.6nH/3535X10uF

0.1U_0402_16V7K

AC26

AD26

AE7

AF6

F26

B1
N1

P23

W4

D10
D12
D14
D16
E11
E13
E15
F10
F12
F14
F16

K6
L5

L21

M6

M22

N5

N21

P6

P22

R5

R21

T6
T22
U21

D6

D8
D18
D20
D22

E5

E7

E9
E17
E19
E21

F6

F8
F18

E1

E2

F2

F3

G3

G4

H4

E26

G1

AC1

P25
P26

AB2
AB1

B2
AF7
C14

C3
C16

U9B

VCCSENSE
VSSSENSE

VCCA0
VCCA1
VCCA2
VCCA3

VCCQ0
VCCQ1

VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

PSI#
VID0

VID1
VID2
VID3
VID4
VID5

GTLREF0
GTLREF1
GTLREF2
GTLREF3

COMP0
COMP1
COMP2
COMP3

RSVD
RSVD
RSVD
RSVD

TEST3

mFCBGA479

A2

VSS

A5

VSS

A8

VSS

A11

VSS

A14

VSS

A17

VSS

A20

VSS

A23

VSS

A26

VSS

B3

VSS

B6

VSS

B9

VSS

B12

Banias

VSS

B16

VSS

B19

VSS

B22

VSS

B25

VSS

C1

VSS

C4

VSS

C7

VSS

C10

VSS

C13

VSS

C15

VSS

C18

VSS

C21

VSS

C24

VSS

D2

VSS

D5

VSS

D7

VSS

D9

VSS

D11

VSS

D13

VSS

D15

VSS

D17

VSS

D19

VSS

D21

VSS

D23

VSS

D26

VSS

E3

VSS

E6

VSS

E8

VSS

E10

VSS

E12

VSS

E14

VSS

E16

VSS

E18

VSS

E20

VSS

E22

VSS

E25

VSS

F1

VSS

F4

VSS

F5

VSS

F7

VSS

F9

VSS

F11

VSS

POWER, GROUNG, RESERVED SIGNALS AND NC

F13

VSS

F15

VSS

F17

VSS

F19

VSS

F21

VSS

F24

VSS

G2

VSS

G6

VSS

G22

VSS

G23

VSS

G26

VSS

H3

VSS

H5

VSS

H21

VSS

H25

VSS

J1

VSS

J4

VSS

J6

VSS

J22

VSS

J24

VSS

K2

VSS

K5

VSS

K21

VSS

K23

VSS

K26

VSS

L3

VSS

L6

VSS

L22

VSS

L25

VSS

M1

VSS

0.01U_0402_16V7K

100U_6.3V_M

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

R290 @54.9_0402_1%

1 2
1 2

R288 @54.9_0402_1%

1 1

2 2

Resistor placed within

0.5" of CPU pin.Trace
should be at least 25
miles away from any
other toggling signal.

+VCCP

12

R36
1K_0402_1%

3 3

2K_0402_1%

4 4

1

R32

C34
1U_0603_10V6K

2

1 2

1

C37
220P_0402_50V8K

2

12

R57

27.4_0402_1%

A

54.9_0402_1%

Resistor placed within

0.5" of CPU pin.Trace
should be at least 25
miles away from any
other toggling signal.

+1.8VS

12

R56

27.4_0402_1%

R296

1 2

12

54.9_0402_1%

R79

0_1206_5%

+CPU_CORE

R293

CPU_VID0<41>
CPU_VID1<41>
CPU_VID2<41>
CPU_VID3<41>
CPU_VID4<41>
CPU_VID5<41>

+CPU_VCCA

+VCCP

PSI#<41>

12

VCCSENSE
VSSSENSE

GTL_REF0

COMP0
COMP1
COMP2
COMP3

R103

@1K_0402_5%

B

U9C

F20

VCC

F22

VCC

G5

VCC

G21

VCC

H6

VCC

H22

VCC

J5

VCC

J21

VCC

K22

VCC

U5

VCC

V6

VCC

V22

VCC

W5

VCC

W21

VCC

Y6

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

mFCBGA479

1

C341

0.1U_0402_16V7K

2

Banias

POWER, GROUND

Y22
AA5
AA7

AA9
AA11
AA13
AA15
AA17
AA19
AA21

AB6

AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22

AC9
AC11
AC13
AC15
AC17
AC19

AD8
AD10
AD12
AD14
AD16
AD18

AE9
AE11
AE13
AE15
AE17
AE19

AF8
AF10
AF12
AF14
AF16
AF18

M4

M5
M21
M24

N3

N6
N22
N23
N26

P2

P5
P21
P24

R1

R4

R6
R22
R25

T3

T5
T21
T23

1

C346

2

T26

VSS

U2

VSS

U6

VSS

U22

VSS

U24

VSS

V1

VSS

V4

VSS

V5

VSS

V21

VSS

V25

VSS

W3

VSS

W6

VSS

W22

VSS

W23

VSS

W26

VSS

Y2

VSS

Y5

VSS

Y21

VSS

Y24

VSS

AA1

VSS

AA4

VSS

AA6

VSS

AA8

VSS

AA10

VSS

AA12

VSS

AA14

VSS

AA16

VSS

AA18

VSS

AA20

VSS

AA22

VSS

AA25

VSS

AB3

VSS

AB5

VSS

AB7

VSS

AB9

VSS

AB11

VSS

AB13

VSS

AB15

VSS

AB17

VSS

AB19

VSS

AB21

VSS

AB23

VSS

AB26

VSS

AC2

VSS

AC5

VSS

AC8

VSS

AC10

VSS

AC12

VSS

AC14

VSS

AC16

VSS

AC18

VSS

AC21

VSS

AC24

VSS

AD1

VSS

AD4

VSS

AD7

VSS

AD9

VSS

AD11

VSS

AD13

VSS

AD15

VSS

AD17

VSS

AD19

VSS

AD22

VSS

AD25

VSS

AE3

VSS

AE6

VSS

AE8

VSS

AE10

VSS

AE12

VSS

AE14

VSS

AE16

VSS

AE18

VSS

AE20

VSS

AE23

VSS

AE26

VSS

AF2

VSS

AF5

VSS

AF9

VSS

AF11

VSS

AF13

VSS

AF15

VSS

AF17

VSS

AF19

VSS

AF21

VSS

AF24

VSS

Compal Electronics, Inc.

INTEL CPU BANIAS (2 of 2)

LA-1701

5 49Monday, May 12, 2003

E

1.0

5

H_RS#[0..2]<4>

H_A#[3..31]<4>

H_REQ#[0..4]<4>

D D

C C

B B

A A

H_RS#[0..2]
H_A#[3..31]
H_REQ#[0..4]

U12A

H_A#3

U6

H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_ADSTB#0<4>
H_ADSTB#1<4>

CLK_MCH_BCLK#<12>

CLK_MCH_BCLK<12>

H_ADS#<4>

H_TRDY#<4>

H_DRDY#<4>

H_DEFER#<4>

H_HITM#<4>
H_HIT#<4>
H_LOCK#<4>
H_BR0#<4>
H_BNR#<4>

H_BPRI#<4>

H_DBSY#<4>

H_CPURST#<4>

H_DSTBN#0<4>
H_DSTBN#1<4>
H_DSTBN#2<4>
H_DSTBN#3<4>
H_DSTBP#0<4>
H_DSTBP#1<4>
H_DSTBP#2<4>
H_DSTBP#3<4>

H_DINV#0<4>
H_DINV#1<4>
H_DINV#2<4>
H_DINV#3<4>

5

H_RS#0
H_RS#1
H_RS#2

HA#3

T5

HA#4

R2

HA#5

U3

HA#6

R3

HA#7

P7

HA#8

T3

HA#9

P4

HA#10

P3

HA#11

P5

HA#12

R6

HA#13

N2

HA#14

N5

HA#15

N3

HA#16

J3

HA#17

M3

HA#18

M4

HA#19

M5

HA#20

L5

HA#21

K3

HA#22

J2

HA#23

N6

HA#24

L6

HA#25

L2

HA#26

K5

HA#27

L3

HA#28

L7

HA#29

K4

HA#30

J5

HA#31

U2

HREQ#0

T7

HREQ#1

R7

HREQ#2

U5

HREQ#3

T4

HREQ#4

R5

HADSTB#0

N7

HADSTB#1

K8

BCLK#

J8

BCLK

U7

ADS#

V4

HTRDY#

W2

DRDY#

Y4

DEFER#

Y3

HITM#

Y5

HIT#

W3

HLOCK#

V7

BR0#

V3

BNR#

Y7

BPRI#

V5

DBSY#

W7

RS#0

W5

RS#1

W6

RS#2

AE17

CPURST#

AD4

HDSTBN#0

AF6

HDSTBN#1

AD11

HDSTBN#2

AC15

HDSTBN#3

AD3

HDSTBP#0

AG6

HDSTBP#1

AE11

HDSTBP#2

AC16

HDSTBP#3

AD5

DBI#0

AG5

DBI#1

AH9

DBI#2

AD15

DBI#3

RG82P4300M_FCBGA593

Odem

HOST

HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8

HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63

HVREF0
HVREF1
HVREF2
HVREF3
HVREF4

HSWNG1
HSWNG0

HRCOMP1
HRCOMP0

4

AA2
AB5
AA5
AB3
AB4
AC5
AA3
AA6
AE3
AB7
AE5
AF3
AC6
AC3
AF4
AE2
AG4
AG2
AE7
AE8
AH2
AC7
AG3
AD7
AH7
AE6
AC8
AG8
AG7
AH3
AF8
AH5
AC11
AC12
AE9
AC10
AE10
AD9
AG9
AC9
AE12
AF10
AG11
AG10
AH11
AG12
AE13
AF12
AG13
AH13
AC14
AF14
AG14
AE14
AG15
AG16
AG17
AH15
AC17
AF16
AE15
AH17
AD17
AE16

M7
P8
AA9
AB12
AB16

220P_0402_50V7K

H_SWNG1

AD13

H_SWNG0

AA7
AC13

AC2

4

H_D#[0..63]

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

C333

H_RCOMP1
H_RCOMP0

R55

27.4_0402_1%

1

1

2

2

220P_0402_50V7K

1 2

H_D#[0..63] <4>

MGH_GTLREF

1

C392

C335

1U_0603_10V6K

2

R302

27.4_0402_1%

1 2

3

+VCCP

+VCCP

3

AGP_AD[0..31]
AGP_C/BE#[0..3]
AGP_SBA[0..7]

1

2

1

2

AGP_ST0<13>
AGP_ST1<13>
AGP_ST2<13>

12

12

12

12

AGP_SBSTB<13>
AGP_SBSTB#<13>

AGP_RBF#<13>
AGP_WBF#<13>

CLK_MCH_66M<12>

R303
301_0402_1%

R299
150_0402_1%

R304
301_0402_1%

R306

150_0402_1%

AGP_FRAME#<13>
AGP_DEVSEL#<13>
AGP_IRDY#<13>
AGP_TRDY#<13>
AGP_STOP#<13>
AGP_PAR<13>

AGP_REQ#<13>
AGP_GNT#<13>

AGP_ADSTB0<13>
AGP_ADSTB0#<13>
AGP_ADSTB1<13>
AGP_ADSTB1#<13>

AGP_AD0
AGP_AD1
AGP_AD2
AGP_AD3
AGP_AD4
AGP_AD5
AGP_AD6
AGP_AD7
AGP_AD8
AGP_AD9
AGP_AD10
AGP_AD11
AGP_AD12
AGP_AD13
AGP_AD14
AGP_AD15
AGP_AD16
AGP_AD17
AGP_AD18
AGP_AD19
AGP_AD20
AGP_AD21
AGP_AD22
AGP_AD23
AGP_AD24
AGP_AD25
AGP_AD26
AGP_AD27
AGP_AD28
AGP_AD29
AGP_AD30
AGP_AD31

AGP_C/BE#0
AGP_C/BE#1
AGP_C/BE#2
AGP_C/BE#3

AGP_SBA0
AGP_SBA1
AGP_SBA2
AGP_SBA3
AGP_SBA4
AGP_SBA5
AGP_SBA6
AGP_SBA7

AGP_ST0
AGP_ST1
AGP_ST2

CLK_MCH_66M

12

R314
@22_0402_5%

1

C381
@10P_0402_50V8K

2

AA28
AB25
AB27
AA27
AB26

AB23
AA24
AA25
AB24
AC25
AC24
AC22
AD24

AA23

W28
W27
W24
W23

W25
AG24
AH25

AC27
AC28

AH28
AH27
AG28
AG27
AE28
AE27
AE24
AE25

AF27
AF26

AE22
AE23

AF22

AG25

AF24

AG26

R27
R28
T25
R25
T26
T27
U27
U28
V26
V27
T23
U23
T24
U24
U25
V24
Y27
Y26

Y23

V25
V23
Y25

Y24

R24
R23

P22

AGP_AD[0..31]<13>
AGP_CBE#[0..3]<13>
AGP_SBA[0..7]<13>

C334

0.1U_0402_10V6K

H_SWNG1

C330

0.1U_0402_10V6K

H_SWNG0

+VCCP

12

R66

49.9_0402_1%

12

R77
100_0402_1%

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

U12B

GAD0
GAD1
GAD2
GAD3
GAD4
GAD5
GAD6
GAD7
GAD8
GAD9
GAD10
GAD11
GAD12
GAD13
GAD14
GAD15
GAD16
GAD17
GAD18
GAD19
GAD20
GAD21
GAD22
GAD23
GAD24
GAD25
GAD26
GAD27
GAD28
GAD29
GAD30
GAD31

GCBE#0
GCBE#1
GCBE#2
GCBE#3

GFRAME#
GDEVSEL#
GIRDY#
GTRDY#
GSTOP#
GPAR
GREQ#
GGNT#

AD_STB0
AD_STB#0
AD_STB1
AD_STB#1

SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7

SB_STB
SB_STB#

RBF#
WBF#
PIPE#

ST0
ST1
ST2

66IN

RG82P4300M_FCBGA593

Odem

AGP

2

HUB

HLRCOMP

GND

1

HUB_PD[0..10]

HUB_PD0

P25

HI_0
HI_1
HI_2
HI_3
HI_4
HI_5
HI_6
HI_7
HI_8
HI_9

HI_10

HI_STB

HI_STB#

HI_REF

VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98

VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141

GRCOMP

AGPREF

Note:
Placement R308,R305

close to MCH

Title

Size Document Number Rev

Date: Sheet of

P24
N27
P23
M26
M25
L28
L27
M27
N28
M24

N25
N24

P27
P26

AB9
AD10
AF9
AJ9
A7
F8
J7
L8
N8
R8
U8
W8
AA8
AD8
AF7
AJ7
D5
F6
H6
K6
M6
P6
T6
V6
Y6
AB6
AD6
AF5
AJ5
A3
J4
L4
N4
R4
U4
W4
AA4
AC4
AE4
AJ3
E1
J1
L1
N1
R1
U1
W1
AA1
AC1
AE1
AG1

AD25
AA21

LA-1701

HUB_PD1
HUB_PD2
HUB_PD3
HUB_PD4
HUB_PD5
HUB_PD6
HUB_PD7
HUB_PD8
HUB_PD9
HUB_PD10

HUB_PSTRB <15>

AGP_RCOMP

+AGPREF

1

C340

0.1U_0402_16V4Z

2

HUB_PSTRB# <15>

1 2

1

C379

0.01U_0402_16V7K

2

1 2

HUB_RCOMP

Compal Electronics, Inc.

ODEM(1/3)

HUB_PD[0:10] <15>

R315 36.5_0402_1%

HUB_VREF

+1.5VS

AGP_ST2

+1.5VS

AGP_ST1

ST1

X
0
1

R300

36.5_0603_1%

+AGPREF

MCH STRAPST2
DDR

1

TEST MODE

X

400 Mhz PSB

X

+AGPREF

1

+1.8VS

12

R287
@1K_0402_5%

12

R291
@1K_0402_5%

12

R292
@1K_0402_5%

+1.5VS

6 49Monday, May 12, 2003

12

12

R308
1K_0402_1%

R305
1K_0402_1%

1.0

5

4

3

2

1

DDR_MMA[0..12]<9,10>
DDR_SDQ[0..63]<9>
DDR_SDQS[0..8]<9>

DDR_CB[0..7]<9>

D D

C C

B B

+1.25VS_SMVREF

R328

+SDREF

0.1U_0402_16V4Z

0_0805_5%

C405

12

1

1

2

2

DDR_MMA[0..12]
DDR_SDQ[0..63]
DDR_SDQS[0..8]

DDR_CB[0..7]

C404

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C403

+1.25VS

1

2

R326

1 2

30.1_0603_1%

U12C

DDR_MMA0
DDR_MMA1
DDR_MMA2
DDR_MMA3
DDR_MMA4
DDR_MMA5
DDR_MMA6
DDR_MMA7
DDR_MMA8
DDR_MMA9
DDR_MMA10
DDR_MMA11
DDR_MMA12

DDR_SDQS0
DDR_SDQS1
DDR_SDQS2
DDR_SDQS3
DDR_SDQS4
DDR_SDQS5
DDR_SDQS6
DDR_SDQS7
DDR_SDQS8

DDR_SWE#<9,10>
DDR_SRAS#<9,10>
DDR_SCAS#<9,10>

DDR_CLK0<9>
DDR_CLK0#<9>
DDR_CLK1<9>
DDR_CLK1#<9>
DDR_CLK2<9>
DDR_CLK2#<9>
DDR_CLK3<10>
DDR_CLK3#<10>
DDR_CLK4<10>
DDR_CLK4#<10>
DDR_CLK5<10>
DDR_CLK5#<10>

DDR_CKE0<9,10>
DDR_CKE1<9,10>
DDR_CKE2<10>
DDR_CKE3<10>

DDR_SCS#0<9,10>
DDR_SCS#1<9,10>
DDR_SCS#2<10>
DDR_SCS#3<10>

DDR_SBS0<9,10>
DDR_SBS1<9,10>

DDR_RCOMP

H_DPSLP#<4,15>
H_DPWR#<4>

M_RCV#

G17
G18
E18

G20
G19

E20
G21
G22

C26
C23
B19
D12

E15

G11

K25

G24
E24
G25

K23

G23
E22
H23

G12
G13

G15
G14

AD26
AD27

E12
F17
E16

F19

F21
F13

F26

F11

J25

J24

J23

F23

J21
J28

C8
C5
E3

G8

G5

F5

G6
G7

E9
F7
F9
E7

J9

V8
Y8

SMA0
SMA1
SMA2
SMA3
SMA4
SMA5
SMA6
SMA7
SMA8
SMA9
SMA10
SMA11
SMA12
RSVD2

SDQS0
SDQS1
SDQS2
SDQS3
SDQS4
SDQS5
SDQS6
SDQS7
SDQS8

SWE#
SRAS#
SCAS#

SCK0
SCK#0
SCK1
SCK#1
SCK2
SCK#2
SCK3
SCK#3
SCK4
SCK#4
SCK5
SCK#5

SCKE0
SCKE1
SCKE2
SCKE3

SCS#0
SCS#1
SCS#2
SCS#3

SBS0
SBS1

SMVREF0
SMVREF1

SMRCOMP
RCVENIN#
RCVENOUT#
DPSLP#

DPWR#
NC0
NC1

Odem

MEMORY

SDQ0
SDQ1
SDQ2
SDQ3
SDQ4
SDQ5
SDQ6
SDQ7
SDQ8

SDQ9
SDQ10
SDQ11
SDQ12
SDQ13
SDQ14
SDQ15
SDQ16
SDQ17
SDQ18
SDQ19
SDQ20
SDQ21
SDQ22
SDQ23
SDQ24
SDQ25
SDQ26
SDQ27
SDQ28
SDQ29
SDQ30
SDQ31
SDQ32
SDQ33
SDQ34
SDQ35
SDQ36
SDQ37
SDQ38
SDQ39
SDQ40
SDQ41
SDQ42
SDQ43
SDQ44
SDQ45
SDQ46
SDQ47
SDQ48
SDQ49
SDQ50
SDQ51
SDQ52
SDQ53
SDQ54
SDQ55
SDQ56
SDQ57
SDQ58
SDQ59
SDQ60
SDQ61
SDQ62
SDQ63
SDQ64
SDQ65
SDQ66
SDQ67
SDQ68
SDQ69
SDQ70
SDQ71

RSTIN#

RSVD1

TESTIN#

G28
F27
C28
E28
H25
G27
F25
B28
E27
C27
B25
C25
B27
D27
D26
E25
D24
E23
C22
E21
C24
B23
D22
B21
C21
D20
C19
D18
C20
E19
C18
E17
E13
C12
B11
C10
B13
C13
C11
D10
E10
C9
D8
E8
E11
B9
B7
C7
C6
D6
D4
B3
E6
B5
C4
E4
C3
D3
F4
F3
B2
C2
E2
G4
C16
D16
B15
C14
B17
C17
C15
D14

J27
H27
H26

DDR_SDQ0
DDR_SDQ1
DDR_SDQ2
DDR_SDQ3
DDR_SDQ4
DDR_SDQ5
DDR_SDQ6
DDR_SDQ7
DDR_SDQ8
DDR_SDQ9
DDR_SDQ10
DDR_SDQ11
DDR_SDQ12
DDR_SDQ13
DDR_SDQ14
DDR_SDQ15
DDR_SDQ16
DDR_SDQ17
DDR_SDQ18
DDR_SDQ19
DDR_SDQ20
DDR_SDQ21
DDR_SDQ22
DDR_SDQ23
DDR_SDQ24
DDR_SDQ25
DDR_SDQ26
DDR_SDQ27
DDR_SDQ28
DDR_SDQ29
DDR_SDQ30
DDR_SDQ31
DDR_SDQ32
DDR_SDQ33
DDR_SDQ34
DDR_SDQ35
DDR_SDQ36
DDR_SDQ37
DDR_SDQ38
DDR_SDQ39
DDR_SDQ40
DDR_SDQ41
DDR_SDQ42
DDR_SDQ43
DDR_SDQ44
DDR_SDQ45
DDR_SDQ46
DDR_SDQ47
DDR_SDQ48
DDR_SDQ49
DDR_SDQ50
DDR_SDQ51
DDR_SDQ52
DDR_SDQ53
DDR_SDQ54
DDR_SDQ55
DDR_SDQ56
DDR_SDQ57
DDR_SDQ58
DDR_SDQ59
DDR_SDQ60
DDR_SDQ61
DDR_SDQ62
DDR_SDQ63
DDR_CB0
DDR_CB1
DDR_CB2
DDR_CB3
DDR_CB4
DDR_CB5
DDR_CB6
DDR_CB7

MCH_TEST#

PCIRST# <13,15,19,20,21,22,25,31>

1 2

R91 @4.7K_0402_5%

+1.5VS

A A

5

4

NOTE:1.M_RCV# max 2Via

2.G15 to Via max=40mils

3.G14 to Via max=40mils

4.Via to Via must = 100mils +-5mils

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

RG82P4300M_FCBGA593

2

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

ICH4-M(2/3)

LA-1701

Monday, May 12, 2003

1

7 49

1.0

5

4

3

2

1

U12D

Odem

POWER GND

4

VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8

VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90

RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9

ETS#

E29
J29
N29
U29
AA29
AE29
A27
K27
AJ27
E26
G26
J26
L26
R26
W26
AC26
AF25
A23
F24
L24
M23
AC23
AH23
D21
H21
J22
L22
N22
T22
V22
Y22
AB22
AC21
AD22
AF21
AG22
AH21
A19
F20
H19
AB19
AC20
AD19
AE20
AF19
AG20
AH19
D17
H17
N17
R17
U17
AB17
AC18
AE18
AF17
AG18
AJ17
A15
F15
H15
N15
P16
R15
T16
U15
AB15
AD16
AF15
AJ15
D13
E14
H13
N13
P14
R13
T14
U13
AB13
AD14
AF13
AJ13
A11
F12
H11
AB11
AD12
AF11
AJ11
D9
H9

G16
G10
G9
H7
G2
G3
H3

H4

R327

1 2

10K_0603_0.5%

150U_D2_6.3VM

150U_D2_6.3VM

150U_D2_6.3VM

+2.5V

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

1

C382
10U_1206_10V4Z

2

R29

VCCAGP0

W29

VCCAGP1

AC29

VCCAGP2

AG29

VCCAGP3

U26

VCCAGP4

AA26

VCCAGP5

AE26

VCCAGP6

AJ25

VCCAGP7

AD23

VCCAGP8

AF23

VCCAGP9

R22

VCCAGP10

U22

VCCAGP11

W22

VCCAGP12

AA22

VCCAGP13

AB21

VCCAGP14

AD21

VCCAGP15

P17

VCC0

N16

VCC1

P15

VCC2

R16

VCC3

T15

VCC4

U16

VCC5

N14

VCC6

P13

VCC7

R14

VCC8

U14

VCC9

L29

VCCHL0

L25

VCCHL1

N26

VCCHL2

N23

VCCHL3

M22

VCCHL4

AG23

VCCP0

AJ23

VCCP1

AE21

VCCP2

AG21

VCCP3

AJ21

VCCP4

AB20

VCCP5

AC19

VCCP6

AD20

VCCP7

AE19

VCCP8

AF20

VCCP9

AG19

VCCP10

AJ19

VCCP11

AB18

VCCP12

AD18

VCCP13

AF18

VCCP14

AB14

VCCP15

AB10

VCCP16

M8

VCCP17

T8

VCCP18

AB8

VCCP19

C29

VCCSM0

G29

VCCSM1

A25

VCCSM2

D25

VCCSM3

K26

VCCSM4

D23

VCCSM5

H24

VCCSM6

K24

VCCSM7

L23

VCCSM8

A21

VCCSM9

F22

VCCSM10

H22

VCCSM11

K22

VCCSM12

D19

VCCSM13

H20

VCCSM14

A17

VCCSM15

F18

VCCSM16

H18

VCCSM17

D15

VCCSM18

F16

VCCSM19

H16

VCCSM20

A13

VCCSM21

F14

VCCSM22

H14

VCCSM23

D11

VCCSM24

H12

VCCSM25

A9

VCCSM26

F10

VCCSM27

H10

VCCSM28

D7

VCCSM29

H8

VCCSM30

K7

VCCSM31

A5

VCCSM32

E5

VCCSM33

H5

VCCSM34

J6

VCCSM35

C1

VCCSM36

G1

VCCSM37

T17

VCCGA

T13

VCCHA

RG82P4300M_FCBGA593

+1.5VS

D D

+1.2VS

+1.8VS

C C

+VCCP

+2.5V

B B

C368

+1.8VS

1

2

A A

0.1U_0402_16V4Z

5

C563

100U_6.3V_M

C395

10U_1206_10V4Z

C344

C301

C357

+2.5V

1

+

150U_D2_6.3VM

2

+2.5V

1

C411

2

0.1U_0402_16V4Z

+1.8VS

1

2

+1.5VS

1

+

2

+1.2VS

1

+

2

+VCCP

1

+

2

1

+

C401

2

0.1U_0402_16V4Z

1

1

C433

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C383

2

10U_1206_10V4Z

1

C361

2

10U_1206_10V4Z

150U_D2_6.3VM

1

+

C366

2

0.1U_0402_16V4Z

1

C305

2

1

C138

2

22U_1206_10V4Z

0.1U_0402_16V4Z

1

C410

C417

2

1

C396

2

0.1U_0402_16V4Z

1

C373

2

1

C347

2

2.2U_0805_10V6K

1

C311

2

0.1U_0402_16V4Z

22U_1206_10V4Z

1

1

C400

2

2

0.1U_0402_16V4Z

1

C409

2

0.1U_0402_16V4Z

1

C384

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

1

1

C371

2

2

0.1U_0402_16V4Z

0.22U_0603_10V7K

1

1

C353

2

2

0.015U_0402_16V7K

0.1U_0402_16V4Z

1

1

C315

2

2

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

1

C399

C398

2

0.1U_0402_16V4Z

1

1

C416

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C345

C336

2

0.01U_0402_16V7K

1

C374

C380

2

0.1U_0402_16V4Z

1

C338

C320

2

1

C408

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C413

2

1

C321

2

0.1U_0402_16V4Z

1

C393

2

0.022U_0603_16V7K

1

C310

2

0.1U_0402_16V4Z

1

C434

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

1

1

C402

C406

C419

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

C316

C306

0.1U_0402_16V4Z

2

2

1

C394

0.047U_0603_16V7K

2

0.1U_0402_16V4Z

1

1

C367

C337

0.1U_0402_16V4Z

2

2

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

ODEM(3/3)

LA-1701

Monday, May 12, 2003

1

1

C432

2

2

0.1U_0402_16V4Z

C418

0.1U_0402_16V4Z

1

8 49

1.0

5

DDR_SDQ5
DDR_SDQ4

DDR_SDQ3
DDR_SDQ1

D D

DDR_SDQ13
DDR_SDQ8

DDR_SDQ10
DDR_SDQ11 DDR_DQ11

DDR_SDQ15

DDR_SDQ7
DDR_SDQ2

DDR_SDQ14
DDR_SDQ9

DDR_SDQ17

DDR_SDQ18

C C

DDR_SDQ22 DDR_DQ22

DDR_SDQ20
DDR_SDQ16

DDR_SDQ19
DDR_SDQ23 DDR_DQ23

DDR_SDQ25 DDR_DQ25
DDR_SDQ24 DDR_DQ24

DDR_SDQ28 DDR_DQ28
DDR_SDQ29 DDR_DQ29

DDR_CB6

DDR_CB4 DDR_F_CB4

B B

DDR_CB3 DDR_F_CB3

DDR_SDQS8 DDR_DQS8
DDR_CB7

DDR_MMA0
DDR_MMA10

DDR_MMA1
DDR_MMA2

DDR_MMA4
DDR_MMA5

DDR_MMA9
DDR_MMA12

A A

DDR_MMA7

DDR_MMA8

DDR_MMA6 DDR_F_SMA6

DDR_SWE#<7,10>

RP18

1 4
2 3

10_4P2R_0404_5%

RP38

1 4
2 3

10_4P2R_0404_5%

RP37

1 4
2 3

10_4P2R_0404_5%

RP39

1 4
2 3

10_4P2R_0404_5%

RP41

1 4
2 3

10_4P2R_0404_5%

RP20

1 4
2 3

10_4P2R_0404_5%

RP19

1 4
2 3

10_4P2R_0404_5%

RP40

1 4
2 3

10_4P2R_0404_5%

RP42

1 4
2 3

10_4P2R_0404_5%

RP43

1 4
2 3

10_4P2R_0404_5%

RP21

1 4
2 3

10_4P2R_0404_5%

RP22

1 4
2 3

10_4P2R_0404_5%

RP44

1 4
2 3

10_4P2R_0404_5%

RP23

1 4
2 3

10_4P2R_0404_5%

RP46

1 4
2 3

10_4P2R_0404_5%

RP25

1 4
2 3

10_4P2R_0404_5%

RP47

1 4
2 3

10_4P2R_0404_5%

RP26

1 4
2 3

10_4P2R_0404_5%

RP29

1 4
2 3

10_4P2R_0404_5%

RP50

1 4
2 3

10_4P2R_0404_5%

RP28

1 4
2 3

10_4P2R_0404_5%

RP48

1 4
2 3

10_4P2R_0404_5%

RP27

1 4
2 3

10_4P2R_0404_5%

RP49

1 4
2 3

10_4P2R_0404_5%

DDR_F_CB6
DDR_F_CB2DDR_CB2

5

DDR_DQ5
DDR_DQ4

DDR_DQ3
DDR_DQ1

DDR_DQS0DDR_SDQS0
DDR_DQ6DDR_SDQ6

DDR_DQ13
DDR_DQ8

DDR_DQ10

DDR_DQ15
DDR_DQS1DDR_SDQS1

DDR_DQ7
DDR_DQ2

DDR_DQ14
DDR_DQ9

DDR_DQS2DDR_SDQS2
DDR_DQ17

DDR_DQ18

DDR_DQ20
DDR_DQ16

DDR_DQ19

DDR_F_CB5DDR_CB5

DDR_F_CB1DDR_CB1

DDR_F_CB7

DDR_F_SMA10

DDR_F_SMA1
DDR_F_SMA2

DDR_F_SMA4
DDR_F_SMA5

DDR_F_SMA9
DDR_F_SMA12

DDR_F_SMA7
DDR_F_SMA11DDR_MMA11

DDR_F_SMA8

1 4
2 3

10_4P2R_0404_5%

RP51

DDR_SDQ31 DDR_DQ31
DDR_SDQ30 DDR_DQ30

DDR_SDQ35 DDR_DQ35
DDR_SDQ39 DDR_DQ39

DDR_SDQS4 DDR_DQS4
DDR_SDQ36 DDR_DQ36

DDR_SDQ34 DDR_DQ34

DDR_SDQ40 DDR_DQ40
DDR_SDQ44 DDR_DQ44

DDR_SDQ45 DDR_DQ45
DDR_SDQ41 DDR_DQ41

DDR_SDQ46 DDR_DQ46
DDR_SDQ47 DDR_DQ47

DDR_SDQ52 DDR_DQ52

DDR_SDQ50 DDR_DQ50

DDR_SDQ48 DDR_DQ48

DDR_SBS1<7,10>

DDR_SCAS#<7,10>

DDR_SBS0<7,10>

DDR_SRAS#<7,10>

DDR_F_SWE#DDR_SWE#

DDR_F_SMA3DDR_MMA3

RP45

1 4
2 3

10_4P2R_0404_5%

RP24

1 4
2 3

10_4P2R_0404_5%

RP30

1 4
2 3

10_4P2R_0404_5%

RP31

1 4
2 3

10_4P2R_0404_5%

RP52

1 4
2 3

10_4P2R_0404_5%

RP53

1 4
2 3

10_4P2R_0404_5%

RP54

1 4
2 3

10_4P2R_0404_5%

RP55

1 4
2 3

10_4P2R_0404_5%

RP32

1 4
2 3

10_4P2R_0404_5%

RP56

1 4
2 3

10_4P2R_0404_5%

RP33

1 4
2 3

10_4P2R_0404_5%

RP34

1 4
2 3

10_4P2R_0404_5%

RP58

1 4
2 3

10_4P2R_0404_5%

RP57

1 4
2 3

10_4P2R_0404_5%

DDR_SDQ0

DDR_SDQ12

DDR_SDQ26 DDR_DQ26

DDR_SDQ33 DDR_DQ33

DDR_SDQS7 DDR_DQS7

DDR_CB0 DDR_F_CB0

4

DDR_DQ27DDR_SDQ27
DDR_DQS3DDR_SDQS3

DDR_DQ37DDR_SDQ37
DDR_DQ32DDR_SDQ32

DDR_DQ38DDR_SDQ38

DDR_DQ43DDR_SDQ43
DDR_DQ42DDR_SDQ42

DDR_DQ49DDR_SDQ49

DDR_DQ51DDR_SDQ51
DDR_DQ54DDR_SDQ54

DDR_DQS6DDR_SDQS6

DDR_DQ55DDR_SDQ55

12

R203 10_0402_5%

12

R201 10_0402_5%

12

R202 10_0402_5%

12

R221 10_0402_5%

12

R206 10_0402_5%

12

R207 10_0402_5%

12

R208 10_0402_5%

12

R224 10_0402_5%

12

R200 10_0402_5%

R205 10_0402_5%

R222 10_0402_5%

R223 10_0402_5%

R204 10_0402_5%

DDR_F_SBS1DDR_SBS1

12

DDR_F_SCAS#DDR_SCAS#

12

DDR_F_SBS0DDR_SBS0

12

DDR_F_SRAS#DDR_SRAS#

12

4

DDR_SDQ56 DDR_DQ56
DDR_SDQ62 DDR_DQ62

DDR_SDQ63 DDR_DQ63

DDR_SDQ61 DDR_DQ61

DDR_SDQ59 DDR_DQ59
DDR_SDQ57 DDR_DQ57

DDR_DQ21DDR_SDQ21

DDR_DQ0

DDR_DQ12

DDR_DQS5DDR_SDQS5

DDR_DQ53DDR_SDQ53DDR_F_SMA0

RP36

1 4
2 3

10_4P2R_0404_5%

RP59

1 4
2 3

10_4P2R_0404_5%

RP60

1 4
2 3

10_4P2R_0404_5%

RP35

1 4
2 3

10_4P2R_0404_5%

DDR_DQ58DDR_SDQ58

DDR_DQ60DDR_SDQ60

3

+2.5V

JP30

1

VREF

3

VSS

5

DQ0

7

DQ1

9

DDR_DQS0

DDR_DQS1

DDR_CLK0<7>

DDR_CLK0#<7>

DDR_DQS2

DDR_DQS3

DDR_F_CB0
DDR_F_CB1

DDR_DQS8
DDR_F_CB2

DDR_F_CB3

DDR_CLK2<7>
DDR_CLK2#<7>

DDR_CKE1<7,10>

SMB_DATA<10,12,15>

SMB_CLK<10,12,15>

DDR_CKE1

DDR_F_SMA12
DDR_F_SMA9

DDR_F_SMA7
DDR_F_SMA5
DDR_F_SMA3
DDR_F_SMA1

DDR_F_SMA10
DDR_F_SBS0
DDR_F_SWE#
DDR_SCS#0

DDR_DQS4

DDR_DQS5

DDR_DQS6

DDR_DQS7

+3VS

VDD

11

DQS0

13

DQ2

15

VSS

17

DQ3

19

DQ8

21

VDD

23

DQ9

25

DQS1

27

VSS

29

DQ10

31

DQ11

33

VDD

35

CK0

37

CK0#

39

VSS

41

DQ16

43

DQ17

45

VDD

47

DQS2

49

DQ18

51

VSS

53

DQ19

55

DQ24

57

VDD

59

DQ25

61

DQS3

63

VSS

65

DQ26

67

DQ27

69

VDD

71

CB0

73

CB1

75

VSS

77

DQS8

79

CB2

81

VDD

83

CB3

85

DU

87

VSS

89

CK2

91

CK2#

93

VDD

95

CKE1

97

DU/A13

99

A12

101

A9

103

VSS

105

A7

107

A5

109

A3

111

A1

113

VDD

115

A10/AP

117

BA0

119

WE#

121

S0#

123

DU

125

VSS

127

DQ32

129

DQ33

131

VDD

133

DQS4

135

DQ34

137

VSS

139

DQ35

141

DQ40

143

VDD

145

DQ41

147

DQS5

149

VSS

151

DQ42

153

DQ43

155

VDD

157

VDD

159

VSS

161

VSS

163

DQ48

165

DQ49

167

VDD

169

DQS6

171

DQ50

173

VSS

175

DQ51

177

DQ56

179

VDD

181

DQ57

183

DQS7

185

VSS

187

DQ58

189

DQ59

191

VDD

193

SDA

195

SCL

197

VDD_SPD

199

VDD_ID

AMP1565618_1_REVERSE4.0

DU/RESET#

DU/BA2

VREF

DQ12
DQ13

DQ14
DQ15

DQ20
DQ21

DQ22
DQ23

DQ28
DQ29

DQ30
DQ31

CKE0

RAS#
CAS#

DQ36
DQ37

DQ38
DQ39

DQ44
DQ45

DQ46
DQ47

CK1#

DQ52
DQ53

DQ54
DQ55

DQ60
DQ61

DQ62
DQ63

VSS
DQ4
DQ5
VDD
DM0
DQ6
VSS
DQ7

VDD
DM1

VSS

VDD
VDD
VSS
VSS

VDD
DM2

VSS

VDD
DM3

VSS

VDD
CB4
CB5
VSS
DM8
CB6
VDD
CB7

VSS
VSS
VDD
VDD

VSS

VDD
BA1

VSS

VDD
DM4

VSS

VDD
DM5

VSS

VDD
CK1

VSS

VDD
DM6

VSS

VDD
DM7

VSS

VDD
SA0
SA1
SA2

2

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100

A11

102

A8

104
106

A6

108

A4

110

A2

112

A0

114
116
118
120
122

S1#

124

DU

126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DU

DIMM0

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

+2.5V

DDR_DQ4DDR_DQ5
DDR_DQ6DDR_DQ0

DDR_DQ1DDR_DQ3
DDR_DQ2DDR_DQ7

DDR_DQ8DDR_DQ13
DDR_DQ12DDR_DQ9

DDR_DQ14DDR_DQ15
DDR_DQ11DDR_DQ10

DDR_DQ16DDR_DQ20
DDR_DQ17DDR_DQ21

DDR_DQ22DDR_DQ18
DDR_DQ23DDR_DQ19

DDR_DQ24DDR_DQ25
DDR_DQ29DDR_DQ28

DDR_DQ26DDR_DQ27
DDR_DQ30DDR_DQ31

DDR_F_CB4
DDR_F_CB5

DDR_F_CB6
DDR_F_CB7

DDR_CKE0

DDR_F_SMA11
DDR_F_SMA8

DDR_F_SMA6
DDR_F_SMA4
DDR_F_SMA2
DDR_F_SMA0

DDR_F_SBS1
DDR_F_SRAS#
DDR_F_SCAS#
DDR_SCS#1

DDR_DQ32DDR_DQ37
DDR_DQ36DDR_DQ33

DDR_DQ38DDR_DQ34
DDR_DQ39DDR_DQ35

DDR_DQ44DDR_DQ40
DDR_DQ41DDR_DQ45

DDR_DQ42DDR_DQ43
DDR_DQ47DDR_DQ46

DDR_DQ52DDR_DQ49
DDR_DQ48DDR_DQ55

DDR_DQ53DDR_DQ50
DDR_DQ54DDR_DQ51

DDR_DQ63DDR_DQ58
DDR_DQ57DDR_DQ59

DDR_DQ62DDR_DQ56
DDR_DQ61DDR_DQ60

1

+1.25VS_SDREF_R

1

C222

0.1U_0402_16V4Z

2

DDR_CKE0 <7,10>

DDR_SCS#1 <7,10>DDR_SCS#0<7,10>

DDR_CLK1# <7>
DDR_CLK1 <7>

Title

Size Document Number Rev

Date: Sheet of

DDR_SDQ[0..63]

DDR_DQ[0..63]

DDR_DQS[0..8]
DDR_SDQS[0..8]

DDR_CB[0..7]
DDR_F_CB[0..7]

DDR_MMA[0..12]

Compal Electronics, Inc.

DDR-SODIMM SLOT1

LA-1701

Monday, May 12, 2003

1

DDR_SDQ[0..63] <7>
DDR_DQ[0..63] <10>

DDR_DQS[0..8] <10>
DDR_SDQS[0..8] <7>

DDR_CB[0..7] <7>
DDR_F_CB[0..7] <10>

DDR_MMA[0..12] <7,10>

1.0

9 49

A

DDR_DQ6
DDR_DQ0

1 1

DDR_DQ2
DDR_DQ7

DDR_DQ4
DDR_DQ5

DDR_DQ1
DDR_DQ3

DDR_DQ10
DDR_DQ11

DDR_DQ15
DDR_DQ14

DDR_DQ13
DDR_DQ8

2 2

DDR_DQ9
DDR_DQ12

DDR_DQ16
DDR_DQ20

DDR_DQ23
DDR_DQ19

DDR_DQ17
DDR_DQ21

DDR_DQ22
DDR_DQ18

3 3

DDR_DQ28
DDR_DQ29

DDR_DQ25
DDR_DQ24

DDR_DQ27
DDR_DQ26

DDR_DQ30
DDR_DQ31

DDR_DQ38
DDR_DQ34

DDR_DQ35

4 4

DDR_DQ39

DDR_DQ32
DDR_DQ37

DDR_DQ33
DDR_DQ36

RP110

1 4
2 3

56_4P2R_0404_5%

RP108

1 4
2 3

56_4P2R_0404_5%

RP111

1 4
2 3

56_4P2R_0404_5%

RP109

1 4
2 3

56_4P2R_0404_5%

RP104

1 4
2 3

56_4P2R_0404_5%

RP105

1 4
2 3

56_4P2R_0404_5%

RP107

1 4
2 3

56_4P2R_0404_5%

RP106

1 4
2 3

56_4P2R_0404_5%

RP103

1 4
2 3

56_4P2R_0404_5%

RP100

1 4
2 3

56_4P2R_0404_5%

RP102

1 4
2 3

56_4P2R_0404_5%

RP101

1 4
2 3

56_4P2R_0404_5%

RP98

1 4
2 3

56_4P2R_0404_5%

RP99

1 4
2 3

56_4P2R_0404_5%

RP97

1 4
2 3

56_4P2R_0404_5%

RP96

1 4
2 3

56_4P2R_0404_5%

RP88

1 4
2 3

56_4P2R_0404_5%

RP87

1 4
2 3

56_4P2R_0404_5%

RP90

1 4
2 3

56_4P2R_0404_5%

RP89

1 4
2 3

56_4P2R_0404_5%

A

RP86

14
23

56_4P2R_0404_5%

RP85

14
23

56_4P2R_0404_5%

RP84

14
23

56_4P2R_0404_5%

RP83

14
23

56_4P2R_0404_5%

RP81

14
23

56_4P2R_0404_5%

RP82

14
23

56_4P2R_0404_5%

RP80

14
23

56_4P2R_0404_5%

RP79

14
23

56_4P2R_0404_5%

RP78

14
23

56_4P2R_0404_5%

RP76

14
23

56_4P2R_0404_5%

RP77

14
23

56_4P2R_0404_5%

RP75

14
23

56_4P2R_0404_5%

R228 56_0402_5%
R229 56_0402_5%

R230 56_0402_5%
R231 56_0402_5%

R232 56_0402_5%
R233 56_0402_5%

R234 56_0402_5%
R235 56_0402_5%

R236 56_0402_5%

1 2

12
12

12
12

12
12

12
12

DDR_DQ40
DDR_DQ44

DDR_DQ45
DDR_DQ41

DDR_DQ43
DDR_DQ42

DDR_DQ46
DDR_DQ47

DDR_DQ55
DDR_DQ48

DDR_DQ49
DDR_DQ52

DDR_DQ50
DDR_DQ53

DDR_DQ51
DDR_DQ54

DDR_DQ58
DDR_DQ63

DDR_DQ56
DDR_DQ62

DDR_DQ59
DDR_DQ57

DDR_DQ60
DDR_DQ61

DDR_DQS0
DDR_DQS1

DDR_DQS2
DDR_DQS3

DDR_DQS4
DDR_DQS5

DDR_DQS6
DDR_DQS7

DDR_DQS8

B

+1.25VS+1.25VS

RP67

56 _8P4R_0804_5%
RP94

56 _8P4R_0804_5%
RP95

56 _8P4R_0804_5%
RP93

56 _8P4R_0804_5%

RP66

56_4P2R_0404_5%

56_4P2R_0404_5%

56_4P2R_0404_5%

56_4P2R_0404_5%

56_4P2R_0404_5%
RP61

56_4P2R_0404_5%

56_4P2R_0404_5%

56_4P2R_0404_5%

56_4P2R_0404_5%

RP65

RP68

RP91

RP92

RP63

RP62

RP64

18
27
36
45

18
27
36
45

18
27
36
45

18
27
36
45

14
23

14
23

14
23

14
23

14
23

14
23

14
23

14
23

14
23

DDR_MMA10
DDR_SBS1
DDR_SBS0

DDR_SRAS#

DDR_MMA7

DDR_MMA6

DDR_MMA5

DDR_MMA4

DDR_MMA12

DDR_MMA11

DDR_MMA9

DDR_MMA8

DDR_MMA3

DDR_MMA2

DDR_MMA1

DDR_MMA0

DDR_CKE0
DDR_CKE1

DDR_CKE2
DDR_CKE3

DDR_SWE#

DDR_SCAS#

DDR_SCS#2
DDR_SCS#3

DDR_SCS#1
DDR_SCS#0

DDR_F_CB0
DDR_F_CB4

DDR_F_CB2
DDR_F_CB6

DDR_F_CB1
DDR_F_CB5

DDR_F_CB3
DDR_F_CB7

DDR_SBS1 <7,9>
DDR_SBS0 <7,9>

DDR_CKE0 <7,9>
DDR_CKE1 <7,9>

DDR_SCS#1 <7,9>
DDR_SCS#0 <7,9>

C

+2.5V

JP22

1

VREF

3

DDR_DQ4
DDR_DQ6

DDR_DQS0
DDR_DQ1

DDR_DQ2
DDR_DQ8

DDR_DQ12
DDR_DQS1

DDR_DQ14
DDR_DQ11

DDR_CLK3<7>

DDR_CLK3#<7>

DDR_DQ16
DDR_DQ17

DDR_DQS2
DDR_DQ22

DDR_DQ23
DDR_DQ24

DDR_DQ29
DDR_DQS3

DDR_DQ26
DDR_DQ30

DDR_F_CB0
DDR_F_CB1

DDR_DQS8
DDR_F_CB2

DDR_F_CB3

DDR_CLK5<7>
DDR_CLK5#<7>

DDR_CKE3<7>

DDR_SWE#<7,9> DDR_SCAS# <7,9>

DDR_SCS#2<7> DDR_SCS#3 <7>

SMB_DATA<9,12,15>

DDR_CKE3
DDR_MMA12

DDR_MMA9
DDR_MMA7

DDR_MMA5
DDR_MMA3
DDR_MMA1 DDR_MMA0

DDR_MMA10
DDR_SBS0
DDR_SWE#
DDR_SCS#2

DDR_DQ32
DDR_DQ36

DDR_DQS4
DDR_DQ38

DDR_DQ39
DDR_DQ44

DDR_DQ41
DDR_DQS5

DDR_DQ42
DDR_DQ47

DDR_DQ52
DDR_DQ48

DDR_DQS6
DDR_DQ53

DDR_DQ54
DDR_DQ63

DDR_DQ57
DDR_DQS7

DDR_DQ62
DDR_DQ61

SMB_CLK<9,12,15>

+3VS

VSS

5

DQ0

7

DQ1

9

VDD

11

DQS0

13

DQ2

15

VSS

17

DQ3

19

DQ8

21

VDD

23

DQ9

25

DQS1

27

VSS

29

DQ10

31

DQ11

33

VDD

35

CK0

37

CK0#

39

VSS

41

DQ16

43

DQ17

45

VDD

47

DQS2

49

DQ18

51

VSS

53

DQ19

55

DQ24

57

VDD

59

DQ25

61

DQS3

63

VSS

65

DQ26

67

DQ27

69

VDD

71

CB0

73

CB1

75

VSS

77

DQS8

79

CB2

81

VDD

83

CB3

85

DU

87

VSS

89

CK2

91

CK2#

93

VDD

95

CKE1

97

DU/A13

99

A12

101

A9

103

VSS

105

A7

107

A5

109

A3

111

A1

113

VDD

115

A10/AP

117

BA0

119

WE#

121

S0#

123

DU

125

VSS

127

DQ32

129

DQ33

131

VDD

133

DQS4

135

DQ34

137

VSS

139

DQ35

141

DQ40

143

VDD

145

DQ41

147

DQS5

149

VSS

151

DQ42

153

DQ43

155

VDD

157

VDD

159

VSS

161

VSS

163

DQ48

165

DQ49

167

VDD

169

DQS6

171

DQ50

173

VSS

175

DQ51

177

DQ56

179

VDD

181

DQ57

183

DQS7

185

VSS

187

DQ58

189

DQ59

191

VDD

193

SDA

195

SCL

197

VDD_SPD

199

VDD_ID

AMP11376408_STANDARD5.2

D

VREF

DQ4
DQ5
VDD
DM0
DQ6
VSS
DQ7

DQ12

VDD

DQ13

DM1

VSS
DQ14
DQ15

VDD

VDD

VSS

VSS

DQ20
DQ21

VDD

DM2
DQ22

VSS
DQ23
DQ28

VDD
DQ29

DM3

VSS
DQ30
DQ31

VDD

CB4

CB5

VSS

DM8

CB6

VDD

CB7

DU/RESET#

VSS

VSS

VDD

VDD
CKE0

DU/BA2

VSS

VDD
RAS#

CAS#

VSS
DQ36
DQ37

VDD

DM4
DQ38

VSS
DQ39
DQ44

VDD
DQ45

DM5

VSS
DQ46
DQ47

VDD

CK1#

CK1

VSS
DQ52
DQ53

VDD

DM6
DQ54

VSS
DQ55
DQ60

VDD
DQ61

DM7

VSS
DQ62
DQ63

VDD

+2.5V

2
4

VSS

6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100

A11

102

A8

104
106

A6

108

A4

110

A2

112

A0

114
116

BA1

118
120
122

S1#

124

DU

126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194

SA0

196

SA1

198

SA2

200

DU

DDR_DQ5
DDR_DQ0

DDR_DQ3
DDR_DQ7

DDR_DQ13
DDR_DQ9

DDR_DQ15
DDR_DQ10

DDR_DQ20
DDR_DQ21

DDR_DQ18
DDR_DQ19

DDR_DQ25
DDR_DQ28

DDR_DQ27
DDR_DQ31

DDR_F_CB4
DDR_F_CB5

DDR_F_CB6
DDR_F_CB7

DDR_CKE2

DDR_MMA11
DDR_MMA8

DDR_MMA6
DDR_MMA4
DDR_MMA2

DDR_SBS1
DDR_SRAS#
DDR_SCAS#
DDR_SCS#3

DDR_DQ37
DDR_DQ33

DDR_DQ34
DDR_DQ35

DDR_DQ40
DDR_DQ45

DDR_DQ43
DDR_DQ46

DDR_DQ49
DDR_DQ55

DDR_DQ50
DDR_DQ51

DDR_DQ58
DDR_DQ59

DDR_DQ56
DDR_DQ60

+1.25VS_SDREF_R

1

2

DDR_MMA[0..12]

DDR_CKE2 <7>

DDR_SRAS# <7,9>

DDR_CLK4# <7>
DDR_CLK4 <7>

+3VS

C234

0.1U_0402_16V4Z

DDR_SDQ[0..63]

DDR_DQ[0..63]

DDR_DQS[0..8]
DDR_SDQS[0..8]

DDR_CB[0..7]
DDR_F_CB[0..7]

1 2

R343 0_0805_5%

E

+SDREF

DDR_SDQ[0..63] <7,9>
DDR_DQ[0..63] <9>

DDR_DQS[0..8] <9>
DDR_SDQS[0..8] <7,9>

DDR_CB[0..7] <7,9>
DDR_F_CB[0..7] <9>

DDR_MMA[0..12] <7,9>

DIMM1

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

DDR-SODIMM SLOT1

LA-1701

Monday, May 12, 2003

E

10 49

1.0

A

B

C

D

E

Layout note :

Distribute as close as possible
to DDR-SODIMM.

+2.5V

1 1

1

C223

0.1U_0402_16V4Z

2

1

C224

0.1U_0402_16V4Z

2

1

C225

0.1U_0402_16V4Z

2

1

C226

0.1U_0402_16V4Z

2

1

C227

0.1U_0402_16V4Z

2

1

C229

0.1U_0402_16V4Z

2

1

C228

0.1U_0402_16V4Z

2

1

C230

0.1U_0402_16V4Z

2

1

C231

0.1U_0402_16V4Z

2

1

C502

0.1U_0402_16V4Z

2

1

C503

0.1U_0402_16V4Z

2

+2.5V

1

0.1U_0402_16V4Z

2

C504

1

C497

0.1U_0402_16V4Z

2

1

C498

0.1U_0402_16V4Z

2

1

C499

0.1U_0402_16V4Z

2

1

C500

0.1U_0402_16V4Z

2

1

C501

0.1U_0402_16V4Z

2

+2.5V

1

+

C221
150U_D2_6.3VM

2

1

+

C505
150U_D2_6.3VM

2

Layout note :

Place one cap close to every 2 pull up resistors termination to
+1.25V

2 2

3 3

+1.25VS

1

0.1U_0402_16V4Z

2

+1.25VS

1

0.1U_0402_16V4Z

2

+1.25VS

1

0.1U_0402_16V4Z

2

+1.25VS

1

0.1U_0402_16V4Z

2

C546

C535

C525

C514

1

C545

0.1U_0402_16V4Z

2

1

C534

0.1U_0402_16V4Z

2

1

C524

0.1U_0402_16V4Z

2

1

C241

0.1U_0402_16V4Z

2

1

C544

0.1U_0402_16V4Z

2

1

C533

0.1U_0402_16V4Z

2

1

C523

0.1U_0402_16V4Z

2

1

C512

0.1U_0402_16V4Z

2

1

C543

0.1U_0402_16V4Z

2

1

C531

0.1U_0402_16V4Z

2

1

C522

0.1U_0402_16V4Z

2

1

C511

0.1U_0402_16V4Z

2

1

C542

0.1U_0402_16V4Z

2

1

C240

0.1U_0402_16V4Z

2

1

C521

0.1U_0402_16V4Z

2

1

C510

0.1U_0402_16V4Z

2

1

C541

0.1U_0402_16V4Z

2

1

C530

0.1U_0402_16V4Z

2

1

C520

0.1U_0402_16V4Z

2

1

C242

0.1U_0402_16V4Z

2

1

C540

0.1U_0402_16V4Z

2

1

C529

0.1U_0402_16V4Z

2

1

C519

0.1U_0402_16V4Z

2

1

C508

0.1U_0402_16V4Z

2

1

C539

0.1U_0402_16V4Z

2

1

C528

0.1U_0402_16V4Z

2

1

C518

0.1U_0402_16V4Z

2

1

C507

0.1U_0402_16V4Z

2

1

C538

0.1U_0402_16V4Z

2

1

C527

0.1U_0402_16V4Z

2

1

C517

0.1U_0402_16V4Z

2

1

C236

0.1U_0402_16V4Z

2

1

C536

0.1U_0402_16V4Z

2

1

C526

0.1U_0402_16V4Z

2

1

C515

0.1U_0402_16V4Z

2

1

C237

0.1U_0402_16V4Z

2

+1.25VS

1

C537

0.1U_0402_16V4Z

2

4 4

+1.25VS

1

0.1U_0402_16V4Z

2

C248

1

C238

0.1U_0402_16V4Z

2

1

C249

0.1U_0402_16V4Z

2

A

1

C239

0.1U_0402_16V4Z

2

1

C509

0.1U_0402_16V4Z

2

1

C243

0.1U_0402_16V4Z

2

1

C532

0.1U_0402_16V4Z

2

1

C244

0.1U_0402_16V4Z

2

1

C245

0.1U_0402_16V4Z

2

B

1

C246

0.1U_0402_16V4Z

2

1

C247

0.1U_0402_16V4Z

2

1

C516

0.1U_0402_16V4Z

2

1

C513

0.1U_0402_16V4Z

2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

DDR SODIMM Decoupling

LA-1701

Monday, May 12, 2003

E

11 49

1.0

A

SEL1

0

0

VGATE<16,32,41>

SEL0

1

1

+3VS

@10P_0402_50V8K

166.67

200.000

133.33

@1K_0402_5%

CLKEN#<41>

1 2

R198 10K_0402_5%

C171

SEL2 CPUCLKC[0..2]

0

0

0
0 1

1 1

2 2

CLK_ICH_48M<16>

CLK_SD_48M<31>

CLK_ICH_14M<16>
CLK_14M_SIO<22>

CLK_14M_CODEC<23>

3 3

@1K_0402_5%

R139

1 2
1 2

R132
1K_0402_5%

2

G

1

2

B

CPUCLKT[0..2]

166.670

100.00100.00

200.001

133.33

+3VS

12

R133

13

D

Q29
@2N7002 1N_SOT23

S

1

C142
@10P_0402_50V8K

2

+3VS

12

R140
1K_0402_5%

1 2

R366 1K_0402_5%

SLP_S1#<16,29>
STP_PCI#<16>
STP_CPU#<16,41>

+3VS

SMB_DATA<9,10,15>

SMB_CLK<9,10,15>

R364 475_0402_1%

1 2

R180 33_0402_5%

1 2

R186 33_0402_5%

1 2

R128 33_0402_5%

1 2
1 2

R127 33_0402_5%

1 2

R126 33_0402_5%

C151
@10P_0402_50V8K

1 2

1 2

C154
@10P_0402_50V8K

1 2

R362 10K_0402_5%

C

+3VS

1 2

XTALIN

12

Y2

14.318MHZ_16PF_DSX840GA

XTALOUT

CLK_ICH48M

CLK_SD48M

CLK_ICH14M

L13
CHB2012U121_0805

U18

2

XTAL_IN

3

XTAL_OUT

54

SEL0

55

SEL1

40

SEL2

25

PWR_DWN#

34

PCI_STOP#

53

CPU_STOP#

28

VTT_PWRGD#

43

MULT0

29

SDATA

30

SCLK

33

3V66_0

35

3V66_1/VCH_CLK

42

IREF

39

48MHZ_USB

38

48MHZ_DOT

56

REF

+3V_CLK

Width=40 mils

1

14

VDD_REF

VDD_PCI_08VDD_PCI_1

GND_REF4GND_PCI_09GND_PCI_115GND_3V66_0

D

1

2

19

32

37

50

VDD_CPU_046VDD_CPU_1

VDD_48MHZ

VDD_3V66_0

VDD_3V66_1

GND_3V66_131GND_48MHZ36GND_IREF41GND_CPU

20

47

C192
10U_1206_10V4Z

26

VDDA

27

VSSA

45

CPUCLKT2

44

CPU_CLKC2

49

CPUCLKT1

48

CPUCLKC1

52

CPUCLKT0

51

CPUCLKC0

24

3V66_5

23

3V66_4

22

3V66_3

21

3V66_2

7

PCICLK_F2

6

PCICLK_F1

5

PCICLK_F0

18

PCICLK6

17

PCICLK5

16

PCICLK4

13

PCICLK3

12

PCICLK2

11

PCICLK1

10

PCICLK0

ICS950810CG_TSSOP56

1

C186

2

0.1U_0402_16V4Z

+3V_VDD

1

C187

2

0.1U_0402_16V4Z

CLK_BCLK

CLK_BCLK#

CLK_MCH

CLK_MCH#
CLK_ITP

CLK_ITP#

AGP_66M
MCH_66M
ICH_66M

PCI_ICH

PCI_1394
PCI_SD
PCI_LAN
PCI_PCM
PCI_MINI
PCI_SIO
PCI_LPC

E

0.1U_0402_16V4Z

1

C166

2

1

C191
10U_1206_10V4Z

2

1

C144

2

0.1U_0402_16V4Z

L14
CHB2012U121_0805

1 2

1 2

R169
33_0402_5%

R172
33_0402_5%

1 2
1 2

R160
33_0402_5%

R166
33_0402_5%

1 2
1 2

R150
33_0402_5%

R155
33_0402_5%

1 2

1 2
1 2
1 2

1 2

1 2
1 2
1 2
1 2
1 2
1 2
1 2

0.1U_0402_16V4Z

1

1

C181

2

2

0.1U_0402_16V4Z

+3VS

R170

49.9_0402_1%

1 2
1 2

R173 49.9_0402_1%

R161

49.9_0402_1%

1 2
1 2

R167

R151

49.9_0402_1%

1 2
1 2

R156

R191 33_0402_5%
R188 33_0402_5%
R185 33_0402_5%

R158 33_0402_5%

R178 33_0402_5%
R179 33_0402_5%
R171 33_0402_5%
R168 33_0402_5%
R165 33_0402_5%
R164 33_0402_5%
R157 33_0402_5%

C177
@10P_0402_50V8K

0.1U_0402_16V4Z

1

C462

2

CLK_CPU_BCLK <4>

CLK_CPU_BCLK# <4>
CLK_MCH_BCLK <6>

49.9_0402_1%

CLK_MCH_BCLK# <6>
CLK_CPU_ITP <4>

49.9_0402_1%

CLK_CPU_ITP# <4>

1

2

F

1

C471

2

0.1U_0402_16V4Z

1

2

@10P_0402_50V8K

C465

C180

0.1U_0402_16V4Z

1

C464

2

1

C184
@10P_0402_50V8K

2

CLK_AGP_66M <13>
CLK_MCH_66M <6>
CLK_ICH_66M <15>

CLK_PCI_ICH <15>

CLK_PCI_1394 <20>

CLK_PCI_SD <31>
CLK_PCI_LAN <19>
CLK_PCI_PCM <21>
CLK_PCI_MINI <25>
CLK_PCI_SIO <22>
CLK_PCI_LPC <29>

G

H

Clock Generator

4 4

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

C

D

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

E

F

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

Clock Generator

LA-1701

Monday, May 12, 2003

G

12 49

H

1.0

5

4

3

2

1

AGP CONN

JP12

1

GND

D D

C C

CLK_AGP_66M<12> RED<14,33>

AGP_ADSTB1#<6>

AGP_SBSTB<6>

AGP_SBSTB#<6>

AGP_AD16
AGP_AD17
AGP_AD18
AGP_AD19
AGP_AD20
AGP_AD21
AGP_AD22
AGP_AD23

AGP_AD24
AGP_AD25
AGP_AD26
AGP_AD27

AGP_AD29
AGP_AD30
AGP_AD31
AGP_CBE#2

AGP_CBE#3
AGP_ADSTB1
AGP_ADSTB1#

AGP_SBA0

AGP_SBA1

AGP_SBA2

AGP_SBA3

AGP_SBA4
AGP_SBSTB

AGP_SBSTB#

AGP_ST0

AGP_ST1

AGP_ST2

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

GND

23

23

25

25

27

27

29

29

31

31

33

33

35

35

37

37

39

39

41

GND

43

43

45

45

47

47

49

49

51

51

53

53

55

55

57

57

59

59

61

GND

63

63

65

65

67

67

69

69

71

71

73

73

75

75

77

77

79

79

81

GND

83

83

85

85

87

87

89

89

91

91

93

93

95

95

97

97
GND99GND

FOXCONN-100P

GND

GND

GND

GND

GND

2
4

4
6

8
10
12
14
16
18
20

24
26
28
30
32
34
36
38
40

44
46
48
50
52
54
56
58
60

64
66
68
70
72
74
76
78
80

84
86
88
90
92
94
96
98

AGP_AD0

6

AGP_AD1

8

AGP_AD2

10

AGP_AD3

12

AGP_AD4

14

AGP_AD5

16

AGP_AD6

18

AGP_AD7

20
22

AGP_AD8

24

AGP_AD9

26

AGP_AD10

28

AGP_AD11

30

AGP_AD12

32

AGP_AD13

34

AGP_AD14

36

AGP_AD15

38

AGP_CBE#0

40
42

AGP_CBE#1

44

AGP_ADSTB0

46

AGP_ADSTB0#

48
50

AGP_SBA5

52

AGP_SBA6

54

AGP_SBA7

56
58

AGP_IRDY#

60
62

AGP_TRDY#

64

AGP_STOP#

66

AGP_PAR

68

AGP_FRAME#

70

AGP_DEVSEL#

72

AGP_RBF#

74

AGP_WBF#

76

AGP_REQ#

78

AGP_GNT#

80
82
84
86
88
90
92
94
96
98
100

PCIRST# <7,15,19,20,21,22,25,31>

AGP_ADSTB0 <6>AGP_ADSTB1<6>
AGP_ADSTB0# <6>

AGP_IRDY# <6>
AGP_TRDY# <6>

AGP_STOP# <6>
AGP_PAR <6>
AGP_FRAME# <6>
AGP_DEVSEL# <6>
AGP_RBF# <6>
AGP_WBF# <6>
AGP_REQ# <6>
AGP_GNT# <6>

PCI_PIRQA# <15,20>

+3VS

AGP_SBA[0..7]<6>

AGP_CBE#[0..3]<6>

AGP_SBA[0..7]
AGP_CBE#[0..3]

C3_STAT#<16>

AGP_BUSY#<16>

DDCDATA<14>

DDCCLK<14>

SUS_STAT#<16,30>

MSEN#<14,29,33>

AGP_AD[0..31]<6>

AGP_ST[0..2]<6>

RED

GREEN<14,33>

HSYNC<14>
VSYNC<14>

LUMA<14,33>
CRMA<14,33>

COMPS<14,33>

PID0<22>
PID1<22>
PID2<22>
PID3<22>

GREEN
BLUE

BLUE<14,33>

HSYNC
VSYNC

LUMA
CRMA
COMPSAGP_AD28
ENAVDD

ENABLT#

+1.5VS

+1.8VS

+2.5VS +2.5VS

VB1<16>

AGP_AD[0..31]
AGP_ST[0..2]

JP13

1
3
5
7

9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97

FOXCONN-100P

GND

GND
3
5
7
9
11
13
15
17
19

GND

GND
23
25
27
29
31
33
35
37
39

GND

GND
43
45
47
49
51
53
55
57
59

GND

GND
63
65
67
69
71
73
75
77
79

GND

GND
83
85
87
89
91
93
95
97
GND99GND

CPUB++_L

2
4

4

6

6

8

8

10

10

12

12

14

14

16

16

18

18

20

20

22

DAC_BRIG

24

24
26
28
30
32
34
36
38
40

44
46
48
50
52
54
56
58
60

64
66
68
70
72
74
76
78
80

84
86
88
90
92
94
96
98

DISPOFF#

26

INVT_PWM

28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100

LCDVDD

DAC_BRIG <29>
INVT_PWM <29>

+1.5VS

+1.8VS

VB0 <16>

VB2 <16>

L6

1 2

KC FBM-L11-201209-221LMAT_0805

1

C45
68P_0402_50V8J

2

CPUB++

+3VS

B B

LCD POWER CIRCUIT

LCDVDD

+12VALW

12

R14

100_0402_5%

D

Q7

2N7002 1N_SOT23

A A

S

ENAVDD

5

R15
100K_0402_5%

1 2

13

2

G

13

22K

2

22K

2

G

Q6
DTC124EK_SOT23

+12VALW

R16
100K_0402_5%

1 2

R17

13

D

150K_0402_5%

Q5

S

2N7002 1N_SOT23

0.047U_0402_16V4Z

1

2

1 2

4

LCDVDD

C25

0.1U_0402_16V7K

+3VS

D

S

13

Q8

G

SI2302DS 1N_SOT23

2

1

1

C27

C28

4.7U_0805_10V4Z

2

2

1

C24

4.7U_0805_10V4Z

2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

C302

0.1U_0402_16V4Z

2

BKOFF#<29>

ENABLT#<29>

3

RB751V_SOD323

ENABLT#

+2.5VS

1

C111

0.1U_0402_16V4Z

2

+3VS

12

R52

4.7K_0402_5%

D10

DISPOFF#

21

13

D

Q15

2

G

2N7002 1N_SOT23

S

+1.8VS

1

2

2

C94

0.1U_0402_16V4Z

+1.5VS

1

C89

0.1U_0402_16V4Z

2

Compal Electronics, Inc.

Title

Size Document Number Rev
Custom

Date: Sheet of

LA-1701

AGP & LCD CONN

1

13 49Monday, May 12, 2003

1.0

A

B

C

D

E

CRT Connector

D1

DAN217_SOT23

1

1 1

2

3

CRTVDD

RED_L

GREEN_L

BLUE_L

1

C1
18P_0402_50V8J

2

R255

1 2

L22

FCM2012C-800_0805

1 2

L21

FCM2012C-800_0805

1 2

L20

FCM2012C-800_0805

1

C265

2

@22P_0402_25V8K

12

12

R254
@10K_0402_5%

RED<13,33>

GREEN<13,33>

BLUE<13,33>

12

R258

75_0402_1%

75_0402_1%

+5VS

1

+5VS

14

P

A2Y

G

7

14

P

A5Y

G

7

OE

4

OE

2 2

HSYNC<13>

VSYNC<13>

12

12

R256

R257

75_0402_1%

1

C573

0.1U_0402_16V4Z

2

U43A

3

SN74AHCT126PWR_TSSOP14

U43B

6

SN74AHCT126PWR_TSSOP14

1

C263

2

@22P_0402_25V8K

1

C264

@22P_0402_25V8K

2

@10K_0402_5%

D2

DAN217_SOT23

1

2

3

1

C2
18P_0402_50V8J

2

1 2

L19 FBM-L10-160808-300LM-T

1 2

L18 FBM-L10-160808-300LM-T

C3

10P_0402_50V8K

D_VSYNC <33>
D_HSYNC <33>

DAN217_SOT23

1

2

1

2

D3

1

2

3

C4
18P_0402_50V8J

D_HSYNC_L

D_VSYNC_L

1

C5
10P_0402_50V8K

2

+3VS

POLYSWITCH_1A

DDC_MD2

1

C6
100P_0402_50V8J

2

F1

RB411D_SOT23

0.1U_0402_16V7K

MSEN#<13,29,33>

68P_0402_50V8K

D16

2 1

C52

C255

1

2

1

1

2

2

+5VS

TV-Out Connector

DAN217_SOT23

D14

1

DAN217_SOT23

1

D13

DAN217_SOT23

+3VS

D15

1

W=40mils

JP1
CRT-15P

6

11

1
7

12

2
8

13

3
9

14

4
10
15

5

C257
68P_0402_50V8K

Unused GATE

CRTVDD+RCRT_VCC

4.7K_0402_5%

D

1 3

2

+5VS+5VS

+3VS

12

12

R264

R265

4.7K_0402_5%

Q1

S

G

R269

1 2

10K_0402_5%

13

14

U43D

P

OE

11

A12Y

G

SN74AHCT126PWR_TSSOP14

7

DDCDATA <13>

DDCCLK <13>

+3VS

CRTVDD

12

R246

2.2K_0402_5%

BSN20_SOT23

D_DDCCLK <33>

D_DDCDATA <33>

10

14

U43C

P

OE

8

A9Y

G

SN74AHCT126PWR_TSSOP14

7

CRTVDD

12

R245

2.2K_0402_5%

D

1 3

BSN20_SOT23

Q2

S

G

2

3 3

C10

1 2

47P_0402_50V8J

1

C13
150P_0402_50V8J

2

1 2

L1 FCM1608C-121T_0603

C12

1 2

47P_0402_50V8J

1 2

L3 FCM1608C-121T_0603

C11

1 2

47P_0402_50V8J

1 2

L2 FCM1608C-121T_0603

270P_0402_50V7K

LUMA<13,33>

CRMA<13,33>

COMPS<13,33>

4 4

A

75_0402_1%

R7

12

R8

75_0402_1%

12

12

R6

150P_0402_50V8J

75_0402_1%

C14

1

2

150P_0402_50V8J

1

C15

2

B

C256

COMPS_CL

1

2

2

3

2

3

LUMA_CL

CRMA_CL

1

C8

2

270P_0402_50V7K

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

1

C7
270P_0402_50V7K

2

2

3

S-Video

S CONN._SUYIN

FM2

1

CF2

1

CF7

1

H1

JP3

1
2
3
4
5
6
7

HOLEA

H11
HOLEA

1

1

H23
HOLEA

1

D

1

1

1

H2
HOLEA

H8
HOLEA

H6
HOLEA

FM1

1

CF9

1

CF11

1

1

1

1

FM5

H18
HOLEA

1

H9
HOLEA

1

H20
HOLEA

1

FM3

CF3

CF15

1

1

1

FM4

1

CF10

1

CF13

1

H16
HOLEA

1

H13
HOLEA

1

H24
HOLEA

1

Title

Size Document Number Rev

Date: Sheet of

FM6

1

CF8

CF12

H22
HOLEA

1

H7
HOLEA

1

H26
HOLEA

1

CF16

1

CF4

H17
HOLEA

1

H10
HOLEA

1

H3
HOLEA

1

H12
HOLEA

1

H25
HOLEA

1

1

CF1

1

Compal Electronics, Inc.

CRT & TVout Connector

LA-1701

Monday, May 12, 2003

1

H14
HOLEA

H4
HOLEA

CF5

H19
HOLEA

1

H5
HOLEA

1

14 49

1

H21
HOLEA

H15
HOLEA

CF6

1

1

1.0

CF14

1

1

1

E

A

PCI_AD[0..31]<19,20,21,25>

1 1

2 2

CLK_PCI_ICH

CLK_ICH_66M

12

R344
10_0402_5%

1

C447
15P_0402_50V8J

2

12

R346
@22_0402_5%

1

C460
@10P_0402_50V8K

2

PCI Pullups

PCI_PERR#
PCI_REQA#
PCI_STOP#
PCI_SERR#

+3VS

3 3

4 4

PCI_IRDY#
PCI_TRDY#
PCI_DEVSEL#
PCI_FRAME#

+3VS

+3VS

RP72

1 8
2 7
3 6
4 5

8.2K _8P4R_0804_5%

1 2

R322 @1K_0402_5%

RP9

1
2
3
4
5

8.2K_10P8R_1206_5%

RP11

1
2
3
4
5

8.2K_10P8R_1206_5%

PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3

PIDERST#

10

PCI_PIRQA#

9

PCI_PIRQB#

8

PCI_REQ#4

7

PCI_REQB#

6

10

PCI_PIRQC#

9

PCI_PIRQD#

8

SIRQ

7

PCI_LOCK#

6

+3VS

+3VS

PCIRST#

+3VS

5

P

I2O

G

3

1 2

R347 0_0402_5%

B

PCI_AD[0..31]

PCI_CBE#0<19,20,21,25>
PCI_CBE#1<19,20,21,25>
PCI_CBE#2<19,20,21,25>
PCI_CBE#3<19,20,21,25>

PCI_REQ#0<20>
PCI_REQ#1<19>
PCI_REQ#2<21>
PCI_REQ#3<25>
PCI_REQ#4<25>

PCI_GNT#0<20>
PCI_GNT#1<19>
PCI_GNT#2<21>
PCI_GNT#3<25>
PCI_GNT#4<25>

CLK_PCI_ICH<12>

PCI_FRAME#<19,20,21,25>

PCI_DEVSEL#<19,20,21,25>

PCI_IRDY#<19,20,21,25>

PCI_PAR<19,20,21,25>

PCI_PERR#<19,20,21,25>

PCIRST#<7,13,19,20,21,22,25,31>

PCI_SERR#<19,21,25>

PCI_STOP#<19,20,21,25>

PCI_TRDY#<19,20,21,25>

PIDERST#<18>
SIDERST#<18>

1

U37

4

OE#

@74LVC1G125GW_SOT3535

PCI_FRAME#
PCI_DEVSEL#
PCI_IRDY#

PCI_PERR#
PCI_LOCK#

PCIRST#
PCI_SERR#
PCI_STOP#
PCI_TRDY#

B_PCIRST# <18,29>

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3

PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3
PCI_REQ#4

PCI_GNT#0
PCI_GNT#1
PCI_GNT#2
PCI_GNT#3
PCI_GNT#4

CLK_PCI_ICH

PCI_REQA#
PCI_REQB#

PIDERST#
SIDERST#

U8A

H5

AD0

J3

AD1

H3

AD2

K1

AD3

G5

AD4

J4

AD5

H4

AD6

J5

AD7

K2

AD8

G2

AD9

L1

AD10

G4

AD11

L2

AD12

H2

AD13

L3

AD14

F5

AD15

F4

AD16

N1

AD17

E5

AD18

N2

AD19

E3

AD20

N3

AD21

E4

AD22

M5

AD23

E2

AD24

P1

AD25

E1

AD26

P2

AD27

D3

AD28

R1

AD29

D2

AD30

P4

AD31

J2

C/BE#0

K4

C/BE#1

M4

C/BE#2

N4

C/BE#3

B1

REQ#0

A2

REQ#1

B3

REQ#2

C7

REQ#3

B6

REQ#4

C1

GNT#0

E6

GNT#1

A7

GNT#2

B7

GNT#3

D6

GNT#4

P5

PCICLK

F1

FRAME#

M3

DEVSEL#

L5

IRDY#

G1

PAR

L4

PERR#

M2

LOCK#

W2

PME#

U5

PCIRST#

K5

SERR#

F3

STOP#

F2

TRDY#

B5

REQA#/GPI0

A6

REQB#/GPI1/REQ5#

E8

GNTA#/GPO16

C5

GNTB#/GPO17/GNT5#

FW82801DBM_BGA421

ICH4

SM I/F

CPU I/F

HUB I/F

PCI I/F

EEPROM I/F

LAN I/F

C

W6

INTRUDER#

AC3

SMLINK0

AB1

SMLINK1

AC4

SMB_CLK

AB4

SMB_DATA

A20GATE

A20M#

DPSLP#

FERR#

IGNNE#

INIT#
INTR

RCIN#

SLP#
SMI#

STPCLK#

HI10
HI11

CLK66

HI_STB

HI_STB#
HICOMP

HUB_VREF

APICCLK

APICD0
APICD1
PIRQA#

PIRQB#
PIRQC#
PIRQD#

PIRQE#/GPI2

PIRQF#/GPI3
PIRQG#/GPI4
PIRQH#/GPI5

IRQ14
IRQ15

SERIRQ

EE_CS

EE_IN

EE_OUT

EE_SHCLK

LAN_RXD0
LAN_RXD1
LAN_RXD2

LAN_TXD0
LAN_TXD1
LAN_TXD2

LAN_CLK

LAN_RST#

AA5

Y22
AB23
U23
AA21
W21
V22
AB22
V21

NMI

Y23
U22
U21
W23
V23

L19

HI0

L20

HI1

M19

HI2

M21

HI3

P19

HI4

R19

HI5

T20

HI6

R20

HI7

P23

HI8

L22

HI9

N22
K21

T21
P21

N20
R23

M23
R22

J19
H19
K20
D5
C2
B4
A3
C8
D7
C3
C4
AC13
AA19
J22

D10
D11
A8
C12

A10
A9
A11
B10
C10
A12
C11
B11
Y5

SMB_ALERT#/GPI11

CPU_PWRGOOD

HUB_VSWING

Interrupt I/F

LAN_RSTSYNC

INTRUDER#
SMLINK0
SMLINK1
SMB_CLK
SMB_DATA
GPI11

1 2

56_0402_5%

HUB_PD0
HUB_PD1
HUB_PD2
HUB_PD3
HUB_PD4
HUB_PD5
HUB_PD6
HUB_PD7
HUB_PD8
HUB_PD9
HUB_PD10

1 2

CLK_ICH_66M

HUB_RCOMP_ICH

APICCLK
APICD0
APICD1
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#
PD_IRQ14
SD_IRQ15
SIRQ

1 2

@1K_0402_5%

1 2

10K_0402_5%

R359

R85

R356

APICCLK
APICD0
APICD1

10K_0402_5%

SMB_CLK <9,10,12>
SMB_DATA <9,10,12>

H_FERR#

HUB_PD[0..10]

R339
@56_0402_5%

CLK_ICH_66M <12>

HUB_PSTRB <6>
HUB_PSTRB# <6>

HUB_VREF

PCI_PIRQA# <13,20>
PCI_PIRQB# <19>
PCI_PIRQC# <21,25>
PCI_PIRQD# <25>

PD_IRQ14 <18>
SD_IRQ15 <18>
SIRQ <21,22,29,31>

R338

1 2

10K_0402_5%

H_IGNNE# <4>
H_INIT# <4>
H_INTR <4>
H_NMI <4>
H_CPUPWRGD <4>
RC# <29>
H_CPUSLP# <4>
H_SMI# <4>
H_STPCLK# <4>

R333

1 2

GATEA20 <29>
H_A20M# <4>
H_DPSLP# <4,7>
H_FERR# <4>

150_0402_1%

HUB_PD[0..10] <6>

R332
0_0402_5%

1 2

+1.8VS

12

R122

150_0402_1%

12

R123

Note:
R122,R123 placement

center of MCH and
ICH4M

SMB_CLK

SMB_DATA

PD_IRQ14

SD_IRQ15

PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#

HUB_VREF

HUB_VREF

1

C444

0.01U_0402_16V7K

2

INTRUDER#

H_FERR#

HUB_RCOMP_ICH

SMLINK0

SMLINK1

GPI11

D

1

C453

2

0.01U_0402_16V7K

1 2

R373
10K_0402_5%

1 2

R372
10K_0402_5%

1 2

R370

8.2K_0402_5%

1 2

R369

8.2K_0402_5%

RP74

1 8
2 7
3 6
4 5

8.2K _8P4R_0804_5%

1 2

R354

330K_0402_5%

1 2

R358

56_0402_5%

1 2

R131

36.5_0402_1%

R374

1 2

4.7K_0402_5%
R376

1 2

4.7K_0402_5%
R371

1 2

10K_0402_5%

+RTCVCC

+VCCP

+3VALW

1

2

+3VS

+3VS

C141

0.1U_0402_16V4Z

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

ICH4-M(1/3)

LA-1701

Monday, May 12, 2003

D

15 49

1.0

A

B

C

D

+3VS

PD_D[0..15] <18>

SD_D[0..15] <18>

1 2

C481

0.047U_0603_16V7K

R197
@2.4M_0603_1%

1 2

ATF_INT#

R_VBIAS

R383
@22M_0603_5%

12

12

J2
JOPEN

1 2

R384
10M_0603_5%

1

C190
15P_0402_50V8J

2

1 2

R141
10K_0402_5%

ACIN <29,33,35,37>

1 2

R196
10M_0603_5%

1

32.768KHz_12.5P_CM155

C203

2

C

+3VS

PD_D[0..15]

SD_D[0..15]

X2

12

R345

EC_SMI#
SCI#
EC_LID_OUT#

PD_A0
PD_A1
PD_A2
PD_CS#1
PD_CS#3

PD_DREQ
PD_DACK#
PD_IOR#
PD_IOW#
PD_PIORDY

PD_D0
PD_D1
PD_D2
PD_D3
PD_D4
PD_D5
PD_D6
PD_D7
PD_D8
PD_D9
PD_D10
PD_D11
PD_D12
PD_D13
PD_D14
PD_D15

SD_A0
SD_A1
SD_A2
SD_CS#1
SD_CS#3

SD_DREQ
SD_DACK#
SD_IOR#
SD_IOW#
SD_SIORDY

SD_D0
SD_D1
SD_D2
SD_D3
SD_D4
SD_D5
SD_D6
SD_D7
SD_D8
SD_D9
SD_D10
SD_D11
SD_D12
SD_D13
SD_D14
SD_D15

CLK_ICH_14M
CLK_ICH_48M

SB_SPKR
THRMTRIP#

ICH_AC_SYNC
ICH_AC_SDOUT

100K_0402_5%

2 1

RTC_RST#
VBIAS
RTCX1
RTCX2

D27

RB751V_SOD323

EC_SMI# <29>
SCI# <29>
EC_LID_OUT# <29>
EC_FLASH# <30>

PD_A0 <18>
PD_A1 <18>
PD_A2 <18>
PD_CS#1 <18>
PD_CS#3 <18>

PD_DREQ <18>
PD_DACK# <18>
PD_IOR# <18>
PD_IOW# <18>
PD_PIORDY <18>

SD_A0 <18>
SD_A1 <18>
SD_A2 <18>
SD_CS#1 <18>
SD_CS#3 <18>

SD_DREQ <18>
SD_DACK# <18>
SD_IOR# <18>
SD_IOW# <18>
SD_SIORDY <18>

CLK_ICH_14M <12>
CLK_ICH_48M <12>

SB_SPKR <23>
THRMTRIP# <4>

15P_0402_50V8J

U8B

ICH4

PM

IST

AC97 I/F

LPC I/F

USB I/F

GPIO

1

C391

2

B

GPIO

IDE I/F

CLOCK

MISC

THRMTRIP#

1 2
1 2

1

C390
@22P_0402_50V8J

2

R3

GPI7

V4

GPI8

V5

GPI12

W3

GPI13

V2

GPIO25

W1

GPIO27

W4

GPIO28

AA13

PDA0

AB13

PDA1

W13

PDA2

Y13

PDCS1#

AB14

PDCS3#

AA11

PDDREQ

Y12

PDDACK#

AC12

PDIOR#

W12

PDIOW#

AB12

PIORDY

AB11

PDD0

AC11

PDD1

Y10

PDD2

AA10

PDD3

AA7

PDD4

AB8

PDD5

Y8

PDD6

AA8

PDD7

AB9

PDD8

Y9

PDD9

AC9

PDD10

W9

PDD11

AB10

PDD12

W10

PDD13

W11

PDD14

Y11

PDD15

AA20

SDA0

AC20

SDA1

AC21

SDA2

AB21

SDCS1#

AC22

SDCS3#

AB18

SDDREQ

AB19

SDDACK#

Y18

SDIOR#

AA18

SDIOW#

AC19

SIORDY

W17

SDD0

AB17

SDD1

W16

SDD2

AC16

SDD3

W15

SDD4

AB15

SDD5

W14

SDD6

AA14

SDD7

Y14

SDD8

AC15

SDD9

AA15

SDD10

Y15

SDD11

AB16

SDD12

Y16

SDD13

AA17

SDD14

Y17

SDD15

J23

CLK14

F19

CLK48

W7

RTCRST#

Y6

VBIAS

AC7

RTCX1

AC6

RTCX2

H23

SPKR

W20

R321
33_0402_5%

R320
33_0402_5%

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12

AGP_BUSY#
SYSRST#
PM_BATLOW#
C3_STAT#

PM_DPRSLPVR

EC_RIOUT#
PM_RSMRST#

SLP_S5#

SUS_STAT#
ATF_INT#

CPUPERF#

AC97_BITCLK
AC97_SDIN0

AC97_SDIN1
AC97_SDIN2
ICH_AC_SDOUT
ICH_AC_SYNC

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_DRQ#0
LPC_DRQ#1
LPC_FRAME#

OVCUR#0
OVCUR#1
OVCUR#2
OVCUR#3
OVCUR#4
OVCUR#5

USB_RBIAS

VB0
VB1
VB2
BID0
BID1
BID2

1 1

+VCCP

12

R117
@1K_0402_5%

12

R325
@10K_0402_5%

12

R130
10K_0402_5%

RP73

1 8
2 7
3 6
4 5

10K_8P4R_0804_5%

12

12

12

12

CPUPERF#

PM_CLKRUN#

SB_SPKR

ICH_AC_SDOUT

AGP_BUSY#

OVCUR#1
OVCUR#2
OVCUR#3
OVCUR#5

PM_RSMRST#

PM_DPRSLPVR

R100
@0_0402_5%

R98
0_0402_5%

12

R106
@0_0402_5%

12

R115
0_0402_5%

A

BID0
BID1
BID2

1 2

R355

8.2K_0402_5%

+3VS

2 2

+3VS

R375
10K_0402_5%

1 2

+3VS

+3VS

+3VALW

3 3

4 4

R368 10K_0402_5%

R446 @10K_0402_5%

+3VS

12

R337
@0_0402_5%

12

R335
0_0402_5%

AGP_BUSY#<13>
PM_BATLOW#<29>

C3_STAT#<13>

PM_CLKRUN#<19,21,22,25,29>

PM_DPRSLPVR<41>

PWRBTN_OUT#<29>

PM_POK<32>
EC_RIOUT#<29>
PM_RSMRST#<21,29>

SLP_S1#<12,29>

SLP_S3#<29,33>

SLP_S4#<29>

SLP_S5#<29>
STP_CPU#<12,41>
STP_PCI#<12>

SUS_STAT#<13,30>

VGATE<12,32,41>

AC97_BITCLK<23,25,28>

AC97_RST#<23,25,28>

AC97_SDIN0<23>
AC97_SDIN1<28>
AC97_SDIN2<25>

LPC_AD0<22,29,31>
LPC_AD1<22,29,31>
LPC_AD2<22,29,31>
LPC_AD3<22,29,31>

LPC_DRQ#0<29,31>

LPC_DRQ#1<22>

LPC_FRAME#<22,29,31>

USB20P0+<27>

USB20P0-<27>

USB20P1+<27>

USB20P1-<27>

USB20P2+<33>

USB20P2-<33>

USB20P3+<33>

USB20P3-<33>

USB20P4+<27>

USB20P4-<27>

USB20P5+<28,31>

USB20P5-<28,31>

OVCUR#0<27>

OVCUR#4<27>

R95

22.6_0402_1%

VB0<13>
VB1<13>
VB2<13>

R2

Y3

AB2

T3

AC2

V20
AA1
AB6

Y1

AA6

W18

Y4
Y2

AA2

W19

Y21
AA4
AB3

V1

J21
Y20
V19

B8
C13
D13
A13
B13

D9
C9

T2

R4

T4

U2
U3
U4

T5

C20
D20
A21
B21
C18
D18
A19
B19
C16
D16
A17
B17

B15
C14
A15
B14
A14
D14

A23
B23

J20
G22
F20
G20
F21
H20
F23
H22
G23
H21
F22
E23

AC97_SYNC<23,25,28>
AC97_SDOUT<23,25,28>

AGPBUSY#
SYSRST#
BATLOW#
C3_STAT#
CLKRUN#
DPRSLPVR
PWRBTN#
PWROK
RI#
RSMRST#
SLP_S1#
SLP_S3#
SLP_S4#
SLP_S5#
STP_CPU#
STP_PCI#
SUS_CLK
SUS_STAT#/LPCPD#
THRM#

SSMUXSEL
CPUPERF#
VGATE/VRMPWRGD

AC_BITCLK
AC_RST#
AC_SDATAIN0
AC_SDATAIN1
AC_SDATAIN2
AC_SDATAOUT
AC_SYNC

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_DRQ#0
LPC_DRQ#1
LPC_FRAME#

USBP0+
USBP0­USBP1+
USBP1­USBP2+
USBP2­USBP3+
USBP3­USBP4+
USBP4­USBP5+
USBP5-

OC#0
OC#1
OC#2
OC#3
OC#4
OC#5

USB_RBIAS
USB_RBIAS#

GPIO32
GPIO33
GPIO34
GPIO35
GPIO36
GPIO37
GPIO38
GPIO39
GPIO40
GPIO41
GPIO42
GPIO43

FW82801DBM_BGA421

@22P_0402_50V8J

+3VS

ITP_DBRESET#<4>

1 2

R353

1

180K_0402_5%

C461

0.1U_0402_16V4Z

2

1 2

12

D12

2 1

RB751V_SOD323

1 2

R390 @10K_0402_5%

+RTCVCC

R389
1K_0402_5%

Title

Size Document Number Rev

Date: Sheet of

EC_THRM# <29>

+3VALW

C486
@1U_0805_25V4Z

1 2

5

1
2

U38

3

@74AHC1G08

12

R385 0_0402_5%

CLK_ICH_14M

CLK_ICH_48M

4

12

R336
@22_0402_5%

1

C438
@10P_0402_50V8K

2

12

R331
@22_0402_5%

1

C420
@10P_0402_50V8K

2

Compal Electronics, Inc.

ICH4-M(2/3)

LA-1701

Monday, May 12, 2003

D

SYSRST#

16 49

1.0

A

B

C

D

E

F

G

H

U8C

VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101

ICH4

POWERGND

VCC3.3_0
VCC3.3_1
VCC3.3_2
VCC3.3_3
VCC3.3_4
VCC3.3_5
VCC3.3_6
VCC3.3_7
VCC3.3_8

VCC3.3_9
VCC3.3_10
VCC3.3_11
VCC3.3_12
VCC3.3_13
VCC3.3_14
VCC3.3_15

VCCSUS3.3_0
VCCSUS3.3_1
VCCSUS3.3_2
VCCSUS3.3_3
VCCSUS3.3_4
VCCSUS3.3_5
VCCSUS3.3_6
VCCSUS3.3_7
VCCSUS3.3_8
VCCSUS3.3_9

VCC1.5_0

VCC1.5_1

VCC1.5_2

VCC1.5_3

VCC1.5_4

VCC1.5_5

VCC1.5_6

VCC1.5_7

VCCSUS1.5_0
VCCSUS1.5_1
VCCSUS1.5_2
VCCSUS1.5_3
VCCSUS1.5_4
VCCSUS1.5_5
VCCSUS1.5_6
VCCSUS1.5_7

VCC5REF1
VCC5REF2

VCC5REFSUS1

VCCHI_0
VCCHI_1
VCCHI_2
VCCHI_3

VCC_CPU_IO_0
VCC_CPU_IO_1
VCC_CPU_IO_2

VCCPLL

VCCRTC

VCCLAN3.3_0
VCCLAN3.3_1

VCCLAN1.5_0
VCCLAN1.5_1

D22
E10
E14
E16
E17
E18
E19
E21

1 1

2 2

3 3

4 4

E22

F8
G19
G21

G3

G6

H1

J6
K11
K13
K19
K23

K3
L10
L11
L12
L13
L14
L21

M1

M11
M12
M13
M20
M22
N10
N11
N12
N13
N14
N19
N21
N23

N5

P11
P13
P20
P22

P3

R18
R21

R5

T1

T19
T23
U20
V15
V17

V3

W22

W5
W8

Y19

Y7

A16
A18
A20
A22

A4

AA12
AA16
AA22

AA3
AA9

AB20

AB7

AC1
AC10
AC14
AC18
AC23

AC5

B12

B16

B18

B20

B22

B9
C15
C17
C19
C21
C23

C6

D1
D12
D15
D17
D19
D21
D23

D4

D8

A1

FW82801DBM_BGA421

+3VS

A5
AC17
AC8
B2
H18
H6
J1
J18
K6
M10
P12
P6
U1
V10
V16
V18

+3VALW

E11
F10
F15
F16
F17
F18
K14
V7
V8
V9

+1.5VS

K10
K12
K18
K22
P10
T18
U19
V14

+1.5VALW

E12
E13
E20
F14
G18
R6
T6
U6

E7
V6

E15

L23
M14
P18
T22

AA23
P14
U18

C22

AB5

E9
F9

F6
F7

VCC5REF

VCC5REFSUS VCC5REFVCC5REFSUS

+1.8VS

+VCCP

+1.5VS

+RTCVCC

+3VALW

+1.5VALW

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

1

C435

C458

2

+1.5VS

1

C442

2

VCC1.5 power place

+3VALW

0.1U_0402_16V7K

1

C459

C423

2

1

C456

2

0.1U_0402_16V7K

1

C441

0.1U_0402_16V7K

2

1

2

0.1U_0402_16V7K

1

1

C446

2

2

1

C425

0.1U_0402_16V7K

2

1SS355_SOD323

+RTCVCC

1

C437

2

0.1U_0402_16V7K

+3VALW

D19

1 2

1

2

R310

1 2

100_0603_1%

2

C467

0.1U_0402_16V7K

1

0.1U_0402_16V7K

1

C436

2

+5VALW

12

R319
1K_0402_5%

C414

0.1U_0402_16V7K

1

0.1U_0402_16V7K

0.1U_0402_16V7K

C452

0.1U_0402_16V7K

D25

DAN202U_SC70

+1.5VALW

1

1

+1.5VS

C426

0.1U_0402_16V7K

2

2

1

1

C457

0.1U_0402_16V7K

2

2

C424

C450

VCCLAN1.5 power place

+1.8VS

1

1

C445

0.1U_0402_16V7K

2

2

VCCHI power place

+3VS

D20

1SS355_SOD323

RTCVREF

3

BATT1.2

2

1 2

1

C415

0.1U_0402_16V7K

2

R445

1 2

511_0603_1%

+5VS

12

BATT1.1

W=20mils

R323
1K_0402_5%

C455

0.1U_0402_16V7K

C454

0.1U_0402_16V7K

VCCPLL power place

JP27

1 2

ML1220

+3VS+3VS

1

2

+1.5VS

1

2

+VCCP

1

C449

0.1U_0402_16V7K

2

-+

1

C451

0.1U_0402_16V7K

2

1

C443

0.01U_0402_16V7K

2

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

C

D

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

E

F

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

ICH4-M(3/3)

LA-1701

Monday, May 12, 2003

G

17 49

H

1.0

5

4

+5VS

3

2

1

1

+5VS

14

D D

C C

B B

Unused GATE

A A

12

I0

13

I1

B_PCIRST#<15,29>

PIDERST#<15>

SIDERST#<15>

U40D

O

74HCT08PW_TSSOP14

B_PCIRST#

B_PCIRST#

HDD_LED#
ODD_LED#

11

1

I0

2

I1

4

I0

5

I1

9

I0

10

I1

U40A

P

3

O

G

74HCT08PW_TSSOP14

7

U40B

6

O

74HCT08PW_TSSOP14

U40C

8

O

74HCT08PW_TSSOP14

HD_RST#

CD_RST#

DEV_LED# <28>

1000P_0402_50V7K

C551

2

+5VS

10U_1206_16V4Z

1

C550
10U_1206_16V4Z

2

Place component's closely IDE CONN.

1

C553

0.1U_0402_16V7K

2

Place component's closely IDE CONN.

C555

1

2

PD_PIORDY<16>

1

2

SD_SIORDY<16>

C549
1U_0603_10V6K

+3VS

+3VS

1

C552

0.1U_0402_16V7K

2

1 2

R399

4.7K_0402_5%

1

C554
1000P_0402_50V7K

2

1 2

R239

4.7K_0402_5%

JP25

112
334
556
778
9910
111112
131314
151516
171718
191920
212122
232324
252526
272728
292930
313132
333334
353536
373738
393940
414142
434344

HDD CONN

SD_D[0..15]

JP23

1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50

CD-ROM CONN.

PD_D[0..15]

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44

PD_D8
PD_D9
PD_D10
PD_D11
PD_D12
PD_D13
PD_D14
PD_D15

PD_CSEL

1 2

R400 470_0402_5%

PD_A2
PD_CS#3

CD_AGND

CDROM_R
SD_D8

SD_D9SD_D7
SD_D10
SD_D11
SD_D12
SD_D13
SD_D14
SD_D15
SD_DREQ
SD_IOR#

SD_DACK#
PDIAG#
SD_CS#3

W=80mils

12

C250 0.1U_0402_16V7K

1 2

R241 100K_0402_5%

PD_D[0..15]<16>

R397

1 2

@10K_0402_5%

HD_RST#
PD_D7
PD_D6
PD_D5
PD_D4
PD_D3
PD_D2
PD_D1
PD_D0

PD_DREQ<16>

PD_IOW#<16>

PD_IOR#<16>

PD_DACK#<16>

PD_IRQ14<15>

PD_A1<16>
PD_A0<16>

PD_CS#1<16>

1 2

+5VS

R398 100K_0402_5%

CDROM_L<23> CDROM_R <23>

SD_IOW#<16>

SD_IRQ15<15>

SD_A1<16>
SD_A0<16>

SD_CS#1<16>

1 2

+5VS

R396 100K_0402_5%

470_0402_5%

PD_DREQ
PD_IOW#
PD_IOR#
PD_PIORDY
PD_DACK#
PD_IRQ14
PD_A1
PD_A0
PD_CS#1
HDD_LED#

+5VS

SD_D[0..15]<16>

C235

12

10U_1206_6.3V6M

12

R237 @10K_0402_5%

CDROM_L
CD_RST#
SD_D6

SD_D5
SD_D4
SD_D3
SD_D2
SD_D1
SD_D0

SD_IOW#
SD_IRQ15

SD_CS#1
ODD_LED#

+5VS
+5VS

SD_CSEL

R242

1 2

PD_A2 <16>
PD_CS#3 <16>

+5VS

CD_AGND <23>

SD_DREQ <16>
SD_IOR# <16>

SD_DACK# <16>

R240 100K_0402_5%

1 2

SD_A2 <16>
SD_CS#3 <16>
+5VS
+5VS
+5VS

+5VS

+5VS

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

HDD & CDROM Connector

LA-1701

18 49Monday, May 12, 2003

1

1.0

5

4

3

2

1

8
7
6
5
4
3
2
1

9
10
11
12

C259
220P_1808_3KV8K

2

C285

0.1U_0402_10V6K

1

U1

TD-8TX-

7

TD+

6

CT

3

CT

2

RD-

1

RD+

NS0013_16P

JP4

TX+
TX-

CATHODE1

RX+
N/C1
N/C2
RX­N/C3
N/C4

CATHODE2

N/C5
RING
TIP
N/C6

RJ-45 & RJ-11

MOD_TIP
MOD_RING

1:1

TX+

CT

CT

RX-

RX+

ANODE1

ANODE2

13

NC

16

15

17

18

14

NC

1000P_0402_50V7K

JP9

1
2

MODEM CONN.

RJ45_TXX-

9

RJ45_TXX+

10
11

14

RJ45_RXX-

15

RJ45_RXX+

16

LINK_CR

ACT_CR

1

C267

2

R12

75_0402_1%

1000P_1206_2KV7K

CHASSIS GND

1

2

12

C16

LAN_LED1#

GREEN-LINK

R261

330_0402_5%

R262

330_0402_5%

YELLOW-ACT

LAN_LED0#

C268
1000P_0402_50V7K

12

R13
75_0402_1%

LANGND

1

2

12

LANVDD

12

LANVDD

LANGND

LANGND

MOD_RING

MOD_TIP

LAN_TX­LAN_TX+

LAN_RX­LAN_RX+

RJ45_TXX+<33>
RJ45_TXX-<33>
RJ45_RXX+<33>

RJ45_RXX-<33>

1

1
2

2

220P_1808_3KV8K

LANVDD

12

R41

49.9_0402_1%

1

C377

0.1U_0402_10V6K

2

2

C312

0.1U_0402_10V6K

1

12

R40

49.9_0402_1%

1 2

Q32
SI2301DS_SOT23

1 3

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

PCI_CBE#0
PCI_CBE#1
PCI_CBE#2
PCI_CBE#3

LANVDD

U5

45

AD0

44

AD1

43

AD2

42

AD3

41

AD4

39

AD5

38

AD6

37

AD7

34

AD8

33

AD9

32

AD10

31

AD11

29

AD12

28

AD13

27

AD14

26

AD15

13

AD16

11

AD17

10

AD18

9

AD19

8

AD20

6

AD21

5

AD22

4

AD23

128

AD24

127

AD25

126

AD26

125

AD27

123

AD28

122

AD29

121

AD30

120

AD31

36

C/BE#0

24

C/BE#1

14

C/BE#2

2

C/BE#3

3

IDSEL

23

PAR

15

FRAME#

16

IRDY#

17

TRDY#

19

DEVSEL#

20

STOP#

21

PERR#

22

SERR#

118

REQ#

117

GNT#

114

INTA#

76

PME#

115

RST#

116

CLK

75

CLKRUN#

7

GND

18

GND

30

GND

40

GND

55

GND

56

GND

62

GND

74

GND

80

GND

85

GND

93

GND

111

GND

112

GND

113

GND

124

GND

RTL8139CL_LQFP128

Power

D D

R58

10_0402_5%

C73

PCI_AD[0..31]

PCI_CBE#[0..3]

PCI_AD17

12

1

2

1 2

R83 100_0402_5%

PCI_AD[0..31]<15,20,21,25>

C C

PCI_CBE#[0..3]<15,20,21,25>

PCI_PAR<15,20,21,25>

PCI_FRAME#<15,20,21,25>

PCI_IRDY#<15,20,21,25>

PCI_TRDY#<15,20,21,25>

PCI_DEVSEL#<15,20,21,25>

PCI_STOP#<15,20,21,25>
PCI_PERR#<15,20,21,25>

PCI_SERR#<15,21,25>

PCI_REQ#1<15>

ONBD_LAN_PME#<21,25,29>

PCI_GNT#1<15>

PCI_PIRQB#<15>

PCIRST#<7,13,15,20,21,22,25,31>

CLK_PCI_LAN<12>

PM_CLKRUN#<16,21,22,25,29>

10P_0402_50V8K

B B

A A

+3VALW

2

50

EECS

47

MA0/EEDO

48

MA1/EEDI

49

MA2/EESK

51

MA3

52

MA4

53

MA5

MA6/9356SEL

MA8/Aux. PWR

PCI I/F

57
60

MA7

61
63

MA9

64

MA10

65

MA11

66

MA12

67

MA13

68

MA14

69

MA15

70

MA16

108

MD0

107

MD1

105

MD2

104

MD3

103

MD4

102

MD5

101

MD6

100

MD7

99

LED0

98

LAN I/F

LED1

97

LED2

95

ISOLATE#

92

TXD+

91

TXD-

87

RXIN+

86

RXIN-

89

WE#

88

OE#

83

LWAKE

82

RTT2

81

RTT3

79

X1

78

X2

84

RTSET

110

ROMCS#

54

NC

71

NC

72

NC

73

NC

94

NC

1

VDD

12

VDD

25

VDD

35

VDD

46

VDD

58

VDD

59

VDD

77

VDD

90

VDD

96

VDD

106

VDD

109

VDD

119

VDD

EN_WOL# <29>

EECS

EEDO
EEDI
EESK

1 2

R294 5.6K_0402_5%

LAN_LED0#
LAN_LED1#

R44 15K_0402_5%

ISOB

R39 1K_0402_5%

LAN_TX+
LAN_TX­LAN_RX+
LAN_RX-

CLKOUT
XTALFB

R43 1.69K_0603_1%

LANVDD

EECS

1 2

12

1

C317
10U_0805_10V4Z

2

2

C318

0.1U_0402_10V6K

1

U34

4

DO

3

DI

2

SK

1

CS

AT93C46-10SI-2.7_SO8

12

1

2

2

1

GND

NC
NC

VCC

LANVDD

+3VS

C80

0.1U_0402_10V6K

C329

0.1U_0402_10V6K

2

C331

0.1U_0402_10V6K

5

1

6
7
8

LANVDD

LAN_LED0# <33>
LAN_LED1# <33>

Y1

CLKOUT XTALFB

25MHz_25ppm

1

CRYSTAL

C47
27P_0402_50V8J

2

1

C375

0.1U_0402_10V6K

2

2

C63

0.1U_0402_10V6K

1

1

C354

0.1U_0402_10V6K

2

2

C314

0.1U_0402_10V6K

1

2

C57
27P_0402_50V8J

1

DSSA-P3100SB

1

C376

0.1U_0402_10V6K

2

2

C313

0.1U_0402_10V6K

1

VH1

49.9_0402_1%

1 2

R24875_0402_1%

1 2

R24975_0402_1%

1

C260

2

C40

0.1U_0402_10V6K

12

R34

2

1

2

C66

0.1U_0402_10V6K

1

2

C378

0.1U_0402_10V6K

1

RJ45_TXX+
RJ45_TXX­RJ45_RXX+
LANGND_1

RJ45_RXX­LANGND_2

1

2

12

R276

0_0402_5%

12

R33

49.9_0402_1%

C48

0.1U_0402_10V6K

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

LAN RealTech8139CL+

LA-1701

19 49Monday, May 12, 2003

1

1.0

A

B

C

D

E

1

C21

2

1394@0.1U_0402_10V6K

12

R247
1394@510_0402_5%

XTPA1+ <33>
XTPA1- <33>
XTPB1+ <33>
XTPB1- <33>

+3VS

1

C18

1394@0.1U_0402_10V6K

2

JP5

4
3
2
1

1394@1394_FOX

C26

+3VS

12

56

GNDATX0

NC835NC937NC1041NC1142I2CEEENA

+3VS+3VS

C20

1394@0.1U_0402_10V6K

12

73

66

VDDATX1

GNDATX1

87

VDDATX2

GNDATX2
VDDARX0

GNDARX0
VDDARX1

GNDARX1
VDDARX2

GNDARX2

EECS
EEDO

SDA/EEDI

SCL/EECK

PME#

NC1
NC2

XCPS

XREXT

XTPB0M

XTPB0P

XTPA0M

XTPA0P

XTPBIAS0

XTPB1M

XTPB1P

XTPA1M

XTPA1P

XTPBIAS1

NC3
NC4
NC5
NC6
NC7

PHYRESET

XO

XI

57

XI

VT6307S-CD_LQFP128

58

XO

1394@10P_0402_50V8K

Place close to 1394 CONN.

@SF10402ML080C

1

C295 1394@0.1U_0402_10V6K

2

80
62

1

C19 1394@0.1U_0402_10V6K

61

2

72

1

C284 1394@0.1U_0402_10V6K

65

2

86

1

C287 1394@0.1U_0402_10V6K

79

2

26
27

EEDI_1394

28

EECK_1394

29
34

39
40

60

1394_XREXT

63

XTPB0-

67

XTPB0+

68

XTPA0-

69

XTPA0+

70

XTPBIAS0

71

XTPB1-

74

XTPB1+

75

XTPA1-

76

XTPA1+

77

XTPBIAS1

78
81

82
83
84
85
55

XI XO

1394@24.576MHz_16P_3XG-24576-43E1

2

C276

1394@1M_0402_1%

1

XTPA0+
XTPA0­XTPB0+
XTPB0-

TVS6

1

2

@SF10402ML080C

X3

1 2

R275

+3VS

R274

1394@6.34K_0603_1%

1 2

C17
1394@0.1U_0402_10V6K

12

12

2

C277
1394@10P_0402_50V8K

1

1

1

TVS8

TVS7

2

2

@SF10402ML080C

1394@1K_0402_5%

1394@1K_0402_5%

1

2

1

1

C55

1394@0.1U_0402_10V6K

2

2

1394@0.1U_0402_10V6K

+3VS

R272

R270

2

C283

1

1394@47P_0402_50V8J

TVS9
@SF10402ML080C

C53

Place close to 1394 chip

1 2

1 2

1394@54.9_0402_1%

1394@270P_0402_25V8K

1394@54.9_0402_1%

1394@270P_0402_50V7K

1

1

C54

1394@0.1U_0402_10V6K

2

2

1394@0.1U_0402_10V6K

XTPBIAS0
XTPA0+
XTPA0­XTPB0+
XTPB0-

R251

C262

XTPBIAS1
XTPA1+
XTPA1­XTPB1+
XTPB1-

R20

C23

1

C282

C288

1394@0.1U_0402_10V6K

2

U28

1

A0

VCC

2

A1

3
4

12

1394@54.9_0402_1%

12

1

2

12

1394@54.9_0402_1%

12

1

2

WC

SCL

A2

SDA

GND

1394@AT24C02N-10SC-2.7_SO8

12

R253

R26

R252

1394@54.9_0402_1%

12

R250
1394@54.9_0402_1%

12

R260
1394@5.1K_0603_1%

12

R25
1394@54.9_0402_1%

12

R21
1394@54.9_0402_1%

12

R19
1394@5.1K_0603_1%

1

1

C43

1394@0.1U_0402_10V6K

2

2

1394@0.1U_0402_10V6K

+3VS

8
7

EECK_1394

6

EEDI_1394

5

1

2

1

1394@0.33U_0805_16V7K

2

C293

C258
1394@0.33U_0805_16V7K

C29

1 1

PCI_AD[0..31]<15,19,21,25>

2 2

PCI_CBE#[0..3]<15,19,21,25>

PCI_FRAME#<15,19,21,25>

PCI_IRDY#<15,19,21,25>

PCI_TRDY#<15,19,21,25>

PCI_DEVSEL#<15,19,21,25>

PCI_STOP#<15,19,21,25>
PCI_PERR#<15,19,21,25>

PCI_PAR<15,19,21,25>
PCI_REQ#0<15>
PCI_GNT#0<15>

PCI_PIRQA#<13,15>

PCIRST#<7,13,15,19,21,22,25,31>

CLK_PCI_1394<12>

3 3

PCI_AD[0..31]

PCI_CBE#[0..3]

PCI_AD16

CLK_PCI_1394

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

PCI_CBE#0
PCI_CBE#1
PCI_CBE#2
PCI_CBE#3

R49

1 2

1394@100_0402_5%

12

R35
10_0402_5%

1

C42
22P_0402_50V8J

2

U2

25

AD0

24

AD1

20

AD2

19

AD3

18

AD4

16

AD5

15

AD6

14

AD7

11

AD8

10

AD9

9

AD10

8

AD11

7

AD12

4

AD13

3

AD14

2

AD15

117

AD16

116

AD17

115

AD18

114

AD19

113

AD20

109

AD21

107

AD22

106

AD23

103

AD24

102

AD25

101

AD26

98

AD27

97

AD28

96

AD29

95

AD30

94

AD31

12

CBE0#

1

CBE1#

119

CBE2#

104

CBE3#

105

IDSEL

120

FRAME#

121

IRDY#

123

TRDY#

124

DEVSEL#

125

STOP#

127

PERR#

128

PAR

93

REQ#

92

GNT#

88

INTA#

89

PCIRST#

90

PCICLK

+3VS

C56 1394@0.1U_0402_10V6K

C31

110

122

32

111

46

30

VDD199VDD2

VDD3

VDD45VDD517VDD6

VDDC221VDDC1

RAMVDD

PVDD136PVDD2

IEEE 1394

VT6307S

VSS191VSS2

VSS3

VSS4

VSS5

VSS66VSS713VSS823VSS933VSSC1

VSSC2

22

112

RAMVSS

64

31

100

108

118

126

1394@4.7K_0402_5%

+3VS

12

1394@0.1U_0402_10V6K

12

38

59

PGND247PGND1

NC1244NC1345NC1448NC1549NC1650NC1751NC1852NC1953NC2054NC21

43

12

R273

1394@0.1U_0402_10V6K

VDDATX0

4 4

Title

Size Document Number Rev

A

B

C

D

Date: Sheet of

Compal Electronics, Inc.

IEEE1394 Controller & PHY

LA-1701

20 49Monday, May 12, 2003

E

1.0

A

B

C

D

E

13
12
11

10

1
2
15
14

8

OC

1

C289

0.1U_0402_16V7K

2

CB_REQ#

S1_VCC

1

2

VCCD0#
VCCD1#
VPPD0
VPPD1

1

C275

2

0.1U_0402_16V7K

C44

4.7U_0805_10V4Z

S1_VPP

1

2

PCI_AD[0..31]<15,19,20,25>

PCI_CBE#[0..3]<15,19,20,25>

1

C22

0.1U_0402_16V7K

2

PCI_FRAME#<15,19,20,25>

PCI_IRDY#<15,19,20,25>

PCI_TRDY#<15,19,20,25>

PCI_DEVSEL#<15,19,20,25>

PCI_STOP#<15,19,20,25>
PCI_PERR#<15,19,20,25>
PCI_SERR#<15,19,25>

PCI_GNT#2<15>

CLK_PCI_PCM<12>

PCM_PME#<19,25,29>

PCM_SUSP#<29>

PCI_AD20

PCI_PIRQC#<15,25>

PM_CLKRUN#<16,19,22,25,29>

PM_RSMRST#<16,29>

C35

0.1U_0402_16V7K

PCIRST#<7,13,15,19,20,22,25,31>

PCI_PAR<15,19,20,25>

SIRQ<15,22,29,31>

PCM_RI#<30>

B

+3V_CB

1

C36

4.7U_0805_10V4Z

VPPD0
VPPD1
VCCD0#
VCCD1#

PCI_AD[0..31]
PCI_CBE#[0..3]

PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0 S1_A23

PCI_CBE#3
PCI_CBE#2
PCI_CBE#1
PCI_CBE#0

CB_REQ#
CLK_PCI_PCM

1 2

R285 100_0402_5%

PCM_RI#

PM_RSMRST#

U31

3

AD31

4

AD30

5

AD29

7

AD28

8

AD27

9

AD26

10

AD25

11

AD24

15

AD23

16

AD22

17

AD21

19

AD20

23

AD19

24

AD18

25

AD17

26

AD16

38

AD15

39

AD14

40

AD13

41

AD12

43

AD11

45

AD10

46

AD9

47

AD8

49

AD7

51

AD6

52

AD5

53

AD4

54

AD3

55

AD2

56

AD1

57

AD0

12

C/BE3#

27

C/BE2#

37

C/BE1#

48

C/BE0#

20

RST#

28

FRAME#

29

IRDY#

31

TRDY#

32

DEVSEL#

33

STOP#

34

PERR#

35

SERR#

36

PAR

1

REQ#

2

GNT#

21

PCLK

59

RI_OUT#/PME#

70

SUSPEND#

13

IDSEL

60

MFUNC0

61

MFUNC1

64

MFUNC2

65

MFUNC3

67

MFUNC4

68

MFUNC5

69

MFUNC6

66

VCC/GRST#

2

0.1U_0402_16V7K

0.1U_0402_16V7K

1

C304

2

18

44

72

74

VPPD071VPPD1

VCCP1

VCCP0

VCCD0#73VCCD1#

PQFP 144

22.2 X 22.2 X 1.60

GND1

GND2

GND3

GND4

GND5

6

22

42

58

78

94

S1_VCC

1

1

C296

C60

0.1U_0402_16V7K

2

2

R23

1 2

@0_1206_5%

1 2

R30 0_1206_5%

30

50

86

90

102

122

126

138

VCC5

VCC4

VCC3

VCC2

VCC1

VCCSK1

VCCSK0

CC/BE3#/REG#

CDEVSEL#/A21

CSERR#/WAIT#

CREQ#/INPACK#

CSTSCHG/BVD1

CCLKRUN#/WP

RSVD/D14

GND6

RSVD/A18

GND7

GND8

RSVD/D2

84

100

114

130

143

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

+3VALW

C274 0.1U_0402_16V7K

14

63

VCCI

VCC7

VCC6

CAD31/D10

CAD30/D9
CAD29/D1
CAD28/D8
CAD27/D0
CAD26/A0
CAD25/A1
CAD24/A2
CAD23/A3
CAD22/A4
CAD21/A5
CAD20/A6

CAD19/A25

CAD18/A7
CAD17/A24
CAD16/A17

CAD15/IOWR#

CAD14/A9

CAD13/IORD#

CAD12/A11
CAD11/OE#

CAD10/CE2#

CAD9/A10

CAD8/D15

CAD7/D7

CAD6/D13

CAD5/D6

CAD4/D12

CAD3/D5

CAD2/D11

CAD1/D4
CAD0/D3

CC/BE2#/A12

CC/BE1#/A8

CC/BE0#/CE1#
CRST#/RESET

CFRAME#/A23

CIRDY#/A15

CTRDY#/A22
CSTOP#/A20

CPERR#/A14

CPAR/A13

CGNT#/WE#

CCLK/A16

CBLOCK#/A19
CINT#/READY

SPKOUT

CAUDIO/BVD2

CCD2#/CD2#
CCD1#/CD1#

CVS2/VS2#
CVS1/VS1#

CB1410_LQFP144

+3VS
+3VALW

1 2

S1_D10

144

S1_D9

142

S1_D1

141

S1_D8

140

S1_D0

139

S1_A0

129

S1_A1

128

S1_A2

127

S1_A3

124

S1_A4

121

S1_A5

120

S1_A6

118

S1_A25

116

S1_A7

115

S1_A24

113

S1_A17

98

S1_IOWR#

96

S1_A9

97

S1_IORD#

93

S1_A11

95

S1_OE#

92

S1_CE2#

91

S1_A10

89

S1_D15

87

S1_D7

85

S1_D13

82

S1_D6

83

S1_D12

80

S1_D5

81

S1_D11

77

S1_D4

79

S1_D3

76

S1_REG#

125

S1_A12 S1_A14

112

S1_A8

99

S1_CE1#

88

S1_RST

119

S1_A23

111

S1_A15

110

S1_A22

109

S1_A21

107

S1_A20

105

S1_A14

104

S1_WAIT#

133
101

S1_INPACK#

123

S1_WE#

106

1 2

108

R289 33_0402_5%

S1_BVD1

135

S1_WP

136

S1_A19

103

S1_RDY#

132
62

S1_BVD2

134

S1_CD2#

137

S1_CD1#

75

S1_VS2

117

S1_VS1

131

S1_D2
S1_A18
S1_D14

S1_VPP

1

C358

4.7U_1206_25VFZ

2

S1_VCC

S1_VCC

S1_A16

PCM_SPK# <23>

2

C286

1

1000P_0402_50V7K

12

R282
47K_0402_5%

1 2

R51 @22K_0402

1 2

R50 @22K_0402

1 2

R447 @47K_0402_5%

1 2

R448 @47K_0402_5%

1 2

R449 @47K_0402_5%

2

1

1

C355

0.1U_0402_16V4Z

2

S1_WP
S1_RST
S1_CE1#
S1_CE2#

C58
1000P_0402_50V7K

D

S1_VCC

1

1

C34310U_1206_16V4Z

C339

0.1U_0402_16V7K

2

2

S1_VPP

S1_VCC

Title

Size Document Number Rev

LA-1701

Date: Sheet of

J11

CARDBUS HOUSING

JP11

a68

a68

a34

S1_CD2#
S1_WP
S1_D10
S1_D2
S1_D9
S1_D1
S1_D8
S1_D0
S1_BVD1
S1_A0
S1_BVD2
S1_A1
S1_REG#
S1_A2
S1_INPACK#
S1_A3
S1_WAIT#
S1_A4
S1_RST
S1_A5
S1_VS2
S1_A6
S1_A25
S1_A7
S1_A24
S1_A12
S1_A23
S1_A15
S1_A22
S1_A16

S1_A21
S1_RDY#
S1_A20
S1_WE#
S1_A19

S1_A18
S1_A13
S1_A17
S1_A8
S1_IOWR#
S1_A9
S1_IORD#
S1_A11
S1_VS1
S1_OE#
S1_CE2#
S1_A10S1_A13
S1_D15
S1_CE1#
S1_D14
S1_D7
S1_D13

S1_D6
S1_D12
S1_D5
S1_D11

S1_D4

S1_CD1#

S1_D3

a67
a33
a66
a32
a65
a31
a64
a30
a63
a29
a62
a28
a61
a27
a60
a26
a59
a25
a58
a24
a57
a23
a56
a22
a55
a21
a54
a20
a53
a19
a52
a18
a51
a17
a50
a16
a49
a15
a48
a14
a47
a13
a46
a12
a45
a11
a44
a10
a43

a9

a42

a8

a41

a7

a40

a6

a39

a5

a38

a4

a37

a3

a36

a2

a35

a1
83

82
81
80
76
75
74
73

a34
a67
a33
a66
a32
a65
a31
a64
a30
a63
a29
a62
a28
a61
a27
a60
a26
a59
a25
a58
a24
a57
a23
a56
a22
a55
a21
a54
a20
a53
a19
a52
a18
a51
a17
a50
a16
a49
a15
a48
a14
a47
a13
a46
a12
a45
a11
a44
a10
a43
a9
a42
a8
a41
a7
a40
a6
a39
a5
a38
a4
a37
a3
a36
a2
a35
a1

83
82
81
80
76
75
74
73

PCMC68PIN

Compal Electronics, Inc.

CardBus Controller CB1410 & Socket

21 49Monday, May 12, 2003

E

1.0

+12VALW

1

C33

0.1U_0402_16V7K

1 1

0.1U_0402_16V7K

0.1U_0402_16V7K

2 2

3 3

4 4

C39

C46

+3V_CB

1

C61

2

2

1

2

1

2

0.1U_0402_16V7K

PCI_REQ#2<15>

+5VALW

+3VALW

1

C59

2

0.1U_0402_16V7K

+3VALW

A

U3

9

12V

5

5V

6

5V

3

3.3V

4

3.3V

1

C299

0.1U_0402_16V7K

2

1 2

R271 22K_0402_5%

CLK_PCI_PCM

12

R281
@10_0402_5%

1

C294
@15P_0402_50V8J

2

GND

7

16

1

C297

2

0.1U_0402_16V7K

+12VS

G

2

Q36

S

2N7002 1N_SOT23

VCC
VCC
VCC

VPP

VCCD0
VCCD1
VPPD0
VPPD1

SHDN

CP-2211_SSOP16

PM_RSMRST#

13

D

PCM_RI#

10

9

8

7

6

5

4

3

2

1

H H

20
21
22
23

24
25

26
27

50
17
30
28
29

19
48

54
55
56
57
58
59

6
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47

51
52
64

18
53

65
93

7
31
60
76

1

C342

0.1U_0402_10V6K

2

U33

LAD0
LAD1
LAD2
LAD3

LFRAME#
LDRQ#

PCIRST#
LPCPD#

GPIO12/IO_SMI#
IO_PME#
SIRQ
CLKRUN#
PCICLK

CLK14
GPIO10

GPIO15
GPIO16
GPIO17
GPIO20
GPIO21
GPIO22
GPIO24
GPIO30
GPIO31
GPIO32
GPIO33
GPIO34
GPIO35
GPIO36
GPIO37
GPIO40
GPIO41
GPIO42
GPIO43
GPIO44
GPIO45
GPIO46
GPIO47

GPIO13/IRQIN1
GPIO14/IRQIN2
GPIO23/FDC_PP

VTR
VCC

VCC
VCC

VSS
VSS
VSS
VSS

SMsC LPC47N227

PD0/INDEX#

PD1/TRK0

PD2/WRTPRT#

PD3/RDATA#

PD4/DSKCHG#

PD6/MTR0#

BUSY/MTR1#

PE/WDATA#

SLCT/WGATE#

ERROR#/HDSEL#

ACK#/DS1#

INIT#/DIR#

AUTOFD#/DRVDEN0#

STROBE#/DS0#
SLCTIN#/STEP#

DTR2#

CTS2#
RTS2#

DSR2#

TXD2

RXD2

DCD2#

RI2#

DTR1#

CTS1#
RTS1#

DSR1#

TXD1

RXD1

DCD1#

RI1#

IRMODE/IRRX3

IRRX2

IRTX2

RDATA#

WDATA#

WGATE#

HDSEL#

DIR#

STEP#

DS0#

INDEX#

DSKCHG#

WRTPRT#

TRK0#

MTR0#

DRVDEN0

DRVDEN1

GPIO11/SYSOPT

PD5
PD7

+3VS

PID0<13>
PID1<13>
PID2<13>
PID3<13>

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

LPC_FRAME#

1 2

R401 10K_0402_5%

LPC_SMI#
LPC_PME#
SIRQ

CLK_PCI_SIO
CLK_14M_SIO

PID0
PID1
PID2
PID3

R324
@33_0402

1 2

C397
@22PF_0402

1 2

+3VS

LPC_AD0<16,29,31>
LPC_AD1<16,29,31>

LPC_FRAME#<16,29,31>

LPC_DRQ#1<16>

PM_CLKRUN#<16,19,21,25,29>

CLK_PCI_SIO<12>

R309

@10_0402

1 2

C369
@15PF_0402

1 2

LPC_AD2<16,29,31>
LPC_AD3<16,29,31>

PCIRST#<7,13,15,19,20,21,25,31>

SIRQ<15,21,29,31>

CLK_PCI_SIO

G G

+3VS

F F

E E

1 2

R78 10K_0402_5%

1 2

10K_0402_5%

R63

+3VS

1 8
2 7
3 6
4 5

LPC_SMI#
LPC_PME#

RP71

PID0
PID1
PID2
PID3

100K_8P4R_0804_5%

CLK_14M_SIO

1 2

R312 10K_0402_5%

1 2

R307 10K_0402_5%

D D

+3VS

C C

C85

4.7U_0805_10V4Z

1

2

1

C370

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

1

2

C360

C65

2

0.1U_0402_10V6K

LPD0

68

LPD1

69

LPD2

70

LPD3

71

LPD4

72

LPD5

73

LPD6

74

LPD7

75

LPTBUSY

79

LPTPE

78

LPTSLCT

77

LPTERR#

81

LPTACK#

80

LPTINIT#

66

LPTAFD#

82

LPTSTB#

83

LPTSLCTIN#

67
100

CTS2#

99
98

DSR2#

97
96

RXD2

95

DCD2#

94

RI2#

92

DTR1#

89

CTS1#

88

RTS1#

87

DSR1#

86

TXD1

85

RXD1

84

DCD#1

91

RI1#

90

IRMODE

63

IRRX

61

IRTXOUT

62

RDATA# RI1#

16

WDATA#

10

WGATE#

11

HDSEL#

12

FDDIR#

8

STEP#

9

DRV0#

5

INDEX#

13

DSKCHG#

4

WP#

15

TRACK0#

14

MTR0#

3

3MODE#

1
2
49

Base I/O Address

0 = 02Eh

*

1 = 04Eh

LPD[0..7]

LPTBUSY <26,33>
LPTPE <26,33>
LPTSLCT <26,33>
LPTERR# <26,33>
LPTACK# <26,33>
LPTINIT# <26,33>
LPTAFD# <26,33>
LPTSTB# <26,33>
LPTSLCTIN# <26,33>CLK_14M_SIO<12>

DTR#1 <33>
CTS#1 <33>
RTS#1 <33>
DSR#1 <33>
TXD1 <33>
RXD1 <33>
DCD#1 <33>
RI#1 <30,33>

IRMODE <26>
IRTXOUT <26>

+3VS

R80
@1K_0402_5%

1 2

12

LPD[0..7] <26,33>

R81
1K_0402_5%

+3VS

1 2

R225
@1K_0402_5%

IRRX <26>

CTS2#
DSR2#
DCD2#
RI2#

DCD#1
DSR1#
CTS1#
RI1#

RXD1

R53 1K_0402_5%

RXD2

1 2

R54 1K_0402_5%

+5VS

RXD1
TXD1
DSR1#
RTS1#
CTS1#
DTR1#

DCD#1

For SW debug use when no seial port

WP#

1 8

TRACK0#

2 7

INDEX#

3 6

DSKCHG#

4 5

RP5

6
7
8
9

10

1K_10P8R_1206_5%

R297 10K_0402_5%

+5VS

WDATA#
WGATE#
HDSEL#
FDDIR#

+5VS

RP4

1 8
2 7
3 6
4 5

4.7K_8P4R_0804_5%
RP3

4 5
3 6
2 7
1 8

4.7K_8P4R_0804_5%

12

1
2
3
4
5
6
7
8
9

10

@96212-1011S

+5VS

RP70

1K_8P4R_0804_5%

5
4
3
2
1

12

+3VS

+5VS

JP10

1
2
3
4
5
6
7
8
9
10

3MODE#

STEP#
MTR0#
RDATA#
DRV0#

+5VS

B B

A A

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

10

9

8

7

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

6

5

4

3

Compal Electronics, Inc.

Title

Size Document Number Rev
Custom

Date: Sheet of

LA-1701

LA-XXXX

2

22 49Monday, May 12, 2003

1

1.0

A

B

C

D

E

F

G

H

+5VS

1

BEEP#<29>

1 1

0.1U_0402_16V4Z

2 2

3 3

MDC_AUDIO_MON<25>

4 4

1

C108

2

DLINE_IN_L<33>

DLINE_IN_R<33>

CDROM_L<18>

CDROM_R<18>

CD_AGND<18>

MD_SPK<25,28>

GND

A

+3VALW

+3VALW

R215 2.7K_0402_5%
R210 1.1K_0402_5%

12

R82
100K_0402_1%

1

5

U7

P

4

OE#

A2Y

G

SN74AHCT1G125GW_SOT353-5

3

R212 4.7K_0402_5%
R219 4.7K_0402_5%

R213 4.7K_0402_5%
R220 4.7K_0402_5%

R209 4.7K_0402_5%
R214 1.3K_0402_5%

R211 4.7K_0402_5%
R216 1.3K_0402_5%

0.22U_0603_10V7K

1 2

1 2

1 2

1 2

R84

1 2

10K_0402_1%

PCM_SPK#<21>

SB_SPKR<16>

12

12

12

12

1 2

12

R218 @10K_0402_5%

1 2

R217 @1K_0402_5%

1 2

R388 0_0402_5%
R387 10K_0402_5%

@0.1U_0402_16V4Z

0.1U_0402_16V4Z

@0.1U_0402_16V4Z

@0.1U_0402_16V4Z

1 2

1 2

L9

0_1206_5%

1 2

L10 0_1206_5%

C155

12

C204

12

C477

12

C474

12

12

GNDA

GNDA

C99

B

+3VALW

14

9

1

7

2

+3VALW

11

+3VALW

13

DLINE_IN_R_L

DLINE_IN_R_R

CDROM_R_L

CDROM_R_R

CD_GNA

MDC_AUDIO_MONR

MD_SPKR

C482

0.1U_0603_16V7K

U4D

P

O8I

G

SN74LVC14APWLE_TSSOP14

14

P

G

7

14

P

G

7

MIC1<28>

C113

1U_0603_10V6K

U4E

O10I

1U_0603_10V6K

SN74LVC14APWLE_TSSOP14

U4F

O12I

1U_0603_10V6K

SN74LVC14APWLE_TSSOP14

2

2

C493

1

1

@0.1U_0402_16V4Z

12

C114

12

C115

12

@10K_0402_5%

2

C494

@0.1U_0402_16V4Z

1

C

R88

1 2

560_0402_5%

R89

1 2

560_0402_5%

R90

1 2

560_0402_5%

MIC2<28>

SPDIFO<33>

R92

AC97_RST#<16,25,28>

AC97_SYNC<16,25,28>

AC97_SDOUT<16,25,28>

EAPD<24>

@4.7K_0402_5%

+5VAMP

12

R181
10K_0402_1%

C170
1U_0603_10V6K

12

R182
10K_0402_1%

MONO_IN

1 2

39.2K_0402_1%

1

C

Q24

2

B

2SC2411K_SOT23

E

3

12

D11
RB751V_SOD323

2 1

MONO_INR

HPS<24>

C213

1U_0603_10V6K

1 2

C214 1U_0603_10V6K

1 2

C208 1U_0603_10V6K

1 2

C210 1U_0603_10V6K

1 2

C209 1U_0603_10V6K

1 2

1 2

C211 1U_0603_10V6K

1 2

C212 @1U_0603_10V6K

1 2

C487 1U_0603_10V6K

1 2

C483 0.1U_0402_16V4Z

R365 1K_0402_5%

1 2

R363 1K_0402_5%

1 2

L36

1 2

FBM-L10-160808-301-T_0603

R357

1 2

12

R427

MONO_INC

R199 0_0402_5%

12

1 2

R444 4.7K_0402_5%

DLINE_IN_RC_L
DLINE_IN_RC_R

CDROM_RC_L
CDROM_RC_R
CDGNDA

MDC_AUDIO_MONRC

MD_SPKRC

R381 33_0402_5%

1 2

R367 33_0402_5%

1 2

12

R361

0_0402_5%

R360

4.7K_0402_5%

1 2

D

C167

MONO_INR

1 2

1U_0603_10V6K

1 2

R174

2.4K_0402_5%

38

U22

AVDD125AVDD2

14

AUX_L

15

AUX_R

16

JS1

17

JS0

23

LINE_IN_L

24

LINE_IN_R

18

CD_L

20

CD_R

19

CD_GND

21

MIC1

22

MIC2

13

PHONE

11

RESET#

10

SYNC

5

SDATA_OUT

45

ID0

46

ID1

47

EAPD

48

SPDIFO

4

DVSS1

7

DVSS2

AD1981B_LQFP48

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C198

@10U_1206_6.3V6M~D

4.7U_0805_6.3V6K

+5VS

+5VAMP_CODEC

1

C161

0.1U_0402_16V4Z

2

2

C472

0.1U_0402_16V4Z

1

43

AVDD434AVDD3

DVDD11DVDD2
LINE_OUT_L
LINE_OUT_R

MONO_OUT
HP_LOUT_L

HP_LOUT_R

BIT_CLK

SDATA_IN

XTL_IN

XTL_OUT

VREFOUT

VREF

AFILT1
AFILT2
AFILT3
AFILT4

AVSS1
AVSS2
AVSS3
AVSS4

E

+5VS

NC
NC

+5VS

2

C149

1

2

9

35
36
37
39
41

6
8
2

3

28
27

29
30
31
32

12
42

26
40
44
33

@0.1U_0402_16V4Z

1

C207
@1U_0603_10V6K

2

1 2

R192 0_1206_5%

W=40Mil

1

1

C150

0.1U_0402_10V6K

2

2

12

R411 10K_0402_5%

C172

0.1U_0402_16V4Z

1

2

1

C468

0.1U_0402_16V4Z

2

C159 1U_0603_10V6K

MDMIC

R377 33_0402_5%
R378 33_0402_5%

CODEC_REF

AFILT1
AFILT2
AFILT3
AFILT4

U23

VIN2SD

1

C205

GND5VOUT

2

@LP3965-ADJ

+5VAMP

U19

4

VIN

2

DELAY
ERROR7CNOISE

8

SD

SI9182DH-AD_MSOP8

1 2

1

2

+3VS_CODEC

1

C478

0.1U_0402_16V4Z

2

LINE_OUTL <24>
LINE_OUTR <24>

L34 0_0805_5%

1 2

L35 @0_0805_5%

C473
10U_1206_6.3V6M

+5VAMP_CODEC

C160

0.1U_0402_16V4Z

1 2

12
12

1

C188

@22P_0402_50V8J

2

C189

270P_0402_50V7K

1 2

270P_0402_50V7K

C185

1 2

C182 270P_0402_50V7K

1 2

C178 270P_0402_50V7K

1 2

F

1
4

ADJ

3

R193

@10K_0402_1%

VOUT

SENSE or ADJ

FBM-L10-160808-301-T_0603

1

C163
10U_0805_10V4Z

2

AC97_BITCLK <16,25,28>
AC97_SDIN0 <16>

R189
@1M_0402_5%
Y3
@24.576MHz

SUSP#

R190 @30K_0603_1%
C183

@100P_0402_50V8K

12

5
6
1

1

3

GND

2

0.01U_0402_25V7Z

VDDA_CODEC

+5VAMP

L37

1 2

MD_MIC <25,28>

R184 0_0402_5%

12

1

C162
@22P_0402_50V8J

2

AUD_REF

1 2

SUSP# <29,34,38>

12

R176

1 2

28.7K_0603_1%

12

R177
10K_0603_1%

+3VS

CLK_14M_CODEC

+5VAMP

VDDA_CODEC

1

2

C168

4.7U_0805_6.3V6K

1

C165

0.1U_0402_10V6K

2

CLK_14M_CODEC <12>

1

C179
@0.1U_0402_16V4Z

2

C156

12

12

R175
@10_0402_5%

1

C164
@15P_0402_50V8J

2

1

C202
1U_0603_10V6K

2

1

C197

0.1U_0402_16V4Z

2

R365 R363 FREQ. SEL

23 49Monday, May 12, 2003

H

Crystal

External

X X

Title

Size Document Number Rev

Custom
Date: Sheet of

Compal Electronics, Inc.

LA-1701

G

StuffStuff

AC97 CODEC

24.576MHZ

14.318MHZ

1.0

A

1 1

B

C

D

E

+5VAMPP

1

+

C206
@150U_D2_6.3VM

18

HPS <23>

PVDD17PVDD2

HP/LINE#

LOUT­LOUT+
ROUT-

ROUT+

SE/BTL#

GAIN1

GAIN0

BYPASS

2

9
4
16
21

15
17

3
2

11

R414 0_0402_5%

LINE_OUTR<23>

2 2

LINE_OUTL<23>

+5VAMP

12

R432
100K_0402_5%

EAPD#

13

D

Q51

EAPD<23>

3 3

2

G

2N7002 1N_SOT23

S

1 2

R413 @0_0402_5%

1 2

R416 @0_0402_5%

1 2

R419 0_0402_5%

1 2

EAPD# <28>

DOCK_HPS<33>

HP_PLUG<28>

LINE_R_OUTR

R428

0_0402_5%

LINE_R_OUTL

R429

0_0402_5%

EC_MUTE#<28,29>

100K_0402_5%

12

12

EAPD#

R162 0_0402_5%
R163 @0_0402_5%

HP_PLUG

1 2

100K_0402_5%

R159

1 2

+5VAMP

C174 0.022U_0603_25V7K
C490 0.47U_0603_10V7K
C215 0.47U_0603_10V7K

C216 0.47U_0603_10V7K
C489 0.47U_0603_10V7K
C201 0.022U_0603_25V7K

C176 0.47U_0603_10V7K

1 2
1 2

R420

0.1U_0603_16V7K

1 2
1 2
1 2

1 2
1 2
1 2

1 2

C562

LINE_C_OUTR
R_HP_C

L_HP_C
LINE_C_OUTL

2
1

1

2

+5VAMP

I0
I1

5

3

23
20

10

14
22

P

HPS

4

O

G

U21
TC7SH32FU_SSOP5

U24

RLINEIN
RHPIN

8

RIN

LIN

6

LHPIN

5

LLINEIN

PC-BEEP
SHUTDOWN#

19

VDD

GND424GND3

GND212GND1

TPA0312PWP_TSSOP24~D

1

13

1

2

SPK_L­SPK_L+
SPK_R­SPK_R+

HPS

1

C217

0.47U_0603_10V7K

2

SPKL+_C
SPKL-

SPKR+_C
SPKR-

40mils

C492
10U_1206_6.3V7K

1 2

L17 0_1206_5%

1 2

L16 0_1206_5%

1 2

L12 0_1206_5%

1 2

L11 0_1206_5%

@100K_0402_5%

1

1

C193

2

2

47P_0402_50V8J

47P_0402_50V8J

1

2

R393

100K_0402_5%

1

C194

2

47P_0402_50V8J

C175

0.1U_0603_25V7M

SPKL­SPKL+_C
SPKR­SPKR+_C SPKR+

12

@100K_0402_5%

12

R391

100K_0402_5%

1

C196

C195

47P_0402_50V8J

2

R394

R392

1

2

JP19

1
2

L-SPK CONN

JP18

1
2

R-SPK CONN.

1 2

L15 0_1206_5%

C488

0.1U_0603_25V7M

+

1 2

C565 100U_6.3V_M

+

1 2

C566 100U_6.3V_M

+5VAMP

12

12

1
2

1
2

+5VAMP

SPKL+

SPKL+ <28>
SPKR+ <28>

Gain Settings

GAIN0

GAIN1 SE/BTL# Av(inv)

0 0

1

0

01
1 1
X X

6 dB

0

10 dB

0

15.6 dB

0

21.6 dB

0

4.1 dB

1

4 4

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

Size Document Number Rev

Custom
Date: Sheet of

Compal Electronics, Inc.

LA-1701

AMP & Audio Jack

E

24 49Monday, May 12, 2003

1.0

A

B

C

D

E

PCI_AD30
PCI_AD28

PCI_AD26
PCI_AD24
MINI_IDSEL

PCI_AD22
PCI_AD20

PCI_AD18
PCI_AD16

PCI_FRAME#
PCI_TRDY#
PCI_STOP#

PCI_DEVSEL#
PCI_AD15

PCI_AD13
PCI_AD11

PCI_AD9
PCI_CBE#0

PCI_AD6
PCI_AD4
PCI_AD2
PCI_AD0

AC97_SDOUT
AC97_RST#

MD_SPK

W=40milsW=30mils

+3VS

C322

W=40mils

PCI_GNT#4

W=40mils

W=40mils

PCI_GNT#3

R72

1 2

@1K_0402_5%

1 2

1

2

+5VS
PCI_GNT#4 <15>

+3VALW

PCIRST# <7,13,15,19,20,21,22,31>

+3VS
PCI_GNT#3 <15>

MINI_PME# <19,21,29>
CH_CLK <31>

R76

100_0402_5%

PCI_PAR <15,19,20,21>

PCI_FRAME# <15,19,20,21>
PCI_TRDY# <15,19,20,21>
PCI_STOP# <15,19,20,21>

PCI_DEVSEL# <15,19,20,21>PCI_PERR#<15,19,20,21>

PCI_CBE#0 <15,19,20,21>

AC97_SDOUT <16,23,28>
AC97_RST# <16,23,28>

MD_SPK <23,28>

+3VAUX

+3VALW +3VAUX

1

C84
1U_0603_10V6K

2

Wireless_OFF<31>

R70 @0_0402_5%

1 2

R69 0_0402_5%

1 2

PCI_AD18

2

PCI_PIRQC#

PCI_PIRQD#

Q16
SI2301DS_SOT23

13

1

2

0.01U_0402_16V7K

C106

1

C107

0.1U_0402_16V7K

2

1

C100

4.7U_0805_6.3V6K

2

+5VS

C77

1

10U_1206_6.3V6M

2

PCI_PIRQC#<15,21>

PCI_PIRQD#<15>

CLK_PCI_MINI

12

R301
10_0402_5%

1

C319
10P_0402_50V8K

2

1

C74

0.01U_0402_16V7K

2

R65 @0_0402_5%

1 2

R64 0_0402_5%

1 2

MDC_AUDIO_MON<23>

1

C75

0.1U_0402_16V7K

2

CH_DATA<31>

AC97_SYNC<16,23,28>
AC97_SDIN2<16>

AC97_BITCLK<16,23,28>

MD_MIC<23,28>

MODEM_RI#<30>

+5VS

Wireless_OFF#<28,29,31>

PCI_REQ#4<15>

CLK_PCI_MINI<12>

PCI_REQ#3<15>

R298
@1K_0402_5%

1 2

PCI_CBE#3<15,19,20,21>

PCI_CBE#2<15,19,20,21>
PCI_IRDY#<15,19,20,21>

PM_CLKRUN#<16,19,21,22,29>

PCI_SERR#<15,19,21>

PCI_CBE#1<15,19,20,21>

AC97_SYNC
AC97_SDIN2
AC97_BITCLK

@15P_0402_50V8J

C95

+3VS

+5VS

12

MDC_AUDIO_MON
MD_MIC

MODEM_RI#

1

4.7U_0805_6.3V6K

2

C76

1

C96

1 1

2 2

3 3

0.01U_0402_16V7K

0.01U_0402_16V7K

2

+5VS

C97

RB751V_SOD323

W=40mils

CLK_PCI_MINI
PCI_REQ#3
PCI_AD31

PCI_AD29
PCI_AD27

PCI_AD25

PCI_AD23
PCI_AD21

PCI_AD19
PCI_AD17

PCI_CBE#2
PCI_IRDY#

PCI_SERR#
PCI_PERR#

PCI_CBE#1
PCI_AD14

PCI_AD12
PCI_AD10

PCI_AD8
PCI_AD7

PCI_AD5
PCI_AD3

W=30mils

PCI_AD1

+3VALW

1

0.01U_0402_16V7K

2

D17

21

C323

PCI_AD[0..31]

JP28

112

KEY KEY

334
556
778
9910
111112
131314
151516
171718
191920
212122
232324
252526
272728
292930
313132
333334
353536
373738
393940
414142
434344
454546
474748
494950
515152
535354
555556
575758
595960
616162
636364
656566
676768
696970
717172
737374
757576
777778
797980
818182
838384
858586
878788
898990
919192
939394
959596
979798
9999100

101

101

103

103

105

105

107

107

109

109

111

111

113

113

115

115

117

117

119

119

121

121

123

123

127

127

Mini-PCI SLOT

1

0.1U_0402_16V7K

2

102
104
106
108
110
112
114
116
118
120
122
124

128

2
4

6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124

128

1

C90

4.7U_0805_6.3V6K

2

PCI_AD[0..31] <15,19,20,21>

RINGTIP

4 4

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

Mini PCI Slot

LA-1701

25 49Monday, May 12, 2003

E

1.0

5

D D

4

3

2

1

Parallel Port

+5V_PRN

D4

2 1

+5VS

RB420D_SOT23

LPTSTB#

LPTSTB#<22,33>

LPTAFD#<22,33>

C C

1 2

R4 33_0402_5%

1 2

R1 33_0402_5%

LPTERR#<22,33>

LPTACK#<22,33>

LPTBUSY<22,33>

LPTSLCT<22,33>

W=20mils

LPTPE<22,33>

1K_0402_5%

+5V_PRN_R

AFD/3M#LPTAFD#
FD0
LPTERR#
FD1
LPT_INIT#
FD2
SLCTIN#
FD3

FD4
FD5
FD6
FD7
LPTACK#
LPTBUSY
LPTPE

LPTSLCT

R5

w=20mils

12

1

14

2

15

3

16

4

17

5

18

6

19

7

20

8

21

9
22
10
23
11
24
12
25
13

1

C9

0.1U_0402_16V7K

2

JP2

LPTCN-25-SUYIN

LPTINIT#<22,33>

LPTSLCTIN#<22,33>

+5V_PRN

SLCTIN#
LPT_INIT#
LPTERR#
AFD/3M#

+5V_PRN

LPD[0..7]<22,33>

LPD3
LPD2
LPD1
LPD0
LPD7
LPD6
LPD5
LPD4

LPTINIT#

LPTSLCTIN#

FD0
FD1

FD2
FD3

LPD[0..7]

RP69

10
11
12
13
14
15
16

33_16P8R_1206_5%

1 2

R2 33_0402_5%

1 2

R3 33_0402_5%

RP2

1
2
3
4
5

4.7K_10P8R_1206_5%

RP1

1
2
3
4
5

4.7K_10P8R_1206_5%

CP4

2
3
4 5

220P_1206_8P4C_50V8K

CP1

2
3
4 5

220P_1206_8P4C_50V8K

CP3

FD0
FD1

2

FD2

3

FD3

4 5

220P_1206_8P4C_50V8K

CP2

FD4
FD5

2

FD6

3

FD7

4 5

220P_1206_8P4C_50V8K

81
7
6

81
7
6

81
7
6

81
7
6

FD7
FD6
FD5
FD4

LPTACK#
LPTBUSY
LPTPE
LPTSLCT

AFD/3M#
LPTERR#
LPT_INIT#
SLCTIN#

LPTACK#
LPTBUSY
LPTPE
LPTSLCT

FD3

89

FD2

7

FD1

6

FD0

5

FD7

4

FD6

3

FD5

2

FD4

1

LPT_INIT#

SLCTIN#

+5V_PRN

10
9
8
7
6

+5V_PRN

10
9
8
7
6

TVS22 @SF10402ML080C

FD0

TVS20 @SF10402ML080C

FD1
FD2

TVS19 @SF10402ML080C

FD3

TVS2 @SF10402ML080C

FD4

TVS17 @SF10402ML080C
TVS16 @SF10402ML080C

FD5

TVS15 @SF10402ML080C

FD6
FD7

TVS14 @SF10402ML080C

+5V_PRN_R

TVS24 @SF10402ML080C

AFD/3M#

TVS23 @SF10402ML080C
TVS21 @SF10402ML080C

LPTERR#

TVS1 @SF10402ML080C

LPT_INIT#
SLCTIN#

TVS18 @SF10402ML080C

LPTACK#

TVS13 @SF10402ML080C

LPTBUSY

TVS12 @SF10402ML080C
TVS11 @SF10402ML080C

LPTPE

TVS10 @SF10402ML080C

LPTSLCT

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

FIR Module

12

R226
FIR@10_1206

TXD

MODE

+5VS

12

R227
FIR@10_1206

1

+

C233
FIR@10U_TE-01_6.3VM

2

T = 40mil

+5VS_FIR

1
3
5
7

T = 12mil
T = 12mil

T = 12mil

IRTXOUT
IRMODE

IRRX

1

2

IRTXOUT <22>
IRMODE <22>

IRRX <22>

C232
FIR@0.1U_0402_10V6K

B B

+3VS

FIR@0.1U_0402_10V6K

FIR@0.1U_0402_10V6K

C219

C218

1

2

1

2

T = 20mil

12

C220

+

FIR@22UF_10V_1206

U25

2

IRED_C

4

RXD

6

VCC

8

GND

FIR@IR_VISHAY_TFDU6101E-TR4_8P

IRED_A

SD/MODE

A A

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Rev

LA-1701

Date: Sheet of

LPT Port & FIR

1

26 49Monday, May 12, 2003

1.0

5

4

3

2

1

D D

4.7U_0805_10V4Z

C C

B B

A A

C278

+5V

1

2

U27

3

VIN

4

VIN/CE

2

GND

RT9701-CBL_SOT23_5

VOUT
VOUT

560K_0402_5%

USB_VCCA

1
5

R244

12

R243
470K_0402_5%

OVCUR#0

12

1

C254
1000P_0402_50V7K

2

USB20P0-<16>
USB20P0+<16>

C279

4.7U_0805_10V4Z

150U_D2_6.3VM

OVCUR#0 <16>

+5V

1

2

C251

1

+

0.1U_0402_10V6K

2

2
3

W=40mils

L28
0_0603_5%

L24

L29

0_0603_5%

U26

3
4

2

RT9701-CBL_SOT23_5

1

C261

2

12

1

@DLW21SN900SQ2

4

12

VIN

VOUT

VIN/CE

VOUT

GND

1

C266
1000P_0402_50V7K

2

USB_VCCA
USB0D­USB0D+

@SF10402ML080C

1
5

R266

560K_0402_5%

TVS27

USB_VCCC

12

12

JP8

1
2
3
4

1

1

TVS26

2

2

@SF10402ML080C

VCC
D­D+
GND

USB_CONN1

1

2

TVS25
@SF10402ML080C

USB0D­USB0D+

USB CONNECTOR 3

R259
470K_0402_5%

OVCUR#2

150U_D2_6.3VM

1

C273
1000P_0402_50V7K

2

USB20P4-<16>

USB20P4+<16>

OVCUR#4 <16>

C253

1

+

0.1U_0402_10V6K

2

2
3

0_0603_5%

USB20P1-<16>

USB20P1+<16>

L26
0_0603_5%

L23

L27

150U_D2_6.3VM

W=40mils

C270

12

1

@DLW21SN900SQ2

4

12

USB CONNECTOR 1

USB CONNECTOR 2

USB_VCCA

1

+

C252

0.1U_0402_10V6K

2

L30

0_0603_5%

L25

2
3

L31

0_0603_5%

1

1

C269
1000P_0402_50V7K

2

2

USB_VCCC
USB4D­USB4D+

TVS33

@SF10402ML080C

W=40mils

C272

12
1

@DLW21SN900SQ2

4
12

USB4D­USB4D+

1

2

@SF10402ML080C

1

2

1
2
3
4

1

TVS32

2

1

C271
1000P_0402_50V7K

2

USB_VCCA
USB1D­USB1D+

TVS30

@SF10402ML080C

JP6

VCC
D­D+
GND

USB_CONN1

1

TVS31
@SF10402ML080C

2

USB1D­USB1D+

1

2

@SF10402ML080C

1
2
3
4

1

TVS29

2

JP7

VCC
D­D+
GND

USB_CONN1

1

2

TVS28
@SF10402ML080C

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Rev

LA-1701

Custom
Date: Sheet of

USB Connector

1

27 49Monday, May 12, 2003

1.0

+3VMDC

12

C463

C158

MDC@1000PF_0402

C169

MDC@1000PF_0402

+3V

+3VALW

12

1 2

R349 MDC@0_0805

1 2

R348 @0_0805

MDC@4.7UF_10V_0805

+5VS

1

C173
MDC@0.1U_0402_10V6K

2

FUN. BUTTON BD.

JP24

1

1

2

2

3

3

4

4

5

5

6

6

FUN. BUTTON CONN.

R430 @0_0402_5%

1 2

MUTE#

R431 0_0402_5%

1 2

MUTE#
EC_MUTE_IN#
VOL_UP#
VOL_DW#

EC_MUTE#
EAPD#

+5VS
EC_MUTE_IN# <30>

VOL_UP# <30>
VOL_DW# <30>

EC_MUTE# <24,29>
EAPD# <24>

2

C466
MDC@0.1U_0402_10V6K

1

+3VS

1

12

2

MDC Conn.

JP16

MD_MIC<23,25>

+3VMDC

+3VS

AC97_SDOUT<16,23,25>

AC97_RST#<16,23,25>

C157
MDC@0.1U_0402_10V6K

SPKR+
SPKL+

SPKL+<24>

DLINE_OUT_R
DLINE_OUT_L

MIC1

MIC1<23>

MIC2

MIC2<23>

HP_PLUG

+5V

+5VS +5VS

DEV_LED#
BT/WL_ON/OFF#
Wireless_OFF#
TP_ON/OFF#
TPAD_LED# TPAD_LED#
POWER1_LED#

FULL_LED#
CHARGING_LED#
TP_CLK
TP_DATA

DLINE_OUT_R<33>
DLINE_OUT_L<33>

CODEC_REF

+5VAMP_CODEC

HP_PLUG<24>

+5VALW

DEV_LED#<18>

BT/WL_ON/OFF#<30>

Wireless_OFF#<25,29,31>

TP_ON/OFF#<30>

TPAD_LED#<30>

POWER1_LED#<30,33>

FULL_LED#<30>

CHARGING_LED#<30>

TP_CLK<29>

TP_DATA<29>

SPKR+<24>

1

MONO_OUT/PC_BEEP

3

GND

5

AUXA_RIGHT

7

AUXA_LEFT

9

CD_GND

11

CD_RIGHT

13

CD_LEFT

15

GND

17

+3.3Vaux/BT_VCC

19

GND

21

+3.3Vmain

23

AC97_SDATA_OUT

25

AC97_RESET#

27

GND

29

AC97_MSTRCLK

MDC@AMP 3-1473290-0

TP & LED BD.

JP20

60
58
56
54
52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10

8
6
4
2

SW BD CONN

60
58
56
54
52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2

AUDIO_PWRDN/DETECH

RESERVED/PRIMARY_DN

RESERVED/+5VD/WAKEUP

59

59

57

57

55

55

53

53

51

51

49

49

47

47

45

45

43

43

41

41

39

39

37

37

35

35

33

33

31

31

29

29

27

27

25

25

23

23

21

21

19

19

17

17

15

15

13

13

11

11

9

9

7

7

5

5

3

3

1

1

RESERVED/BT_ON#

RESERVED/USB+

RESERVED/USB-

RESERVED/GND

AC97_SDATA_IN1
AC97_SDATA_IN0

MONO_PHONE

GND

+5Vmain

AC97_SYNC

GND

AC97_BITCLK

SPKR+
SPKL+

DLINE_OUT_R
DLINE_OUT_L

MIC1
MIC2

HP_PLUG

DEV_LED#
BT/WL_ON/OFF#
Wireless_OFF#
TP_ON/OFF#

POWER1_LED#
FULL_LED#

CHARGING_LED#
TP_CLK
TP_DATA

2
4
6
8
10

L33 @0_0603

12

L32 @0_0603

14
16
18
20
22
24
26
28
30

CODEC_REF
+5VAMP_CODEC

+5V
+5VALW

12
12

12

MDC@22_0402

12

MDC@22_0402

+5VS

1

2

R352
R350

C199

0.1U_0402_10V6K

BT_DETACH <30>
MD_SPK <23,25>
BT_ON# <30>
BT_PRES# <30>
+5VS
USB20P5+ <16,31>
USB20P5- <16,31>

BT_WAKE_UP <29>
AC97_SYNC <16,23,25>

AC97_SDIN1 <16>

AC97_BITCLK <16,23,25>

+5VALW

1

C200

0.1U_0402_10V6K

2

+5VAMP_CODEC

1

C495

0.1U_0402_10V6K

2

INT_KBD CONN.

KSO[0..10]<29>

KSI[0..7]<29>

KSO0
KSO2
KSO5

KSIN8<30>

KSIN9<30>

CP7

2
3
4 5

100P_1206_8P4C_50V8

CP6

2
3
4 5

100P_1206_8P4C_50V8

CP5

2
3
4 5

100P_1206_8P4C_50V8

KSIN14
KSIN8
KSIN12
KSIN10
KSI0
KSI4
KSI2
KSI1
KSI3
KSO3
KSO8
KSO4
KSO7
KSO6
KSO10
KSO1
KSI5
KSI6
KSI7
KSIN13
KSIN11
KSIN9
KSO9

KSIN14<30>
KSIN12<30>

KSIN10<30>

KSIN13<30>
KSIN11<30>

KSO8
KSO3
KSI3
KSI1

KSO10
KSO6
KSO7
KSO4

KSO9
KSI7
KSI5
KSO1 KSI6

KSO[0..10]
KSI[0..7]

JP21

1

2

1

2

3

4

3

4

5

6

5

6

7

8

7

8

9

10

9

10

11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59

81
7
6

81
7
6

81
7
6

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

53

54

55

56

57

58

59

60

K/B CONN.

KSO5
KSO2
KSO0

100P_1206_8P4C_50V8

KSI2
KSI4
KSI0

100P_1206_8P4C_50V8

12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60

CP9

2
3
4 5

CP8

2
3
4 5

81
7
6

81
7
6

KSO0
KSO2
KSO5
KSIN14
KSIN8
KSIN12
KSIN10
KSI0
KSI4
KSI2
KSI1
KSI3
KSO3
KSO8
KSO4
KSO7
KSO6
KSO10
KSO1
KSI5
KSI6
KSI7
KSIN13
KSIN11
KSIN9
KSO9

D28

@SM05_SOT23

ON/OFF

Power button

3

2

1

+5VS

12

R421
150_0402_5%

21

GREEN

D26
17-21/GVC-AMPB/3T_GRN

SW1

3

1
2

4

STS-KB5_5P

5

ON/OFF BUTTON

D21

ON/OFF

+3VALW

D

S

12

R330

4.7K_0402
R334

1 2

0_0402_5%

13

2

G

@2N7002

Q43

1

DAN202U_SC70

2

22K

22K

ON/OFF<33>

EC_ON<29>

+3VALW

3
2

12

R329
100K_0402_5%

ON/OFFBTN#

13

Q44

DTC124EK_SOT23

ON/OFFBTN# <29>
51_ON# <35>

12

1

2

D22
RLZ20A_LL34

C421

0.01U_0402_16V7K

WHEN R=0,Vbe=1.35V
WHEN R=33K,Vbe=0.8V

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

LID SW

LID_SW#<29>

LID_SW#

1

1

3

TVS3

@SF10402ML080C

2

SW2

HORNG CHIH

2

4

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

MDC/BT/KBD/ON_OFF/LID

LA-1701

28 49Monday, May 12, 2003

1.0

A

B

C

D

E

+3VALW

4.7U_0805_6.3V6K

+3VALW

PS2_DATA
PS2_CLK

EC_SMD_2
EC_SMC_2
EC_SMD_1
EC_SMC_1

+3VALW

GATEA20<15>

MURATA BLM11A20PT_0603

10K_0402_5%

RC#<15>

10

9
8
7
6

FSEL#
SELIO#
FREAD#

EC_SMI#

1 8
2 7
3 6
4 5

1 2

R67 20K_0402_5%

1 2

R99 20K_0402_5%

1 1

2 2

+5V

3 3

4 4

1

C147

2

1 2

0.1U_0402_16V7K

1 2

MURATA BLM11A20PT_0603

12

R145

ADB[0..7]
KBA[0..19]

RP6

10K_10P8R_1206_5%

SD307100207

RP10

1 8
2 7
3 6
4 5

10K_8P4R_0804_5%

SD309100200

RP15

10K_8P4R_0804_5%

LID_SW#
MSEN#

A

0.1U_0402_16V7K

1

C137

2

0.1U_0402_16V7K

L8

C86

L7

+3VS

12

R146
10K_0402_5%

1
2
3
4
5

+3VALW

+5VALW

1

C132

2

2

1

ECAGND

ADB[0..7] <30>
KBA[0..19] <30>

KBD_DATA
KBD_CLK
TP_DATA
TP_CLK

10P_0402_50V8K

1

C109

0.01U_0402_16V7K

2

1

C91
1000P_0402_50V7K

2

+3VALW

+5V

C118

EC_AVCC

R148

1 2

10K_0402_5%

1

32.768KHz_12.5P_CM155

2

1 2

X1

EC_RST#

12

+3VALW

+3VS

4.7U_0805_6.3V6K

LPC_DRQ#0<16,31>

LPC_FRAME#<16,22,31>

LPC_AD0<16,22,31>
LPC_AD1<16,22,31> LI/NIMH# <42>
LPC_AD2<16,22,31>
LPC_AD3<16,22,31>

CLK_PCI_LPC<12>

J1

12

JOPEN

KSI[0..7]<28>

KSO[0..10]<28>

CLK_PCI_LPC

12

R142
10_0402_5%

1

C153
10P_0402_50V8K

2

KBD_CLK<33>

KBD_DATA<33>

PS2_CLK<33>

PS2_DATA<33>

TP_DATA<28>
LID_SW#<28>

BT_WAKE_UP<28>

R94

20M_0603_5%

12

120K_0402_5%

1

C119
10P_0402_50V8K

2

EC_SMI#<16>

EC_RIOUT#<16>
PCM_SUSP#<21>

SLP_S1#<12,16>
SYSON<34,38>

Wireless_OFF#<25,28,31>
PM_RSMRST#<16,21>

ENABLT#<13>

PROCHOT#<4>

1

2

1 2

@0_0402_5%

CLK_PCI_LPC

SCI#

RC#

KSI[0..7]
KSO[0..10]

EC_TINIT#
EC_TCK
EC_TDO
EC_TDI
EC_TMS

10K_0402_5%

1

2

R443

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10

KBD_CLK
KBD_DATA
PS2_CLK
PS2_DATA
TP_CLK
TP_DATA
LID_SW#
BT_WAKE_UP

CRY1
CRY2

EC_SMI#
MSEN#
CONA

FSEL#

12

R96

C146

0.1U_0402_16V7K

7
8

9
15
14
13
10
18
19
22
23

31

5

6

KSI0

71

KSI1

72

KSI2

73

KSI3

74

KSI4

77

KSI5

78

KSI6

79

KSI7

80
49

50
51
52
53
56
57
58
59
60
61
64
65
66
67
68

105
106
107
108
109

110
111
114
115
116
117
118
119

158
160

62
63
69
70
75
76

148
149
155
156

3

4
27
28

173
174

47

C148

SIRQ<15,21,22,31>

SCI#<16>

GATEA20

TP_CLK<28>

R93

MSEN#<13,14,33>

CONA<33>

SUSP#<23,34,38>
VR_ON<34,39,41>

BKOFF#<13>

FSEL#<30>

B

U15

SERIRQ
LDRQ#
LFRAME#
LAD0
LAD1
LAD2
LAD3
LCLK
RESET1#
SMI#
PWUREQ#

IOPD3/ECSCI#

GA20/IOPB5
KBRST/IOPB6

KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7

KBSOUT0
KBSOUT1
KBSOUT2
KBSOUT3
KBSOUT4
KBSOUT5
KBSOUT6
KBSOUT7
KBSOUT8
KBSOUT9
KBSOUT10
KBSOUT11
KBSOUT12
KBSOUT13
KBSOUT14
KBSOUT15

TINT#
TCK
TDO
TDI
TMS

PSCLK1/IOPF0
PSDAT1/IOPF1
PSCLK2/IOPF2
PSDAT2/IOPF3
PSCLK3/IOPF4
PSDAT3/IOPF5
PSCLK4/IOPF6
PSDAT4/IOPF7

32KX1/32KCLKIN
32KX2

IOPJ2/BST0
IOPJ3/BST1
IOPJ4/BST2
IOPJ5/PFS
IOPJ6/PLI
IOPJ7/BRKL_RSTO

IOPM0/D8
IOPM1/D9
IOPM2/D10
IOPM3/D11
IOPM4/D12
IOPM5/D13
IOPM6/D14
IOPM7/D15

SEL0#
SEL1#
CLK

16

VDD

Host interface

Key matrix scan

JTAG debug port

PS2 interface

PORTM

GND117GND235GND346GND4

EC_AVCC

123

136

95

161

AVCC

IOPD2/EXWINT24/RESET2

IOPE7/CLKRUN/EXWINT46

PORTI

VBAT

IOPE0AD4
IOPE1/AD5
IOPE2/AD6
IOPE3/AD7

DP/AD8
DN/AD9

IOPA0/PWM0
IOPA1/PWM1
IOPA2/PWM2
IOPA3/PWM3
IOPA4/PWM4
IOPA5/PWM5
IOPA6/PWM6
IOPA7/PWM7

IOPB0/URXD
IOPB1/UTXD

IOPB2/USCLK

IOPB3/SCL1
IOPB4/SDA1

IOPC0
IOPC1/SCL2
IOPC2/SDA2

IOPC3/TA1

IOPC4/TB1/EXWINT22

IOPC5/TA2

IOPC6/TB2/EXWINT23

IOPC7/CLKOUT

IOPD0/RI1/EXWINT20
IOPD1/RI2/EXWINT21

IOPE4/SWIN

IOPE5/EXWINT40

IOPE6/LPCPD/EXWIN45

IOPH0/A0/ENV0

IOPH1/A1/ENV1
IOPH2/A2/BADDR0
IOPH3/A3/BADDR1

IOPH4/A4/TRIS

IOPH5/A5/SHBM

IOPH6/A6
IOPH7/A7

IOPI0/D0
IOPI1/D1
IOPI2/D2
IOPI3/D3
IOPI4/D4
IOPI5/D5
IOPI6/D6
IOPI7/D7

IOPJ0/RD

IOPJ1/WR0

AD0
AD1
AD2
AD3

DA0
DA1
DA2
DA3

VCC134VCC245VCC3

157

VCC4

VCC5

PORTB

PORTD-1

166

VCC6

AD Input

DA output

PWM
or PORTA

PORTC

PORTE

PORTH

IOPB7/RING/PFAIL/RESET2

PORTJ-1

SELIO#

IOPD4

PORTJ-2

PORTD-2

PORTK

PORTL

AGND

GND5

GND6

GND7

NC1

96

122

159

11

167

137

ECAGND

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

IOPD5
IOPD6
IOPD7

IOPK0/A8

IOPK1/A9
IOPK2/A10
IOPK3/A11
IOPK4/A12

IOPK5/A13_BE0
IOPK6/A14_BE1

IOPK7/A15_CBRD

IOPL0/A16
IOPL1/A17
IOPL2/A18
IOPL3/A19

IOPL4/WR1#

NC212NC320NC421NC585NC686NC791NC892NC997NC10

98

2

C572
@1U_0603_10V6K

1

PC87591L-VPCN01 A2_LQFP176

RTCVREF

2

C128
1U_0603_10V6K

1

BATT_TEMP <42>

81
82
83
84
87
88
89
90
93
94

99
100
101
102

32
33
36
37
38
39
40
43

153
154
162
163
164
165

168
169
170
171
172
175
176
1

26
29
30

2
44
24
25

124
125
126
127
128
131
132
133

138
139
140
141
144
145
146
147

150
151

152
41

42
54
55

143
142
135
134
130
129
121
120

113
112
104
103
48

C116

ADP_IR

DEV_ID0
DEV_ID1
DEV_ID2
EC_SMC_1
EC_SMD_1

EC_SMC_2
EC_SMD_2

PCI_PME#

KBA0
KBA1
KBA2
KBA3 PCI_PME#
KBA4
KBA5
KBA6
KBA7

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

FREAD#
FWR#

SELIO#

KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15

KBA16
KBA17
KBA18
KBA19

ECAGND

1 2

0.01U_0402_16V7K

BATT_OVP <36>

DAC_BRIG <13>
EN_FAN1 <4>
IREF <36>

INVT_PWM <13>
BEEP# <23>
EN_WOL# <19>
ACOFF <36>
PM_BATLOW# <16>
EC_ON <28>
EC_LID_OUT# <16>
EC_THRM# <16>

EC_SMC_1 <30,33,42>
EC_SMD_1 <30,33,42>
B_PCIRST# <15,18>

PWRBTN_OUT# <16>
EC_SMC_2 <4>
EC_SMD_2 <4>
FANSPEED1 <4>
AIR_ACIN <36>
EC_MUTE# <24,28>

ACIN <16,33,35,37>
SLP_S4# <16>
SLP_S3# <16,33>

ON/OFFBTN# <28>
SLP_S5# <16>
RING# <30>
PM_CLKRUN# <16,19,21,22,25>

FREAD# <30>
FWR# <30>

SELIO# <30>

NUMLED# <30>
CAPSLED# <30>

FSTCHG <36>

D

R86

1 2

10K_0402_5%

1

C112

0.22U_0603_10V7K

2

BADDR1-0

0 0
0 1
1 0

*

(HCFGBAH, HCFGBAL)

1 1

ADP_I <36>

SHBM=1: Enable shared memory with host BIOS
TRIS=1: While in IRE and OBD, float all the
signals for clip-on ISE use

Compal Electronics, Inc.

Title

Size Document Number Rev

LA-1701

Custom
Date: Sheet of

Index

2E
4E

KBA1

KBA2

KBA3

KBA5

CONA

ONBD_LAN_PME#<19,21,25>

I/O Address

Reserved

IRE
OBD

*

DEV
PROG

(ENV1)

(BADDR0)

(BADDR1)

(SHBM)

1 2

R97 20K_0402_5%

PCM_PME#<19,21,25>
MINI_PME#<19,21,25>

USB20_PME#<19,21,25>

DEV_ID2
DEV_ID1
DEV_ID0

EC DEBUG port

JP14

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

@96212-1011S

EC PC87591L

Data

2F
4F

(HCFGBAH, HCFGBAL)+1

ENV0

1 2

10K_0402_5%

1 2

@10K_0402_5%

1 2

10K_0402_5%

1 2

R71 10K_0402_5%

RP12

1 8
2 7
3 6
4 5

10K_8P4R_0804_5%

EC_TINIT#
EC_TCK
EC_TDO
EC_TDI
EC_TMS

DEV_ID0
DEV_ID1
DEV_ID2

E

TRIS

ENV1

0

0

0
0
1
1

R75

R74

R73

1
0
1

+3VALW

+3VALW

+3VALW

29 49Monday, May 12, 2003

0
0
0

12

R62
100K_0402_5%

+5VALW

1.0

BT/WL_ON/OFF#<28>

SELIO#<29>

SN74LVC32APWLE_TSSOP14

FSEL#<29>

FREAD#<29>

INPUT

+3VALW

RP13

100K_8P4R_0804_5%

SD309100300

TP_ON/OFF#<28>

EC_MUTE_IN#<28>

VOL_UP#<28>
VOL_DW#<28>

BT_PRES#<28>

KBA1
SELIO#

100K_8P4R_0804_5%

SD309100300

KSIN8<28>

KSIN9<28>
KSIN10<28>
KSIN11<28>
KSIN12<28>
KSIN13<28>
KSIN14<28>

KBA3
SELIO#

KBA0
KBA1
KBA2
KBA3
KBA4
KBA5 ADB1
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19

FSEL#
FREAD#
FWE#

KBA18
KBA16
KBA15
KBA12
KBA7
KBA6
KBA5
KBA4
KBA3
KBA2
KBA1
KBA0
ADB0
ADB1
ADB2

4

A

5

B

RP8

9

A

10

B

21
20
19
18
17
16
15
14

8
7

36

6
5
4
3
2

1
40
13
37

22
24

9

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24

1 8

2 7

3 6

4 5

1 8

2 7

3 6

14

U16B

P

6

O

G

SN74LVC32APWLE_TSSOP14

7

+3VALW

1 8

2 7

3 6

1 8

2 7

3 6

4 5

14

U16C

P

8

O

G

7

U29

A0

VCC0

A1

VCC1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19

CE#
OE#
WE#

@SST39VF080-70_TSOP40

U35

A18
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
VSS

39F040_TSOP

RP#

READY/BUSY#

NC0
NC1

GND0

GND1

VCC
WE*

DQ7
DQ6
DQ5
DQ4
DQ3

D0
D1
D2
D3
D4
D5
D6
D7

NC

A17
A14
A13

A8

A9
A11
OE*
A10
CE*

4 5

4 5

RP14
100K_8P4R_0804_5%

SD309100300

RP7
100K_8P4R_0804_5%

SD309100300

31
30

ADB0

25
26

ADB2

27

ADB3

28

ADB4

32

ADB5

33

ADB6

34

ADB7

35

RESET#

10
11
12
29
38

23
39

+3VALW

8

FWE#

7

KBA17

6

KBA14

5

KBA13

4

KBA8

3

KBA9

2

KBA11

1

FREAD#

32

KBA10

31

FSEL#

30

ADB7

29

ADB6

28

ADB5

27

ADB4

26

ADB3

25

1A121Y1
1A241Y2
1A361Y3
1A481Y4
2A1112Y1
2A2132Y2
2A3152Y3
2A4172Y4

1

1G

19

2G

1A121Y1
1A241Y2
1A361Y3
1A481Y4
2A1112Y1
2A2132Y2
2A3152Y3
2A4172Y4

1

1G

19

2G

1 2

R422
@100K_0402_5%

+3VALW

C120

1 2

0.1U_0402_16V7K

20

U11

18
16

VCC

14
12
9
7
5
3

GND

SN74LVC244APWLE_TSSOP20

10

+3VALW

C93

1 2

0.1U_0402_16V7K

20

U6

18
16

VCC

14
12
9
7
5
3

GND

SN74LVC244APWLE_TSSOP20

10

+3VALW

1

C124

0.1U_0402_16V4Z

2

KBA16
KBA15
KBA14
KBA13
KBA12
KBA11
KBA9
KBA8
FWE#
RESET#

KBA18
KBA7
KBA6
KBA5
KBA4
KBA3
KBA2
KBA1

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

+3VALW

JP31

1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40

@SUYIN-80065A-040G2T

FWE#

11

O

U16D

SN74LVC32APWLE_TSSOP14

KBA17

KBA19
KBA10
ADB7
ADB6
ADB5
ADB4

ADB3
ADB2
ADB1
ADB0
FREAD#

FSEL#
KBA0

20K_0402_5%

14

12

P

A

13

B

G

7

R116

+3VALW

+3VALW

KBA[0..19]<29>

ADB[0..7]<29>

KBA[0..19]
ADB[0..7]

SN74LVC32APWLE_TSSOP14

EC_SMC_1<29,33,42>
EC_SMD_1<29,33,42>

C133

12

0.1U_0402_16V7K

KBA2

+5VALW

C152

1 2

0.1U_0402_16V7K

R143

1K_0402_5%

+3VALW

1
2

14

U16A

P

A
B

G

7

12

3

O

1 2

R125
20K_0402_5%

U20

8

VCC

7

WP

6

SCL

5

SDA

AT24C16N10SI-2.7_SO8

GND

A0
A1
A2

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

LARST#SELIO#

1 2

OUTPUT

C143

1U_0603_10V6K

+3VALW+3VALW

1
2
3
4

12

G

S

Q19

FWR# <29>

SUS_STAT# <13,16>

EC_FLASH# <16>

12

R10
330_0402_5%

21

GREEN GREEN

D6
17-21/GVC-AMPB/3T_GRN

31

Q31

PDTA114EK_SOT23

CAPSLED#<29> NUMLED#<29>

E

10K

B

2

10K

C

2

1 3

D

2N7002 1N_SOT23

1

2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+5VALW

1 2

20

U17

3

Q0

D0

VCC

D14Q1
D27Q2
D38Q3
D413Q4
D514Q5
D617Q6
D718Q7

11

CP

1

MR

GND

10

12

R152
10K_0402_5%

12

R144
1K_0402_5%

TVS5
@SF10402ML080C_0402

C135

0.1U_0402_16V7K

2
5
6
9
12
15
16
19

SN74HCT273PW_TSSOP20

PCM_RI#<21>

RING#<29>

MODEM_RI#<25>

Title

Size Document Number Rev

Date: Sheet of

FULL_LED# <28>
POWER1_LED# <28,33>

CHARGING_LED# <28>
BT_ON# <28>
BT_DETACH <28>
TPAD_LED# <28>

+3VALW

12

D8

21

RB751V_SOD323

D9

21

RB751V_SOD323

PDTA114EK_SOT23

Q33

B

2

10K

13

D

S

+5VS+5VS

12

R11
330_0402_5%

21

D7
17-21/GVC-AMPB/3T_GRN

31

E

10K

C

Compal Electronics, Inc.

BIOS & EC I/O Port

LA-1701

R37
10K_0402_5%

2

G

Q11
@2N7002 1N_SOT23

RI#1

1

TVS4
@SF10402ML080C_0402

2

30 49Monday, May 12, 2003

RI#1 <22,33>

1.0

5

4

3

2

1

D D

SD@0.1U_0402_10V6K

LPC_AD[0..3]<16,22,29>

C C

CLK_PCI_SD

R408
10_0402_5%

1 2
1

C560
10P_0402_50V8K

2

B B

+3VS

1

1

C556

2

2

R406

SD_CLK

1 2

SD@FBM-11-100505-600T_0402

LPC_AD[0..3]

WR_PT
SDPWCTL#

C557
SD@10U_1206_6.3V6M

+3VS

SIRQ<15,21,22,29>

CLK_PCI_SD<12>

LPC_FRAME#<16,22,29>

R405 SD@1K_0402_5%

1 2

37

SD1

38

SD2

39
40

SD3

41

SD4

42

SD5

43

LPC_AD3

44

LPC_AD2

45

LPC_AD1

46

LPC_AD0

47
48

LPC_DRQ#0<16,29>

PCIRST#<7,13,15,19,20,21,22,25>

SDLED

U42

SDCLK
SD1
SD2
VDD3V
SD3
SD4
SD5
LAD3
LAD2
LAD1
LAD0
SERIRQ

SD@W83L518D (LPC)

CLK_PCI_SD

R147

1 2

0_0402_5%

30

28

29

34

36

31

32

33

35

VSS

SCC8

MSLED

MSCLK

MSPWCTL#

MS326MS227MS1

SCC4

SDLED

SDPWCTL#

W83L518D (LPC)

SCBCLK11SCBIO10SCBRST#

VSS6SCBC88SCBC4

PME#5lESET#

LFRAME#

LPC_DRQ#

PCICLK

1

9

7

4

3

2

25

MS4

SCBPSNT

12

MS5

XOUT

SCRST#

SCIO

SCCLK

SCPSNT

SCPWCTL#

SCLED

VDD

SCBLED

SCBPWCTL#

WR_PT

SD1

24

CLK_SD_48M

23

XIN

22
21
20
19

R407

18

1 2

17

SD@8.2K_0402_5%

16
15
14

MMC_DET#

13

CLK_SD_48M <12>

C558

SD@0.1U_0402_10V6K

CLK_SD_48M

R409
@10_0402

1 2
1

C561
@10PF_0402

2

1

2

+5VS

1

C559
SD@10U_1206_6.3V6M

2

R424

1 2

@0_0805_5%

Q53
SI2301DS_SOT23

SD@0.1U_0402_10V6K

+3VAUX_BT+3VALW

SD3
SD5 SD_CLK
SDPWCTL#

SDLED

+5VS +3VS

1

C298

2

JP17

1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16

SD@SD_16PIN

C300

SD@0.1U_0402_10V6K

MMC_DET#
SD2
SD4

1

2

13

JP32

1
2
3
4
5
6
7
8

BT_CONN

1

C568

1
2
3
4
5
6
7
8

+3VAUX_BT

R425 0_0603_5%

1 2

R426 0_0603_5%

1 2

CH_DATA <25>
CH_CLK <25>

USB20P5+ <16,28>
USB20P5- <16,28>

1U_0603_10V6K

2

Wireless_OFF<25>

Wireless_OFF#<25,28,29>

2

G

1

2

2

0.01U_0402_16V7K
R442

1 2

100K_0402_5%

13

D

Q54
2N7002 1N_SOT23

S

C570

1

C571

0.1U_0402_16V7K

2

+5VALW

1

C569

4.7U_0805_6.3V6K

2

A A

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Rev
Custom

Date: Sheet of

SD CARD/BT Connector

LA-1701

31 49Monday, May 12, 2003

1

1.0

VGATE<12,16,41>

330K_0402_5%

R60

+5VS

12

R59

@10K_0402_5%

+3VS +3VALW

12

R68
47K_0402_5%

1

12

2

+3VALW

14

P

1

G

7

C78

0.47U_0603_10V7K

U4A

O2I

SN74LVC14APWLE_TSSOP14

5

R61

1 2

100K_0402_5%

14

U4C

P

O6I

G

SN74LVC14APWLE_TSSOP14

7

3

1

C79
1U_0603_10V6K

2

2

G

+3VALW

14

P

G

7

13

D

S

U4B

O4I

SN74LVC14APWLE_TSSOP14

Q39
2N7002 1N_SOT23

D18

21

RB751V_SOD323

+3VS

12

R317
10K_0402_5%

PM_POK <16>

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

RESET CKT

LA-1701

32 49Monday, May 12, 2003

1.0

A

B

C

D

E

SPR CONN. 154PIN

A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
A69
A70
A71
A72
A73
A74
A75
A76
A77

P1

P2
A1

A2
A3
A4
A5
A6
A7
A8
A9

JP26

P1

P2
A1

A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
A69
A70
A71
A72
A73
A74
A75
A76
A77

G1

G2

B1
B2
B3
B4
B5
B6
B7
B8

B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
B67
B68
B69
B70
B71
B72
B73
B74
B75
B76
B77

GND1GND2GND3GND4GND5GND

6

G1

G2
B1

B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
B67
B68
B69
B70
B71
B72
B73
B74
B75
B76
B77

SPR@SPR-154PIN

ON/OFF
SLP_S3#

POWER1_LED
KBD_DATA
KBD_CLK
PS2_DATA
PS2_CLK
EC_SMD_1
EC_SMC_1

COMPS
CRMA
LUMA

D_VSYNC_R
D_HSYNC_R
D_DDCCLK
D_DDCDATA
MSEN

BLUE_S
GREEN_S
RED_S

R45 SPR@1K_0402_5%

1 2

R42 SPR@75_0402_1%

1 2

R435 SPR@0_0402_5%

1 2

R436 SPR@0_0402_5%

1 2

R48 SPR@0_0402_5%

1 2

R47 SPR@0_0402_5%

1 2

R46 SPR@0_0402_5%

12

RJ45_TXX+
RJ45_TXX-

ON/OFF <28>
SLP_S3# <16,29>
+3V

KBD_DATA <29>
KBD_CLK <29>
PS2_DATA <29>
PS2_CLK <29>
EC_SMD_1 <29,30,42>
EC_SMC_1 <29,30,42>

COMPS <13,14>
CRMA <13,14>
LUMA <13,14>

+5V
LAN_LED1# <19>

12

C51

SPR@2200P_0402_25V7K

RJ45_TXX+ <19>
RJ45_TXX- <19>

D_VSYNC
D_HSYNC

BLUE <13,14>
GREEN <13,14>
RED <13,14>

D_VSYNC <14>

D_HSYNC <14>
D_DDCCLK <14>
D_DDCDATA <14>LPTAFD#<22,26>

+5VALW

12

R441
SPR@1K_0402_5%

POWER1_LED

13

D

Q52

2

G

SPR@2N7002 1N_SOT23

S

13

D

2

G

S

ON/OFF

MSEN# <13,14,29>

Q14
SPR@2N7002 1N_SOT23

3

2

1

L4

1 2

SPR@0_0603_5%

C32

12

SPR@0.1U_0402_16V4Z

GND GNDA

POWER1_LED# <28,30>

D29

SM05_SOT23

1 1

SPR@KC FBM-L18-453215-900LMA90T_1812

VIN

SPR@1000P_0402_50V7K

2 2

3 3

C41

DOCK_HPS#

1

2

+5VS

12

R18
100K_0402_5%

L5

12

2

G

1

C38
SPR@1000P_0402_50V7K

2

+5VS

12

R22
100K_0402_5%

13

D

Q10
2N7002 1N_SOT23

S

DOCKVIN

DOCK_HPS <24>

+5V

ACIN<16,29,35,37>

CTS#1<22>
RTS#1<22>
DSR#1<22>

RI#1<22,30>

DCD#1<22>

RXD1<22>

TXD1<22>

DTR#1<22>

LPTSLCTIN#<22,26>

LPTINIT#<22,26>
LPTERR#<22,26>

LPTSLCT<22,26>

LPTPE<22,26>
LPTBUSY<22,26>
LPTACK#<22,26>
LPTSTB#<22,26>

LPD7<22,26>
LPD6<22,26>
LPD5<22,26>
LPD4<22,26>
LPD3<22,26>
LPD2<22,26>
LPD1<22,26>
LPD0<22,26>

USB20P2-

USB20P2-<16>

USB20P2+<16>

USB20P3-<16>

USB20P3+<16>

DLINE_OUT_L<28>
DLINE_OUT_R<28>

R277 SPR@0_0402_5%

XTPB1-<20>

R278 SPR@0_0402_5%

XTPB1+<20>

R279 SPR@0_0402_5%

XTPA1-<20>

R280 SPR@0_0402_5%

XTPA1+<20>

1 2

R437 SPR@0_0402_5%

USB20P2+

1 2

R438 SPR@0_0402_5%

USB20P3-

1 2

R439 SPR@0_0402_5%

USB20P3+

1 2

R440 SPR@0_0402_5%

SPDIFO<23>

DLINE_IN_L<23>

DLINE_IN_R<23>

1 2
1 2
1 2
1 2

LAN_LED0#<19>

CONA<29>

1 2

C30SPR@2200P_0402_25V7K

RJ45_RXX+<19>
RJ45_RXX-<19>

+5V

DOCKVIN

+12V

R28 SPR@1K_0402_5%
R27 SPR@0_0402_5%

12

+3V

12

ACIN
CTS#1

RTS#1
DSR#1
RI#1
DCD#1
RXD1
TXD1
DTR#1

LPTSLCTIN#
LPTINIT#
LPTERR#
LPTAFD#
LPTSLCT
LPTPE
LPTBUSY
LPTACK#
LPTSTB#
LPD7
LPD6
LPD5
LPD4
LPD3
LPD2
LPD1
LPD0

USB20P2-_R
USB20P2+_R
USB20P3-_R
USB20P3+_R

DOCK_HPS#
SPDIFO

DLINE_IN_L
DLINE_IN_R

DLINE_OUT_L
DLINE_OUT_R

XTPB1-_R
XTPB1+_R
XTPA1-_R
XTPA1+_R

LAN_LED0#
CONA

1 2

R29 SPR@75_0402_1%

RJ45_RXX+
RJ45_RXX-

4 4

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

SPR Connector

LA-1701

33 49Monday, May 12, 2003

E

1.0

A

B

C

D

E

+3VALW to +3V Transfer

1

S

2

S

3

S

4

G

1

C123

0.01U_0402_16V7K

2

+3V

1

C130

0.1U_0402_10V6K

2

1

C125

2

10U_1206_6.3V6M

+3VALW

1

C134

2

10U_1206_6.3V6M

U10

8

D

7

D

6

D

5

D

SI4800DY_SO8

+12VALW

12

1 1

SYSON#

R24
100K_0402_5%

5VON

13

D

Q9

2

2N7002 1N_SOT23

G

S

+3VALW to +3VS Transfer

+3VALW

100K_0402_5%

SUSP

2

+12VALW

R395

G

12

13

D

S

1

2

Q50
2N7002 1N_SOT23

C440
10U_1206_6.3V6M

RUNON

U36

8

D

7

D

6

D

5

D

SI4800DY_SO8

1

2

C506

0.01U_0402_16V7K

S
S
S
G

1
2
3
4

+3VS

1

C407

2

0.1U_0402_16V7K

1

C412
10U_1206_6.3V6M

2

+12VALW TO +12V Transfer

1

C480

0.1U_0402_16V7K

2

5VON

+12VALW

2

G

12

12

13

D

S

R382
100K_0402_5%

R380
51K_0402_5%

Q49
2N7002 1N_SOT23

2

+12VALW

G

S

Q47
NDS352P 1P_SOT23

D

1 3

+12V

1

C470
1U_0805_16V7K

2

1

2

C476
1U_0805_16V7K

+5VALW to +5VS Transfer+5VALW to +5V Transfer

+5VALW

U32

8

D

7

D

6

1

2

2 2

10U_1206_6.3V6M

C332

D

5

D

SI4800DY_SO8

5VON

+5V

1

S

2

S

3

S

4

G

1

C303

0.1U_0402_16V7K

2

1

C307
10U_1206_6.3V6M

2

+5VALW

1

C496

2

10U_1206_6.3V6M

U41

8

D

7

D

6

D

5

D

SI4800DY_SO8

RUNON

+2.5V to +2.5VS Transfer

+2.5V

U39

8

D

7

D

6

1

2

10U_1206_6.3V6M

Discharge circuit

3 3

VR_ON#

4 4

D

5

D

C484

SI4800DY_SO8

RUNON

+VCCP +5V

12

13

D

2

G

S

+1.25VS

12

13

D

SUSP

2

G

S

1

S

2

S

3

S

4

G

R311
470_0402_5%

Q41
2N7002 1N_SOT23

R238
470_0402_5%

Q30
2N7002 1N_SOT23

+2.5VS

1

C491

2

0.1U_0402_16V7K

SYSON#

SUSP

2

G

2

G

1

C485
10U_1206_6.3V6M

2

+2.5V

12

13

D

S

+1.8VS

12

13

D

S

R351
470_0402_5%

Q45
2N7002 1N_SOT23

R38
470_0402_5%

Q13
2N7002 1N_SOT23

SYSON#

SUSP

1

C292

10U_1206_10V4Z

+3V

12

R318
470_0402_5%

13

D

Q42
2N7002 1N_SOT23

R195
470_0402_5%

Q28
2N7002 1N_SOT23

SYSON#

2

G

S

+2.5VS

12

13

D

2

G

S

12

R295
470_0402_5%

13

D

2

G

S

+3VS +5VS

12

R31
470_0402_5%

13

D

2

G

S

Q38
2N7002 1N_SOT23

Q12
2N7002 1N_SOT23

2

10U_1206_10V4Z

SYSON#

SUSP

+5VS

1

S

2

S

3

S

4

1

G

C548

0.1U_0402_16V7K

2

1

2

+1.5VALW to +1.5VS Transfer

+1.5VALW +1.5VS

U30

1

8

S

D

2

7

S

D

3

6

S

D

4

5

G

D

C291

+12V

12

13

D

S

12

13

D

S

1

2

R187
470_0805_5%

R194
470_0402_5%

SI4800DY_SO8

C290
10U_1206_10V4Z

Q25
2N7002 1N_SOT23

Q27
2N7002 1N_SOT23

VR_ON#<39>

VR_ON<29,39,41>

SUSP

1

2

2

G

2

G

C547
10U_1206_6.3V6M

1

C308

2

22U_1206_10V4Z

RUNON

R113

100K_0402_5%

VR_ON#

+12VS

12

13

D

2

G

S

+5VALW

1 2

13

D

2

G

S

R286
470_0805_5%

Q37
2N7002 1N_SOT23

0.1U_0402_16V4Z

1

C309

2

+CPU_CORE

2

G

Q18
2N7002 1N_SOT23

SUSPSUSP

2

G

12

R284
@475_0402_1%

13

D

S

12

13

D

S

+1.2VS

12

13

D

S

SUSP

2

G

Q35
@2N7002_SOT23

R313
470_0402_5%

Q40
2N7002 1N_SOT23

R283
470_0402_5%

Q34
2N7002 1N_SOT23

+12VALW TO +12VS Transfer

+12VALW +12VALW

+5VALW

+5VALW

G

1 3

1

2

12

13

D

S

1

2

S

Q46
NDS352P 1P_SOT23

D

+12VS

C469
1U_0805_16V7K

R87
100K_0402_5%

Q17
2N7002 1N_SOT23

12

R183
100K_0402_5%

13

D

Q26
2N7002 1N_SOT23

S

C475
1U_0805_16V7K

1

C479

2

0.1U_0402_16V7K

RUNON

12

R379
100K_0402_5%

G

R386
51K_0402_5%

Q48
2N7002 1N_SOT23

SYSON#

SYSON

SUSP

2

2

G

2

12

13

D

2

G

S

SYSON#<40>

SYSON<29,38>

SUSP<40>

SUSP#<23,29,38>

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

DC/DC Circuits

LA-1701

34

E

1.0

49Monday, May 12, 2003

A

B

C

D

E

ACIN <16,29,33,37>

PACIN <36>

12

12

PACIN

12

E

Detector

B+

PR185
806K_0603_1%

PR187
2M_0603_5%

+5VALWP

12

PC145

1000P_0603_50V7K

35 49Monday, May 12, 2003

1.0

12

PC138

100P_0603_50V8J

12

PC144

0.1U_0603_16V7K

21

21

21

21

VIN

12

1000P_0603_50V7K

+5VP

12

PZD4
RLZ5.1B

+1.2VS

+1.5VALW

+1.25VS

+VCCP

12

PR165

@10_1206_5%

12

PZD1
@RLZ24B

+1.8VSP

VIN detector

14.229 13.717 13.217

12.520 12.110 11.566

PR166

1M_0603_1%

1 2

12

VL

5V

3
2

PR175

10K_0603_5%

7

O

VS

12

8

P

+

O

-

G

PU13A

4

LM393M_SO8

12

1 2

1 2

1 2

1 2

PR184

2M_0603_5%

PU13B

LM393M_SO8

8

5

P

+

6

-

G

4

PC146

PR188

10K_0603_5%

PR259

@66.5K_0603_1%

PC139

0.01U_0603_50V7K

1

VL

5V

PR223

1.5K_1206_5%

PR176

1.5K_1206_5%

PR178

1.5K_1206_5%

PR181

1.5K_1206_5%

12

12

1000P_0603_50V7K

12

1 2

12

PC140

68P_0603_50V8J

VIN

VL

5V

PD27

MAINPWON<4,37,42>

ACON<36>

3
2

RB715F_SOT323

ACIN

Precharge detector

12.432 11.717 11.061

10.188 9.702 9.051

BAT ONLY

VIN

12

PR167

453K_0603_1%

12

PR172

365K_0603_1%

PD26
RLS4148

PR183

10K_0603_5%

1 2

1

PR170

22K_0603_1%

1 2

12

12

PC141

0.1U_0603_16V7K

VS1

PC147

0.1U_0603_16V7K

Precharge detector

9.507 9.030 8.589

7.263 7.015 6.579

PJP15

2MM

21

+1.8VS

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

VIN

12

PR168

3.2V

12

PZD2
RLZ4.3B

12

PR189

1.5M_0603_1%

2N7002_SOT23

13

D

S

PQ38

DTC115EUA

Title

Size Document Number Rev

B

Date: Sheet of

8.2K_0805_5%

PQ37

2

G

Detector

LA-1701

PR169

10K_0603_5%

1 2

PACIN

12

PR173
10K_0603_5%

PR192

47K_0603_5%

13

100K

2

100K

Compal Electronics, Inc.

PL15

12

PC136
1000P_0603_50V7K

100P_0603_50V8J

VS

12

PC143

0.1U_0805_25V7K

CHGRTCP

12

PR186
200_0805_5%

12

PC148
1U_0805_25V4Z

FBM-L18-453215-900LMA90T_1812

1 2

PR177

10K_0603_5%

1 2

PR180

1 2

150K_0603_5%

12

PZD5
RLZ16B

+1.2VSP

+1.5VALWP

+1.25VSP

+1.05VSP

B

2MM

PJP4
3MM

PJP6
3MM

PJP8
3MM

PJP14

PC137

PCN2

123

4

VIN

PD34

RLS4148

PZD3

RLZ4.3B

1 2

PR182

22K_0603_5%

+3VALWP

+5VALWP

+12VALWP

+2.5VP

1

2

PD23

RLS4148

12

12

PR179

12

PC149

4.7U_1206_25VFZ

A

100K_0603_5%

3

4

1 1

2 2

3 3

4 4

SINGATRON_2DC_S736I201

VMB

CHGRTCP

51_ON#<28>

3.3V

RTCVREF

RTCVREF

1 2

511_0603_1%

PR290

ADPIN

ADPGND

12

12

3

PD22

EC10QS04

PR171

200_1206_5%

1 2

PR174

200_1206_5%

1 2

12

PC142

0.22U_1206_25V7K

PU14

S-81233SGUP

3

1

1

PJP3

3MM

PJP5

3MM

PJP7

2MM

PJP9

3MM

12

TP0610T_SOT23

21

21

21

21

12

PC135

PQ36

13

2

2

2

+3VALW

+5VALW

+12VALW

+2.5V

A

B

C

D

E

Charger

1 1

Iadp=0~3.0A

12

P3

ADP_I<29>

12

PR84

10K_0603_1%

1 2

PR89

127K_0603_1%

PR75

0.02_2512_1%

1.202V

12

PR83

31.6K_0603_1%

12

5.0V

PC71

0.1U_0603_16V7K

12

PR92

66.5K_0603_1%

12

4700P_0603_50V7K

2200P_0603_50V7K

12

PC78

0.01U_0402_16V7K

100K_0603_5%

1 2

PC69

1 2

PC72

10K_0603_5%

PC224

PR81

PR90

1

+

2

47U_25V_M

12

PR85

1 2

10K_0603_5%

1 2

PR86
1K_0603_5%

12

B+

FBM-L18-453215-900LMA90T_1812

1

+

PC225

2

47U_25V_M

PU5

1

-INC2

2

OUTC2

3

+INE2

4

-INE2

5

FB2

6

VREF

7

FB1

8

-INE1

9

+INE1

10

OUTC1

11

OUTD

12

-INC1

MB3887_SSOP24

PL7

1 2

+INC2

GND

CS

VCC(o)

OUT

VH

VCC

RT

-INE3

FB3

CTL

+INC1

24

23

22

21

20

0.1U_0603_16V7K

19

18

17

16

15

14

13

CS

PC70

1 2

1 2

PR87

66.5K_0603_1%

PR91

1 2

47K_0603_5%

1 2

PC79

@10P_0603_50V8F

12

PC62

12

PR79
0_0603_5%

PC66

2200P_0603_50V7K

1 2

1 2

PC67

0.1U_0805_25V7K

PC73

0.1U_0805_25V7K

1 2

PC75

1 2

1500P_0603_50V7K

12

12

PC63

4.7U_1210_25V6K

4.7U_1210_25V6K

ACON

12

PC64

PR93
@10K_0603_5%

P2

PD40

VIN

2 2

ACOFF#

PACIN<35>

ACON<35>

B540C

PD13

1SS355_SOD323

1 2

PR82

3K_0402_5%

1 2

ACON

12

PR76

200K_0402_5%

2

G

PQ17

SI4835DY_SO8

1
2
3 6

12

4

12

PR78
150K_0402_5%

13

D

PQ21
2N7002_SOT23

S

IREF<29>

8
7

5

PC68

0.01U_0402_16V7K

IREF=1.164*Icharge
IREF=0.580~3.132V

3 3

12

PC65

2200P_0603_50V7K

0.1U_0805_25V7K

36

578

12

PD14

EC31QS04

B++

241

PQ19
SI4835DY_SO8

12

LXCHRG

PL8

15U_SPC-1204P-150_4A_20%

1 2

PD38
@EC31QS04

ACOFF#

1 2

PC222

0.01U_0603_50V7K

PR88

0.02_2512_1%

1 2

PD39

1 2

B540C

SI4835DY_SO8

1
2
3 6

4

1 2

47K_0603_5%

PR80
10K_0603_5%

1 2
13

100K

2

100K

PQ20
DTC115EUA

CC=0(0.5A) ~ 2.7A
CV=16.8V (8 CELLS)

PQ18

PR77

ACOFF <29>

BATT+

12

PC74

4.7U_1210_25V6K

8
7

5

VIN

12

PC77

PC76

4.7U_1210_25V6K

BATT+

12

4.7U_1210_25V6K

PR277

10K_0603_5%

PR278

57.6K_0603_1%

1 2

4.2V

12
12

(17V+-5%)

2.5VREF
VIN

12

PR95

143K_0603_0.1%

1 2

PC80

@22P_0603_50V8J

+3VALWP

12

PR96
47K_0603_5%

100K

2

13

FSTCHG<29>

100K

2

100K

D

PQ24

DTC115EUA

CS

13

PQ23

DTC115EUA

100K

Title

Size Document Number Rev

B 0.1

Date: Sheet of

Compal Electronics, Inc.

Charger
LA-1701

36 49Monday, May 12, 2003

E

OVP voltage : LI-MH 8 CELL(4S2P)

BATT+

BATT+ : 18.0V--> BATT_OVP : 2.0V
(BATT_OVP voltage = 0.1109*BATT+)

12

PR209

12

0.1U_0603_50V4Z

12

604K_0603_1%

PR213
1M_0603_0.5%

PR217
200K_0603_0.5%

B

VS

12

PC158

8

3

P

4 4

BATT_OVP<29>

PC161

@0.1U_0603_16V7K

12

12

PR216

2.2K_0603_5%

A

+

1

0

2

-

G

4

PU16A
LM358A_SO8

12

AIR_ACIN<29>

PQ50

DTC115EKA_SOT23

PC162

0.01U_0603_50V7K

CS

13

PR285

12

RLZ4.3B

10K_0603_5%

12

PR286
10K_0603_5%

100K

100K

2

PZD6

12

PR94

47.5K_0603_0.1%

PU16B

LM358A_SO8

5

12

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

+

7

0

6

-

PR279

10K_0603_0.1%

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

A

B

C

D

E

+3.3V/+5V/+12V

B++

1 1

2 2

+3.3V Ipeak = 6.66A ~ 10A

3 3

PL5

FBM-L18-453215-900LMA90T_1812

1 2

B+++

12

PC36

0.1U_0805_25V7K

12

12

PC37

2200P_0603_50V7K

10U_SPC-1204P-100_4.5A_20%

0.012_2512_1%

+3VALWP

1

+

PC52

PC53

2

150U_D2_6.3VM

12

PC38

4.7U_1210_25V6K

PR62

1

+

2

150U_D2_6.3VM

EP10QY03

PC39

4.7U_1210_25V6K

12

PL6

12

2 1

PD11

12

PR61

1 2

1M_0402_1%

PQ14

1

D1

2

D1

S1/D2

3

G2

S1/D2

4

S1/D2

S2

SI4814DY_SO8

PC50
47P_0402_50V8J

PR66

1 2

3.57K_0603_1%

PR72

1 2

10K_0402_1%

8

G1

7
6
5

12

PC54
100P_0402_50V8K

PC35

0.1U_0805_25V7K

1 2

DH31

1 2

ACIN<16,29,33,35>

PR56

0_0603_5%

DL3

CSH3

@300K_0402_5%

LX3

1 2

PR65

10K_0402_5%

PR67

+5VP

12

PR71
47K_0402_1%

12

PC60
@0.047U_0603_16V4Z

PD10

DAP202U_SOT323

2

3

VL

12

22

V+

PU4

1

12

ACIN

21

12OUT

VL

VDD

BST5

DH5

LX5

DL5
PGND
CSH5

CSL5

FB5

SEQ

REF
SYNC

RST#

GND

8

1 2

VL

MAINPWON <4,35,42>

VL

1 2

PC41

4.7U_1206_10V7K

2N7002_SOT23

4
5
18
16
17
19
20
14
13
12
15
9
6
11

PR68
@0_0402_5%

VS

12

PR57
0_0603_5%

PR58

10_1206_5%

DH3

12

PC47

25
27
26

24

1
2

3
10
23

7
28

12

PC56
680P_0402_50V7K

12

PC61
1U_0805_25V4Z

12

0.1U_0805_25V7K

BST3
DH3
LX3

MAX1632_SSOP28

DL3

CSH3
CSL3
FB3
SKIP#
SHDN#

TIME/ON5
RUN/ON3

PR74
47K_0603_5%

1 2

PC42

0.1U_0603_16V7K

12

PQ51

13

D

2

G

S

0_0402_5%

BST51BST31

+12VALWP

PR287

2.7K_1206_5%

1 2

PR69

12

PC48

4.7U_1210_25V6K

12

PC55

4.7U_1206_10V7K

BST5

2.5VREF

0.1U_0805_25V7K

1 2

PR59

0_0603_5%

1 2

DH5

PC40

LX5

12

PC43

DL5

12

PC44

2200P_0603_50V7K

0.1U_0805_25V7K

PR60

1 2

0_0603_5%

12

PR70

10.2K_0402_1%

12

PR73
10K_0402_1%

12

PC45

12

PC58
100P_0402_50V8K

1 2

B+++

12

PC46

4.7U_1210_25V6K

4.7U_1210_25V6K

DH51

PC34
470P_0805_100V7K

SNB

PR55
22_1206_5%

PQ15

1

D1

2

D1

3

G2

4

S2

SI4814DY_SO8

S1/D2
S1/D2
S1/D2

G1

FLYBACK

12

8
7
6
5

PR63

2M_0402_5%

PD12
EC31QS04

2 1

PR54

@10K_1206_5%

12

PC33

4.7U_1210_25V6K

1 2

12

PD9
EC11FS2_SOD106

1 4

3 2

PT1
9U_SDT-1204P-9R0-120_4.5A_20%

12

PC51
47P_0402_50V8J

CSH5

12

1

+

2

PC59

150U_D2_6.3VM

12

PR64

0.012_2512_1%

1

+

2

+5VALWP

PC57

150U_D2_6.3VM

+5V Ipeak = 6.66A ~ 10A

4 4

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

3.3V / 5V / 12V

Size Document Number Rev

B 0.1

LA-1701

Date: Sheet of

37 49Monday, May 12, 2003

E

5

4

3

2

1

D D

12

PC170

PC171

2200P_0603_50V7K

PC172

1 2

4.7U_1210_25V6K

0.1U_0805_25V7K

12

PC173

4.7U_1210_25V6K

12

PR230

51_1206_5%

+5VALWP

+2.5VP/+1.8VSP

PL17

HCB4532K-800T90_1812

1 2

B++

1 2

SOFT2

BOOT2

UGATE2

PHASE2

ISEN2

LGATE2

PGND2

VOUT2
VSEN2

EN2

PG2/REF

OCSET2

147K_0603_0.1%

12

17

1 2

23

0_0603_5%

24
25

1.5K_0603_1%

22

1 2

27

26

20
19
21
16

18

PR246

PC174

2.2U_0805_10V6K

PC181

4.7U_0805_6.3V6K

12

PR232

PR236

12

PC183

0.1U_0805_25V7K

PR234

1 2

0_0603_5%

PR162

1K_0603_5%

12

PR248
0_0603_5%

PR288
@0_0603_5%

12

12

SUSP# <23,29,34>

PQ43

8

G1

7

S1/D2

6

S1/D2

5

S1/D2

SI4814DY_SO8

PC176

2200P_0603_50V7K

1

D1

2

D1

3

G2

4

S2

PR237

0_0603_5%

12

SUSP#

12

12

PC192
@1000P_0603_50V7K

PR241

@0_0603_5%

12

1 2

PC177

0.1U_0805_25V7K

PL19

5UH_SPC_06704-5R0A

12

PC190

0.01U_0603_50V7K

12

12

12

12

PC178

4.7U_1210_25V6K

12

PR238

10.5K_0603_1%

12

PR242
10K_0603_1%

PC179

4.7U_1210_25V6K

12

PC187

4.7U_0805_6.3V6K

PC227

100U_6.3V

+1.8VSP

1

+

PC189

2

@150U_D2_6.3VM

1

+

2

DAP202U_SOT323

PD37

PC175

0.1U_0805_25V7K

12

PR255

2.2_0603_5%

1

1 2

2

PC182

3

PC180

0.01U_0603_50V7K

12

12

PR231
0_0603_5%

PR235

1.74K_0603_1%

1 2

6

5
4

7

12

PR233

1 2

0_0603_5%

1 2

2

3

EN1 EN1

8

15

9

10

11

12

PR245

84.5K_0603_1%

SOFT1

BOOT1

UGATE1
PHASE1

ISEN1
LGATE1

PGND1

VOUT1
VSEN1
EN1
PG1

OCSET1

IS6225

14

VIN

PU18

ISL6225

GND

1

28

VCC

DDR

13

C C

PC226

100U_6.3V

PC184

150U_D2_6.3VM

1

+

2

1

+

2

18.2K_0603_1%

10K_0603_1%

12

PC186

4.7U_0805_6.3V6K

PR239

PR243

+2.5VP

B B

PL18

4.7U_SPC-1204P4R7_5.7A_20%

12

12

PC191

0.01U_0603_50V7K

12

12

PR240
0_0603_5%

12

PR244
@0_0603_5%

12

PQ42

1

G1

D1

2

D1

S1/D2

3

G2

S1/D2

4

S1/D2

S2

SI4814DY_SO8

PC193

@1000P_0603_50V7K

0.1U_0805_25V7K

8
7
6
5

12

SYSON<29,34>

A A

5

PR247
0_0603_5%

4

12

+3VALWP

12

PR249
@10K_0603_5%

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

DDR POWER 2.5V / 1.8V

Size Document Number Rev

B

LA-1701

Date: Sheet of

38 49Monday, May 12, 2003

1

1.0

5

4

3

2

1

+1.2VSP/+1.5VALWP/1.05VSP

CPUB++

12

PC2

PC3

0.1U_0805_25V7K

2200P_0603_50V7K

8
7
6
5

12

12

PR19
0_0603_5%

1 2

D D

+1.5VALWP

1

1

12

+

+

PC15

2

+1.5VALWP

PC17

150U_D2_6.3VM

4.7U_0805_6.3V6K

PR11

6.81K_0603_1%

PR15

10K_0603_1%

PC16

2

C C

150U_D2_6.3VM

PL2

4.7U_SPC-1204P4R7_5.7A_20%

PC22

0.01U_0603_50V7K

12

12

12

PR12
0_0603_5%

12

12

PR16
@0_0603_5%

12

+3VALWP

PC1

PQ1

1

G1

D1

2

D1

S1/D2

3

G2

S1/D2

4

S1/D2

S2

SI4814DY_SO8

PC24

@1000P_0603_50V7K

12

PC4

4.7U_1210_25V6K

PD1

DAP202U_SOT323

PC13

0.1U_0805_25V7K

1 2

0_0603_5%

12

1 2

12

14

VIN

PU1

ISL6225

GND

1

+5VALWP

1 2

28

VCC

DDR

13

PR2

2.2_0603_5%

SOFT2

BOOT2

UGATE2

PHASE2

ISEN2

LGATE2

PGND2

VOUT2
VSEN2

EN2

PG2/REF

OCSET2

147K_0603_0.1%

17

23

24
25

22
27

26

20
19
21
16

18

PR18

1 2

0_0603_5%

1 2

1.5K_0603_1%

12

PC5

2.2U_0805_10V6K

PC12

4.7U_0805_6.3V6K

12

PR4

PR8

12

PR1

51_1206_5%

4.7U_1210_25V6K

1

3

1 2

12

PR5

1 2

PC6

0.1U_0805_25V7K

2

PC11

0.01U_0603_50V7K

12

12

SOFT1

6

5
4

PR7

7

1.74K_0603_1%

2

3

9

10

8

15
11

PR17

84.5K_0603_1%

BOOT1

UGATE1
PHASE1

ISEN1
LGATE1

PGND1

VOUT1
VSEN1
EN1
PG1

OCSET1

IS6225

PR3
0_0603_5%

EN2 EN2

12

PR6

1 2

0_0603_5%

PR256

12

1K_0603_5%

PC14

0.1U_0805_25V7K

12

PR20

0_0402_5%

PR289

@0_0402_5%

VR_ON <29,34,41>

12

VR_ON

12

PQ2

8

G1

7

S1/D2

6

S1/D2

5

S1/D2

SI4814DY_SO8

12

PC23
@1000P_0603_50V7K

12

PC7

2200P_0603_50V7K

5UH_SPC_06704-5R0A

1

D1

2

D1

3

G2

4

S2

PR9

0_0603_5%

PR13

@0_0603_5%

0.01U_0603_50V7K

HCB4532K-800T90_1812

1 2

12

PC8

1 2

0.1U_0805_25V7K

PL3

12

PC21

12

12

12

PL1

12

PC9

4.7U_1210_25V6K

12

PR10

3.48K_0603_1%

12

PR14
10K_0603_1%

PC10

4.7U_1210_25V6K

12

PC18

4.7U_0805_6.3V6K

CPUB+

PC228

100U_6.3V

+1.2VSP

1

+

PC19

2

@150U_D2_6.3VM

1

+

2

12

7

0

PU17B

LM358A_SO8

PR224
0_0603_5%

12

PC164

4.7U_1206_25VFZ

5

+

6

-

5

B B

A A

6
2

1

PQ40

SI3442DV

D

G

S

45

3

1

0

1 2

PC167

68P_0603_50V8J

+5VALWP

8

P

+

-

G

4

PU17A
LM358A_SO8

12

PC169

3
2

PR225

5.1K_0603_5%

0.1U_0603_16V7K

12

PR227

5.1K_0603_5%

12

12

1 2

PC168

0.01U_0603_50V7K

PR226
0_0603_5%

PC165
560P_0603_50V7K

12

12

4

PR228

100K_0603_1%

13

100K

137K_0603_1%

PQ41
DTC115EUA

100K

2

PR229

1

+

2

12

PC166

220U_D2_2M_R9

+1.05VSP

2.5VREF

VR_ON# <34>

+3VALWP

12

PR21
@10K_0603_5%

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Compal Electronics, Inc.

Title

1.2V / 1.5V / 1.05V

Size Document Number Rev

B

LA-1701

Date: Sheet of

39 49Monday, May 12, 2003

1

1.0

5

4

3

2

1

0_0402_5%

2N7002_SOT23

13

D

G

S

PR254

0_0603_5%

1 2

10U_1206_10V4Z

PR260

2

G

PQ53

PC204

7

PU20B
LM358A_SO8

+3VALWP

1 2
13

D

S

PR263

1 2

12

0

PC220

0.1U_0603_16V7K

100K_0402_5%

1

5

+

6

-

1 2

0

5.1_0603_5%

PU22

VIN1PVIN

2

GND

3

SD
VREF4VFB

CM3718

REMOTE SENSE

VS

0.1U_0603_50V4Z

8

3

P

+

2

-

G

PU20A

4

LM358A_SO8

SDREF_L

PR264

PC205

12

12

LX

PGND

+2.5VP

+3VALWP

8
7
6
5

FB_VDD+

1K_0603_5%

12

PR257
10K_0603_0.5%

12

PR258
10K_0603_0.5%

1 2

1 2

PC217

1U_0603_10V6K

PL20

5UH_SPC_06704-5R0A

12

PR265

100K_0603_5%

1 2

1 2

PR266

PC216

470P_0603_50V8J

12

12

PC206

0.1U_0402_16V4Z

12

PC203

0.1U_0402_16V4Z

PC218

4.7U_1210_25V6K

1 2

PQ45

2N7002_SOT23

1

+

2

PC219

0.1U_0603_16V7K

13

D

S

+1.25VSP

PC221
220U_D_6.3M_R55

PR291 @0_0402_5%

1 2

2

PR292 0_0402_5%

G

1 2

SUSP <34>
SYSON# <34>

D D

SUSP

+2.5VP

C C

B B

12

PR261

100K_0603_0.5%

100K_0603_0.5%

PR262

SUSP

2N7002_SOT23

1U_0603_10V6K

2

PQ54

1 2

PC215

1 2

(1.25V)

+SDREF

A A

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

3

2

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

1.2V

Custom

LA-1701

40 49Monday, May 12, 2003

1

1.0

A

PR295

33K_0603_5%

PD18

PR122

VGATE

3.3K_0402_5%

+3VS

1000P_0603_50V7K

+3VS

1 2

1SS355_SOD323

1 2

PR121

300K_0603_5%

1 2

300K_0603_5%

12

PR283

+1.8VSP

PC110

PR106

15K_0603_1%

PR112

5.36K_0603_1%

PR120

3.9K_0603_1%

1 2

PR124

6.34K_0603_1%

12

PC95

0.01U_0603_50V7K

MCH_PWRGD

VCCP_PWGD

12

1 2

1 2

1 2

1 2

1

12

PC92

VR_ON<29,34,39>

PR135

0_0603_5%

PR137

0_0603_5%

3205_VCC

XC61CN0902MR

VDDIN

PM_DPRSLPVR<16>

STP_CPU#<12,16>

PU10

1 1

2 2

3 3

PSI#<5>

CPU_VID5<5>
CPU_VID4<5>
CPU_VID3<5>
CPU_VID2<5>
CPU_VID1<5>

0.01U_0603_50V7K

CPU_VID0<5>

CLKEN#<12>

12

12

PR138
3K_0603_5%

1 2

2

PWDOUT
VSS

3

B

VR_ON

+3VS

1 2

PR109

0_0603_5%

PR113

0_0603_5%

PR115

0_0603_5%

PR116

0_0603_5%

PR117

0_0603_5%

PR118

0_0603_5%

PR125

0_0603_5%

PR127

0_0603_5%

PD41

RB751V_SOD323

PR132

0_0603_5%

12

0.047U_0603_25V7M

12

PR144
47K_0603_5%

MCH_PWRGD

12

PC91
100P_0603_50V8J

PR107

12

0_0603_5%

PR108

23.7K_0603_1%

12
12
12
12
12
12

12
12

12

3205_SD#

12

PC98

10
11
12
13
14
15
16
17
18
19
20

1
2
3
4
5
6
7
8
9

PSI
HYSSET
VID5
VID4
VID3
VID2
VID1
VID0
VREF
BOOTSET
DPRSET
DPRSLP
DPSLP
PWRGD
CLKEN
TPWRGD
DPWRGD
SD
SS
CLAMP

PU8

ADP3205

C

TSYNC

DRV3

DRVLSD3

DRV2

DRVLSD2

DRV1

DRVLSD1

CS3
CS2
CS1
CS+

CS-

RAMP

REG
DPSHIFT
DACREF

DACREFFB

COREFB

VCC

GND

4.7U_1206_16V4Z

40
39
38
37
36
35
34
33
32
31
30
29
28
27

PR129 604K _0402_1%

26

1 2

25

1 2

200_0402_1%

24
23

1 2
22
21

12

PC108

PR119 0_0402_5%

12

PR284 @0_0402_5%

12

10P_0402_50V8K

PR131

PR133

2.7_0402_5%

12

PC99

0.1U_0402_16V4Z

PC106

0.1U_0402_16V4Z

+3VS

12

3205_VCC

12

D

+5VS

PR123 56 _0402_1%

PC94

12

12

12

PC96

10P_0402_50V8K

12

PC97

470P_0402_50V7K

12

PR145

2.7_0603_5%

PC109

0.1U_0805_25V7K

4.7U_0805_10V4Z

3205_VCC

12

PR126

PR130
270_0402_1%

12

PR134

3.32K_0402_1%

PR139

5.36K_0402_1%

PR103

0_1206_5%

PC85

3205_SD#

12

12

12

330K_0402_5%

1 2

1

2
3

4

PR110

0_0603_5%

1 2

12

1

2
3

4

PR143
0_0603_5%

E

+5VDRIVE

5

IN

VCC

SD

DRVH

DRVLSD

DLY

DRVL

GND

7

ADP3415

+5VDRIVE

PC100

5

4.7U_0805_10V4Z

IN

VCC

SD

DRVH

DRVLSD

DLY

DRVL

GND

PU9

7

ADP3415

PD15

EP10QY03

2 1

PR104

2.2_0603_5%

10

BST

9
8

SW

6

PU7

PD19
EP10QY03

2 1

PR136

2.2_0603_5%

10

BST

9
8

SW

6

1 2

PR105

0_0603_5%

1 2
1 2

PR293

2.2_0603_5%

12

PD42

1 2

PR140

0_0603_5%

1 2
1 2

PR294

2.2_0603_5%

12

PD43

RB751V_SOD323

12

PC90

1U_0805_25V4Z

RB751V_SOD323

PC105

1U_0805_25V4Z

12

CPUB+

5

4

5

4

F

D8D7D6D

S1S3G

S

2

5

S

4

2

D8D7D6D

S1S3G

S

2

5

S

4

2

CPU-CORE

5

PQ26

IRF7821_S08

4

5

D8D7D6D

PQ28

S1S3G

@IRF7832_SO8

4

5

PQ30

IRF7821_S08

4

5

D8D7D6D

PQ32

S1S3G

IRF7832_SO8

4

PC86

D8D7D6D

PQ27

S1S3G

S

2

@IRF7821_S08

0.6U_HK_AE26A0R6_26A_25%

D8D7D6D

PQ29

S1S3G

S

IRF7832_SO8

2

12

D8D7D6D

PQ31

S1S3G

S

@IRF7821_S08

2

0.6U_HK_AE26A0R6_26A_25%

D8D7D6D

PQ33

S1S3G

S

@IRF7832_SO8

2

G

12

12

PC87

4.7U_1210_25V6K

4.7U_1210_25V6K

PL10

1 2

13.7_0603_1%

PD16
EC31QS04

2 1

12

PC101

4.7U_1210_25V6K

PL11

12

PD20
EC31QS04

PC88

4.7U_1210_25V6K

PR114

12

PC103

PC102

4.7U_1210_25V6K

12

FBM-L18-453215-900LMA90T_1812

12

12

PC89

PC207

0.1U_0805_25V7K

PR111

0.002_2512_5%

12

1 2

1 2

PC93

0.01U_0603_50V7K

CPUB+

12

12

PC208

4.7U_1210_25V6K

0.1U_0805_25V7K

PR141

0.002_2512_5%

12

PR142
10_0603_1%

1 2

1 2

PC107

0.01U_0603_50V7K

H

PL9

1 2

12

2200P_0603_50V7K

+CPU_CORE

12

EC31QS04PD17

PC104

2200P_0603_50V7K

+CPU_CORE

1

+

PC209

2

B+

220U_D2_2M_R9

+3VS

PR222

12

PR146

PU11

XC61CN0902MR

+1.05VSP

4 4

PC111

1000P_0603_50V7K

A

1

PWDOUT

VDDIN

12

VSS

3

47K_0603_5%

VCCP_PWGD

2

B

0_0603_5%

1 2

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

C

D

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

E

F

+VCC_H_CORE

Size Document Number Rev

B

Date: Sheet of

G

LA-1701 1.0

41 49Monday, May 12, 2003

H

A

B

C

D

VMB

PCN3

1

ALI/NIMH#_PWR

2

AB/I

3

TS_A

4
5

1 1

SUYIN_25133A-08G1-01_8P

2 2

3 3

6
7
8

+5VALWP

EC_SMC
EC_SMD

100_0603_5%

PD31

@BAS40-04

PR195

12

100_0603_5%

1

3

PR196

2

@1K_0603_5%

12

2

PR193

12

1

12

12

PR197

1K_0603_5%

PR204
1K_0603_5%

1

EC_SMD_1
EC_SMC_1

PD32

@BAS40-04

3

1 2

1 2

PR202

25.5K_0603_1%

3

2

PR194

@47K_0603_5%

1

PD30
@BAS40-04

3

2

PD28
@BAS40-04

+3VALWP

+3VALWP

PL16

FBM-L18-453215-900LMA90T_1812

1 2

12

PC150
1000P_0603_50V7K

LI/NIMH# <29>

BATT_TEMP <29>

EC_SMD_1 <29,30,33>
EC_SMC_1 <29,30,33>

12

PC151

0.01U_0603_50V7K

PC156

0.22U_0805_16V7K

BATT+

CPU

PTH1
10K_1%

0_0402_5%

L_10T

12

BATTERY

0_0402_5%

L_11T

12

PC160

0.22U_0805_16V7K

PH1 under CPU botten side :

CPU thermal protection at 90 +-3 degree C
Recovery at 50 +-3 degree C

PR201

VL

L_10

12

12

PR205

2.74K_0603_1%

12

PR203

16.9K_0402_1%

1 2

1 2

VL

PR198
100K_0402_1%

PC152
@0.1U_0402_10V6K

REV

PR207

100K_0402_1%

47K_0402_1%

12

PR199

1 2

3

+

2

-

12

PC154
1000P_0603_50V7K

VS

12

8

PU15A

P

O

G

LM393M_SO8

4

PC153

0.1U_0603_50V4Z

1 2

1

VL

PH2 near main Battery CONN :

BAT. thermal protection at 84 +-3 degree C
Recovery at 45 +-3 degree C

VL

12

PC157

PTH2

10K_1%

PR210

L_11

12

1 2

12

PR214

3.32K_0603_1%

@0.1U_0402_10V6K

PR212

16.9K_0402_1%

REV

PR208

47K_0402_1%

1 2

5

+

6

-

8

P

O

G

4

PU15B
LM393M_SO8

VL

1 2

7

OTP_B

PR200
47K_0402_1%

OTP_C

PR211
47K_0402_1%

1SS355_SOD323

PD29

1SS355_SOD323

12

PD33

12

100K

2

PQ39

DTC115EKA_SOT23

100K

MAINPWON

13

<4,35,37>

4 4

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

BATTERY CONN / OTP/1.8V

Size Document Number Rev

B 0.1

LA-1701

Date: Sheet of

D

42 49Monday, May 12, 2003

5

4

3

2

1

REV: 0.1A

1. Update PCI resource table. (Page 3)

2. Change U41 power source form +12VS to +5VS for correcting error. (Page 4)

3. Remove DVI signals. (Page 13)

D D

4. Add Video board ID and Mother board ID for HP requirement. (Page 16)

5. Change LAN controller from RTL8100BL to RTL8139CL+ for HP requirement. (Page 19)

6. Change audio CODEC from ALC202A to AD1981B and modify relational components for HP requirement. (Page 23,24)

7. Change USB power protector from Poly switch to RT9701-CBL for meet HP's specification. (Page 27)

8. Add CP9, CP10 (100P_1206_8P4C) for EMI requirement. (Page 28)

9. Add a power button LED (D34) for HP requirement. (Page28)

9. Add a power button LED (D34) for HP requirement. (Page28)

REV: 0.1B

1. U33,U34,U56 combine to U33 (74HCT08 TSSOP14).(Page 18)

2. Add Q81,C892,C891 for +3VAUX turn on/off.(Page 25)

C C

3. Add R91,R1132,C893 for correcting error. (Page 26)

4. U12 pin9,10 contact to GND. (Page 30)

5. Change U47D,U47E,U47F to U14A,U14B,U14C. (Page 32)

6. Add L57,C894,C895,C896,C897 for HPQ request to add SPR GNDA.

7. Add U57 and relation components for AD1981B's AVDD power source. (Page 23)

8. Change U23 and relation components to reserve. (Page 23)

9. Add R1137, 0_1206_5% resistor for optional AMP. power source of +5VS. (Page 24)

10. Add L58~L61 on AMP.(U53) output trace. (Page 24)

11. Delete TVS41~TVS44 and change C863~C866 to 47PF. (Page 24)

12. Modify JP8's pin define for using switched jacks on the headphone audio. (Page 28)

13. Change audio amplifier from TPA0202 to TPA0312. (Page 24)

B B

14. Connecting the pin97 of JP28 and JP29 to GND for HP's requirement. (Page9,10)

15. Install a 0 ohm (R703) between ITP_DBRESET# and SYSRST# then de-populate U51,R704 and C833. (Page 16)

16. Modify USB routing method for HP's requirement. (Page 16)
i. USB0 and USB 1 (U45.C20/D20, U45.A21/B21) to the two ganged system USB ports.
ii. USB2 and USB3 (U45.C18/D18, U45.A19/B19) to the docking connector.
iii. USB4 (U45.C16/D16) to single USB.
iv. USB5 (U45.A17/B17) to MDC.

17. Delete net MBAY_DISABLE from JP1 pin A49 for HP's requirement. (Page 29,33)

18. Change powerm source of D10,D11 and D12 from CRTVDD to +3VS for HP's requirement. (Page 14)

19. Add an IO buffer (U56) for supporting EVO600's keyboard. (Page 30)

A A

REV: 0.1C

1. Re-location all parts.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

E/E(1) PIR

LA-1701

43 49Monday, May 12, 2003

1

1.0

5

4

3

2

1

REV: 0.1D

1. Change U20 to AT24C16N and change power source to +3VALW. (Page 30)

2. Change U49 EC_SMC_1/EC_SMD_1 to EC_SMC_2/EC_SMD_2. (Page 4)

3. Change Battery EC_SMC_2/EC_SMD_2 to EC_SMC_1/EC_SMD_2. (Page 42)

4. Modify SD controller to M/B. (Page 31)

D D

REV: 0.2A (For DB-1 SMT)

1.For solving FAN can't work properly issue. (Page 4)

a. Change U14's power plan from +5VS to +12VS.
b. Change U14 from LMV321M5X to LM321MF.

2. For solving system boot fail issue. (Page 12)

a. Del Q29.
b. Add PD41 RV751V.

3. For EMI requirement. (Page 14)

Change L1,L2,L3,L18,L19 from FBM-11-160808-121 to FCM1608C-121T.

4. For solving main battery only, system can't boot on issue. (Page 15,16)

C C

a. Change ACIN signal connection from GPI11(U8.AA5) to GPIO27.(U8.W1)
b. Pull high GPI11 to +3VALW.

5. Pull high U19.8 to +5VS for solving SUSP# signal don't well issue. (Page 23)

6. Del L10,C155,C204,C477,C474 for HP requirement. (Page 23)

7. Change R363,R365 to 1K_0402_5% for solving CODEC can't be detected issue. (Page 23)

8. Add voltage divider R413,R414,R416,R419 for HP requirement. (Page 24)

9. Change AMP. gain from 6dB to 10dB for HP requirement. (Page 24)

10. Add R420 100K_0402_5% for solving headphone plug fail issue. (Page 24)

11. Change JP20.27 and JP20.28's power plan from +5VS to +5V for supporting touch pad wake up from S3 function. (Page 28)

12. Change U15.161's power plan from +RTCVCC to RTCVREF from increasing RTC battery life. (Page 29)

13. Add U29 for supporting 8Mbits BIOS. (Page 30)

B B

14. Change D6,D7 to HSMB-C172 for HP requirement. (Page 30)

15. For supporting SD avtive LED function. (Page 31)
a. Connection JP17.13 to SDLED.
b. Change JP17.15's power plan from +3VS to +5VS.

16. Add JP32 for supporting BT module. (Page 31)

REV: 0.2B (For DB-2 gerber)

Add R427 20K ohm resister for solving PC-beep is too loud issue. (Page 23)

REV: 0.2C (For DB-2 SMT)

1. Phase-in EMI solution.

a. Add R35,R344,R58,R142,R301,R408 10_0402_5%.

A A

b. Add C42 22PF_0402_NPO.
c. Add C447 15PF_0402_NPO.
d. Add C73,C153,C319,C560 10PF_0402_NPO.

5

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4

3

2

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

E/E(2) PIR

LA-1701

44 49Monday, May 12, 2003

1

1.0

5

4

3

2

1

REV: 0.2D

1. To change the mute circuitry for SI build.
a. Connect EAPD (pin U22.47) to JP24.2 and reserve a 0_0402_5% (R431) resistor for testing.
b. Install R162 (0_0402_5%) and no install R163.
c. Add R432 (100K_0402_5%) and Q51 (2N7002) to invert EAPD signal for amplifier and mute LED.

REV: 0.2E

D D

1. For EMI requirement.
Add C204 0.1U_0402_16V4Z

2. To exchange TP and PS2 signals for EC requirement.

3. For cost down plan.
To exchange the capacitor of C83,C136 from 150U_D2_6.3VM to 100U_6.3V_M.

REV: 0.2F

1. For cost down plan.
Move audio line-out BLOCK capacitor from TP to MB. To add C565,C566 100U_6.3V_M.

2. For solving audio noise when IR active. (A2C039)
a. Del C206.
b. To change C492 from 150U_D2_6.3VM to 10U_1206_6.3V7K.

3. For EMI requirement.

Add R435~R440 0_0402_5%.

REV: 0.2G

C C

1. For solving power LED signal wrong on PR/APR side.

a. Add R441 1K_0402_5%.
b. Q52 2N7002.

2. For solving power button must be pressed twice issue.

1. Add D27 RB751V.

2. Add R330 4.7K_0402_5%.

3. Change R345 from 10K_0402_5% to 100K_0402_5%.

3. Per HPQ requirement to change audio component.

To change C174 and C201 to 0.022U_0603_25V7K.

REV: 0.2H (For SI gerber)

1. Per HPQ requirement to change audio component.

To change R427 from 20K_0402_5% to 39.2K_0402_1%.

REV: 0.3 (For SI SMT)

B B

1. Per HPQ requirement to change LED color from BLUE to GREEN.

a. Change D5,D6,D7,D26 from HSMB-C172_BLUE_0805 to HSMG-C170_GRN_0805.
b. Change R9,R10,R11,R421 from 140_0402_1% to 330_0402_5%.

2. To improve RTC crystal accuracy.

Change C190,C203 from 12P_0402_50V8J to 15P_0402_50V8J.

REV: 0.3A (For PV Build)

1. Per HPQ requirement to add FET to shut off power to the Bluethumb module.

a. Add Q53 SI2301DS.
b. Add C568 1U_0603_10V6K.
c. Add C570 0.01U_0402_16V7K.
d. Add C571 0.1U_0402_16V7K.
e. Add C569 4.7U_0805_6.3V6K.
f. Add Q54 2N7002.
g. Add R442 100K_0402_5%.

A A

h. Del R424.
i. Change Q16.2 signal source from Wireless_OFF# to Wireless_OFF.

2. For supporting WLAN and BT devices exist in the same system.

a. Connect Mini-PCI JP28-36 to Bluethumb JP32-7 using a series resistor of 1K_0402_5% (R72).
b. Connect Mini-PCI JP28-43 to Bluethumb JP32-6 using a series resistor of 1K_0402_5% (R298).

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

3

Title

Size Document Number Rev

2

Date: Sheet of

Compal Electronics, Inc.

E/E(3) PIR

LA-1701

45 49Monday, May 12, 2003

1

1.0

5

4

3

2

1

REV: 0.3B

1. Exchange signals NUMLED# and CAPSLED# of Q31 and Q33 for solving BC022.

2. Rotate JP20 180 degree for solving PCP assembly issue.

3. Change JP18 & JP19's pin1 signal from SPKR+ and SKPL+ to SPKR+_C and SPKL+_C for solving audio noise issue.

REV: 0.4 (For PV gerber)

D D

1. Connection LPC_DRQ#0 to U42.2 through R147 0_0402_5% for support SD controller DMA function.

2. For EMI requirement.
a. Add L10 0_1206_5% and exchange layout position with C204.
b. Add L36 FBM-L10-160808-301-T_0603 on EAPD signal and closed to audio CODEC.
c. Add L37 FBM-L10-160808-301-T_0603 on +3VS power line of audio CODEC.
d. Change R406 from 10_0402_5% to 33_0402_5%.

3. Per ME team Tony Liu request, change LED type and current limit resistor for increasing luminous intensity.
a. Change D5, D6, D7 and D26 from HSMG-C170 to 17-21SYGC/S530-E1/TR8.
b. Change R9, R421 from 330_0402_5% to 150_0402_1%.

4. Del C567 layout pad for solving DFX issue.

5. Reserve 1U_0603_10V6K (C572) pad and connection to U15.21 for supporting PC97591L/V in the further.

6. Do not install R72 and R298 (1K_0402_5%) for HP requirement.

7. For solving OTS#95452 which are HSYNC and VSYNC out of specification.

a. Add C573 0.1UF_0402_5%.
b. Add U43 SN74AHCT126PWR.

C C

c. Del Q3, Q4, R263, R268, R267, R255, R254.
d. Change C3, C5 from 68P_0402_50V8K to 10P_0402_50V8K.

8. Base on HPQ Robert's command to do some audio's design change.

a. Install R433, R434 0_0603_5%
b. No install C565, C566 100UF_6.3V_M.
c. Correct the left channel input voltage divider, connect R419.1 to LINE_OUTL and R416.1 to analog GND.
d. Change C562 from 0.1U_0402_16V4Z to 0.1U_0603_16V7K.
e. Change R387 from 4.7K_0402_5% to 10K_0402_5%.
f. Change D24 from 1N4148 to R444 4.7K_0402_5%.
g. Del R416 0_0402_5%.
h. Add R419 0_0402_5%.

9. Change some component's value as HPQ Darrell's request.
a. Change C330, C334 from 0.01UF to 0.1UF.
b. Change R354 from 100Kohm to 330Kohm.

B B

REV: 0.4A (For PV SMT)

1. Add C482 0.1UF_0402_16V4Z for solving OTS#96542.

2. For solving OTS#95994.
a. Change R428, R429 from 0_0402_5% to 4.7K_0402_5%.
b. Add R413, R416 4.7K_0402_5%.

REV: 0.4B

1. Add R445 511_0603_1% to limit RTC battery discharge current for meeting OSM 4.3.8 specification.

REV: 0.4C

1. Per HPQ David request to do some audio components change.

a. Change R428, R429 from 4.7K_0402_5% to 0_0402_5%.
b. No install R413, R416, R433, R434.

A A

c. Install C565 and C566 100uF CV-AX.

2. Delete reserved layout pad for solving DFX issue.

Del C83, C136, R433 and R434.

3. No install R59 10K_0402_5% for solving double pull high issue.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

Size Document Number Rev

3

2

Date: Sheet of

Compal Electronics, Inc.

E/E(4) PIR

LA-1701

46 49Monday, May 12, 2003

1

1.0

5

4

3

2

1

4. Change R406 from 33_0402_5% to FBM-11-100505-600T to solve EMI issue.

5. Del R9 and D5 for ME team request.

REV: 0.4D

1. For solving HSYNC and VSYNC waveform undershoot over specification issue.
Change L18,L19 from FCM1608C-121T to FBM-L10-160808-300LM-T.

D D

2. Per ME (Tony Liu) request, change D6,D7,D26 from 17-21SYGC/S530-E1/TR8 to 17-21/GVC-AMPB/3T for solving lightness not enough issue.

3. Reserve R447,R448,R449 layout pad for support CB1410 B0 version chip in the further.

4. Add D29 SM05 for solving ESD test fail issue.

5. For solving "BoBo" audio noise from HLDS and TEAC ODD.
a. Change R214,R216 from 4.7K_0402_5% to 1.3K_0402_5%.
b. Change R210 from 2.7K_0402_5% to 1.1K_0402_5%.

C C

B B

A A

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

E/E(5) PIR

LA-1701

47 49Monday, May 12, 2003

1

1.0

5

4

3

2

1

Version change list (P.I.R. List) Page 1 of 2

Reason for change PG# Modify List B.Ver#Item

1

D D

C C

RTC battery doesn't need to charge

2

RTCVREF

3

adapter change from 75W to 65W. So, the power limiter
must to reduce with adapter

4

the current rating of the new BEAD is 9A, the old one
is 8A.

5

modify circuit for aircraft power

6

modify circuit for DDR, change CM8500 to CM3718 40

change VIN detector voltage and Precharge deterctor

7

voltage

modify circuit for aircraft power, when use aircraft power,

8

battery can discharge

35 PR190 and PR191 change to @200

35

36

37 PL5 change to FBM-L18-453215-900-LMA90T

36

35

36

Power section

PR188 change to 34K, add PR259 (66.5K)change reference voltage, because VL build up fast then

PR83 change to 31.6K, PR84 change to 10K

add PD38,PD39,PD40,PQ46,PQ47,PQ48,PQ49,PQ50,PQ51,
PQ52,PU21,PR267,PR268,PR269,PR270,PR271,PR272,
PR273,PR274,PR275,PR276,PR277,PR278,PR279,PR280,
PR281,PC210,PC211,PC212,PC213,PC214,PZD8

delete PD35,PD36,PQ44,PR250,PR251,PR252,PR253,
PC194,PC195,PC196,PC197,PC198,PC199,
PC200,PC201,PU19

add PR260,PR261,PR262,PR263,PR264,PR265,PR266
PC215,PC216,PC217,PC218,PC219,PC220,PC221,
PU22

PR167 change to 60.4K, PR166 change to 604K,
PR184 change to 604K, PR185 change to 301K,
PR187 change to 402K

delete PU21,PQ47,PQ48,PQ49,PQ51,PD40,PZD8,PQ16,
PR267~PR276,PR280~PR281,PC210~PC214,PC223,PD38,PD39

Date

2002.10.15

2002.10.15

2002.10.15

2002.10.15

2002.10.23

2002.10.23

2002.10.23

2002.12.04

add PD40,PD41,PQ50,PZD6,PR285,PR286

9

for EMI solution 36 PC62 and PC63 change to 10U_1210_25V

10 to solve noise issue

B B

37 add PQ51(2N7002) and PR287 (2.7K_1206_5%)

change PC33 to 2.2U_1210_25V

to prevent leakage current11 40 change PR45 from DTC115EUA to 2N7002

12 modify circuit form dual phase to single phase at CPU-CORE 41 2002.12.04

delete PQ26~PQ29,PU7,PD15,PD16,PC85~PC90,PC93,
PL10,PR104,PR105,PR110,PR111
add PC223

change PR129 to 604K_0402_5%,
PR134 to 3.32K_0402_1%,
PR126 to 120K_0402_5%,
PR141 to 0.001_2512_5%,
PC107 to 0.01U_0603_25V

2002.12.04

2002.12.04

2002.12.04

13 to prevent leakage current 41 change PR128 to PD41 (RB751V) 2002.12.04

14 change CPU thermal protect to 90 degree C 42 change PR205 form 3.32K_0603_1% to 2.74K_0603_1% 2002.12.18

A A

15 to reduce tolerance on CPU CORE voltage feedback 41 change PR126 form 120K_0402_5% to 120K_0402_1% 2002.12.18

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PWR PIR

LA-1701

48 49Monday, May 12, 2003

1

1.0

5

4

3

2

1

Version change list (P.I.R. List) Page 2 of 2

Reason for change PG# Modify List B.Ver#Item

16

D D

the component is too high (2.5mm), so change to 1206
size(1.6mm)

17

to adjust CPU CORE load line 41

18

the component is too high (5.2mm), so change to 1210
size(2.0mm)

to reduce inrush current for 1.25V 40

19

20

to reduce power consumption and inrush current 35

41 chang PC101,PC102,PC103 to 10U_25V_X5R_1206

Power section

(SE142106M00)
change PR123 to 47_0402_1% (SD034470A00)

PC96 to 22P_0402_50V (SE071220J00)
PR126 to 240K_0402_5% (SD028240300)
PR129 TO 1M_0402_1% (SD034100400)
delete PC97

chang PC74 to 4.7U_25V_X5R_1210 (SE065475K00)36
change PR261,PR262 to 100K_0603_0.5% (SD019100309)

PR260 to 100K_0603_5% (SD0131003T1)
add PQ53,PQ54 2N7002 (SB7700200T5)

change PR223,PR176,PR178,PR181 to 1.5K_1206_5%
(SD0111501T6)

Date

2002,12,30

2002,12,30

2002,12,30

2002,12,30

2002,12,30

35 delete PR165 and PZD121 2002,12,30

22 to speed up response time 39 change PC165 to 560P_0603_50V_X7R (SE025561K00) 2002,12,30

C C

23 to solve noise issue 36 add PC224,PC225 47U_25V_EC (SF04704M000) 2003,01,05

24 40 change PC218 to 4.7U_1210_25V (SE065475K00) from

25 to solve noise issue (A2C021) 41

100U_6.3V (SG017101310)

add PQ26,PQ29,PU7,PD15,PD16,PC85~PC90,PC93,PC97
PL10,PR104,PR105,PR110,PR111,PR114,PC230,PC231
delete PC223

change PR129 to 604K_0402_5%,
PR134 to 3.32K_0402_1%,
PR126 to 330K_0402_5%,
PR123 to56_0402_1%,
PC96 to 10P_0402_50V

2003,01,05

2003,01,23

26 to reduce negative voltage at High-side GATE

for ADP3415 (A2C014,A2C098)

B B

27 35to limit RTC battery discharge current for meeting OSM 4.3.8

specification.

41

28 adjust ripple voltage and ripple current when charger battery 36 delete PC79 and PC80

add PD42,PD43
change PR105 and PR140 to 2.2_0603_5%

2003,01,23

change PR290 from 200_0805_5% to 511_0603_1% 2003,05,02

change PR91 from 330K_0603_5% to 47K_0603_5%

2003,05,02

29 to solve noise issue (OTS:97258) 37 change PC33 from 2.2U_1206 to 4.7U_1210 2003,05,02

Modify battery connector layout foorprint for support has

30

lock pin type battery connector.

Modify DC-IN jack library for solving AC jack plug-in

31

loose issue.

A A

5

4

42

35

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

2003,05,02

2003,05,02

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PWR PIR

LA-1661

49 49Monday, May 12, 2003

1

1.0