The information contained in this document is subject to change without notice.
Hewlett-Packard makes no warranty of any kind with regard to this material, including, but
not limited to, the implied warranties of merchantability and fitness for a particular purpose.
Hewlett-Packard shall not be liable for errors contained herein or for incidental or
consequential damages in connection with the furnishing, performance, or use of this material.
Hewlett-Packard assumes no responsibility for the use or reliability of its software on
equipment that is not furnished by Hewlett- Packard.
This document contains proprietary information, which is protected by copyright. All rights
are reserved. No part of this document may be photocopied, reproduced or translated to
another language without the prior written consent of Hewlett-Packard Company. The
information contained in this document is subject to change without notice.
Hewlett-Packard Company
Medical Products Group (Europe)
Schickardstrasse 4
7030 Boeblingen
Federal Republic
of Germany
@ Copyright Hewlett-Packard Company, 1991. All rights reserved.
Printing History
New editions are complete revisions of the manual. Update packages, which are issued
between editions, contain additional and replacement pages to be merged into the manual by
the customer. The dates on the title page change only when a new edition or a new update is
published.
Preface
This manual covers the following models:
w MODELS 78352A/78352C/78353A/78353B/78354A/78354C PATIENT MONITORS
w MODELS 78832A/78833A/78833B/78834A/78834C NEONATAL MONITORS
w MODEL 78356A GAS MONITOR
The contents of this manual (Volume One) apply to HP Models 78352A/C, 78353A, 78353B,
78354A and 78354C series, 78832A, 78833A, 78833B, 78834A/C series, and 78356A with the
following serial numbers prefixed:
MODELS
78352A
78352C
78353A
78353B
78354A
78354C
78356A
PREFIX
2640G
First Issue
2348G
2612G
2613G
First Issue
2717G
MODEL
78832A
78833A
78833B
78834A
78834C
PREFIX
2412G
2413G
2610G
2611G
First Issue
Instruments with higher serial numbers may contain production changes. In such cases refer
to the Manual Change sheets and Publication Change Notices enclosed with this manual.
Hewlett-Packard reserves the right to make changes in its products without notice in order to
improve design or performance characteristics. Hewlett-Packard products are sold on the basis
of the specifications valid on the day of purchase. Hewlett-Packard is not obliged to update
instruments which have already been retailed.
. . .
III
CONTENTS OVERVIEW
This manual contains service information for the Hewlett-Packard 78352/3/4, 78832/3/4 and
78356A monitors. The information is divided into two sections:
n
Chapter 1 - Theory of Operation
n
Chapter 2 - Maintenance Checks
q
Chapter 2a - Performance Assurance Checks
q
Chapter 2b - Specification Checks
q
Chapter 2c - Technical Specifications for all Monitors
Further sections covering disassembly and reassembly of the monitor, switch programming and
adjustments, schematic diagrams and replaceable parts lists, are contained in Volume 2 of the
Notes, cautions, and/or warnings may accompany the
defined below:
Note
I
VI!
Caution
Warning
Notes provide emphasis to information or additional inforniation “off line”
from a procedure.
Cautions highlight procedures that must be followed to avoid damage to the
recorder.
Warnings highlight procedures that must be followed to avoid hazards to human
life or safety.
instructions in this manual. They are
Contents
1. Theory Of Operation
Introduction
Functional description
Shared Memory and Data Transfer
General
Power Fail
Time Slices
Mother Board 78353-66501 and 78354-66501
Video Amplifier
Horizontal Deflection Circuit
Vertical Deflection Circuit
High Voltage Circuits
Power-On Reset
5 V Buffering.
Extender Board
Display UP Boards 78353-66502 (16K byte), 78354-66502 (40K byte)
78354-66602 and 78354-66702 (48K byte)
Character Generation
Slow/fast Sync. Signal Generation
Clock Generation
2 ms Interrupt Signal Generation
Alarm Trigger Generation
Power Fail Circuit
Display Software
Single Channel Interpolation Board 78352-66503
D-A Convertor and Sample and Hold Circuits
Shuffle Mux ............................
Video Pulse Generator
Ramp Generator
Raster Line Control
Erase Bar Latch
Wave Length Latch
Start-up Delay
Three-Channel Interpolation Board 78353-66503
Power Supply Board 78351-66506
Motor Circuit
Temperature Control Circuit
Preamplifier
Analog to Digital Conversion
Digital Circuits
Oxygen Board 78354-66541 and 78356-66541
General Principle of Operation
Preamplifier Circuit
Temp/Pleth/Aux Board 78353-66552 and 78354-66552
Pleth Floating Input Circuit
Test Function Generator
INOP Detection Circuit
Pleth Sensor Circuit
Temperature Floating Input Circuit
Temperature Grounded Circuit
Aux Input Circuit
Digital Circuits
Temp/Pleth/Aux Parameter Software
Temperature Board 78832-66552 and 78834-66552
Input Circuits
Signal Rectification and A/D Conversion
Digital Circuits
Temperature Parameter Software
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Dual Temperature Board 78353-66554 and 78354-66554
Input Circuits
Signal Rectification and A/D Conversion
Digital Circuits
Temperature Parameter Software
Test equipment
General checks
Monitor Service Test Mode
Display Intensity
Checks in ECG Setup Mode
Filter/Diagnostic Mode Check
Parameter Set-up Keys
Pressure Channel Check and Calibration
CO2 and O2 Calibration and Adjustments
Temperature Channel Checks
Plethysmograph Channel Checks
Barometer Board Checks
tcpCO2/tcpO2 Channel Checks and Transducer
HP 15210A Calibration Unit
Installation
Description
Unpacking the Instrument
Initial Inspection
Claims For Damage
Repacking for Shipment or Storage
Instrument Identification
Specification
Operating Environment
Operating Information
Fitting the Gas Cylinders
Storage of Gas Cylinders
Disposal of Used Gas Cylinders
Routine Maintenance
Changing the Gas Cylinders
Care and Cleaning
Theory of Operation
Gas Flow Performance Checks
Test Procedure
Disassembly
Parts List
Transducer Troubleshooting
Pressure wave display
Graticule line labelling and resolution:
Pulse Rate
Alarms
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Test/calibration
Transcutaneous O2 and CO2 Channel (tcpO2 and tcpCO2) : : : : : : : :
General
Transducer Heating
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Alarms .............................
Test Signal:
780 Annotating Interface
General
ECG system outputs
Respiration system output
Temperature system output
Pressure system output
tcpO2 and tcpCO2 system output
Plethysmograph system outputs (78834C)
Oxygen system output (78834C)
Carbon Dioxide system output (78834C)
Trend..
General
ECG Channel
Pressure Channel
Respiration Channel
Dual Temperature Channel
tcpO2 and tcpCO2 Channel
General
Instantaneous CO2 Wave Display
End Tidal CO2 Numerical Display
Respiration Rate Numerical Display
Alarms
Graticule Line Labelling and Resolution:
Technical Specifications - 78356A
General
Patient safety
Power requirements
Environment ....................
Display
Inspired Oxygen
Carbon Dioxide
General
Instantaneous CO2 Wave Display
End Tidal and Inspired Minimum CO2 Numerical Display
Respiration Rate Numerical Display
Alarms
Trend
General ......................
Oxygen Channel
Carbon Dioxide Channel
System Interface
General (Opt. J11 only)
Instantaneous CO2
End Tidal CO2
Respiration Rate
02 ........................
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2c-62
2c-62
2c-62
2c-62
2c-63
2c-63
2c-63
2c-63
2c-64
2c-65
2c-65
2c-65
2c-65
2c-65
2c-65
2c-66
2c-66
2c-66
2c-67
2c-67
2c-67
2c-67
2c-68
2c-68
2c-68
2c-68
2c-68
2c-68
2c-69
2c-69
2c-69
2c-69
A. Ordering Information
Main Sales and Support Offices
United States of America
Other International Areas
Contents-12
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A-1
A-1
A-2
Figures
1-1. Allocation of Function Blocks to Time Slices
1-2. Shared Memory System
1-3. Mother Board Block Diagram
1-4. Address/Character Distribution on the screen
1-5. Display Microprocessor Board Block Diagram
1-6. Single Channel Interpolation Board Block Diagram
1-7. Interpolation Board Block Diagram
1-8. Voltage Sensing and Regulation
2a-1. Rigel Safety Tester
2a-2. Display Intensity
2a-3. Position of Photoresistor in A and B monitors
2a-4. Position of Photoresistor Monitor in “C” series monitors
2a-5. Initial Set-up Displays for Pressure, Pleth and Respiration
2a-6. Equipment for Pressure Calibration
2a-7. Mercury Calibration Set-up Display
2a-8. Pressure Display after successful Calibration
2a-9. Resistive Simulator for 0 and 200mmgh
2a-10. Block diagram - Internal Components
2a-11. Gas Flow Performance Check - Test 1
2a-12. Gas Flow Performance Check - Test 2/3
2a-13. Cover Securing Screws (veiwed from underneath)
2a-14. Control Knob
2a-15. Regulator Control Block Securing Screws
2a-16. Regulator and Valve Control Blocks
2a-17. Tubing and Flow Regulator
2a-18. Replaceable Parts for 15210A
2b-1. ECG Amplifier Gain Frequency Response Test Set-up
2b-2. Trigger Sensitivity Check Set-up
2b-3. ECG Amplifier Noise Test Set-up
2b-4. ECG Noise with 50Hz Component
2b-5. 1 mV Calibration Test Set-up
2b-6. Common Mode Rejection Set-up
2b-7. Notch Filter Test Response Characteristic
2b-8. Equipment for Zero and Range Accuracy Check
2b-9. Plethysmograph Channel Test Circuit
2b-10. Test Circuit for INOP check
2b-11. Test Equipment for Respirotach Range Check
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2a-22
2a-22
2a-23
2a-23
2a-24
2a-25
2b-4
2b-5
2b-6
2b-6
2b-7
2b-8
2b-9
2b-10
2b-12
2b-13
2b-13
Contents-14
Tables
1-1. Test Signals and Results
1-2. System Output Configurations
2b-1. Test Equipment Requirements for Specification Checks
2b-2. mmHg Test
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1-69
1-93
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2b-11
Contents-15
1
Theory Of Operation
Introduction
This section contains an overall functional description of the following monitors:
n
78352A,78352C,78353A,78353B,78354A,78354C series of adult monitors
n
78832A,78833A,78833B,78834A,78354C series of neonatal monitors
n
78356A gas monitor
Also, more detailed descriptions of the individual sub-assemblies are contained in this section.
Functional description
The measured physiological signals are routed directly to the parameter board, where
they are amplified and then A/D converted. The digital information is processed by the
parameter board microprocessor. The digital section of the Parameter Board contains the
microprocessor, the ROM storing the parameter program and a general purpose memory
(RAM).
The results of the parameter processing are transferred to the shared memory. Here they are
accessed by the display microprocessor for further processing. The shared memory, which is
located on the Display UP Board, is used to store all parameter and waveform information.
This information is used by the display microprocessor to update the wave RAM and the
numerics RAM.
The wave information is routed from the display microprocessor through a D/A converter
to the Interpolation Board. At the same time, alphanumeric information from the numerics
RAM (character generator) is parallel-serial converted. The video driver on the Mother Board
combines these two signals to drive the CRT. The CRT controller on the Display UP Board
triggers the driver circuits on the Mother Board.
Data entered via the keyboard (e.g. alarm limits, lead configuration) is passed via the display
microprocessor and stored in the shared memory, where it is accessed by the parameter
board for appropriate action. When the parameter board reports back that the action has
been carried out, the data is passed to the Display Board microprocessor, which initiates the
appropriate display.
Theory Of Operation l-l
Shared Memory and Data Transfer
General
Data transfer in the 783Xx series, the 788Xx series and the 78356A is carried out via a
common memory area, to which all function blocks have access. This common memory is the
Shared Memory chip U40 on A2 Display UP board. The local bus systems are separated from
the main shared memory bus by tri-state buffers.
Power Fail
In the event of power fail the configuration of the instrument at the time of power fail is held
in the shared memory for 15 seconds.
Time Slices
In order to prevent collisions in the main bus, each function block is assigned a defined 2 ms
time slice within the 20 ms CRT frame period. In this time slice it has sole right of access to
the shared memory.
/_ 20,ms
LINE COUNTER START
Figure l-l. Allocation of Function Blocks to Time Slices
1-2 Theory Of Operation
Blatt von alte Seite l-3 hier horizontal einfiigen
Figure 1-2. Shared Memory System
Theory Of Operation 1-3
. . . . . . . .
. . .
1-4 Theory Of Operation
Mother Board 78353-66501 and 78354-66501
The Mother Board contains the video circuits for the display and the interconnections between
the boards which are slotted into the respective connectors on the board.
The main functions of the Mother Board are listed below:
1. Interconnection of boards slotted into the mother board
The monitor display is a raster scanned CRT. It utilizes magnetic deflection and is refreshed
at a rate of 50 Hz. The CRT displays 720 vertical lines and operates at a vertical sweep
frequency of 40 kHz. The Display UP Board supplies the horizontal sync signal (SLOW
SYNC), the vertical sync signal (FAST SYNC)
Board.
Video Amplifier
Four waveform video inputs (4/4, 3/4, 2/4, l/4) and two numerics inputs (VIDEO NUM,
VIDEO NUM INVERSE)
and the numerics signals are applied to the CRT alternately. The positive 70 V supply for the
video amplifier is taken from the high voltage circuits. It is fed directly to the cathode voltage
regulator circuit, which also contains the black level adjust capability.
are applied to the video amplifier circuits (U2, U3). The waveform
and the video drive signals to the Mother
The basic trace intensity is dependent on the signal from the front-panel photo resistor and
the setting of the brightness potentiometer (R24 on the Audio Board).
Horizontal Deflection Circuit
The slow horizontal sweep driver circuit generates a ramp (amplitude) which drives the
horizontal deflection yoke. This circuit is contained in integrated circuit U5.
The oscillator in U5 is synchronized by a positive-going pulse at pin 2 (SLOW SYNC
signal). Synchronization is inhibited during flyback time. The oscillator frequency is set with
potentiometer R21. The linearity can be adjusted with potentiometer R22. A + 17 V supply
is applied to Pin 8. Pin 9 provides the output to the deflection coil.
Vertical Deflection Circuit
The fast vertical sweep driver circuit utilizes the FAST SYNC signal from the Display
UP Board (A2) to develop a ramp (amplitude) which drives the vertical deflection yoke
and in turn deflects the cathode ray from the bottom of the screen to the top (18 us) and
then quickly back to the bottom (7 us). L2 is used to adjust the picture height and L3 the
linearity.
Theory Of Operation l-5
High Voltage Circuits
The flyback transformer Tl is used to generate the high voltages required by the CRT and the
video amplifier.
The five supplies are:
1. A positive voltage of 10 kV for electron acceleration. This is the anode voltage.
2. A positive 100, V supply for grid G2 of the CRT.
3. A positive 300 V supply for grid G4 of the CRT (focus).
4. A supply of virtual 0 V for grid Gl of the CRT.
5. A positive 70 V supply for the video amplifier.
Control of the focus and black level is obtained by dividing the supply down with resistor
chains. Both of these chains have potentiometers in them so that adjustments can be made.
(R38 for focus and R55 for black level).
Power-On Reset
A power-on reset signal is generated from the + 5 V supply via UlOA, B and associated
components. It is used to reset all CPUs in the instrument.
5 V Buffering
The power-on reset signal and +5 V are applied to transistors Qll and &lo, respectively, to
generate the buffered + 5 V for use on the Display UP Board (A2) This is used in the event of
power fail to save stored data for approximately 15 s.
Extender Board
The extender board (78354-66504)
instrument is connected to the mother board with ribbon cables, and supports additional
parameters.
in the full modules 78354A/C and 78834A/C, the
1-6 Theory Of Operation
Blatt von alte Seite l-5 hier einfiigen
Figure 1-3. Mother Board Block Diagram
Theory Of Operation 1-7
Display UP Boards 78353066502 (16K byte), 78354-66502 (40K byte)
78354-66602 and 78354966702 (48K byte)
The Display UP Board is the heart of the instrument. It contains the following functions:
1. Shared memory
2. Character generation (numerics)
3. Slow/fast sync. signal generation
4. Clock generation
5. 20 ms and 2 ms interrupt signal generation
6. Alarm trigger generation
7. Power fail circuit
8. Keyboard handling
The shared memory and data transfer are already described in “Shared Memory and Data
Transfer”.
Character Generation
The screen has a capacity of 30 small characters or 15 large characters in horizontal direction
and 18 small characters or 9 large characters in vertical direction (4 small characters can be
joined together to make 1 large character). The screen is thus divided up into a maximim of
540 small characters. Each character position is definedby a specific address. The hexadecimal
addresses begin at the bottom left of the screen with address OOOH, progress up to the top left
(address 012H) and finish at the top right of the screen with address 21BH.
Address 012H
30
15 large
Address 21BH
small
Address OOOH
Figure 1-4. Address/Character Distribution on the screen
With each address from the CRT controller U20, the numerics RAM U16 passes information
on the character to be displayed to latch U18 (6-bit ASCII data information code for
character definition, plus one bit to define whether large or small character and one bit to
define whether inverse or not).
The lo-bit data is passed to the character generator U12: the 6-bit character information, the
3 bits from the column counter and the inverse bit. The data from the character generator is
then latched into the parallel-serial shift register Ull for output to the video circuits on the
Mother Board.
1-8 Theory Of Operation
The sweep is delayed by two clock signals so that it does not start until the character
information has reached the parallel-serial shift register Ull; i.e. with one clock pulse, address
1 data is latched into the parallel-serial register, address 2 data is latched into U18 and
address 3 data presented to the numerics RAM from the CRT controller.
The CRT controller U20 is programmed to provide 24 fast sweeps per row of addresses. The
character size information is passed to column counter U14 to determine the number of fast
sweeps per column. With an 8x8 dot matrix per small character, this gives 3 fast sweeps for
every column for a small character, and 6 fast sweeps for every column for a large character.
The character size information is also passed to the load and clock multiplexer. The shift rate
for small characters is twice as high as the shift rate for the large characters. In the wave area
the characters are smaller than in the numeric area, 4x6 dot matrix instead of 5x7 dot matrix.
All characters in the wave area and the inverse characters in the numeric area are displayed
with half intensity.
Information from the CPU can only be written into the numerics RAM during the 2 ms
horizontal retrace time. For large characters the ASCII information is written into the
numerics RAM four times altogether.
Add X
I I
Small character
addressed once
Slow/fast Sync. Signal Generation
The CRT controller U20 also provides the slow sync. and the fast sync. signals for the video
circuits on the Mother Board and the display enable (DE) signal for the interpolation circuits
on A3.
Clock Generation
Clock chip Ul provides the clock signal for the clock divider U6. The clock signals generated
here are used in the entire instrument.
2 ms Interrupt Signal Generation
The 2 ms interrupt circuit U2, U3, U8 is used to generate the shared memory access timing
signals.
Alarm Trigger Generation
Add X Add X Large character
addressed
Add X Add x four times
4-l
The CPU generates the QRS, alarm and INOP trigger signals and latches these from the data
bus into U32 (alarm latch). U32 passes the trigger signals to the Audio Board for further
processing.
Theory Of Operation 1-9
Power Fail Circuit
In the event of power fail, the shared memory, U40, is buffered for at least 15 s. If power
returns after these 15 s, the power fail signal is delayed (30 ms after the reset signal). This
creates a power-on reset, i.e. instrument set-up is reconfigured. If power returns before the
15 s are up, the instrument set-up is maintained.
Display Software
The Display software contains the following modules:
n
Initialisation of CRT controller
n
Self tests (ROM/RAMS/
n
Service tests (CRT adjust, wave interpolation check)
n
Keyboard handling
n
Soft key labeling
n
Display editing
n
Processing and issuing of alarms
H Wave handling (wave addressing, wave RAM loading, erase
n
bar control)
n
Communication with the parameter software via the common shared memory
The display software is contained in one 32K x 8 EPROM (U26), and in one 8K x 8 EPROM
(U50) on board 78354-66502, in one 16K EPROM (U50) on boards 78354-66602 and
78354-66702.
sounds test) and error handling
Note
I
lb
78353-66502 Board U26 is 16K x 8,
U47,U52,U54 and U55)
)
<ON RESET
) not included
l-10 Theory Of Operation
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