HP 510 Schematics

VULCAIN

UMA

SI Build

DATE CHANGE NO.

REV

FINAL

DRAWER
DESIGN
CHECK
RESPONSIBLE

SIZE =
FILE NAME :

XXXXXXXXXXXX

P/N

EE

3

XXXX-XXXXXX-XX

2008.12.26

DATE

POWER

VER :

DATE

TITLE

SIZE

D

INVENTEC

VV UMA SATA

CODE

DOC. NUMBER

1310A22163-0-MTR

CS

SHEET

OF

150

REV

A01

TABLE OF CONTENTS

PAGE
5- DC& BATTERY CHARGER

6- SELECT & BATTERY CONN
7- SYSTEM POWER(3V/5V)
8- SYSTEM POWER(+V1.8/+V1.25S)
9- SYSTEM POWER(+VGFX/+VCCP)
10- SYSTEM POWER(+V1.5S)
11- CPU POWER(VCC_CORE)

12- DDR TERMINATION VOLTAGE
13- POWER(SLEEP)
14- POWER(SEQUENCE)

PAGE
15- CLOCK_GENERATOR

16- PENRYN-1
17- PENRYN-2
18- PENRYN-3

19- THERMAL&FAN CONTROLLER
20- Crestline-1
21- Crestline-2

22- Crestline-3
23- Crestline-4
24- Crestline-5
25- Crestline-6
26- DDR2-DIMM0
27- DDR2-DIMM1
28- DDR2-DAMPING
29- VGA CONN
30- LCM CONN

31- ICH8-1
32- ICH8-2
33- ICH8-3
34- ICH8-4
35- ICH8-5

PAGE
36- SYSTEM BIOS

37- HDD&ODD CONN
38- USB CONN
39- KBC

40- KB&TP CONN
41- AUDIO CODEC
42- MDC CONN & AUDIO JACK

43- NIC 10/100- CONTROLLER
44- NIC 10/100- RJ45 CONN

45- MINICARD & BT CONN
46- NEW CARD & SD/MMC

47- LED & BUTTON&LID SWITCH
48- SCREW HOLE
49- SWITCH Board

50- ODD Extend Board

CHANGE by

Puma_Chen

26-Dec-2008

INVENTEC

TITLE

Vulcain UMA

CODE

CSD

SHEET

DOC. NUMBER

AX1

SIZE

REV

000

OF

502

Clock Generator

ICS9LPRS355

P.15

LCM
VGA

P.30

P.29

SYSTEM

BIOS

LVDS

CRT

P.36

SPI

Penryn

(478 uFCPGA)

FSB

Crestline

965GM

(1299 PCBGA)

DMI

P.20

P.16

SATA0

SATA1

DDR2

DDR2

HDD

FIXED ODD

DDR II _SODIMM0

P.26

DDR II _SODIMM1

P.27

P.37

P.37

MAIN BATT

System Charger &

DC/DC System power

SD/MMC

CNTR

P.46

MDC V1.5

CONNECTOR

RJ11

USB0

CNTR

USB1

CNTR

USB2

CNTR

CARD READER

ALCOR AU6433

(USB3)

P.46

P.42

P.42

P.38

P.38

P.38

USB2.0

AUDIO CODEC

AD_1984A

Mic IN

Headphone

P.42

Web CAM

CNTR

(USB4)

BlueTooth

CNTR

(USB6)

P.42

ICH8-M

676 BGA

P.30

P.45

HDA

P.41

Speaker

P.41

LPC

PCI_EXPRESS

P.31

SMSC KBC1070

Keyboard

P.40

PCIE2

MINI CARD

CONN

(WLAN)

KBC

TouchPad

P.39

P.40

P.45

CHANGE by

PCIE5

New Card

CONN

(USB7)

Puma_Chen

P.46

PCIE6

NIC 10/100

MARVEL

88E8042

RJ45

26-Dec-2008

P.43

P.44

INVENTEC

TITLE

Vulcain UMA

SIZE

D

CODE

CS

SHEET

AX1

DOC. NUMBER

350

REV

000

OF

Adapter

+VADP2

OCP

OCP_OC#

+VBATR

KBC_PW_ON
SLP_S3#_3R

ADP_PRES

5/3.3V

(TPS51120)

+V5A
+V3A

+V5AL

+V3AL

+V5S

+V3S

ADP_PRES

BATSELB

AC_AND_CHG

CHGCTRL_3

Charger

(BQ24703)

Selector

(Discrete)

+VBDC

+VBATA

CHGCTRL_3

ADP_PRES

AC_AND_CHG

BATCON

Main Battery

PWR_GOOD_3

PM_DPRSLPVR

PSI#

H_DPRSTP#

SLP_S4#_3R

SLP_S3#_3R

V1.25S_PG

IO POWER

(TPS51124)

GPU POWER

(TPS51117)

IMVP VI

(ADP3208)

SLP_S3#_3R

+V1.8

V1.8_PG

+V1.25S

V1.25S_PG

+VCCP

+VGFX_CORE

VCCP_PG

+VCC_CORE

+VCCP

LR

(G2997)

LR

(APL5913)

VR_PWRGD_CK505

+V0.9S

M_VREF

+V1.5S

V1.5S_PG

CHANGE by

Puma_Chen 26-Dec-2008

INVENTEC

TITLE

Vulcain UMA

CODE

CS

SHEET

DOC. NUMBER

AX1

SIZE

D

REV

000

OF

504

DC JACK

JACK500

SINGA_2DC_G726_I03_4P

4

3.3A_150mil

1
2
3
G1
G2

0.1uF_25v

1

R16

15K_5%

2

R501

8.25K_1%

R502

14.3K_1%

2VREF

1

2

12

1

2

7-,14-

+VBDC

+VADPTR

1

C5

2

R503

100K_0.5%

5-,6-

NFM60R30T222

2

3

C6

1
2

10pF_50V

3
2

C501

1
2

0.022uF_16v

+VADP

R15

12

100K_1%

L1

3.3A_150mil

1

4

0.1uF_25v

R505

12

270K_5%

+V5AL

5-,7-

C500

0.1uF_16v

8

U8-A

+

1

OUT

-

ON_LM393DR2G_SOP_8P

4

R500

1M_5%

2

1

+V5AL

5-,7-

8

U8-B

5

+

7

OUT

6

-

ON_LM393DR2G_SOP_8P

4

CHGCTRL_3

5-,6-,47-

R7

12

100K_1%

R45

12

24K_1%

+VADP

5-,6-,47-

1

C4

C3

2

D501

PDS540_5A_40V

8
7
6
5

FAIR_FDMC4435BZ_8P

1

2

6-

AC_AND_CHG

12

1

R13

23.7K_0.1%

2

MICREL_LMC7101BIM5_SOT23_5P

1
2

10pF_50V

1
2

D

Q9028

2

G1

5

G2

2N7002DW

6-,39-

R14

1M_5%

G

+V5AL

34

IN+

IN-

Q21

S

1

S1
D1

D2
S2

5-,7-

2

V+

U500-A

LM324A

3

1
2
3
4

ADP_PRES

+V3AL

6
3

4

191K_1%

C503

0.1uF_16v

1

OUT

V-

5

0.1uF_16v

U6

4

3

+

1

OUT

2

-

11

+VADP1

R9

12

20K_5%

6-,7-,39-,43-

R504

10K_5%

6-,7-,14-,31-,39-,40-,47-

1

R19

4.7K_5%

ALARM

2

R535

1

2

100K_5%

2

1

R34

C15

1
2

12

1

2

Kevin sense

5-

1

2

24703VREF

R18

12

100_5%

R32

1N4148

C513

1
2

0.1uF_25v

R521

0_5%

5-

1

2

12

140K_1%

R508

150K_5%

D2

1uF_6.3v

1

R30

10K_1%

2

R27

12

100K_1%

3

ANODE

U7

ANPEC_APL431LBAC_SOT23_3P

1

R522

0_5%

2

+VBATR

5-,7-,8-,9-,11-,13-,30-,39-,47-

R509

0.015_1%

12

1

R31

2

100_1%

2

1

1
2

C504

2

CATHODE

1

REF

+VADP2+VADP1

6-

0.018_1%_1W

12

C16

12

1uF_6.3v

R35

12

1.62K_1%

Kevin sense

R536

12

1K_1%

R507

100K_5%

12

1

R539

60.4K_1%

2

C7

1
2

1

4.7uF_6.3v

2

R538

60.4K_1%

221_1%

8.87K_1%

R513

1
2

12

R28

1

R26

2

26

28
19

27
13

14
23

C510

150pF_50v

2

R33

100_1%

1

C13

1
2

4.7uF_25v

U1

ACDRV#

ACN

9

ACP

PWM#

ACDET

5

ENABLE
ACSEL
ALARM

2

SRSET

3

ACSET
ACPRES
IBAT

4

VREF

7

COMP
NC
NC

TI_BQ24703_QFN_28P

1

2

1
2

BATDRV#

THERMAL

R537

150_1%

C23

4.7uF_6.3v

BATP

VHSP
BATSET
BATDEP

5
6

VCC

SRP
SRN

VS

GND

NC
NC

C511

2200pF_50V

12

4

U500-B

+

OUT

-

LM324A

11

R512

12

237K_1%

+VBATR

258
22
21
16
15
12
24
18
20
6
1
17
11
10
29

7

1

R541

10K_5%

2

Q18

2

E

1

B

C

MMBT3906

3

1

R511

47K_5%

2

5-,7-,8-,9-,11-,13-,30-,39-,47-

C502

2

1uF_25v

1

R506

1K_5%

1

1
2

2

D500

RLZ18C

CHENMKO_BAT54_3P

D502

1
2

10

+

9

-

1

R510

10K_5%

2

1
2

13

4.7uF_25v

C2

180pF_50v

4

U500-C

OUT

11

2

5

2N7002DW

C19

4.7uF_25v

1

R8

174K_1%

2

1

R10

20K_1%

2

1

R11

7.87K_1%

2

8

LM324A

Q7013

G1

G2

C7004

1
2

Q17
1

B

1

S1

6

D1

3

D2

4

S2

4.7uF_25v

Q12

3

D

1

G

S

2

SSM3K7002F

1

R25

4.7K_5%

2

2

E

C

MMBT3906

3

FAIR_FDMC4435BZ_8P

1
2
3

C7003

4

1

1

2

R39

0_5%

2

1

C18

0402_OPEN

2

CHANGE by

Q20

S

1

R516

133K_1%

2

1

R517

80.6K_1%

2

5-

R12

12

412K_1%

D

G

1

R17

13.7K_1%

2
1

R37

300K_0.1%

2

1

R36

24K_0.1%

2

1

R38

8.87K_1%

2

Puma_Chen

1
2

H_STPCLK

32-

8
7
6
5

D504

1

2

SBR3U40P1

12

100K_5%

4
U500-D

12

+

14

OUT

13

-

LM324A

11

C512

0.022uF_16v

1908GND

OCP_OC#

5-,11-,13-,14-,19-,29-,30-,32-,34-,37-,40-,41-

1

1

R4

215K_1%

2

1

R5

80.6K_1%

2

L2

12

PLFC1045R_10uH

Q10

3

D

G

1

S

2

SSM3K7002F

26-Dec-2008

5-,11-,13-,14-,19-,29-,30-,32-,34-,37-,40-,41-

R518

1

D506

2

3

R520

1

383K_1%

R519

12

36.5K_1%

2

2

D503

BAT54C_30V_0.2A

C505

1
2

1uF_16v

Place near L19

2

E

Q14

B

MMBT3906

C

3

Q7014

1

S1

2

G1

1

R6

330K_5%

2

12

1K_1%

0.033uF_16v

Kevin sense

D1
D2

5

G2

S2

1

2N7002DW

R2

2

1M_5%

R42

0.015_1%

12

R44

1K_1%

C17

2

1

6
3

4

12

R43

C21

1
2

4.7uF_25v

4.7uF_25v

C22

1
2

4.7uF_25v

Note:

high power trace

R9645

2

1

1K_5%

6CELLSEL#=0,Vcharger=12.6V
6CELLSEL#=1,Vcharger=16.8V

6-

6CELLSEL#

INVENTEC

TITLE

Vulcain UMA

DC &BATTERY CHARGER

SIZE

D

DOC. NUMBERCODE

AX1 000

CS

+V5S

1

3

BAT54S_30V_0.2A

C524

1
2

1uF_25v

1

R553

10_5%

2

7-

MAX_LX5

+V5S

1

R3

220K_5%

2

5-

H_STPCLK

+VBDC

5-,6-

C8

C9748

1

1

2

2

4.7uF_25v

OFSHEET

505

REV

+VADP

5-,47-

R1

12

3K_5%

D1

2

RLZ18C

+VADP2

1

5-

Q2

1

S

2
3

G

AM4825P_AP

+V3AL

5-,6-,7-,14-,31-,39-,40-,47-

+VBDC

5-

2

8

D

7
6
54

PAD3005
3
4

POWERPAD_4A

+VBATA

1

R23

10K_5%

1

1

R549

R550

10K_5%

1

SDA_MAIN
SCL_MAIN

39­39-

10K_5%

2

2

R9624

R9625

10_5%

10_5%

12

12

2

SYN_200046MR006G100ZU_6P

R551

12

100_5%

5-

6CELLSEL#

MAIN BATT

CN500

1

1

2

2

3

3

4

4

5

7

5

7

6

8

6

8

CHGCTRL_3

CHENKO_LL4148_2P

C514
2

5-,39-

1000pF_50v

1

1

2

0.047uF_10v

R543

12

1K_5%

D4

C515

1

R544

470K_5%

2

1
2

G

1

1

R546

470K_5%

2

2

3

D

S

2

Q3

SSM3K7002F

+V3AL

5-,6-,7-,14-,31-,39-,40-,47-

5

U5

4

74HC1G14GV

3

AC_AND_CHG

ADP_PRES

5-

5-,7-,39-,43-

1

R545

10K_5%

2

Q16

SSM3K7002F

2

S

G

1

3

D

+V3AL

5-,6-,7-,14-,31-,39-,40-,47-

1

R24

220K_5%

2

R9668

12

0_5%

C523

1

1

D2007

PESD5V0U1BB

39-

BATCON

THM_MAIN#

PESD5V0U1BB

+V3AL

39-

2

2

D505

D2011

PESD5V0U1BB

5-,6-,7-,14-,31-,39-,40-,47-

1

R9595

100K_5%

2

1

1

2

47pF_50v

2

1
2

C516

0.1uF_25v

INVENTEC

TITLE

Vulcain UMA

SELECT & BATTERY CONN

SIZE

CODE

CHANGE by

Puma_Chen

26-Dec-2008

DOC. NUMBER REV

AX1

D

CS

SHEET

000

OF

506

+V3A

11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47-

PAD3006

POWERPAD_2_0610

ADP_PRES

KBC_PW_ON

4.7uF_25v12

1

2

5-,6-,39-,43-

39-

12

6.49K_1%

+VBATP

7-

C9751

PCMC063T_4R7MN

C9750

220uF_6.3V

R9802

Q9029

S1

2

G1

D1
D2

5

G2

S2

2N7002DW

C9752

1

4.7uF_25v

2

L530

1

6
3

4

R9803

12

10K_1%

Q9030

SI7326DN

12

+V5AL

8

765

D

1S23

765

8

D

SI7726DN

5-,7-

1

R9804

330K_5%

2

51125GND

G

4

Q9031

G

41S23

C9753

0.1uF_16v

12

Q7015

S1

2

G1

D1
D2

5

G2

S2

2N7002DW

R9805

2

1

4.7_5%

+V3AL

5-,6-,14-,31-,39-,40-,47-

1

C9754

2

4.7uF_6.3V

1

6
3

4

0_5%_OPEN

12

R9806

R9809

71.5K_1%

R9807

12

0_5%

R9808

12

0_5%

25

TML

7

VO2

8

VREG3

9

VBST2
DRVH2
LL2

12

6

VFB2

ENTRIP2

SKIPSEL

EN0

13

1

2

5

TONSEL

GND

14

1
2

3

4

VFB1

VREF

VIN

VREG5

16

15

C9755

2.2uF_25v

1uF_6.3v

2

1

ENTRIP1

VO1

PGOOD

VBST1

DRVH1

DRVL1DRVL2

VCLK

18

17

R9810

68.1K_1%

1

2

51125GND

2VREF

5-,14-

C9756

1

POWERPAD1x1m

2

51125GND

U7016

24
23
22
2110
2011

LL1

19

TI_TPS51125_QFN_24P

+V5AL

PAD3007

5-,7-

1

C9757

4.7uF_6.3V

2

32-,39-

+VBATP

7-

RSMRST#

5-,8-,9-,11-,13-,30-,39-,47-

PAD3008

2
3
4

POWERPAD_4A

4.7_5%

C9758

R9811

12

12

1

0.1uF_16v

+VBATR

51125GND

5-

R9812

12

10K_1%

4S123

MAX_LX5

R9813

12

15K_1%

8765

D

G

Q9032

SI7326DN

8765

D

G

S

Q9033

SI7726DN

123

4

C9759

1
2

4.7uF_25v

PCMC063T_4R7MN

C9760

1
2

4.7uF_25v

L531

+VBATP

1
2

12

7-

C9761

4.7uF_25v

1

2

C9763

POWERPAD_2_0610

220uF_6.3V

PAD3009

+V5A

8-,9-,10-,11-,12-,13-,14-,30-,34-,38-,47-

INVENTEC

TITLE

Vulcain UMA

SYSTEM POWER(3V/5V/12V)

CODE

AX1

CS

SHEET OFCHANGE by

DOC. NUMBERSIZE

750

26-Dec-2008Puma_Chen

D

REV

000

R564

12

42.2K_1%

R563

12

30K_1%

51124GND

51124GND

R561

12

30K_1%

R565

12

20K_1%

+V1.8

10-,12-,20-,23-,24-,26-,27-,47-

PAD3

POWERPAD_2_0610

1

C81

2

330uF_2.5V

+VBATR

5-,7-,8-,9-,11-,13-,30-,39-,47-

C46

1
2

4.7uF_25v

L4

12

PCMC063T_2R2MN

C45

1
2

4.7uF_25v

FDS6690AS

Q28

SI7326DN

Q27

8

D

S

123

8765

D

S

765

23

G

4

G

41

V1.8_PG

SLP_S4#_3R

SLP_S5#_3R

0.1uF_16v

12-,32-

32-,38-

C52

14-

1

R562
0402_OPEN

2

12

R114

12

4.7_5%

6

VO2

7

8

9

10

11

12

VFB2

PGOOD2

EN2

VBST2

DRVH2

TI_TPS51124RGER_QFN_24P

LL2

DRVL2

TRIP2

PGND2

13

1

2

PAD3012

POWERPAD1x1m

51124GND

5

4

TONSEL

V5FILT

14

15

R94

19.1K_1%

GND

V5IN

3

16

2

VO1

VFB1

PGOOD1

TRIP1

PGND1

17

1

R93

11.3K_1%

2

1

VBST1

DRVH1

DRVL1

18

U11

GND

EN1

LL1

R91

2

0_5%

+V5A

C51

1
2

0402_OPEN

25
24

23

22

21

20

19

7-,8-,9-,10-,11-,12-,13-,14-,30-,34-,38-,47-

C54

1
2

1uF_10v

R92

12

4.7_5%

R95

12

10_5%

1

R9585

100K_5%_OPEN

2

C49

12

0.1uF_16v

1

SLP_S3#_3R

9-,10-,12-,13-,14-,32-,39-,43-,46-

7-,8-,9-,10-,11-,12-,13-,14-,30-,34-,38-,47-

14-

V1.25S_PG

+V5A

C53

1
2

4.7uF_6.3v

+VBATR

Q2004

1

D1

2
8

G1

G2

3

FDS6900AS

5-,7-,8-,9-,11-,13-,30-,39-,47-

C47

1
2

4.7uF_25v

5

S1_D2

6

SLF7055T_2R0N6R4_T3PF

7
4

S2

Puma_Chen

C50

1
2

4.7uF_25v

12

+V1.25S

20-,24-,34-

1

C48

220uF_2.5V

2

PAD2

POWERPAD_2_0610

L3

INVENTEC

TITLE

Vulcain UMA

SYSTEM POWER(+V1.8/+V1.25S)

26-Dec-2008

CODE

D

CS

SHEET

DOC. NUMBERSIZE

AX1 000

8

REV

OFCHANGE by

50

+V5A

7-,8-,10-,11-,12-,13-,14-,30-,34-,38-,47-

+VBATR

5-,7-,8-,11-,13-,30-,39-,47-

8-,10-,12-,13-,14-,32-,39-,43-,46-

SLP_S3#_3R

DFGT_VR_EN

20-

VCCP_PG

14-

R9568

0_5%

12

12

0_5%_OPEN

R46

1
2

1

R9569

10_5%

2

C1024

1uF_10v

1

R9570

200K_1%

2

U521

1

EN_PSV

2

TON

3

VOUT

4

V5FILT

5

VFB

6

PGOOD

7

GND

TI_TPS51117_QFN_14P

VCCPGND

PAD3013

POWERPAD1x1m

VBST

DRVH

V5DRV

DRVL

PGND

8765

G

VCCPGND

0.1uF_16v

1

R9572

8.06K_1%

2

C1025

12

41S23

8765

G

41S23

R9571

0_5%

12

14
13
12

LL

11

TRIP

10
9
8
15

TML

1
2

C1026

1uF_6.3v

D

Q517

SI7326DN

SLF10155T_2R0N8R4

D

Q518

FDS6676AS

C1023

1
2

4.7uF_25v

12

L527

C1022

1
2

4.7uF_25v

VCCPGND

1

R9574

12.1K_1%

2

1

R9573

30K_1%

2

1

C1027

2

POWERPAD_4A

330uF_2.5V

PAD4

1

+VCCP

10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-,47-

+VGFX_CORE

23-

2
3
4

2

PAD506

3

1

4

POWERPAD_4A

INVENTEC

TITLE

Vulcain UMA

CHANGE by

Puma_Chen

26-Dec-2008

GRAPHIC POWER (+VGFX_CORE)

SIZE

D

CODE

CS

SHEET

AX1

DOC. NUMBER

950

REV

000

OF

8-,9-,12-,13-,14-,32-,39-,43-,46-

R9853

SLP_S3#_3R

+VCCP

9-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-,47-

12

0_5%

R9854

12

0_5%_OPEN

+V5A

7-,8-,9-,11-,12-,13-,14-,30-,34-,38-,47-

C519

1
2

1uF_10v

U501

6

VCNTL

7

POK

82

EN

VIN

GND

9

1

+V1.8

8-,12-,20-,23-,24-,26-,27-,47-

C506

1
2

22uF_6.3v

5

VIN

3

VOUT

4

VOUT

FB

ANPEC_APL5930KAI_TRL_SOP_8P

14-

V1.5S_PG

C517

1
2

22uF_6.3v

1
2

C518

1uF_10v

C520

1
2

39pF_50V

PAD500

POWERPAD_2_0610

1

R548

27.4K_1%

2

1

R547

30K_1%

2

+V1.5S

13-,18-,24-,34-,45-,46-

Puma_Chen

26-Dec-2008

INVENTEC

TITLE

Vulcain UMA

SYSTEM POWER(+VCCP/+V1.5S)

SIZE REV

D

DOC. NUMBER

CODE

AX1 000

CS

SHEETCHANGE by

OF

5010

7-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47-

VR_PWRGD_CK505#

5-,13-,14-,19-,29-,30-,32-,34-,37-,40-,41-

11-

CSP1

C9764

2

1

47pF_50v

2

C9765

1

47pF_50v

11-

CSN1

11-

CSN2

C9766

2

1

47pF_50v

2

C9767

1

47pF_50v

11-

CSP2

AGND_VCORE

VSSSENSE

VCCSENSE

11-

R9814

12

332_1%

C9768

47pF_50v

1
2

R9815

12

332_1%

R9816

12

332_1%

C9769

47pF_50v

1
2

R9817

12

332_1%

12

18-

12

18-

+V5S

AGND_VCORE

R9818

0_5%

R9819

0_5%

AGND_VCORE

AGND_VCORE

+V3A

1

R134

47K_5%

2

PM_DPRSLPVR

VR_PWRGD_CK505#

PWR_GOOD_3

0_5%_OPEN

C9770

0.22uF_6.3v

1
2

1

0402_OPEN

2

C9772

1
2

0402_OPEN

C9773

1

0402_OPEN

2

H_DPRSTP#

SSM3K7002F

PM_PWROK

R9820

R9821

0_5%

AGND_VCORE

C9771

PSI#
H_VID6
H_VID5
H_VID4
H_VID3
H_VID2
H_VID1
H_VID0

+V3S

11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-

1

R9847

10K_5%

2

15-,32-

3

D

S

2

20-,32-

11-

PAD3010

POWERPAD1x1m

R9823

6.34K_1%

1

2

R9824

VR_PWRGD

R9825

12

0_5%

R9826

12

499_1%

R9827

12

0_5%

R9828

12

0_5%

R9829

12

124K_1%

C9775

12

2.2uF_6.3v

130

DROOP

2

VREF

3

GND

4

CSP1

5

CSN1

6

CSN2

7

CSP2

8

GNDSNS

9

VSNS

10

THERM

+VCCP

9-,10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-,47-

1

R9830

56_5%

1

2

2

TP47

35

41

39

38

33

37

36

40

34

PwPd

ISLEW

V5FILT

VR_ON

TONSEL

OSRSEL

TRIPSEL

CLK_EN#

PWRMON

U7017

TI_TPS51620RHAR_QFN_40P

DPRSTP#

PSI#

VR_TT#

VID4

VID5

VID6

VID3

12

13

11

17

16

15

14

32

DPRSLPVR

VID118VID2

19

Q9038

G

1

20-,32-,39-

1

2

AGND_VCORE

C9774

330pF_50V

12

1
2

R9822

12

20K_1%

0402_OPEN

17-,20-,31-

17-

18­18­18­18­18­18­18-

31

PGOOD

VID0

20

DRVH1

VBST1

DRVL1

PGND

DRVL2

VBST2

DRVH2

0402_OPEN

0402_OPEN

LL1

V5IN

LL2

R9831

12

R9832

12

29
28
27
26
25
24
23

12

22
21

+V3S

11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-

0.22uF_16V

2.2_5%

R9834

R9833

2.2_5%

12

12

C9777

0.22uF_16V

12

C9776

+V5A

7-,8-,9-,10-,12-,13-,14-,30-,34-,38-,47-

C9778

1
2

2.2uF_16v

C9780

0.1uF_25V

1
2

POWERPAD_2_0610

C9781

1
2

4.7uF_25v

C9782

1
2

4.7uF_25v

PAD3011

4.7uF_25v

4.7uF_25v

1
2

1
2

C9783

C9784

1

2

C9785

1
2

4.7uF_25v

C9786

121

4.7uF_25v

C9779

68uF_25V

0.1uF_25V

4.7uF_25v

C9787

1
2

C9788

2

+VBATR

5-,7-,8-,9-,13-,30-,39-,47-

4

G

4S123

CHANGE by

R9841

0_5%

11-14-

CSN1

11-

CSP1

Q9037

8765

TPCA8030_H

S

23

4

1

39.2K_1%

12

R9837

G

8D765

G

Q9035

TPCA8A04_H

S

23

4

1

1

R9835

0805_OPEN

2

1

C9789
0603_OPEN

2

12

C9791

12

0.01uF_16V

R9842

1

2

301K_1%

R9839

63.4K_1%

12

R9843

220K_5%

12

L532

12

CYNTEC_PCMC104T_R36MN_2P

+VCC_CORE

18-,47-

8765

Q9036

TPCA8030_H

S

23

1

8

765

D

G

Q9034

TPCA8A04_H

1

R9836
0805_OPEN

2

1

C9790

2

R9838

12

39.2K_1%

0603_OPEN

CSP2

CSN2

L533

12

CYNTEC_PCMC104T_R36MN_2P

11-

11-

R9840

12

220K_5%

C9792

301K_1%

2

R9844

12

2

R9846

12

63.4K_1%

1

0.01uF_16V

0_5%R9845

1

INVENTEC

TITLE

Vulcain UMA

CPU POWER(VCC_CORE)

DOC. NUMBER REV

CODE

SIZE

D

CS

SHEET OF

26-Dec-2008Puma_Chen

11 50

000AX1

SLP_S4#_3R

SLP_S3#_3R

8-,32-

8-,9-,10-,13-,14-,32-,39-,43-,46-

+V1.8

8-,10-,20-,23-,24-,26-,27-,47-

1
2

C27

4.7uF_6.3v

+V5A

7-,8-,9-,10-,11-,13-,14-,30-,34-,38-,47-

U9

GMT_G2997F6U_MSOP10_10P

TML11VDDQSNS

10 2

VIN

9

S5
GND8PGND

7

S3

6

VTTREF

C29

1
2

1uF_10v

1
2

20-,26-,27-

C28

0.1uF_16v

NOTE: DDR2 REGULATOR

VLDOIN

VTTSNS

VTT

1

3
4
5

M_VREF

+V0.9S

1
2

28-

C26

10uF_6.3v

1
2

C25

10uF_6.3v

CHANGE by

Puma_Chen 26-Dec-2008

INVENTEC

TITLE

Vulcain UMA

DDR TERMINATION VOLTAGE

SIZE

D

DOC. NUMBERCODE

CS

AX1

OFSHEET

REV

000

5012

7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47-

+V3A

6
5

2

C441

1
2

0.01uF_16v

1

FDC655BN

R417
120K_1%

12

13-

GATE_3S GATE_5S

+V3S

11-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-

Q41

4

D

S

3

G

1

1

R418
47_5%

C442

10uF_6.3v

2

2

7-,8-,9-,10-,11-,12-,14-,30-,34-,38-,47-

R415
120K_1%

12

13-

+V5A

6

D

5

2

13

FDC655BN

C439

1

2

0.01uF_16v

Q40

+V5S

5-,11-,14-,19-,29-,30-,32-,34-,37-,40-,41-

4

S

G

1

C440

2

10uF_6.3v

1

R416
100_5%

2

R426
100_5%

+V1.5S

10-,18-,24-,34-,45-,46-

1

2

SLP_S3#_3R

Q44

3

D

G

1

S

2

SSM3K7002F

1

C769

0.033uF_16v

2

SLP_S3#_3R

7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47-

8-,9-,10-,12-,13-,14-,32-,39-,43-,46-

8-,9-,10-,12-,13-,14-,32-,39-,43-,46-

SSM3K7002F

+VBATR

5-,7-,8-,9-,11-,13-,30-,39-,47-

1

R770
47K_5%

2

+V3A

1

R769
100K_5%

2

Q52

3

D

1

G

S

2

1

B

Q54

MMBT3904

Q43

1

MMBT3906

3

C

E

2

1

R768
130K_1%

2

Q53

G

1

SSM3K7002F

+VBATR

5-,7-,8-,9-,11-,13-,30-,39-,47-

1

R781

2.7K_5%

2

2

E

B

C

3

3

D

S

2

R775

1

1K_5%

1

RLZ18C

2

2

D19

Q42

1

G

SSM3K7002F

3

D

S

2

13- 13-

GATE_5S

CHANGE by OF

Puma_Chen 26-Dec-2008

1

2

1

2

R779
0_5%

R777
0_5%

Q51

1

G

SSM3K7002F

3

D

S

2

GATE_3S

INVENTEC

TITLE

Vulcain UMA

POWER(SLEEP)

CODE

SIZE DOC. NUMBER

D

CS

SHEET

AX1

REV

000

5013

5-,6-,7-,14-,31-,39-,40-,47-

1

R419
100K_1%

2

C432

1
2

PHP_74LVC1G17_SOT753_5P

0.1uF_16v

+V3AL+V3AL

5-,6-,7-,14-,31-,39-,40-,47-

1

C429

2

0.1uF_16v

5

2

3

U25

4

1

R397
100K_5%

2

39-

VCC1_POR#_3

PWR_GOOD_3

11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-

SLP_S3#_3R

+V3S

5-,11-,13-,19-,29-,30-,32-,34-,37-,40-,41-

+V5S

11-,14-

V1.25S_PG

V1.5S_PG

V1.8_PG

VCCP_PG

8-,9-,10-,12-,13-,32-,39-,43-,46-

12

68.1K_1%

12

102K_1%

8-

10-

8-

9-

12

R396

1K_5%

R390

R380

CHENKO_LL4148_2P

D18

21

R399

12

140K_1%

R382

12

10K_5%

R391

12

10K_5%

R392

12

10K_5%

R389

12

10K_5%

D17

21

CHENKO_LL4148_2P

R393

49.9K_1%

1
2

1

2

C431

0.1uF_16v

C428

1
2

1000pF_50v

1

R398

0402_OPEN

2

R394

12

20K_5%

R386

12

20K_5%

ON_LM393DR2G_SOP_8P

R383

12

100K_5%

C422

1
2

0.1uF_16v

R385

12

1M_5%

+V5A

7-,8-,9-,10-,11-,12-,13-,14-,30-,34-,38-,47-

U24-A

8

3

+

1

OUT

2

­4

2VREF

5-,7-

R395

12

1M_5%

1
2

+V5A

7-,8-,9-,10-,11-,12-,13-,14-,30-,34-,38-,47-

8

U24-B

5

+

7

OUT

6

-

ON_LM393DR2G_SOP_8P

4

+V3A

7-,11-,13-,30-,32-,33-,34-,36-,43-,45-,47-

1

R384
10K_5%

2

39-

C430

PWR_GOOD_KBC

0.1uF_16v

11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-

+V3S

1

R401
0_5%_OPEN

1

R400
10K_5%

2

2

11-,14-

PWR_GOOD_3

CHANGE by

INVENTEC

TITLE

Vulcain UMA

POWER(SEQUENCE)

SIZE CODE

26-Dec-2008Puma_Chen

D

CS

SHEET

DOC. NUMBER

AX1

14 50

REV

000

OF

+V3S

11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-

L512

BLM18AG471SN1D

1

2

11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-

R267 10K_5%

CLKREQ_R_SATA#

15-,32-

+VCCP

9-,10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-,47-

2

10K_5%

R249

1

CLKREQ_R_MCH#

FSA

FSB

1

1

0

1

17-,20­17-,20­15-

FSC

0
0

C302

1
2

0402_OPEN

R662

VR_PWRGD

CLK_PWRGD

FSB CLOCK
FREQUENCY

R663

12

11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-

+V3S CLK_PCIE_LAN

R701

10K_5%

20-

11-,32-

32-

667
800

CPU_BSEL1

CPU_BSEL2

CLK_3S_REF

*CLKREQ# pin controls SRC Table.

Byte5: bit6 =0(PWD)

SRC0

CR#_A

Byte5: bit7=0, disable CR#_A; 1,enable CR#_A

Byte5: bit2 =0(PWD)

SRC0

CR#_C

Byte5: bit3=0, disable CR#_C; 1,enable CR#_C

Byte5: bit6 =1

SRC2

Byte5: bit2 =1

SRC2

Layout note: All decoupling 0.1uF disperse closed to pin

1
2

C715

10uF_6.3v

1
2

0.1uF_16v

C325

1
2

C324

0.1uF_16v

1
2

0.1uF_16v

+V3S

12

CPU_BSEL0

12

CLK_R3S_ICH48

CLK_R3S_CR48

CLKREQ_R_SATA#

ICH_3S_SMCLK

ICH_3S_SMDATA

C714

33pF_50v

15-,32-

39-

CLK_R3S_MINICARD
C371

1

0402_OPEN

2

11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-

19-,26-,27-,32­19-,26-,27-,32-

1
2

12

10K_5%

1

R700

475_1%

2

12

R9848

12

0_5%

R9849

12

0_5%_OPEN

HOST CLOCK
FREQUENCY

166
200

10K_5%

C358

22pF_50v

CLK_R3S_DEBUG

Please place close to CLKGEN within 500mils

Byte5: bit4 =0(PWD)

CR#_B

SRC1

Byte5: bit5=0, disable CR#_B; 1,enable CR#_B

Byte5: bit0 =0(PWD)

CR#_D

SRC1

Byte5: bit1=0, disable CR#_D; 1,enable CR#_D

C322

9-,10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-,47-

17-,20-

32-

46-

X501

14.31818MHZ

12

30PPM

1

1

2

2

0.1uF_16v

0.1uF_16v

10K_5%_OPEN

R708

12

2.2K_5%

0402_OPEN

12

R302

22_5%

R9670

12

R266 475_1%

12

12

R305

33_5%

45-

1

C713

33pF_50v

2

+VCCP

R709

R301

C321

C319

Byte5: bit4 =1

SRC4

Byte5: bit0 =1

SRC4

C318

1
2

0.1uF_16v

1

2

2

1

22_5%

R9607

12

33_5%

+V3S

R702

12

10K_5%

CLK_3S_ICH48

CLKREQ_SATA#
CLKREQ_MCH#

CLK_3S_DEBUG

CR#_E

CR#_F

CR#_G

CR#_H

+V3S

11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-

Layout note: All decoupling 0.1uF disperse closed to pin

L510

BLM18AG471SN1D

1

2

C722

C699

1

1

2

2

10uF_6.3v

10uF_6.3v

U509

26

VDDSRC_IO

45

VDDSRC_IO

36

VDDSRC_IO

12

VDD96_IO

39

VDDSRC

61

VDDREF

20

VDDPLL3_IO

49

VDDCPU_IO

9

VDD48

2

VDDPCI

55

VDDCPU

16

VDD

10

SUB_48MHZ_FSLA

57

FSLB_TEST_MODE

62

REF0_FSLC_TEST_SEL

1

PCI0_CR#_A

3

PCI1_CR#_B

4

CLK_3S_MINICARD

PCI2_TME

5

PCI3

56

CK_PWRGD_PD#

64

SCLK

63

SDTAT

60

X1

59

X2

8

GNDPCI

11

GND48

15

GND

19

GND

23

GNDSRC

29

GNDSRC

42

GNDSRC

58

GNDREF

52

GNDCPU

ICS_ICS9LPRS355BGLFT_TSSOP_64P

CPUT2_ITP_SRCT8

CPUC2_ITP_SRCC8

SRCT11_CR#_H

SRCC11_CR#_G

PCI4_27_Select
PCI_F5_ITP_EN

SRCC2_SATAC

27MHz_NonSS_SRCT1_SE1

27MHz_SS_SRCC1_SE2

SRCC0_DOTT_96
SRCT0_DOTC_96

Byte6: bit7=0, disable CR#_E; 1,enable CR#_E

SRC6

Byte6: bit6=0, disable CR#_F; 1,enable CR#_F

SRC8

Byte6: bit5=0, disable CR#_G; 1,enable CR#_G

SRC9

Byte6: bit4=0, disable CR#_H; 1,enable CR#_H

SRC10

PCI_STOP#

CPU_STOP#

SRCT7_CR#_F
SRCC7_CR#_E

SRCT3_CR#_C
SRCC3_CR#_D

SRCT2_SATAT

C328

C326

1
2

0.1uF_16v

48

NC

38
37

51

CPUT1_F

50

CPUC1_F

54

CPUT0

53

CPUC0

47
46

33
32

34

SRCT10

35

SRCC10

30

SRCT9

31

SRCC9

44
43

41

SRCT6

40

SRCC6

6
7

27

SRCT4

28

SRCC4

24
25

21
22

17
18

13
14

11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-

C327

1

1

2

2

0.1uF_16v

0.1uF_16v

CLK_R_MCHBCLK
CLK_R_MCHBCLK#

CLK_R_CPUBCLK

CLK_R_CPUBCLK#

CLK_R_XDP
CLK_R_XDP#

CLK_REQH#
CLK_REQG#

CLK_R_PCIE_NEWCARD
CLK_R_PCIE_NEWCARD#

CLK_R_PCIE_MINI2
CLK_R_PCIE_MINI2#

CLK_3S_KBPCI

CLK_3S_ICHPCI
CLK_R_PEG_MCH
CLK_R_PEG_MCH#
CLK_R_PCIE_ICH
CLK_R_PCIE_ICH#
CLK_R_SATA1

CLK_R_SATA1#

SSCLK1_R_DREF
SSCLK1_R_DREF#

CLK_R_DREF
CLK_R_DREF#

11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-

C323

1
2

0.1uF_16v

CLK_3S_REF

CHANGE by

+V3S

11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-

C329

C320

1

1

2

2

0.1uF_16v

0.1uF_16v

1

2

475_1%
475_1%

33_5%
33_5%

R250

R251

1

2

R247

10K_5%_OPEN

2

12

10K_5%

0402_OPEN

12

12

R248

10K_5%_OPEN

ITP_EN =0
SRC8/SRC8#

ITP_EN =1
ITP/ITP#

15-

LAYOUT NOTES : THE R250 , R251 CLOSED TO U509

Puma_Chen

26-Dec-2008

R720

10K_5%

R2451

12

R686

R70412
R707

R303

R706

22_5%

22_5%

1

1

R246

10K_5%

2

2

46­46-

R304

1

12

0402_OPEN

12

R703

12

10K_5%

39-

32-

INVENTEC

TITLE

Vulcain UMA

CLOCK_GENERATOR

SIZE

CODE

D

CS

SHEET

32-

PCISTOP#_3

32-

CPUSTOP#_3

21-

CLK_R_MCHBCLK

21-

CLK_R_MCHBCLK#

16-

CLK_R_CPUBCLK

16-

CLK_R_CPUBCLK#

19-

CLK_R_XDP

19-

CLK_R_XDP#

46-

CLK_R_REQH#

45-

CLK_R_REQG#

CLK_R_PCIE_NEWCARD
CLK_R_PCIE_NEWCARD#

45-

CLK_R_PCIE_MINI2

45-

CLK_R_PCIE_MINI2#

43­43-

CLK_PCIE_LAN#

39-

CLK_R3S_KBPCI

33-

CLK_R3S_ICHPCI

20-

CLK_R_PEG_MCH

20-

CLK_R_PEG_MCH#

32-

CLK_R_PCIE_ICH

32-

CLK_R_PCIE_ICH#

31-

CLK_R_SATA1

31-

CLK_R_SATA1#

20-

SSCLK1_R_DREF

20-

SSCLK1_R_DREF#

20-

CLK_R_DREF

20-

CLK_R_DREF#

+V3S+V3S

27_Selet =0

2

LCD_SST 100MHZ

27_Selet =1

27MHZ non-spread clock

CLK_R3S_KBC14

CLK_R3S_ICH14

DOC. NUMBER

AX1

OF

REV

000

5015