Page 1
5
4
3
2
1
Intel SKL-U/KBL-U Platform Block Diagram
2133MHzDDR4 SO-DIMM
2133MHz
PCIE x4
Intel SKL/KBL U
Power : 15 (Watt)
Package : BGA1356
Size : 40 X 24 (mm)
DDI1
eDP X2 Lane
DDI2
USB3.0
USB3.0 CONN
HDMI CONN V1.4
PAGE 29
eDP
PAGE 27
DP to VGA Translator
RTD2166-CG
PAGE 26
PORT1 PORT2
USB3.0 CONN
PAGE 31
PAGE 31
VGA Port
USB2.0 CONN
PAGE 26
PAGE 31
Card Reader(DB)
RTS5141-GR
PAGE 31
PCB 6L STACK UP
LAYER 1 : TOP
LAYER 2 : SGND
LAYER 3 : IN1(High)
LAYER 4 : IN2(Low)
LAYER 5 : SVCC
LAYER 6 : BOT
VRAM DDR3L
256x16*4 1GHz
256x16*4 1GHz
D D
PAGE 24,25
R17M-M1-30/70
64bit 23x23
TDP 18W/25W
PAGE 19~23
Maxima 8GBs
PAGE 17
DDR4 SO-DIMM
Maxima 8GBs
PAGE 18
SATA HDD
DB
Or
2.5"
PAGE 36
SATA SSD
M.2
2nd SATA SSD
C C
M.2
VIA VL711
ODD
PAGE 35
SATA0 6GB/s
SATA2 6GB/s
SATA1 1.5GB/s
PAGE 35
01
SATA1 1.5GB/s
SMBus
USB2.0
PORT1 PORT2
PORT4 PORT6
PORT7 PORT3 PORT8
SPI ROM
SPI
PCIE
PAGE 10
LPC Interface
Touch Pad
B B
PAGE 33
Embedded Controller
KBC IT8987
PAGE 37
FAN
PAGE 33
Keyboard
PAGE 33
TPM
SLB9665TT2.0
PAGE 34
Audio Codec
ALC3227-CG
PAGE 28
Speaker
PAGE 28
HDA
NIC
RTL8166EN-CG 10/100
RTL8111HSH-CG 1000
PAGE 30
RJ45 CONN
PAGE 30
WLAN/BT COMBO
M.2
PAGE 36
Webcam
PAGE 27
Touch Screen
PAGE 27
Combo Jack
PAGE 28
Digital MIC
A A
5
4
PAGE 27
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Block Diagram
Block Diagram
NB5
NB5
3
2
NB5
Block Diagram
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
15 1 Wednesday, March 08, 2017
15 1 Wednesday, March 08, 2017
15 1 Wednesday, March 08, 2017
1A
1A
1A
1A
1A
1A
Page 2
5
+3V <4,10,11,12,13,14,15,17,18,26,27,28,29,30,31,33,34,35,37,43,45>
+1.0V <4,37,42,43>
+VCCSTPLL <4,5,6,9,42>
D D
HDMI
SI
eDP_COMPIO and ICOMPO signals should be shorted near
balls and routed with typical impedance <25 mohms
C C
DDI1_TX0_N <26>
DDI1_TX0_P <26>
DDI1_TX1_N <26>
DDI1_TX1_P <26>
SDVO_CLK <29>
SDVO_DATA <29>
+3V
+VCCIO
4
U1A
E55
DDI1_TXN[0]
F55
DDI1_TXP[0]
E58
DDI1_TXN[1]
F58
DDI1_TXP[1]
F53
DDI1_TXN[2]
G53
DDI1_TXP[2]
F56
DDI1_TXN[3]
G56
DDI1_TXP[3]
C50
DDI2_TXN[0]
D50
DDI2_TXP[0]
C52
DDI2_TXN[1]
D52
DDI2_TXP[1]
A50
DDI2_TXN[2]
B50
DDI2_TXP[2]
D51
DDI2_TXN[3]
C51
DDI2_TXP[3]
L13
GPP_E18/DDPB_CTRLCLK
L12
GPP_E19/DDPB_CTRLDATA
N7
GPP_E20/DDPC_CTRLCLK
N8
GPP_E21/DDPC_CTRLDATA
N11
GPP_E22/DDPD_CTRLCLK
N12
GPP_E23/DDPD_CTRLDATA
E52
EDP_RCOMP
*SKL_ULT
REV = 1
R9055
2.2K_4
*
IN_D2#
IN_D2
IN_D1#
IN_D1
IN_D0#
IN_D0
IN_CLK#
IN_CLK
DDI1_TX0_N
DDI1_TX0_P
DDI1_TX1_N
DDI1_TX1_P
DDPC_CTRLDATA
DDPD_CTRLDATA
1
R3 24.9_1%_4
EDP_RCOMP
IN_D2# <29>
IN_D2 <29>
IN_D1# <29>
IN_D1 <29>
IN_D0# <29>
IN_D0 <29>
IN_CLK# <29>
IN_CLK <29>
TP3
SKL_ULT
DDI
DISPLAY SI DEBANDS
3
?
Need apply PN
EDP
GPP_E13/DDPB_HPD0
GPP_E14/DDPC_HPD1
GPP_E15/DDPD_HPD2
GPP_E16/DDPE_HPD3
GPP_E17/EDP_HPD
EDP_TXN[0]
EDP_TXP[0]
EDP_TXN[1]
EDP_TXP[1]
EDP_TXN[2]
EDP_TXP[2]
EDP_TXN[3]
EDP_TXP[3]
EDP_AUXN
EDP_AUXP
EDP_DISP_UTIL
DDI1_AUXN
DDI1_AUXP
DDI2_AUXN
DDI2_AUXP
DDI3_AUXN
DDI3_AUXP
EDP_BKLTEN
EDP_BKLTCTL
EDP_VDDEN
? 1 OF 20
C47
C46
D46
C45
A45
B45
A47
B47
E45
F45
B52
G50
F50
E48
F48
G46
F46
L9
L7
L6
N9
L10
R12
R11
U13
INT_EDP_T XN0
INT_EDP_T XP0
INT_EDP_T XN1
INT_EDP_T XP1
INT_EDP_A UXN
INT_EDP_A UXP
HDMI_HPD_CON
DDI1_HPD_CON
ULT_EDP_HPD
PCH_LVDS_BLON
PCH_DPST_PWM
PCH_DISP_ON
2
INT_EDP_T XN0 <27>
INT_EDP_T XP0 <27>
INT_EDP_T XN1 <27>
INT_EDP_T XP1 <27>
INT_EDP_A UXN <27>
INT_EDP_A UXP <27>
INT_DDI1_A UXN <2 6>
INT_DDI1_A UXP <26>
HDMI_HPD_CON <29>
DDI1_HPD_CON <26>
ULT_EDP_HPD <27>
PCH_LVDS_BLON <27>
PCH_DPST_PWM <27>
PCH_DISP_ON <27>
1
Reserve EDP_HPD opposites circuit!
ULT_EDP_HPD
R2
100K_4
02
?
4 OF 20
Need apply PN
JTAG
PROC_TCK
PROC_TDI
PROC_TDO
PROC_TMS
PROC_TRST#
PCH_JTAG_TCK
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_TMS
PCH_TRST#
JTAGX
BOM
?
XDP_TCK0
B61
XDP_TDI_CPU
D60
XDP_TDO_CPU
A61
XDP_TMS_CPU
C60
PROC_TEST#
B59
JTAG_TCK_PCH
B56
JTAG_TDI_PCH
D59
JTAG_TDO_PCH
A56
JTAG_TMS_PCH
C59
XDP_TRST#_CPU
C61
JTAGX_PCH
A59
R863 *0_4/S
2
Close to EC
PM_THRMTRIP#
Processor pull-up (CPU)
TO BE REPLACED WITH 1K OHMS FOR SKL .
470 OHM IS FOR I/P
PROC_TEST# XDP_TRST#_CPU
PLACE NEAR CPU
XDP_TMS_CPU
XDP_TDI_CPU
XDP_TDO_CPU
H_PROCHOT#
XDP_TCK0
XDP_TRST#_CPU
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet
Date: Sheet
Date: Sheet
R5 1K_4
R17 *51_4
R19 *51_4
R20 *51_4
R21 1K_4
R22 51_4
R23 51_4
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
02 -- SKYPAKE 1/15 (eDP/DDI)
02 -- SKYPAKE 1/15 (eDP/DDI)
02 -- SKYPAKE 1/15 (eDP/DDI)
+VCCSTPLL
+1.0V
+1.0V
1A
1A
1A
1A
1A
25 1 Wednesday, March 08, 2017
25 1 Wednesday, March 08, 2017
1
25 1 Wednesday, March 08, 2017
1A
of
of
of
U1D
AT16
AU16
D63
A54
C65
C63
A65
C55
D55
B54
C56
BA5
AY5
H66
H65
A6
A7
CATERR#
PECI
PROCHOT#
THERMTRIP#
SKTOCC#
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
GPP_E3/CPU_GP0
GPP_E7/CPU_GP1
GPP_B3/CPU_GP2
GPP_B4/CPU_GP3
PROC_POPIRCOMP
PCH_OPIRCOMP
OPCE_RCOMP
OPC_RCOMP
*SKL_ULT
REV = 1
CATERR#
H_PROCHOT# <37,43>
+VCCSTPLL
R6 *49.9/F_4
+1.0V
B B
A A
CATERR#
R10 *51_4
R15 51_4
R16 51_4
R18 51_4
Close to Chipset
5
JTAGX_PCH
JTAG_TMS_PCH
JTAG_TDI_PCH
JTAG_TDO_PCH
JTAG_TCK_PCH
R4 499/F_4
4
EC_PECI <37>
PM_THRMTRIP# <37>
R8 49.9/F_4
R11 49.9/F_4
R12 49.9/F_4
R14 49.9/F_4 R13 51_4
EC_PECI
PROCHOT#
PM_THRMTRIP#
PROC_POPIRCOMP
PCH_OPI_RCOMP
EDRAM_OPIO_RCOMP
EOPIO_RCOMP
SKL_ULT
CPU MISC
3
Page 3
5
M_A_DQ SN[7:0 ] <17>
M_A_DQ SP[7:0 ] <17>
M_B_DQ SN[7:0 ] <18>
M_B_DQ SP[7:0 ] <18>
M_A_DQ [63:0] <17>
M_B_DQ [63:0] <18>
D D
C C
B B
+1.2VSUS <6,17,18,40,42>
M_A_DQ 0
AL71
M_A_DQ 1
AL68
M_A_DQ 2
AN68
M_A_DQ 3
AN69
M_A_DQ 4
AL70
M_A_DQ 5
AL69
M_A_DQ 6
AN70
M_A_DQ 7
AN71
M_A_DQ 8
AR70
M_A_DQ 9
AR68
M_A_DQ 10
AU71
M_A_DQ 11
AU68
M_A_DQ 12
AR71
M_A_DQ 13
AR69
M_A_DQ 14
AU70
M_A_DQ 15
AU69
M_B_DQ 0
AF65
M_B_DQ 1
AF64
M_B_DQ 2
AK65
M_B_DQ 3
AK64
M_B_DQ 4
AF66
M_B_DQ 5
AF67
M_B_DQ 6
AK67
M_B_DQ 7
AK66
M_B_DQ 8
AF70
M_B_DQ 9
AF68
M_B_DQ 10
AH71
M_B_DQ 11
AH68
M_B_DQ 12
AF71
M_B_DQ 13
AF69
M_B_DQ 14
AH70
M_B_DQ 15
AH69
M_A_DQ 16
BB65
M_A_DQ 17
AW65
M_A_DQ 18
AW63
M_A_DQ 19
AY63
M_A_DQ 20
BA65
M_A_DQ 21
AY65
M_A_DQ 22
BA63
M_A_DQ 23
BB63
M_A_DQ 24
BA61
M_A_DQ 25
AW61
M_A_DQ 26
BB59
M_A_DQ 27
AW59
M_A_DQ 28
BB61
M_A_DQ 29
AY61
M_A_DQ 30
BA59
M_A_DQ 31
AY59
M_B_DQ 16
AT66
M_B_DQ 17
AU66
M_B_DQ 18
AP65
M_B_DQ 19
AN65
M_B_DQ 20
AN66
M_B_DQ 21
AP66
M_B_DQ 22
AT65
M_B_DQ 23
AU65
M_B_DQ 24
AT61
M_B_DQ 25
AU61
M_B_DQ 26
AP60
M_B_DQ 27
AN60
M_B_DQ 28
AN61
M_B_DQ 29
AP61
M_B_DQ 30
AT60
M_B_DQ 31
AU60
U1B
DDR0_DQ[0]
DDR0_DQ[1]
DDR0_DQ[2]
DDR0_DQ[3]
DDR0_DQ[4]
DDR0_DQ[5]
DDR0_DQ[6]
DDR0_DQ[7]
DDR0_DQ[8]
DDR0_DQ[9]
DDR0_DQ[10]
DDR0_DQ[11]
DDR0_DQ[12]
DDR0_DQ[13]
DDR0_DQ[14]
DDR0_DQ[15]
DDR1_DQ[0]/DDR0_DQ[16]
DDR1_DQ[1]/DDR0_DQ[17]
DDR1_DQ[2]/DDR0_DQ[18]
DDR1_DQ[3]/DDR0_DQ[19]
DDR1_DQ[4]/DDR0_DQ[20]
DDR1_DQ[5]/DDR0_DQ[21]
DDR1_DQ[6]/DDR0_DQ[22]
DDR1_DQ[7]/DDR0_DQ[23]
DDR1_DQ[8]/DDR0_DQ[24]
DDR1_DQ[9]/DDR0_DQ[25]
DDR1_DQ[10]/DDR0_DQ[26]
DDR1_DQ[11]/DDR0_DQ[27]
DDR1_DQ[12]/DDR0_DQ[28]
DDR1_DQ[13]/DDR0_DQ[29]
DDR1_DQ[14]/DDR0_DQ[30]
DDR1_DQ[15]/DDR0_DQ[31]
DDR0_DQ[16]/DDR0_DQ[32]
DDR0_DQ[17]/DDR0_DQ[33]
DDR0_DQ[18]/DDR0_DQ[34]
DDR0_DQ[19]/DDR0_DQ[35]
DDR0_DQ[20]/DDR0_DQ[36]
DDR0_DQ[21]/DDR0_DQ[37]
DDR0_DQ[22]/DDR0_DQ[38]
DDR0_DQ[23]/DDR0_DQ[39]
DDR0_DQ[24]/DDR0_DQ[40]
DDR0_DQ[25]/DDR0_DQ[41]
DDR0_DQ[26]/DDR0_DQ[42]
DDR0_DQ[27]/DDR0_DQ[43]
DDR0_DQ[28]/DDR0_DQ[44]
DDR0_DQ[29]/DDR0_DQ[45]
DDR0_DQ[30]/DDR0_DQ[46]
DDR0_DQ[31]/DDR0_DQ[47]
DDR1_DQ[16]/DDR0_DQ[48]
DDR1_DQ[17]/DDR0_DQ[49]
DDR1_DQ[18]/DDR0_DQ[50]
DDR1_DQ[19]/DDR0_DQ[51]
DDR1_DQ[20]/DDR0_DQ[52]
DDR1_DQ[21]/DDR0_DQ[53]
DDR1_DQ[22]/DDR0_DQ[54]
DDR1_DQ[23]/DDR0_DQ[55]
DDR1_DQ[24]/DDR0_DQ[56]
DDR1_DQ[25]/DDR0_DQ[57]
DDR1_DQ[26]/DDR0_DQ[58]
DDR1_DQ[27]/DDR0_DQ[59]
DDR1_DQ[28]/DDR0_DQ[60]
DDR1_DQ[29]/DDR0_DQ[61]
DDR1_DQ[30]/DDR0_DQ[62]
DDR1_DQ[31]/DDR0_DQ[63]
*SKL_ULT
REV = 1
Need apply PN
?
SKL_ULT
DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5]
DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9]
DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6]
DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8]
DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7]
DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0]
DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12]
DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11]
DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT#
DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1]
DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13]
DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15]
DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14]
DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16]
DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0]
DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2]
DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1]
DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10]
DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1]
DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0]
NIL-DDR CH A
2 OF 20
4
DDR0_CKN[0]
DDR0_CKP[0]
DDR0_CKN[1]
DDR0_CKP[1]
DDR0_CKE[0]
DDR0_CKE[1]
DDR0_CKE[2]
DDR0_CKE[3]
DDR0_CS#[0]
DDR0_CS#[1]
DDR0_ODT[0]
DDR0_ODT[1]
DDR0_MA[3]
DDR0_MA[4]
DDR0_DQSN[0]
DDR0_DQSP[0]
DDR0_DQSN[1]
DDR0_DQSP[1]
DDR1_DQSN[0]/DDR0_DQSN[2]
DDR1_DQSP[0]/DDR0_DQSP[2]
DDR1_DQSN[1]/DDR0_DQSN[3]
DDR1_DQSP[1]/DDR0_DQSP[3]
DDR0_DQSN[2]/DDR0_DQSN[4]
DDR0_DQSP[2]/DDR0_DQSP[4]
DDR0_DQSN[3]/DDR0_DQSN[5]
DDR0_DQSP[3]/DDR0_DQSP[5]
DDR1_DQSN[2]/DDR0_DQSN[6]
DDR1_DQSP[2]/DDR0_DQSP[6]
DDR1_DQSN[3]/DDR0_DQSN[7]
DDR1_DQSP[3]/DDR0_DQSP[7]
DDR0_ALERT#
DDR0_PAR
DDR_VREF_CA
DDR0_VREF_DQ
DDR1_VREF_DQ
DDR_VTT_CNTL
3
2
SkyLake ULT Processor (DDR4)
?
AU53
AT53
AU55
AT55
BA56
BB56
AW56
AY56
AU45
AU43
AT45
AT43
M_A_A5
BA51
M_A_A9
BB54
M_A_A6
BA52
M_A_A8
AY52
M_A_A7
AW52
M_A_BG #0
AY55
M_A_A12
AW54
M_A_A11
BA54
BA55
AY54
M_A_A13
AU46
AU48
AT46
AU50
AU52
M_A_A2
AY51
AT48
M_A_A10
AT50
M_A_A1
BB50
M_A_A0
AY50
M_A_A3
BA50
M_A_A4
BB52
M_A_DQ SN0
AM70
M_A_DQ SP0
AM69
M_A_DQ SN1
AT69
M_A_DQ SP1
AT70
M_B_DQ SN0
AH66
M_B_DQ SP0
AH65
M_B_DQ SN1
AG69
M_B_DQ SP1
AG70
M_A_DQ SN2
BA64
M_A_DQ SP2
AY64
M_A_DQ SN3
AY60
M_A_DQ SP3
BA60
M_B_DQ SN2
AR66
M_B_DQ SP2
AR65
M_B_DQ SN3
AR61
M_B_DQ SP3
AR60
M_A_ALE RT#
AW50
M_A_PAR ITY M_B_ALE RT#
AT52
SM_VREF
AY67
SMDDR_VREF_DQ0_M3
AY68
SMDDR_VREF_DQ1_M3
BA67
DDR_VTT_CNTL
AW67
?
M_A_CLK N0 <17>
M_A_CLK P0 <17>
M_A_CLK N1 <17>
M_A_CLK P1 <17>
M_A_CKE 0 <17>
M_A_CKE 1 <17>
M_A_CS# 0 <17>
M_A_CS# 1 <17>
M_A_DIM0 _ODT 0 <17>
M_A_DIM0 _ODT 1 <17> M_B_DIM0 _ODT 0 <18>
M_A_A5 <17>
M_A_A9 <17>
M_A_A6 <17>
M_A_A8 <17>
M_A_A7 <17>
M_A_BG #0 <17>
M_A_A12 <17>
M_A_A11 <17>
M_A_ACT # <17>
M_A_BG #1 <17>
M_A_A13 <17>
M_A_CAS # <17>
M_A_W E# <17>
M_A_RAS # <17>
M_A_BS# 0 <17>
M_A_A2 <17>
M_A_BS# 1 <17>
M_A_A10 <17>
M_A_A1 <17>
M_A_A0 <17>
M_A_A3 <17>
M_A_A4 <17>
M_A_ALE RT# <17>
M_A_PAR ITY <17 >
SM_VREF <17>
TP7
SMDDR_VREF_DQ1_M3 <18>
DDR_VTT_CNTL <18>
20mils width
M_A_DQ 32
M_A_DQ 33
M_A_DQ 34
M_A_DQ 35
M_A_DQ 36
M_A_DQ 37
M_A_DQ 38
M_A_DQ 39
M_A_DQ 40
M_A_DQ 41
M_A_DQ 42
M_A_DQ 43
M_A_DQ 44
M_A_DQ 45
M_A_DQ 46
M_A_DQ 47
M_B_DQ 32
M_B_DQ 33
M_B_DQ 34
M_B_DQ 35
M_B_DQ 36
M_B_DQ 37
M_B_DQ 38
M_B_DQ 39
M_B_DQ 40
M_B_DQ 41
M_B_DQ 42
M_B_DQ 43
M_B_DQ 44
M_B_DQ 45
M_B_DQ 46
M_B_DQ 47
M_A_DQ 48
M_A_DQ 49
M_A_DQ 50
M_A_DQ 51
M_A_DQ 52
M_A_DQ 53
M_A_DQ 54
M_A_DQ 55
M_A_DQ 56
M_A_DQ 57
M_A_DQ 58
M_A_DQ 59
M_A_DQ 60
M_A_DQ 61
M_A_DQ 62
M_A_DQ 63
M_B_DQ 48
M_B_DQ 49
M_B_DQ 50
M_B_DQ 51
M_B_DQ 52
M_B_DQ 53
M_B_DQ 54
M_B_DQ 55
M_B_DQ 56
M_B_DQ 57
M_B_DQ 58
M_B_DQ 59
M_B_DQ 60
M_B_DQ 61
M_B_DQ 62
M_B_DQ 63
U1C
AY39
DDR0_DQ[32]/DDR1_DQ[0]
AW39
DDR0_DQ[33]/DDR1_DQ[1]
AY37
DDR0_DQ[34]/DDR1_DQ[2]
AW37
DDR0_DQ[35]/DDR1_DQ[3]
BB39
DDR0_DQ[36]/DDR1_DQ[4]
BA39
DDR0_DQ[37]/DDR1_DQ[5]
BA37
DDR0_DQ[38]/DDR1_DQ[6]
BB37
DDR0_DQ[39]/DDR1_DQ[7]
AY35
DDR0_DQ[40]/DDR1_DQ[8]
AW35
DDR0_DQ[41]/DDR1_DQ[9]
AY33
DDR0_DQ[42]/DDR1_DQ[10]
AW33
DDR0_DQ[43]/DDR1_DQ[11]
BB35
DDR0_DQ[44]/DDR1_DQ[12]
BA35
DDR0_DQ[45]/DDR1_DQ[13]
BA33
DDR0_DQ[46]/DDR1_DQ[14]
BB33
DDR0_DQ[47]/DDR1_DQ[15]
AU40
DDR1_DQ[32]/DDR1_DQ[16]
AT40
DDR1_DQ[33]/DDR1_DQ[17]
AT37
DDR1_DQ[34]/DDR1_DQ[18]
AU37
DDR1_DQ[35]/DDR1_DQ[19]
AR40
DDR1_DQ[36]/DDR1_DQ[20]
AP40
DDR1_DQ[37]/DDR1_DQ[21]
AP37
DDR1_DQ[38]/DDR1_DQ[22]
AR37
DDR1_DQ[39]/DDR1_DQ[23]
AT33
DDR1_DQ[40]/DDR1_DQ[24]
AU33
DDR1_DQ[41]/DDR1_DQ[25]
AU30
DDR1_DQ[42]/DDR1_DQ[26]
AT30
DDR1_DQ[43]/DDR1_DQ[27]
AR33
DDR1_DQ[44]/DDR1_DQ[28]
AP33
DDR1_DQ[45]/DDR1_DQ[29]
AR30
DDR1_DQ[46]/DDR1_DQ[30]
AP30
DDR1_DQ[47]/DDR1_DQ[31]
AY31
DDR0_DQ[48]/DDR1_DQ[32]
AW31
DDR0_DQ[49]/DDR1_DQ[33]
AY29
DDR0_DQ[50]/DDR1_DQ[34]
AW29
DDR0_DQ[51]/DDR1_DQ[35]
BB31
DDR0_DQ[52]/DDR1_DQ[36]
BA31
DDR0_DQ[53]/DDR1_DQ[37]
BA29
DDR0_DQ[54]/DDR1_DQ[38]
BB29
DDR0_DQ[55]/DDR1_DQ[39]
AY27
DDR0_DQ[56]/DDR1_DQ[40]
AW27
DDR0_DQ[57]/DDR1_DQ[41]
AY25
DDR0_DQ[58]/DDR1_DQ[42]
AW25
DDR0_DQ[59]/DDR1_DQ[43]
BB27
DDR0_DQ[60]/DDR1_DQ[44]
BA27
DDR0_DQ[61]/DDR1_DQ[45]
BA25
DDR0_DQ[62]/DDR1_DQ[46]
BB25
DDR0_DQ[63]/DDR1_DQ[47]
AU27
DDR1_DQ[48]
AT27
DDR1_DQ[49]
AT25
DDR1_DQ[50]
AU25
DDR1_DQ[51]
AP27
DDR1_DQ[52]
AN27
DDR1_DQ[53]
AN25
DDR1_DQ[54]
AP25
DDR1_DQ[55]
AT22
DDR1_DQ[56]
AU22
DDR1_DQ[57]
AU21
DDR1_DQ[58]
AT21
DDR1_DQ[59]
AN22
DDR1_DQ[60]
AP22
DDR1_DQ[61]
AP21
DDR1_DQ[62]
AN21
DDR1_DQ[63]
*SKL_ULT
REV = 1
SKL_ULT
Need apply PN
DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5]
DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9]
DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6]
DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8]
DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7]
DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0]
DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12]
DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11]
DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT#
DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1]
DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13]
DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15]
DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14]
DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16]
DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0]
DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2]
DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1]
DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10]
DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1]
DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0]
DDR0_DQSN[4]/DDR1_DQSN[0]
DDR0_DQSN[5]/DDR1_DQSN[1]
DDR1_DQSN[4]/DDR1_DQSN[2]
DDR1_DQSN[5]/DDR1_DQSN[3]
DDR0_DQSN[6]/DDR1_DQSN[4]
DDR0_DQSN[7]/DDR1_DQSN[5]
NIL-DDR CH B
3 OF 20
DDR1_CKN[0]
DDR1_CKN[1]
DDR1_CKP[0]
DDR1_CKP[1]
DDR1_CKE[0]
DDR1_CKE[1]
DDR1_CKE[2]
DDR1_CKE[3]
DDR1_CS#[0]
DDR1_CS#[1]
DDR1_ODT[0]
DDR1_ODT[1]
DDR1_MA[3]
DDR1_MA[4]
DDR0_DQSP[4]/DDR1_DQSP[0]
DDR0_DQSP[5]/DDR1_DQSP[1]
DDR1_DQSP[4]/DDR1_DQSP[2]
DDR1_DQSP[5]/DDR1_DQSP[3]
DDR0_DQSP[6]/DDR1_DQSP[4]
DDR0_DQSP[7]/DDR1_DQSP[5]
DDR1_DQSN[6]
DDR1_DQSP[6]
DDR1_DQSN[7]
DDR1_DQSP[7]
DDR1_ALERT#
DRAM_RESET#
DDR_RCOMP[0]
DDR_RCOMP[1]
DDR_RCOMP[2]
BOM
DDR1_PAR
?
AN45
AN46
AP45
AP46
AN56
AP55
AN55
AP53
BB42
AY42
BA42
AW42
AY48
AP50
BA48
BB48
AP48
AP52
AN50
AN48
AN53
AN52
BA43
AY43
AY44
AW44
BB44
AY47
BA44
AW46
AY46
BA46
BB46
BA47
BA38
AY38
AY34
BA34
AT38
AR38
AT32
AR32
BA30
AY30
AY26
BA26
AR25
AR27
AR22
AR21
AN43
AP43
AT13
AR18
AT18
AU18
M_B_A5
M_B_A9
M_B_A6
M_B_A8
M_B_A7
M_B_A12
M_B_A11
M_B_A13
M_B_A2
M_B_A10
M_B_A1
M_B_A0
M_B_A3
M_B_A4
M_A_DQ SN4
M_A_DQ SP4
M_A_DQ SN5
M_A_DQ SP5
M_B_DQ SN4
M_B_DQ SP4
M_B_DQ SN5
M_B_DQ SP5
M_A_DQ SN6
M_A_DQ SP6
M_A_DQ SN7
M_A_DQ SP7
M_B_DQ SN6
M_B_DQ SP6
M_B_DQ SN7
M_B_DQ SP7
M_B_PAR ITY
SM_DRAMRST#
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
20mils width
R25 121/F_4
R26 80.6/F_4
R27 100/F_4
1
M_B_CLK N0 <18>
M_B_CLK N1 <18>
M_B_CLK P0 <18>
M_B_CLK P1 <18>
M_B_CKE 0 <18>
M_B_CKE 1 <18>
M_B_CS# 0 <18>
M_B_CS# 1 <18>
M_B_DIM0 _ODT 1 <18>
M_B_A5 <18>
M_B_A9 <18>
M_B_A6 <18>
M_B_A8 <18>
M_B_A7 <18>
M_B_BG #0 <18>
M_B_A12 <18>
M_B_A11 <18>
M_B_ACT # <18>
M_B_BG #1 <18>
M_B_A13 <18>
M_B_CAS # <18>
M_B_W E# <18>
M_B_RAS # <18>
M_B_BS# 0 <18>
M_B_A2 <18>
M_B_BS# 1 <18>
M_B_A10 <18>
M_B_A1 <18>
M_B_A0 <18>
M_B_A3 <18>
M_B_A4 <18>
+1.2VSUS
M_B_ALE RT# <18>
M_B_PAR ITY <18 >
R24
470/F_4
DDR3_DRAMRST# <17,18>
03
A A
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Num ber Rev
Size Document Num ber Rev
Size Document Num ber Rev
Custom
Custom
Custom
03 -- SKYLAKE 2/15(DDR4 I/F)
03 -- SKYLAKE 2/15(DDR4 I/F)
NB5
NB5
5
4
3
2
NB5
03 -- SKYLAKE 2/15(DDR4 I/F)
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
1A
1A
1A
1A
1A
1A
35 1 Wednesday, March 08, 2017
35 1 Wednesday, March 08, 2017
35 1 Wednesday, March 08, 2017
Page 4
5
+3V_DEEP_SUS <10,11,12,14,15,18>
+3V <2,10,11,12,13,14,15,17,18,26,27,28,29,30,31,33,34,35,37,43,45>
+3VS5 <15,31,36,37,39,40,41,42,45,46,49>
+VCCSTPLL <2,5,6,9,42>
+1.0V <2,37,42,43>
+BAT_RTC
+3V_RTC_2 <13,15>
D D
RSMRST# <37>
EC1
*220p/50V_4
EC_PWROK <37>
TP8518
*
PCIE_WAKE# <30,36>
1
SUSWARN#
R29 *10K_4
C1 *0.1u/16V_4
R34 *0_4/S
4
PLTRST#
SYS_RESET#
RSMRST#
PROCPWRGD
H_VCCST_PWRGD
SYS_PWROK
PCH_PWROK
DSWROK_EC_R
SUSACK#
PCIE_WAKE#
LAN_WAKE#
U1K
SYSTEM POWER MANAGEMENT
AN10
GPP_B13/PLTRST#
B5
SYS_RESET#
AY17
RSMRST#
A68
PROCPWRGD
B65
VCCST_PWRGD
B6
SYS_PWROK
BA20
PCH_PWROK
BB20
DSW_PW ROK
AR13
GPP_A13/SUSWARN#/SUSPWRDNACK
AP11
GPP_A15/SUSACK#
BB15
WAKE#
AM15
GPD2/LAN_WAKE#
AW17
GPD11/LANPHYPC
AT15
GPD7/RSVD
*SKL_ULT
REV = 1
SKL_ULT
?
11 OF 20
3
Need apply PN
GPP_B12/SLP_S0#
GPD4/SLP_S3#
GPD5/SLP_S4#
GPD10/SLP_S5#
SLP_SUS#
SLP_LAN#
GPD9/SLP_WLAN#
GPD6/SLP_A#
GPD3/PWRBTN#
GPD1/ACPRESENT
GPD0/BATLOW#
GPP_A11/PME#
GPP_B11/EXT_PWR_GATE#
INTRUDER #
GPP_B2/VRALERT#
2
1
04
PCH_SLP_S0_N
AT11
AP15
BA16
AY16
SLP_SUS#_EC
AN15
AW15
BB17
GPD9
AN16
BA15
DNBSWON#
AC_PRESENT_EC
AY15
RF_OFF_PCH
AU13
AU11
INTRUDER #_R
AP16
AM10
AM11
?
1
1
1
1
R305 1M_4
*
TP942
SUSB# <37>
SUSC# <37>
*
TP941
SLP_SUS#_EC <37>
*
TP8
*
TP940
DNBSWON# <37>
AC_PRESENT_EC <37>
RF_OFF_PCH <36>
+3V_RTC_2
PCH Pull-high/low(CLG)
SUSWARN#
RF_OFF_PCH
PCIE_WAKE#
AC_PRESENT_EC
LAN_WAKE#
SYS_RESET#
RSMRST#
DSWROK_EC
R28 *10K_4
R31 10K_4
R35 1K_4
R37 *10K_4
R38 *10K_4
R39 10K_4
R40 10K_4
R41 100K/F_4
+3V_DEEP_SUS
+3VS5
+3V
C C
For DS3 Sequence
+1.0V +3VS5 +5VS5
DSWROK_EC_R
D1 MEK500V-40
HWPG <37,39,40,41>
1
Ra close to CPU side
H_VCCST_PWRGD trace 0.3" - 1.5"
R52
100K/F_4
R46 *0_4/S
PLTRST# <19,30,34,36,37>
DSWROK_EC <37>
PLTRST#(CLG)
Check Rise/Fall time less than 100ns
B B
+1.0V
2
H_VCCST_PWRGD_R
R47
1K_4
C3
*10P/50V_4
+VCCSTPLL
R48
*1K_4
Ra
R50 60.4/F_4
H_VCCST_PWRGD
R43
15K/F_4
+1.0V_PWRGD_G1
C2
0.1U/16V_4
R51
100K_4
2
R44
100K_4
+1.0V_PWRGD_G2
Q2
METR3904-G
1 3
System PWR_OK(CLG)
EC_PWROK SYS_PWROK
R54
10K/F_4
A A
R45
10K_4
HWPG
3
2
1
Q1
2N7002K
R49
100K_4
5
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
04 -- SKYLAKE 3/15(PowerManger)
04 -- SKYLAKE 3/15(PowerManger)
NB5
NB5
4
3
2
NB5
04 -- SKYLAKE 3/15(PowerManger)
Date: Sheet
Date: Sheet
Date: Sheet
1
45 1 Wednesday, March 08, 2017
45 1 Wednesday, March 08, 2017
45 1 Wednesday, March 08, 2017
1A
1A
1A
1A
1A
1A
of
of
of
Page 5
5
+VCC_CORE <7,43>
+1.0V <2,4,37,42,43>
+VCCSTG <6>
+VCCSTPLL <2,4,6,9,42>
Under CPU
C9
22U/6.3V_6
C20
10U/6.3V_4
C35
22U/6.3V_6
C10
22U/6.3V_6
C21
10U/6.3V_4
C36
22U/6.3V_6
C4
D D
C C
10U/6.3V_6
C19
10U/6.3V_6
C34
22U/6.3V_6
C5
22U/6.3V_6
C22
10U/6.3V_4
C37
22U/6.3V_6
C14
47U/6.3VS_8
C23
10U/6.3V_4
C38
22U/6.3V_6
C16
22U/6.3V_6
C24
10U/6.3V_6
C39
22U/6.3V_6
C17
22U/6.3V_6
C25
10U/6.3V_4
Close CPU
+VCC_CORE
C40
47U/6.3VS_8
+VCC_CORE
4
?
SKL_ULT
A30
A34
A39
A44
AK33
AK35
AK37
AK38
AK40
AL33
AL37
AL40
AM32
AM33
AM35
AM37
AM38
G30
K32
AK32
AB62
P62
V62
H63
G61
AC63
AE63
AE62
AG62
AL63
AJ62
C42
47U/6.3VS_8
U1L
VCC_A30
VCC_A34
32A
VCC_A39
VCC_A44
VCC_AK33
VCC_AK35
VCC_AK37
VCC_AK38
VCC_AK40
VCC_AL33
VCC_AL37
VCC_AL40
VCC_AM32
VCC_AM33
VCC_AM35
VCC_AM37
VCC_AM38
VCC_G30
RSVD_K32
RSVD_AK32
VCCOPC_AB62
VCCOPC_P62
VCCOPC_V62
VCC_OPC_1P8_H63
VCC_OPC_1P8_G61
VCCOPC_SENSE
VSSOPC_SENSE
VCCEOPIO_AE62
VCCEOPIO_AG62
VCCEOPIO_SENSE
VSSEOPIO_SENSE
*SKL_ULT
REV = 1
C43
47U/6.3VS_8
+VCC_CORE +VCC_CORE
C18
22U/6.3V_6
C41
47U/6.3VS_8
CPU POWER 1 OF 4
3.2A
50mA
2A
12 OF 20
C44
47U/6.3VS_8
Need apply PN
VCC_G32
VCC_G33
VCC_G35
VCC_G37
VCC_G38
VCC_G40
VCC_G42
VCC_J30
VCC_J33
VCC_J37
VCC_J40
VCC_K33
VCC_K35
VCC_K37
VCC_K38
VCC_K40
VCC_K42
VCC_K43
VCC_SENSE
VSS_SENSE
VIDALERT#
VIDSCK
VIDSOUT
VCCSTG_G20
BOM
C45
47U/6.3VS_8
47U/6.3VS_8
C46
U
?
3
G32
G33
G35
G37
G38
G40
G42
J30
J33
J37
J40
K33
K35
K37
K38
K40
K42
K43
E32
E33
H_CPU_SVIDALRT#
B63
VR_SVID_CLK_R
A63
H_CPU_SVIDDAT
D64
G20
C47
47U/6.3VS_8
C6
1U/6.3V_4
C26
1U/6.3V_4
C7
1U/6.3V_4
C27
1U/6.3V_4
R55 *100/F_4
R56 *100/F_4
+VCCSTG
2
Under CPU
C8
1U/6.3V_4
C28
1U/6.3V_4
C12
C11
1U/6.3V_4
1U/6.3V_4
C29
C30
1U/6.3V_4
1U/6.3V_4
+VCC_CORE
VCC_SENSE <43>
VSS_SENSE <43>
C13
1U/6.3V_4
C31
1U/6.3V_4
Close CPU
100- ±1%
pull-up to VCC
near processor.
C15
1U/6.3V_4
C32
1U/6.3V_4
C33
1U/6.3V_4
Layout note: need routing together and ALERT need between CLK and DATA.
+VCCSTPLL
CLOSE TO CPU
PLACE THE PU RESISTORS
H_CPU_SVIDALRT#
R58 220/F_4
R57
56.2/F_4
C48
*0.1U/16V_4
SVID ALERT
1
05
VR_SVID_ALERT# <43>
R61
100/F_4
+VCCSTPLL
R59
*54.9/F_4
SVID CLK
VR_SVID_CLK <43>
R62 *0_4/S
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
Date: Sheet of
SVID DATA
VR_SVID_DATA <43>
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
05 -- SKYLAKE 4/15 (POWER-1)
05 -- SKYLAKE 4/15 (POWER-1)
05 -- SKYLAKE 4/15 (POWER-1)
1
1A
1A
1A
1A
1A
55 1 Wednesday, March 08, 2017
55 1 Wednesday, March 08, 2017
55 1 Wednesday, March 08, 2017
1A
C49
B B
A A
5
10U/6.3V_4
C50
10U/6.3V_4
C51
10U/6.3V_6
4
C52
10U/6.3V_4
C53
10U/6.3V_4
C54
10U/6.3V_4
C55
10U/6.3V_4
C56
10U/6.3V_6
3
PLACE THE PU RESISTORS
CLOSE TO VR
PULL UP IS IN THE VR MODULE
CLOSE TO CPU
PLACE THE PU RESISTORS
VR_SVID_CLK_R
H_CPU_SVIDDAT
2
R60 *0_4/S
+VCCSTPLL
Page 6
5
+VCCSTPLL <2,4,5,9,42>
+VCCSA <43,44>
+1.2VSUS <3,17,18,40,42>
+1.0V_DEEP_SUS <9,13,15,41,42>
+1.0V <2,4,37,42,43>
+3VPCU <13,31,33,36,37,38,39>
Under CPU
D D
10U/6.3V_6
C60
10U/6.3V_6
10U/6.3V_6
C74
C73
10U/6.3V_6
10U/6.3V_6
C62
C61
1U/6.3V_4
C76
C75
10U/6.3V_6
Close CPU
+VCCSTPLL
R63 *0_4/S
+1.2V_VCCPLL_OC
C C
R69 *0_6/S
+VCCSTG
+VCCPLL_OC
+1.2VSUS
C57
C58
1U/6.3V_4
*10U/6.3V_4
1U/6.3V_4
C91
C59
1U/6.3V_4
C92
1U/6.3V_4
Close CPU Under CPU
+VCCSTPLL
+VCCSTG
+VCCPLL_OC
+VCCPLL
4
3
2
1
06
AU23
AU28
AU35
AU42
BB23
BB32
BB41
BB47
BB51
AM40
AL23
A18
A22
K20
K21
SKL_ULT
U1N
CPU POWER 3 OF 4
VDDQ_AU23
VDDQ_AU28
VDDQ_AU35
VDDQ_AU42
VDDQ_BB23
VDDQ_BB32
VDDQ_BB41
VDDQ_BB47
VDDQ_BB51
VDDQC
VCCST
VCCSTG_A22
VCCPLL_OC
VCCPLL_K20
VCCPLL_K21
*SKL_ULT
REV = 1
?
2.8A
60mA
20mA
120mA
130mA
14 OF 20
Need apply PN
VCCIO1
3.1A
VCCIO2
VCCIO3
VCCIO4
VCCIO5
VCCIO6
VCCIO7
VCCSA1
5.1A
VCCSA2
VCCSA3
VCCSA4
VCCSA5
VCCSA6
VCCSA7
VCCSA8
VCCSA9
VCCSA10
VCCSA11
VCCSA12
VCCSA13
VCCSA14
VCCIO_SENSE
VSSIO_SENSE
VSSSA_SENSE
VCCSA_SENSE
?
AK28
AK30
AL30
AL42
AM28
AM30
AM42
AK23
AK25
G23
G25
G27
G28
J22
J23
J27
K23
K25
K27
K28
K30
AM23
AM22
H21
H20
C63
1U/6.3V_4
+VCCSA
C77
1U/6.3V_4
VCCIO_VCCSENSE
VCCIO_VSSSENSE
Under CPU Close CPU
C64
1U/6.3V_4
C65
1U/6.3V_4
C66
10U/6.3V_4
C67
10U/6.3V_4
C68
10U/6.3V_4
C69
1U/6.3V_4
Under CPU
C82
C81
C80
C78
1U/6.3V_4
C93
10U/6.3V_6
C79
1U/6.3V_4
1U/6.3V_4
C95
C94
10U/6.3V_6
10U/6.3V_6
VSSSA_SENSE <43>
VCCSA_SENSE <43>
1U/6.3V_4
C96
10U/6.3V_6
1U/6.3V_4
C97
10U/6.3V_4
VCCIO_VCCSENSE
VCCIO_VSSSENSE
C83
1U/6.3V_4
C98
10U/6.3V_4
C70
1U/6.3V_4
C84
10U/6.3V_4
Close CPU
R66 100/F_4
R67 100/F_4
C71
1U/6.3V_4
C85
10U/6.3V_6
+VCCIO
C72
1U/6.3V_4
C86
10U/6.3V_4
+VCCIO
C87
10U/6.3V_6
C88
10U/6.3V_4
C89
10U/6.3V_6
C90
10U/6.3V_6
+VCCPLL +VCCSTPLL
R70 *0_6/S
Under CPU
+VCCSTG +VCCPLL_OC
C99
1U/6.3V_4
C100
1U/6.3V_4
Close A18 Ball
+VCCSTPLL
B B
C104
*1U/6.3V_4
C105
*22U/6.3V_6
IO Thrm Protect
+3VPCU
R71
20K/F_4
For 75 degree, 1.2v limit, (HW)
THER_CPU
TM1
100K_4 NTC
PV
THERMISTOR <37>
C101
0.1U/16V_4
+3VPCU
R73
20K/F_4
For 75 degree, 1.2v limit, (HW)
THER_PIPE
TM0
100K_4 NTC
PV
THERMISTOR_SHDN <37>
C103
0.1U/16V_4
Close CPU
C107
1U/6.3V_4
C109
10U/6.3V_6
+VCCPLL
5
C110
10U/6.3V_6
C111
10U/6.3V_6
C112
10U/6.3V_6
C113
10U/6.3V_6
C114
1U/6.3V_4
C115
1U/6.3V_4
4
C116
1U/6.3V_4
C117
1U/6.3V_4
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
06 -- SKYLAKE 5/15 (POWER-2)
06 -- SKYLAKE 5/15 (POWER-2)
NB5
NB5
3
2
NB5
06 -- SKYLAKE 5/15 (POWER-2)
Date: Sheet
Date: Sheet
Date: Sheet
1
65 1 Wednesday, March 08, 2017
65 1 Wednesday, March 08, 2017
65 1 Wednesday, March 08, 2017
1A
1A
1A
1A
1A
1A
of
of
of
+VCCSTPLL
C106
1U/6.3V_4
+1.2VSUS
A A
C108
10U/6.3V_6
Close to CPU
Page 7
5
+VCCGT <43>
+VCC_CORE <5,43>
+1.2VSUS <3,6,17,18,40,42>
Under CPU
D D
C119
10U/6.3V_6
C130
10U/6.3V_4
+VCC_CORE
R998 *0.0002_8
+VCCGT_+VCORE
For R-U42
+VCCGT
C C
R995 0.0002_8
+VCCGT_+VCORE
For U22
C120
10U/6.3V_4
C131
10U/6.3V_6
Pin K52 NC on KBL- R BOM.
C146
1U/6.3V_4
C152
1U/6.3V_4
B B
C147
1U/6.3V_4
C153
1U/6.3V_4
C148
1U/6.3V_4
C154
1U/6.3V_4
C121
10U/6.3V_6
C137
10U/6.3V_6
C149
1U/6.3V_4
C155
1U/6.3V_4
VCCGT_SENSE <43>
VSSGT_SENSE <43>
4
C118
10U/6.3V_4
C138
10U/6.3V_6
+VCCGT
+VCCGT
C150
1U/6.3V_4
C156
1U/6.3V_4
+VCCGT_+VCORE
+VCCGT
C128
10U/6.3V_6
C139
10U/6.3V_4
+VCCGT_+VCORE
+VCCGT_+VCORE
R992 0_4
+VCCGT
C151
1U/6.3V_4
C157
1U/6.3V_4
AA63
AA64
AA66
AA67
AA69
AA70
AA71
AC64
AC65
AC66
AC67
AC68
AC69
AC70
AC71
M62
N63
N64
N66
N67
N69
A48
A53
A58
A62
A66
J43
J45
J46
J48
J50
J52
J53
J55
J56
J58
J60
K48
K50
K52
K53
K55
K56
K58
K60
L62
L63
L64
L65
L66
L67
L68
L69
L70
L71
J70
J69
SKL_ULT
U1M
CPU POWER 2 OF 4
VCCGT1
VCCGT2
VCCGT3
VCCGT4
VCCGT5
VCCGT6
VCCGT7
VCCGT8
VCCGT9
VCCGT10
VCCGT11
VCCGT12
VCCGT13
VCCGT14
VCCGT15
VCCGT16
VCCGT17
VCCGT18
VCCGT19
VCCGT20
VCCGT21
VCCGT22
VCCGT23
VCCGT24
VCCGT25
VCCGT26
VCCGT27
VCCGT28
VCCGT29
VCCGT30
VCCGT31
VCCGT32
VCCGT33
VCCGT34
VCCGT35
VCCGT36
VCCGT37
VCCGT38
VCCGT39
VCCGT40
VCCGT41
VCCGT42
VCCGT43
VCCGT44
VCCGT45
VCCGT46
VCCGT47
VCCGT48
VCCGT49
VCCGT50
VCCGT51
VCCGT52
VCCGT53
VCCGT54
VCCGT55
VCCGT_SENSE
VSSGT_SENSE
*SKL_ULT
REV = 1
57A
BOM
13 OF 20
7A
?
Need apply PN
VCCGT56
VCCGT57
VCCGT58
VCCGT59
VCCGT60
VCCGT61
VCCGT62
VCCGT63
VCCGT64
VCCGT65
VCCGT66
VCCGT67
VCCGT68
VCCGT69
VCCGT70
VCCGT71
VCCGT72
VCCGT73
VCCGT74
VCCGT75
VCCGT76
VCCGT77
VCCGT78
VCCGT79
VCCGT80
VCCGTX_AK42
VCCGTX_AK43
VCCGTX_AK45
VCCGTX_AK46
VCCGTX_AK48
VCCGTX_AK50
VCCGTX_AK52
VCCGTX_AK53
VCCGTX_AK55
VCCGTX_AK56
VCCGTX_AK58
VCCGTX_AK60
VCCGTX_AK70
VCCGTX_AL43
VCCGTX_AL46
VCCGTX_AL50
VCCGTX_AL53
VCCGTX_AL56
VCCGTX_AL60
VCCGTX_AM48
VCCGTX_AM50
VCCGTX_AM52
VCCGTX_AM53
VCCGTX_AM56
VCCGTX_AM58
VCCGTX_AU58
VCCGTX_AU63
VCCGTX_BB57
VCCGTX_BB66
VCCGTX_SENSE
VSSGTX_SENSE
3
+VCCGT
Close CPU
N70
N71
R63
R64
R65
R66
R67
R68
R69
R70
R71
T62
U65
U68
U71
W63
W64
W65
W66
W67
W68
W69
W70
W71
Y62
AK42
AK43
AK45
AK46
AK48
AK50
AK52
AK53
AK55
AK56
AK58
AK60
AK70
AL43
AL46
AL50
AL53
AL56
AL60
AM48
AM50
AM52
AM53
AM56
AM58
AU58
AU63
BB57
BB66
AK62
AL61
?
C122
47U/6.3VS_8
C129
22U/6.3V_6
C142
22U/6.3V_6
1
AK52
*
TP842
C300
*22U/6.3V_6
1.U22---C300/C301/C302/C303/C304
2.U42---C300/C301/C302/C303/C304
C123
47U/6.3VS_8
C132
22U/6.3V_6
C143
22U/6.3V_6
C303
*22U/6.3V_6
+VCCGTX_+VCORE
C302
*22U/6.3V_6
+VCCGTX_+VCORE
C301
*22U/6.3V_6
C124
47U/6.3VS_8
C133
22U/6.3V_6
C144
22U/6.3V_6
+VCCGTX_+VCORE
C304
*22U/6.3V_6
2
C125
47U/6.3VS_8
C134
22U/6.3V_6
C145
22U/6.3V_6
+VCCGTX_+VCORE
C126
47U/6.3VS_8
C135
22U/6.3V_6
C127
47U/6.3VS_8
C136
22U/6.3V_6
R994 *0.0002_8
1.U22--->R994
2.U42--->R994
C140
22U/6.3V_6
C141
22U/6.3V_6
1
07
+VCC_CORE
A A
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
07 -- SKYLAKE 6/15 (POWER-3)
07 -- SKYLAKE 6/15 (POWER-3)
NB5
NB5
5
4
3
2
NB5
07 -- SKYLAKE 6/15 (POWER-3)
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
75 1 Wednesday, March 08, 2017
75 1 Wednesday, March 08, 2017
75 1 Wednesday, March 08, 2017
1A
1A
1A
1A
1A
1A
Page 8
5
4
3
2
1
08
AA65
AA68
AB15
AB16
AB18
AB21
AD13
AD16
AD19
AD20
AD21
AD62
AE64
AE65
AE66
AE67
AE68
AE69
AF10
AF15
AF17
AF63
AG16
AG17
AG18
AG19
AG20
AG21
AG71
AH13
AH63
AH64
AH67
AJ15
AJ18
AJ20
AK11
AK16
AK18
AK21
AK22
AK27
AK63
AK68
AK69
AL28
AL32
AL35
AL38
AL45
AL48
AL52
AL55
AL58
AL64
A67
A70
AA2
AA4
AB8
AD8
AF1
AF2
AF4
AH6
AJ4
AK8
AL2
AL4
A5
U1P
SKL_ULT
VSS_A5
VSS_A67
VSS_A70
VSS_AA2
VSS_AA4
VSS_AA65
VSS_AA68
VSS_AB15
VSS_AB16
VSS_AB18
VSS_AB21
VSS_AB8
VSS_AD13
VSS_AD16
VSS_AD19
VSS_AD20
VSS_AD21
VSS_AD62
VSS_AD8
VSS_AE64
VSS_AE65
VSS_AE66
VSS_AE67
VSS_AE68
VSS_AE69
VSS_AF1
VSS_AF10
VSS_AF15
VSS_AF17
VSS_AF2
VSS_AF4
VSS_AF63
VSS_AG16
VSS_AG17
VSS_AG18
VSS_AG19
VSS_AG20
VSS_AG21
VSS_AG71
VSS_AH13
VSS_AH6
VSS_AH63
VSS_AH64
VSS_AH67
VSS_AJ15
VSS_AJ18
VSS_AJ20
VSS_AJ4
VSS_AK11
VSS_AK16
VSS_AK18
VSS_AK21
VSS_AK22
VSS_AK27
VSS_AK63
VSS_AK68
VSS_AK69
VSS_AK8
VSS_AL2
VSS_AL28
VSS_AL32
VSS_AL35
VSS_AL38
VSS_AL4
VSS_AL45
VSS_AL48
VSS_AL52
VSS_AL55
VSS_AL58
VSS_AL64
*SKL_ULT
REV = 1
GND 1 OF 3
Need apply PN
?
VSS_AL65
VSS_AL66
VSS_AM13
VSS_AM21
VSS_AM25
VSS_AM27
VSS_AM43
VSS_AM45
VSS_AM46
VSS_AM55
VSS_AM66
VSS_AM61
VSS_AM68
VSS_AM71
VSS_AM8
VSS_AN20
VSS_AN23
VSS_AN28
VSS_AN30
VSS_AN32
VSS_AN33
VSS_AN35
VSS_AN37
VSS_AN38
VSS_AN40
VSS_AN42
VSS_AN58
VSS_AN63
VSS_AP10
VSS_AP18
VSS_AP20
VSS_AP23
VSS_AP28
VSS_AP32
VSS_AP35
VSS_AP38
VSS_AP42
VSS_AP58
VSS_AP63
VSS_AP68
VSS_AP70
VSS_AR11
VSS_AR15
VSS_AR16
VSS_AR20
VSSAR23
VSS_AR28
VSS_AR35
VSS_AR42
VSS_AR43
VSS_AR45
VSS_AR46
VSS_AR48
VSS_AR5
VSS_AR50
VSS_AR52
VSS_AR53
VSS_AR55
VSS_AR58
VSS_AR63
VSS_AR8
VSS_AT2
VSS_AT20
VSS_AT23
VSS_AT28
VSS_AT35
VSS_AT4
VSS_AT42
VSS_AT56
VSS_AT58
16 OF 20
?
AL65
AL66
AM13
AM21
AM25
AM27
AM43
AM45
AM46
AM55
AM60
AM61
AM68
AM71
AM8
AN20
AN23
AN28
AN30
AN32
AN33
AN35
AN37
AN38
AN40
AN42
AN58
AN63
AP10
AP18
AP20
AP23
AP28
AP32
AP35
AP38
AP42
AP58
AP63
AP68
AP70
AR11
AR15
AR16
AR20
AR23
AR28
AR35
AR42
AR43
AR45
AR46
AR48
AR5
AR50
AR52
AR53
AR55
AR58
AR63
AR8
AT2
AT20
AT23
AT28
AT35
AT4
AT42
AT56
AT58
U1R
?
D D
C C
B B
SKL_ULT
GND 3 OF 3
F8
VSS_F8
G10
VSS_G10
G22
VSS_G22
G43
VSS_G43
G45
VSS_G45
G48
VSS_G48
G5
VSS_G5
G52
VSS_G52
G55
VSS_G55
G58
VSS_G58
G6
VSS_G6
G60
VSS_G60
G63
VSS_G63
G66
VSS_G66
H15
VSS_H15
H18
VSS_H18
H71
VSS_H71
J11
VSS_J11
J13
VSS_J13
J25
VSS_J25
J28
VSS_J28
J32
VSS_J32
J35
VSS_J35
J38
VSS_J38
J42
VSS_J42
J8
VSS_J8
K16
VSS_K16
K18
VSS_K18
K22
VSS_K22
K61
VSS_K61
K63
VSS_K63
K64
VSS_K64
K65
VSS_K65
K66
VSS_K66
K67
VSS_K67
K68
VSS_K68
K70
VSS_K70
K71
VSS_K71
L11
VSS_L11
L16
VSS_L16
L17
VSS_L17
18 OF 20
*SKL_ULT
REV = 1
VSS_L18
VSS_L2
VSS_L20
VSS_L4
VSS_L8
VSS_N10
VSS_N13
VSS_N19
VSS_N21
VSS_N6
VSS_N65
VSS_N68
VSS_P17
VSS_P19
VSS_P20
VSS_P21
VSS_R13
VSS_R6
VSS_T15
VSS_T17
VSS_T18
VSS_T2
VSS_T21
VSS_T4
VSS_U10
VSS_U63
VSS_U64
VSS_U66
VSS_U67
VSS_U69
VSS_U70
VSS_V16
VSS_V17
VSS_V18
VSS_W13
VSS_W6
VSS_W9
VSS_Y17
VSS_Y19
VSS_Y20
VSS_Y21
L18
L2
L20
L4
L8
N10
N13
N19
N21
N6
N65
N68
P17
P19
P20
P21
R13
R6
T15
T17
T18
T2
T21
T4
U10
U63
U64
U66
U67
U69
U70
V16
V17
V18
W13
W6
W9
Y17
Y19
Y20
Y21
?
AT63
AT68
AT71
AU10
AU15
AU20
AU32
AU38
AV68
AV69
AV70
AV71
AW10
AW12
AW14
AW16
AW18
AW21
AW23
AW26
AW28
AW30
AW32
AW34
AW36
AW38
AW41
AW43
AW45
AW47
AW49
AW51
AW53
AW55
AW57
AW6
AW60
AW62
AW64
AW66
AW8
AY66
BA10
BA14
BA18
BA23
BA28
BA32
BA36
BA45
AV1
B10
B14
B18
B22
B30
B34
B39
B44
B48
B53
B58
B62
B66
B71
BA1
BA2
F68
U1Q
SKL_ULT
GND 2 OF 3
VSS_AT63
VSS_AT68
VSS_AT71
VSS_AU10
VSS_AU15
VSS_AU20
VSS_AU32
VSS_AU38
VSS_AV1
VSS_AV68
VSS_AV69
VSS_AV70
VSS_AV71
VSS_AW10
VSS_AW12
VSS_AW14
VSS_AW16
VSS_AW18
VSS_AW21
VSS_AW23
VSS_AW26
VSS_AW28
VSS_AW30
VSS_AW32
VSS_AW34
VSS_AW36
VSS_AW38
VSS_AW41
VSS_AW43
VSS_AW45
VSS_AW47
VSS_AW49
VSS_AW51
VSS_AW53
VSS_AW55
VSS_AW57
VSS_AW6
VSS_AW60
VSS_AW62
VSS_AW64
VSS_AW66
VSS_AW8
VSS_AY66
VSS_B10
VSS_B14
VSS_B18
VSS_B22
VSS_B30
VSS_B34
VSS_B39
VSS_B44
VSS_B48
VSS_B53
VSS_B58
VSS_B62
VSS_B66
VSS_B71
VSS_BA1
VSS_BA10
VSS_BA14
VSS_BA18
VSS_BA2
VSS_BA23
VSS_BA28
VSS_BA32
VSS_BA36
VSS_F68
VSS_BA45
*SKL_ULT
REV = 1
?
17 OF 20
Need apply PN Need apply PN
VSS_BA49
VSS_BA53
VSS_BA57
VSS_BA6
VSS_BA62
VSS_BA66
VSS_BA71
VSS_BB18
VSS_BB26
VSS_BB30
VSS_BB34
VSS_BB38
VSS_BB43
VSS_BB55
VSS_BB6
VSS_BB60
VSS_BB64
VSS_BB67
VSSBB70
VSS_C25
VSS_D10
VSS_D11
VSS_D14
VSS_D18
VSS_D22
VSS_D25
VSS_D26
VSS_D30
VSS_D34
VSS_D39
VSS_D44
VSS_D45
VSS_D47
VSS_D48
VSS_D53
VSS_D58
VSS_D62
VSS_D66
VSS_D69
VSS_E11
VSS_E15
VSS_E18
VSS_E21
VSS_E46
VSS_E50
VSS_E53
VSS_E56
VSS_E65
VSS_E71
VSS_F13
VSS_F22
VSS_F23
VSS_F27
VSS_F28
VSS_F32
VSS_F33
VSS_F35
VSS_F37
VSS_F38
VSS_F40
VSS_F42
VSS_BA41
VSS_C1
VSS_C5
VSS_D6
VSS_E6
VSS_F1
VSS_F2
VSS_F4
BOM
BA49
BA53
BA57
BA6
BA62
BA66
BA71
BB18
BB26
BB30
BB34
BB38
BB43
BB55
BB6
BB60
BB64
BB67
BB70
C1
C25
C5
D10
D11
D14
D18
D22
D25
D26
D30
D34
D39
D44
D45
D47
D48
D53
D58
D6
D62
D66
D69
E11
E15
E18
E21
E46
E50
E53
E56
E6
E65
E71
F1
F13
F2
F22
F23
F27
F28
F32
F33
F35
F37
F38
F4
F40
F42
BA41
?
A A
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
08 -- SKYLAKE 7/15 (GND)
08 -- SKYLAKE 7/15 (GND)
NB5
NB5
5
4
3
2
NB5
08 -- SKYLAKE 7/15 (GND)
Date: Sheet
Date: Sheet
Date: Sheet
1
85 1 Wednesday, March 08, 2017
85 1 Wednesday, March 08, 2017
85 1 Wednesday, March 08, 2017
1A
1A
1A
1A
1A
1A
of
of
of
Page 9
5
4
3
2
1
09
?
U1S
E68
AL25
AL27
BA70
BA68
G69
G68
G71
G70
AY2
AY1
G65
B67
D65
D67
E70
C68
D68
C67
F71
F70
H70
H69
E63
F63
E66
F66
E60
E8
D1
D3
K46
K45
C71
B70
F60
A52
J71
J68
F65
F61
E61
CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]
CFG[18]
CFG[19]
CFG_RCOMP
ITP_PMOD E
RSVD_AY2
RSVD_AY1
RSVD_D1
RSVD_D3
RSVD_K46
RSVD_K45
RSVD_AL25
RSVD_AL27
RSVD_C71
RSVD_B70
RSVD_F60
RSVD_A52
RSVD_TP_BA70
RSVD_TP_BA68
RSVD_J71
RSVD_J68
VSS_F65
VSS_G65
RSVD_F61
RSVD_E61
D D
+1.0V_DEEP_SUS
C C
R78 49.9/F_4
R79 *1K_4
MV
*
TP504
*
TP505
*
TP109
*
TP110
*
TP111
*
TP112
R9064 *0_4
1
CFG2
1
CFG3
1
CFG4
1
CFG5
1
CFG6
1
CFG7
CFG_RCOMP
SKL_ULT
RESERVED SIGNALS -1
BOM
B B
*SKL_ULT
REV = 1
19 OF 20
Need apply PN
RSVD_TP_BB68
RSVD_TP_BB69
RSVD_TP_AK13
RSVD_TP_AK12
RSVD_BB2
RSVD_BA3
RSVD_D5
RSVD_D4
RSVD_B2
RSVD_C2
RSVD_B3
RSVD_A3
RSVD_AW1
RSVD_E1
RSVD_E2
RSVD_BA4
RSVD_BB4
RSVD_A4
RSVD_C4
RSVD_A69
RSVD_B69
RSVD_AY3
RSVD_D71
RSVD_C70
RSVD_C54
RSVD_D54
VSS_AY71
RSVD_TP_AW71
RSVD_TP_AW70
PROC_SELECT#
ZVM#
MSM#
TP5
TP6
TP4
TP1
TP2
?
BB68
BB69
AK13
AK12
BB2
BA3
AU5
AT5
D5
D4
B2
C2
B3
A3
AW1
E1
E2
BA4
BB4
A4
C4
BB5
A69
B69
AY3
R80 0_4
D71
C70
C54
D54
AY4
BB3
AY71
R81 0_4
AR56
AW71
AW70
AP56
C64
R82 *100K_4
+VCCSTPLL
+1.8V_DEEP_SUS
R77 *0_4
XTAL24_IN_E3
XTAL24_OUT_C7
XTAL24_OUT_C7
C158
*1U/6.3V_4
Close to CPU
within 100mil
R9050 *0_4
R9051 *0_4
U1T
AW69
RSVD_AW69
AW68
RSVD_AW68
AU56
RSVD_AU56
AW48
RSVD_AW48
C7
RSVD_C7
U12
RSVD_U12
U11
RSVD_U11
H11
RSVD_H11
*SKL_ULT
REV = 1
XTAL24_IN_E3_R
XTAL24_OUT_C7_R
Need apply PN
?
SKL_ULT
SPARE
20 OF 20
R555
*1M_4
C444 *27P/50V_4
1
3
C555 *27P/50V_4
RSVD_F6
RSVD_E3
RSVD_C11
RSVD_B11
RSVD_A11
RSVD_D12
RSVD_C12
RSVD_F52
2
Y11
*24MHZ/20ppm
4
F6
E3
C11
B11
A11
D12
C12
F52
?
For KBL R U42
(i)Non-stuff on KBL-U
XTAL24_IN_E3
Processor Strapping
CFG3
(Physcial Debug E nable)
DFX Privacy
CFG4
(DP Presence Strap)
A A
5
The CFG signals have a default value of '1' if not terminated on the board.
1 0
Disable: Enable: Set DFX Enable in DFX interface MSR
Disable; No physical DP attached to eDP
4
Enable; An ext DP device is connected to eDP
3
CFG3
CFG4
Circuit
R83 *1K_4
R84 1K_4
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
09 -- SKYLAKE 8/15 (RSV)
09 -- SKYLAKE 8/15 (RSV)
NB5
NB5
2
NB5
09 -- SKYLAKE 8/15 (RSV)
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
95 1 Wednesday, March 08, 2017
95 1 Wednesday, March 08, 2017
95 1 Wednesday, March 08, 2017
1A
1A
1A
1A
1A
1A
Page 10
5
+3V_DEEP_SUS <4,11,12,14,15,18>
+3V <2,4,11,12,13,14,15,17,18,26,27,28,29,30,31,33,34,35,37,43,45>
+5V <26,27,28,29,33,35,36,45>
+1.0V <2,4,37,42,43>
+3VS5 <4,15,31,36,37,39,40,41,42,45,46,49>
D D
C C
4
3
2
1
10
?
U1E
PCH_SPI1_CLK
PCH_SPI1_SO
PCH_SPI1_SI
PCH_SPI_IO2
PCH_SPI_IO3
PCH_SPI_CS0#
SIO_EXT_SMI# <37>
PCI_SERR# <37>
EC_RCIN# <37>
SIO_EXT_SMI#
PCI_SERR#
AW13
SERIRQ <34,37>
AY11
AV2
SPI0_CLK
AW3
SPI0_MISO
AV3
SPI0_MOSI
AW2
SPI0_IO2
AU4
SPI0_IO3
AU3
SPI0_CS0#
AU2
SPI0_CS1#
AU1
SPI0_CS2#
M2
GPP_D1/SPI1_CLK
M3
GPP_D2/SPI1_MISO
J4
GPP_D3/SPI1_MOSI
V1
GPP_D21/SPI1_IO2
V2
GPP_D22/SPI1_IO3
M1
GPP_D0/SPI1_CS#
G3
CL_CLK
G2
CL_DATA
G1
CL_RST#
GPP_A0/RCIN#
GPP_A6/SERIRQ
REV = 1
SPI - FLASH
SPI - TOUCH
C LINK
*SKL_ULT
SKL_ULT
5
LPC
PDC
5 OF 20
Need apply PN
SMBUS, SMLINK
GPP_A14/SUS_STAT#/ ESPI_RESET#
GPP_C0/SMBCLK
GPP_C1/SMBDATA
GPP_C2/SMBALERT#
GPP_C3/SML0CLK
GPP_C4/SML0DATA
GPP_C5/SML0ALERT#
GPP_C6/SML1CLK
GPP_C7/SML1DATA
GPP_B23/SML1ALERT#/PCHHOT#
GPP_A1/LAD0/ESPI _IO0
GPP_A2/LAD1/ESPI _IO1
GPP_A3/LAD2/ESPI _IO2
GPP_A4/LAD3/ESPI _IO3
GPP_A5/LFRAME#/ESPI _CS#
GPP_A9/CLKOUT_LPC0/ESP I_CLK
GPP_A10/CLKOUT_LPC1
GPP_A8/CLKRUN#
?
R7
R8
R10
R9
W2
W1
W3
V3
AM7
AY13
BA13
BB13
AY12
BA12
BA11
AW9
AY9
AW11
SMB_PCH_CLK
SMB_PCH_DAT
SML0ALERT#
SMB_ME0_CLK
SMB_ME0_DAT
SML1ALERT#
SMB_ME1_CLK
SMB_ME1_DAT
CLK_PCI_EC_R
CLK_PCI_LPC_R
CLKRUN#
SML0ALERT# <11>
SML1ALERT# <11>
LAD0 <34,36,37>
LAD1 <34,36,37>
LAD2 <34,36,37>
LAD3 <34,36,37>
LFRAME# <34,36,37>
R85 22/F_4
R86 22/F_4
CLKRUN# <37>
R87 *0/F_4
EC2 18P/50V_4
EC3 18P/50V_4
EC4
*18P/50V_4
CLK_24M_KBC <37>
CLK_24M_DEBUG <36>
EMI(near PCH)
CLK_PCI_TPM <34>
EMI(near PCH)
GPIO Pull UP
+3V +3V_DEEP_SUS
SERIRQ
CLKRUN#
SIO_EXT_SMI#
EC_RCIN#
PCI_SERR#
B B
R88 10K_4
R90 8.2K/F_4
R92 10K_4
R94 10K_4
R96 10K_4
SMB_PCH_CLK
SMB_PCH_DAT
SMB_ME0_CLK
SMB_ME0_DAT
SMB_ME1_CLK
SMB_ME1_DAT
R89 2.2K_4
R91 2.2K_4
R93 499/F_4
R95 499/F_4
R97 1K_4
R98 1K_4
PCH SPI ROM(CLG)
Vender P/N
EON
Winbond
GigaDevice
Socket
Size
8MB
8MB
PCH_SPI_CS0#_R <37>
PCH_SPI1_CLK_R <37>
PCH_SPI1_SI_R <37>
PCH_SPI1_SO_R <37>
AKE3EZ N0Q01 ( EN25QH64 -104HIP) 8MB
AKE3EF P0N07 ( W25Q64FV SSIQ)
AKE3EG N0Q01 ( GD25B64B SIGR)
DFHS08FS023
PCH_SPI_CS0#_R
PCH_SPI1_CLK_R
PCH_SPI1_SI_R
PCH_SPI1_SO_R
need place to TOP
PCH_SPI_CS0#_R
1
*
TP17
PCH_SPI1_CLK_R
1
*
TP18
PCH_SPI1_SI_R
1
*
TP19
PCH_SPI1_SO_R
1
*
TP20
BIOS_WP#
1
*
TP21
1
*
HOLD#
TP22
PCH SPI ROM(CLG)
+3VSPI
VDD
HOLD#
VSS
R101 *0_4/S
8
+3VSPI
R105 1K_4
7
HOLD#
R107 15/F_4
4
PCH_SPI_IO3 BIOS_WP#
NB5
NB5
NB5
C160
0.1U/16V_4
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
10 -- SKYLAKE 09/15(SPI/LPC/SM)
10 -- SKYLAKE 09/15(SPI/LPC/SM)
10 -- SKYLAKE 09/15(SPI/LPC/SM)
Date: Sheet
Date: Sheet
Date: Sheet
1
of
of
of
10 51 Wednesday, March 08, 2017
10 51 Wednesday, March 08, 2017
10 51 Wednesday, March 08, 2017
1A
1A
1A
1A
1A
1A
+3V_DEEP_SUS
SI
PCH_SPI_CS0#
SMBus/Pull-up(CLG)
+3V
5
MBCLK2 <18,26,37>
MBDATA2 <18,26,37>
A A
R110 4.7K_4
+3V
SMB_RUN_DAT <17,18,26,33>
R111 4.7K_4
+3V
SMB_RUN_CLK <17,18,26,33>
5
Q3A *2N7002KDW
2
Q3B *2N7002KDW
5
Q4A 2N7002KDW
2
Q4B 2N7002KDW
3 4
6 1
3 4
6 1
SMB_ME1_CLK
SMB_ME1_DAT
+3V
SMB_PCH_DAT
SMB_PCH_CLK
CPU heat pipe local thermal sensor
DDR thermal sensor
EC
Touch Pad
XDP
DDR4
4
3
C161 1U/6.3V_4
PCH_SPI_IO2
PCH_SPI1_CLK
R108 1K_4
+3VSPI
R109 15/F_4
R102 15/F_4
R103 15/F_4
R104 15/F_4
R106 15/F_4
PCH_SPI_CS0#_R
PCH_SPI1_CLK_R
PCH_SPI1_SI_R PCH_SPI1_SI
PCH_SPI1_SO_R PCH_SPI1_SO
C159
22P/50V_4
2
U3
1
CE#
6
SCK
5
SI
2
SO
3
WP#
W25Q64FVSSIQ
AKE3EFP0N07
Page 11
5
4
3
2
1
11
D D
DESIGN NOTE:
WEAK PULL UP RESISTOR PRESENT ON THIS NET
ACZ_SPKR <14,28>
C C
B B
GSPI1_MOSI <14>
ACZ_SPKR
SML0ALERT#
GSPI1_MOSI
R112
*20K/F_4
+3V_DEEP_SUS
R115
1K_4
R117
*20K/F_4
R120
*20K/F_4
Functional Strap Definitions
TOP SWAP OVERRIDE
HIGH - TOP SWAP ENABLE
LOW-DISABLED
HIGH: LPC SELECTED FOR SYSTEM FLASH
WEAK INTERNAL PD
No Boot:
The signal has a weak internal pull-down.
0 = Disable Intel ME Crypto Transport Layer Security
(TLS) cipher suite (no confidentiality).
1 = Enable Intel ME Crypto Transport Layer Security
(TLS) cipher suite (with confidentiality). Must be
pulled up to support Intel AMT with TLS and Intel
SBA (Small Business Advantage) with TLS.
No Boot:
The signal has a weak internal pull-down.
This field determines the destination of accesses to the
BIOS memory range. Also controllable using Boot BIOS
Destination bit (Chipset Configuration Registers: Offset
3410h:Bit 10). This strap is used in conjunction with Boot
BIOS Destination Selection 0 strap.
Bit 10 Boot BIOS Destination
0 SPI
1 LPC
ACZ_SDOUT <14>
GPIO33_EC <37>
GPP_B18 <14> SML0ALERT# <10>
SML1ALERT# <10>
ACZ_SDOUT
R114 1K_4
GPP_B18
+3V_DEEP_SUS
SML1ALERT#
+3V_DEEP_SUS
R113
*4.7K_4
ACZ_SDOUT
+3V
R116
*4.7K_4
R118
10K_4
R119
*10K_4
R121
20K/F_4
No Boot:
The signal has a weak internal pull-down.
0 = Enable security measures defined in the Flash
Descriptor.
1 = Disable Flash Descriptor Security (override). This
strap should only be asserted high using external
pull-up in manufacturing/debug environments ONLY.
This function is useful when running ITP/XDP.
No Boot:
The signal has a weak internal pull-down.
0 = Disable No Reboot mode.
1 = Enable No Reboot mode
(PCH will disable the TCO
Timer system reboot feature).
This function is useful when running ITP/XDP.
No Boot:
The signal has a weak internal pull-down.
0 = LPC Is selected for EC.
1 = eSPI Is selected for EC.
A A
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
11 -- SKYLAKE 10/15(HDA)
11 -- SKYLAKE 10/15(HDA)
NB5
NB5
5
4
3
2
NB5
11 -- SKYLAKE 10/15(HDA)
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
11 51 Wednesday, March 08, 2017
11 51 Wednesday, March 08, 2017
11 51 Wednesday, March 08, 2017
1A
1A
1A
1A
1A
1A
Page 12
5
+3V <2,4,10,11,13,14,15,17,18,26,27,28,29,30,31,33,34,35,37,43,45>
+3VS5 <4,15,31,36,37,39,40,41,42,45,46,49>
+3V_DEEP_SUS <4,10,11,14,15,18>
PEG_RXN0 <19>
PEG_RXP0 <19>
PEG_TXN0 <19>
D D
dGPU
LAN
HDD/SSD
C C
ODD
WLAN
2nd SSD
B B
PEG_TXP0 <19>
PEG_RXN1 <19>
PEG_RXP1 <19>
PEG_TXN1 <19>
PEG_TXP1 <19>
PEG_RXN2 <19>
PEG_RXP2 <19>
PEG_TXN2 <19>
PEG_TXP2 <19>
PEG_RXN3 <19>
PEG_RXP3 <19>
PEG_TXN3 <19>
PEG_TXP3 <19>
PCIE_RXN6_LAN <30>
PCIE_RXP6_LAN <30>
PCIE_TXN6_LAN <30>
PCIE_TXP6_LAN <30>
SATA_RXN1 <36>
SATA_RXP1 <36>
SATA_TXN1 <36>
SATA_TXP1 <36>
SATA_RXN2 <35>
SATA_RXP2 <35>
SATA_TXN2 <35>
SATA_TXP2 <35>
PCIE_RXN5_WLAN <36>
PCIE_RXP5_WLAN <36>
PCIE_TXN5_WLAN <36>
PCIE_TXP5_WLAN <36>
+3V_DEEP_SUS
SATA_RXN3 <35>
SATA_RXP3 <35>
SATA_TXN3 <35>
SATA_TXP3 <35>
C162 0.22U/10V_4
C163 0.22U/10V_4
C168 0.22U/10V_4
C169 0.22U/10V_4
C164 0.22U/10V_4
C165 0.22U/10V_4
C167 0.22U/10V_4
C166 0.22U/10V_4
C174 0.1U/16V_4
C175 0.1U/16V_4
C172 0.1U/16V_4
C173 0.1U/16V_4
R132 10K_4
PCIE_TXN6_LAN_C
PCIE_TXP6_LAN_C
PCIE_TXN5_WLAN_C
PCIE_TXP5_WLAN_C
R131 100/F_4
PIRQA#
PEG_TXN0_C
PEG_TXP0_C
PEG_TXN1_C
PEG_TXP1_C
PEG_TXN2_C
PEG_TXP2_C
PEG_TXN3_C
PEG_TXP3_C
BB11
H13
G13
B17
A17
G11
F11
D16
C16
H16
G16
D17
C17
G15
F15
B19
A19
F16
E16
C19
D19
G18
F18
D20
C20
F20
E20
B21
A21
G21
F21
D21
C21
E22
E23
B23
A23
F25
E25
D23
C23
F5
E5
D56
D61
E28
E27
D24
C24
E30
F30
A25
B25
2016/9/7
For Base-U the SATA1B/SATA2 delete
A A
5
4
U1H
PCIE/USB3/SATA
PCIE1_RXN/USB3_5_RXN
PCIE1_RXP/USB3_5_RXP
PCIE1_TXN/USB3_5_TXN
PCIE1_TXP/USB3_5_TXP
PCIE2_RXN/USB3_6_RXN
PCIE2_RXP/USB3_6_RXP
PCIE2_TXN/USB3_6_TXN
PCIE2_TXP/USB3_6_TXP
PCIE3_RXN
PCIE3_RXP
PCIE3_TXN
PCIE3_TXP
PCIE4_RXN
PCIE4_RXP
PCIE4_TXN
PCIE4_TXP
PCIE5_RXN
PCIE5_RXP
PCIE5_TXN
PCIE5_TXP
PCIE6_RXN
PCIE6_RXP
PCIE6_TXN
PCIE6_TXP
PCIE7_RXN/SATA0_RXN
PCIE7_RXP/SATA0_RXP
PCIE7_TXN/SATA0_TXN
PCIE7_TXP/SATA0_TXP
PCIE8_RXN/SATA1A_RXN
PCIE8_RXP/SATA1A_RXP
PCIE8_TXN/SATA1A_TXN
PCIE8_TXP/SATA1A_TXP
PCIE9_RXN
PCIE9_RXP
PCIE9_TXN
PCIE9_TXP
PCIE10_RXN
PCIE10_RXP
PCIE10_TXN
PCIE10_TXP
PCIE_RCOMPN
PCIE_RCOMPP
PROC_PRDY#
PROC_PREQ#
GPP_A7/PIRQA#
PCIE11_RXN/SATA1B_RXN
PCIE11_RXP/SATA1B_RXP
PCIE11_TXN/SATA1B_TXN
PCIE11_TXP/SATA1B_TXP
PCIE12_RXN/SATA2_RXN
PCIE12_RXP/SATA2_RXP
PCIE12_TXN/SATA2_TXN
PCIE12_TXP/SATA2_TXP
*SKL_ULT
PCI-E Port Mapping Table
PCI-E Port
Port1
Port2
Port3
Port4
SKL_ULT
Function
dGPU
dGPU
dGPU
dGPU
Port5
Port6
Port7
Port8
Port9
LAN
HDD/SSD
ODD
WLAN
Port10
Port11
Port12
4
2nd SSD
?
USB2
PDC
CLK RQ Port
Port0
Port1
Port2
Port3
Port4
Port5
Need apply PN
SSIC / USB3
GPP_E0/SATAXPCIE0/SATAGP0
GPP_E1/SATAXPCIE1/SATAGP1
GPP_E2/SATAXPCIE2/SATAGP2
USB3_1_RXN
USB3_1_RXP
USB3_1_TXN
USB3_1_TXP
USB3_2_RXN/SSIC_1_RXN
USB3_2_RXP/SSIC_1_RXP
USB3_2_TXN/SSIC_1_TXN
USB3_2_TXP/SSIC_1_TXP
USB3_3_RXN/SSIC_2_RXN
USB3_3_RXP/SSIC_2_RXP
USB3_3_TXN/SSIC_2_TXN
USB3_3_TXP/SSIC_2_TXP
USB3_4_RXN
USB3_4_RXP
USB3_4_TXN
USB3_4_TXP
USB2N_1
USB2P_1
USB2N_2
USB2P_2
USB2N_3
USB2P_3
USB2N_4
USB2P_4
USB2N_5
USB2P_5
USB2N_6
USB2P_6
USB2N_7
USB2P_7
USB2N_8
USB2P_8
USB2N_9
USB2P_9
USB2N_10
USB2P_10
USB2_COMP
USB2_ID
USB2_VBUSSENSE
GPP_E9/USB2_OC0#
GPP_E10/USB2_OC1#
GPP_E11/USB2_OC2#
GPP_E12/USB2_OC3#
GPP_E4/DEVSLP0
GPP_E5/DEVSLP1
GPP_E6/DEVSLP2
GPP_E8/SATALED#
?8 OF 20 REV = 1
Function
VGA
Un-used
Un-used
WLAN
LAN
Un-used
3
H8
G8
C13
D13
J6
H6
B13
A13
J10
H10
B15
A15
E10
F10
C15
D15
AB9
AB10
AD6
AD7
AH3
AJ3
AD9
AD10
AJ1
AJ2
AF6
AF7
AH1
AH2
AF8
AF9
AG1
AG2
AH7
AH8
AB6
AG3
AG4
A9
C9
D9
B9
J1
J2
J3
H2
H3
G4
H1
USB30_RX1USB30_RX1+
USB30_TX1USB30_TX1+
USB30_RX2USB30_RX2+
USB30_TX2USB30_TX2+
USB30_RX3USB30_RX3+
USB30_TX3USB30_TX3+
USBP1USBP1+
USBP2USBP2+
USBP_CAMUSBP_CAM+
USBP3USBP3+
USBP8USBP8+
USBP6USBP6+
USBP4USBP4+
USBP7USBP7+
TP8517
Ra
R130 113/F_4
R303 1K_4
R304 1K_4
R901 *0_4/S
R134 *0_4/S
USB2_COMP
USB2_ID
USB2_VBUSSENSE
DGPU_HOLD_RST#
GPU_EVENT #
DGPU_PWR_EN
DGPU_PWROK
DEVSLP0
GC6_FB_EN
DEVSLP2
ODD_PRSN T#_R ZERO_ODD_DP#
R9062 *0_4/S
1
SATA_LED#_R
*
USB30_RX1- <31>
USB30_RX1+ <31>
USB30_TX1- <31>
USB30_TX1+ <31>
USB30_RX2- <31>
USB30_RX2+ <31>
USB30_TX2- <31>
USB30_TX2+ <31>
USB30_RX3- <32>
USB30_RX3+ <32>
USB30_TX3- <32>
USB30_TX3+ <32>
USBP1- <31>
USBP1+ <31>
USBP2- <31>
USBP2+ <31>
USBP_CAM- <27>
USBP_CAM+ <27>
USBP3- <31>
USBP3+ <31>
USBP8- <32>
USBP8+ <32>
USBP6- <31>
USBP6+ <31>
USBP4- <36>
USBP4+ <36>
USBP7- <27>
USBP7+ <27>
DGPU_HOLD_RST# <19>
DGPU_PR_EN <13,46,49>
DGPU_PWROK <37,46,48,49>
R9052 *0_4
ODD_DET < 35>
SATA_LED#
USB3.0 Port Mapping Table
USB3.0 Function
PORT-1
PORT-2
PORT-3
PORT-4
1005 Change Name from DEVSLP2 to DEVSLP0
DEVSLP0 and GC6_FB_EN SWAP
1005 GPIO35 and ACC_LED# SWAP
3
USB3.0 MB
USB3.0 MB
NC
NC
2
USB3.0
USB3.0
USB3.0 to SATA
USB3.0 Port
R970 *100K_4
USB3.0 Port
Camera
USB2.0 Port
U3 to SATA
SD
BT
Touch Screen
Type C 2017/9/8
PLACE 'Ra' WITHIN 500 MILS
FROM USB2_COMP PIN WITH
TRACE IMPEDANCE LESS THAN 0.5 OHMS
If OTG is not implemented on the platform,
then USB2_ID and USB2_VBUSSENSE should both
need check
DEVSLP0 <36>
DEVSLP2 <35>
ZERO_ODD_DP# <35>
PV
SATA_LED# <31>
be connected to ground.
R9052 for BASE U
GPU_EVENT #
DGPU_HOLD_RST#
DGPU_PWR_EN
DGPU_PWROK
SATA_LED#
GC6_FB_EN
ODD_PRSN T#_R
ODD_DET
DEVSLP0
DGPU_HOLD_RST#
USB2.0 Port Mapping Table
USB2.0 Function
PORT-1
PORT-2
PORT-3
PORT-4
PORT-5
PORT-6
PORT-7
PORT-8
PORT-9
PORT-10
2
Cobime USB3.0 MB
Cobime USB3.0 MB
Webcam
USB2.0 Small Board
USB3.0 to SATA
SD Card
WLAN (BT)
Touch Screen
NC
NC
NB5
NB5
NB5
1
12
+3V
R122 *10K_5%_4
R123 *10K_4
R124 *10K_4
R125 *10K_4
R126 10K_4
R127 *10K_4
R128 10K_4
R9063 10K_4
R8561 10K_4
R129 100K_4
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
11 -- SKYLAKE 10/15(HDA)
11 -- SKYLAKE 10/15(HDA)
11 -- SKYLAKE 10/15(HDA)
Date: Sheet
Date: Sheet
Date: Sheet
1
DIS ONLY
12 51 Wednesday, March 08, 2017
12 51 Wednesday, March 08, 2017
12 51 Wednesday, March 08, 2017
of
of
of
1A
1A
1A
1A
1A
1A
Page 13
5
4
3
2
1
+3V_RTC_2 <4,15>
+BAT_RTC
+1.8V_DEEP_SUS <9,15,41,49>
+3V <2,4,10,11,12,14,15,17,18,26,27,28,29,30,31,33,34,35,37,43,45>
?
10 OF 20
?
PDC
9 OF 20
Need apply PN
CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P
GPD8/SUSCLK
XCLK_BIASREF
TBT
Need apply PN
CSI2_CLKN0
CSI2_CLKP0
CSI2_CLKN1
CSI2_CLKP1
CSI2_CLKN2
CSI2_CLKP2
CSI2_CLKN3
CSI2_CLKP3
CSI2_COMP
GPP_D4/FLASHTRIG
EMMC
GPP_F13/EMMC_DATA0
GPP_F14/EMMC_DATA1
GPP_F15/EMMC_DATA2
GPP_F16/EMMC_DATA3
GPP_F17/EMMC_DATA4
GPP_F18/EMMC_DATA5
GPP_F19/EMMC_DATA6
GPP_F20/EMMC_DATA7
GPP_F21/EMMC_RCLK
GPP_F22/EMMC_CLK
GPP_F12/EMMC_CMD
EMMC_RCOMP
?
XTAL24_IN
XTAL24_OUT
RTCX1
RTCX2
SRTCRST#
RTCRST#
C37
D37
C32
D32
C29
D29
B26
A26
E13
B7
AP2
AP1
AP3
AN3
AN1
AN2
AM4
AM1
AM2
AM3
AP4
AT1
?
F43
E43
BA17
XTAL24_IN
E37
XTAL24_OUT
E35
XCLK_BIASREF
E42
RTC_X1
AM18
RTC_X2
AM20
SRTC_RST#
AN18
RTC_RST#
AM16
EMMC_RCOMP
R143 100/F_4
R144 200/F_4
XCLK_BIASREF
+1.0V_DEEP_SUS
R135
2.7K/F_4
R137
*60.4/F_4
CLK_REQ/Strap Pin(CLG)
PCIE_CLKREQ_VGA#
PCIE_CLKREQ_WLAN#
PCIE_CLKREQ_LAN#
PCIE_CLKREQ_CR#
PCIE_CLKREQ_SSD#
PCIE_CLKREQ5#
R136 10K_4
R138 10K_4
R139 10K_4
R140 10K_4
R141 10K_4
R142 10K_4
U1J
D D
VGA
WLAN
LAN
CLK_GFX_N <19>
CLK_GFX_P <19>
CLK_PCIE_WLANN <36>
CLK_PCIE_WLANP <36>
PCIE_CLKREQ_WLAN# <36>
CLK_PCIE_LANN <30>
CLK_PCIE_LANP <30>
PCIE_CLKREQ_LAN# <30>
1005 SWAP CLK RQ Port
CLK_VGA_N
CLK_VGA_P
PCIE_CLKREQ_VGA#
PCIE_CLKREQ_CR#
PCIE_CLKREQ_SSD#
CLK_PCIE_WLANN
CLK_PCIE_WLANP
PCIE_CLKREQ_WLAN#
CLK_PCIE_LANN
CLK_PCIE_LANP
PCIE_CLKREQ_LAN#
PCIE_CLKREQ5#
D42
CLKOUT_PCIE_N0
C42
CLKOUT_PCIE_P0
AR10
GPP_B5/SRCCLKREQ0#
B42
CLKOUT_PCIE_N1
A42
CLKOUT_PCIE_P1
AT7
GPP_B6/SRCCLKREQ1#
D41
CLKOUT_PCIE_N2
C41
CLKOUT_PCIE_P2
AT8
GPP_B7/SRCCLKREQ2#
D40
CLKOUT_PCIE_N3
C40
CLKOUT_PCIE_P3
AT10
GPP_B8/SRCCLKREQ3#
B40
CLKOUT_PCIE_N4
A40
CLKOUT_PCIE_P4
AU8
GPP_B9/SRCCLKREQ4#
E40
CLKOUT_PCIE_N5
E38
CLKOUT_PCIE_P5
AU7
GPP_B10/SRCCLKREQ5#
SKL_ULT
CLOCK SIGNALS
GPU CLK REQ
*SKL_ULT
REV = 1
A36
B36
C38
D38
C36
D36
A38
B38
C31
D31
C33
D33
A31
B31
A33
B33
A29
B29
C28
D28
A27
B27
C27
D27
U1I
CSI-2
CSI2_DN0
CSI2_DP0
CSI2_DN1
CSI2_DP1
CSI2_DN2
CSI2_DP2
CSI2_DN3
CSI2_DP3
CSI2_DN4
CSI2_DP4
CSI2_DN5
CSI2_DP5
CSI2_DN6
CSI2_DP6
CSI2_DN7
CSI2_DP7
CSI2_DN8
CSI2_DP8
CSI2_DN9
CSI2_DP9
CSI2_DN10
CSI2_DP10
CSI2_DN11
CSI2_DP11
*SKL_ULT
SKL_ULT
REV = 1
Q850
METR5213-G
PCIE_CLKREQ_VGA#
R9056
*10K_4
DIS: Stuff
UMA: No Stuff
DGPU_PR_EN <12,46,49>
C C
B B
R850 30K_1%_4
2
C850
0.47u/6.3V_4
1 3
13
+3V
RTC Clock 32.768KHz
C177 15P/50V_4
Y1
32.768KHZ/20ppm
C179 15P/50V_4
A A
RTC_X1
1 2
R147
10M_4
RTC_X2
5
RTC Circuitry(RTC)
+3V_RTC_0
+3V_RTC_0
1 2
+-
RTC Power trace width 20mils.
R150
1K_4
3 4
RTC1
RTC Battery
4
+3VPCU
+3V_RTC_1
BAT54CW-7-F
30mils
+3V_RTC_2
1
*
TP8521
R146
20K/F_4
2
3
1
D2
C181
1U/6.3V_4
R149
20K/F_4
C178
1U/6.3V_4
C182
1U/6.3V_4
R152 *0_6
RTC_RST#
SRTC_RST#
SRTC_RST# RTC_RST#
3
Q5A 2N7002KDW
Q5B 2N7002KDW
R151
10K_4
RTC_RST#
R9061 *0_4
SRTC_RST#
R153
10K_4
EC_RTC_RST <37>
PV
5
3 4
2
6 1
External Crystal
The 24 MHz (50 Ohm ESR) XTAL used for Skylake-U
needs to be replaced by 38.4 MHz (30 Ohm ESR) XTAL
for Cannonlake-U.
XTAL24_IN
XTAL24_OUT
EC_SRTC_RST <37>
2
R9048 40.2_4
R9049 40.2_4
PV
XTAL24_IN_R
XTAL24_OUT_R
R148
1M_4
NB5
NB5
NB5
C176 27P/50V_4
1
2
Y2
24MHZ/20ppm
4
3
C180 27P/50V_4
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
13 -- SKYLAKE 12/15 (CLK/EMMC)
13 -- SKYLAKE 12/15 (CLK/EMMC)
13 -- SKYLAKE 12/15 (CLK/EMMC)
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
13 51 Wednesday, March 08, 2017
13 51 Wednesday, March 08, 2017
13 51 Wednesday, March 08, 2017
1A
1A
1A
1A
1A
1A
Page 14
5
+3V <2,4,10,11,12,13,15,17,18,26,27,28,29,30,31,33,34,35,37,43,45>
+3V_DEEP_SUS <4,10,11,12,15,18>
D D
BT_OFF
PCH_TEMPALERT#
SIO_EXT_SCI#
UART2_RXD
UART2_TXD
SPK_ID
ACCEL_INTA#
C C
GPP_D9
R154 10K_4
R155 10K_4
R156 10K_4
R157 49.9K/F_4
R158 49.9K/F_4
R401 *10K_4
R159 *10K_4
R8565 10K_4
+3V_DEEP_SUS
+3V
4
U1F
AN8
GPP_B15/GSPI0_CS#
AP7
GPP_B16/GSPI0_CLK
AP8
GPP_B17/GSPI0_MISO
AR7
GPP_B18/GSPI0_MOSI
AM5
GPP_B19/GSPI1_CS#
AN7
GPP_B20/GSPI1_CLK
AP5
GPP_B21/GSPI1_MISO
AN5
GPP_B22/GSPI1_MOSI
AB1
GPP_C8/UART0_RXD
AB2
GPP_C9/UART0_TXD
W4
GPP_C10/UART0_RTS#
AB3
GPP_C11/UART0_CTS#
AD1
GPP_C20/UART2_RXD
AD2
GPP_C21/UART2_TXD
AD3
GPP_C22/UART2_RTS#
AD4
GPP_C23/UART2_CTS#
U7
GPP_C16/I2C0_SDA
U6
GPP_C17/I2C0_SCL
U8
GPP_C18/I2C1_SDA
U9
GPP_C19/I2C1_SCL
AH9
GPP_F4/I2C2_SDA
AH10
GPP_F5/I2C2_SCL
AH11
GPP_F6/I2C3_SDA
AH12
GPP_F7/I2C3_SCL
AF11
GPP_F8/I2C4_SDA
AF12
GPP_F9/I2C4_SCL
*SKL_ULT
REV = 1
1
1
1
GPP_B18
TP_INTH#_BIO S
GSPI1_MOSI
UART2_RXD
UART2_TXD
ACCEL_INTA#
SIO_EXT_SCI#
GPP_B18 <11>
TP8520*
GSPI1_MOSI <11>
TP823*
TP824*
SIO_EXT_SCI# <37>
3
Skylake (GPIO)
?
LPSS ISH
SKL_ULT
GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C4B_SDA
GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C4B_SCL
6 OF 20
Need apply PN
GPP_F10/I2C5_SDA/ISH_I2C2_SDA
GPP_F11/I2C5_SCL/ISH_I2C2_SCL
GPP_D15/ISH_UART0_RTS#
GPP_D16/ISH_UART0_CTS#/SML0BALERT#
GPP_C12/UART1_RXD/ISH_UART1_RXD
GPP_C13/UART1_TXD/ISH_UART1_TXD
GPP_C14/UART1_RTS#/ISH_UART1_RTS#
GPP_C15/UART1_CTS#/ISH_UART1_CTS#
GPP_A12/BM_BUSY#/ISH_GP6
GPP_D9
GPP_D10
GPP_D11
GPP_D12
GPP_D5/ISH_I2C0_SDA
GPP_D6/ISH_I2C0_SCL
GPP_D7/ISH_I2C1_SDA
GPP_D8/ISH_I2C1_SCL
GPP_A18/ISH_GP0
GPP_A19/ISH_GP1
GPP_A20/ISH_GP2
GPP_A21/ISH_GP3
GPP_A22/ISH_GP4
GPP_A23/ISH_GP5
P2
P3
P4
P1
M4
N3
N1
N2
AD11
AD12
U1
U2
U3
U4
AC1
AC2
AC3
AB4
AY8
BA8
BB7
BA7
AY7
AW7
AP13
?
2
PCH_TEMPALERT#
GPP_D9
SPK_ID
BT_OFF
1
14
GPP_D9 <36>
BT_OFF <36>
HDA Bus(CLG)
+3V_DEEP_SUS
ACZ_SYNC_AUDIO <28>
U1G
BA22
HDA_SYNC/I2S0_SFRM
AY22
HDA_BLK/I2S0_SCLK
BB22
HDA_SDO/I2S0_TXD
BA21
HDA_SDI0/I2S0_RXD
AY21
HDA_SDI1/I2S1_RXD
AW22
HDA_RST#/I2S1_SCLK
J5
GPP_D23/I2S_MCLK
AY20
I2S1_SFRM
AW20
I2S1_TXD
AK7
GPP_F1/I2S2_SFRM
AK6
GPP_F0/I2S2_SCLK
AK9
GPP_F2/I2S2_TXD
AK10
GPP_F3/I2S2_RXD
H5
GPP_D19/DMIC_CLK0
D7
GPP_D20/DMIC_DATA0
D8
GPP_D17/DMIC_CLK1
C8
GPP_D18/DMIC_DATA1
AW5
GPP_B14/SPKR
*SKL_ULT
3
ACZ_RST#_AUDIO <28>
ACZ_SDOUT_AUDIO <28>
BIT_CLK_AUDIO <28>
15P/50V_4
AUDIO
REV = 1
BOARD_ID0
BOARD_ID1
R169 10K_4
R171 10K_4
B B
Skylake
U
R173 10K_4
R175 *10K_4
R177 10K_4
R179 10K_4
R181 10K_4
BOARD_ID[8 :7]
BOARD_ID2
BOARD_ID3
BOARD_ID4
BOARD_ID5
BOARD_ID6
BOARD_ID7
BOARD_ID8
Model
Definition
A A
Reserve
(Default = 00)
5
00 SKL U
01 KBL U
10 Base U
11 KBL R(4+2)
R164 10K_4 R163 *10K_4
R167 *10K_4
R170 *10K_4
R172 *10K_4
R174 *10K_4
R176 10K_4
R178 *10K_4
R180 *10K_4
R182 *10K_4
ID5
Reserve
(Default = 00)
+3V_DEEP_SUS
BOARD_ID[2 :1] BOARD_ID[6 :5] BOARD_ID0 Board ID [4:3]
00 14"
01 15"
10 Reserve
11 Reserve
ACZ_SYNC
ACZ_BCLK
ACZ_SDOUT <11>
ACZ_SDIN0 <28>
ACZ_SDOUT
ACZ_SDIN0
ACZ_RST#
ID0 ID2 ID1 ID4 ID3 ID6 ID8 ID7
0 UMA
1 DIS
ACZ_SPKR <11,28>
4
ACZ_SPKR
R160 *1K_4
R161 33_4
R162 33_4
R165 33_4
R168 33_4 R166 10K_4
C183
SKL_ULT
ACZ_SYNC
ACZ_SYNC
ACZ_RST#
ACZ_SDOUT
ACZ_BCLK
?
GPP_A17/SD_PWR_EN#/ISH_GP7
7 OF 20
Need apply PN
SDIO/SDXC
GPP_G0/SD_CMD
GPP_G1/SD_DATA0
GPP_G2/SD_DATA1
GPP_G3/SD_DATA2
GPP_G4/SD_DATA3
GPP_G5/SD_CD#
GPP_G6/SD_CLK
GPP_G7/SD_WP
GPP_A16/SD_1P8_SEL
?
SD_RCOMP
GPP_F23
2
C8525
2p/50V_4
AB11
AB13
AB12
W12
W11
W10
W8
W7
BA9
BB9
AB7
AF13
ACZ_SDOUT
C8526
2p/50V_4
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
BOARD_ID5
BOARD_ID6
BOARD_ID7
BOARD_ID8
ACZ_SDIN0
ACZ_RST#
C8527
2p/50V_4
R183 200/F_4
NB5
NB5
NB5
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Num ber Rev
Size Document Num ber Rev
Size Document Num ber Rev
Custom
Custom
Custom
14 -- SKYLAKE 13/15 (GPIO)
14 -- SKYLAKE 13/15 (GPIO)
14 -- SKYLAKE 13/15 (GPIO)
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
14 51 Wednesday, March 08, 2017
14 51 Wednesday, March 08, 2017
14 51 Wednesday, March 08, 2017
1A
1A
1A
1A
1A
1A
Page 15
5
4
+3V_DEEP_SUS <4,10,11,12,14,18>
+1.0V_DEEP_SUS <9,13,41,42>
+1.8V_DEEP_SUS <9,41,49>
+BAT_RTC
+3VS5 <4,31,36,37,39,40,41,42,45,46,49>
3
2
1
15
D D
+VCCPRIM
C184 1U/6.3V_4
+1.0V_DEEP_SUS
Ca and Cb close to CPU less then 100 mils
PCH Internal VRM
+1.0V_DEEP_SUS
C C
close to CPU/1004
1 2
120/300MA
C654
2p/50V_4
L668
C653
2p/50V_4
+VCCDSW_1.0V
+1.0V_DEEP_SUS
+1.0V_DEEP_SUS
+1.0V_DEEP_SUS
+1.0V_DEEP_SUS
+3VS5
+V3.3DX_1.5DX_ADO
+3V_DEEP_SUS
+1.0V_DEEP_SUS
+3V_DEEP_SUS
+1.0V_DEEP_SUS
+1.0V_DEEP_SUS
Ca
C185 1U/6.3V_4
C187 1U/6.3V_4
C188 1U/6.3V_4
C189 1U/6.3V_4
C190 47U/6.3VS_8
C192 1U/6.3V_4
C193 1U/6.3V_4
C194 1U/6.3V_4
C196 1U/6.3V_4
C197 1U/6.3V_4
+VCCMPHYAON_1P0
+VCCAMPHYPLL_1P0
+VCCAPLL_1.0V
+VCCPRIM
+VCCSPI
+VCCSRAM_1.0V
+VCCPRIM_3.3V
+VCCPRIM_1.0V
+VCCAPLLEBB
close to CPU/1004
C203
*1U/6.3V_4
+1.0V_DEEP_SUS
C204
*22U/6.3V_6
SLP_SUS_ON <37,41,42>
+V3.3DX_1.5DX_ADO +3V
B B
C651
2p/50V_4
L666 120/300MA
1 2
C650
2p/50V_4
U1O
AB19
VCCPRIM_1P0_AB19
AB20
VCCPRIM_1P0_AB20
P18
VCCPRIM_1P0_P18
AF18
VCCPRIM_CORE_AF18
AF19
VCCPRIM_CORE_AF19
V20
VCCPRIM_CORE_V20
V21
VCCPRIM_CORE_V21
AL1
DCPDSW_1P0
K17
VCCMPHYAON_1P0_K17
L1
VCCMPHYAON_1P0_L1
N15
VCCMPHYGT_1P0_N15
N16
VCCMPHYGT_1P0_N16
N17
VCCMPHYGT_1P0_N17
P15
VCCMPHYGT_1P0_P15
P16
VCCMPHYGT_1P0_P16
K15
VCCAMPHYPLL_1P0_K15
L15
VCCAMPHYPLL_1P0_L15
V15
VCCAPLL_1P0
AB17
VCCPRIM_1P0_AB17
Y18
VCCPRIM_1P0_Y18
AD17
VCCDSW_3P3_AD17
AD18
VCCDSW_3P3_AD18
AJ17
VCCDSW_3P3_AJ17
AJ19
VCCHDA
AJ16
VCCSPI
AF20
VCCSRAM_1P0_AF20
AF21
VCCSRAM_1P0_AF21
T19
VCCSRAM_1P0_T19
T20
VCCSRAM_1P0_T20
AJ21
VCCPRIM_3P3_AJ21
AK20
VCCPRIM_1P0_AK20
N18
VCCAPLLEBB
*SKL_ULT
REV = 1
R211
*100K_4
CPU POWER 4 OF 4
C210
*10P/50V_4
SKL_ULT
2.899A
0.03A
C205
1U/6.3V_4
2.57A
0.09A
?
1.714A
15 OF 20
Need apply PN
VCCPGPPA
VCCPGPPB
VCCPGPPC
VCCPGPPD
VCCPGPPE
VCCPGPPF
VCCPGPPG
VCCPRIM_3P3_V19
VCCPRIM_1P0_T1
VCCATS_1P8
VCCRTCPRIM_3P3
VCCRTC_AK19
VCCRTC_BB14
DCPRTC
VCCCLK1
VCCCLK2
VCCCLK3
VCCCLK4
VCCCLK5
VCCCLK6
GPP_B0/CORE_VID0
GPP_B1/CORE_VID1
for DS3
R9054 0_6
U4
4
VIN#1
5
VIN#2
3
EN
*AL005245000
E
?
VOUT
GND
AK15
AG15
Y16
Y15
T16
AF16
AD15
V19
T1
AA1
AK17
AK19
BB14
BB10
A14
K19
L21
N20
L19
A10
AN11
AN13
1
2
+VCCPGPPA
+VCCPGPPB
+VCCPGPPC
+VCCPGPPD
+VCCPGPPE
+VCCPGPPF
+VCCPGPPG
+VCCPRIM_1.0V_T1
+VCCATS_1.8V
+VCCRTCPRIM_3.3V
+VCCRTC
DCPRTC
+VCCCLK1
+VCCCLK2
+VCCCLK3
+VCCCLK4
+VCCCLK5
+VCCCLK6
+3V_DEEP_SUS +3VS5
C209
0.1U/16V_4
C186 1U/6.3V_4
C191 0.1U/16V_4
Cb
C195 1U/6.3V_4
+3V_DEEP_SUS
+1.0V_DEEP_SUS
+1.8V_DEEP_SUS
R309 *0_4/S
1U/6.3V_4
1U/6.3V_4
+3V_DEEP_SUS
+3V_RTC_2
+1.0V_DEEP_SUS
C198
+VCCPGPPB +VCCPGPPC +VCCPGPPE
C206
0.1U/16V_4
C199
1U/6.3V_4
C207
20mils
C200
1U/6.3V_4
+VCCRTCPRIM_3.3V +VCCATS_1.8V +VCCRTC
C201
1U/6.3V_4
C208
1U/6.3V_4
C202
0.1U/16V_4
+3V_DEEP_SUS
+VCCPGPPA
+VCCPGPPB
+VCCPGPPC
+VCCPGPPD
+VCCPGPPE
+VCCPGPPG
+1.8V_DEEP_SUS
+VCCPGPPF
A A
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
15 -- SKYLAKE 14/15(PCH POWER)
15 -- SKYLAKE 14/15(PCH POWER)
NB5
NB5
5
4
3
2
NB5
15 -- SKYLAKE 14/15(PCH POWER)
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
15 51 Wednesday, March 08, 2017
15 51 Wednesday, March 08, 2017
15 51 Wednesday, March 08, 2017
1A
1A
1A
1A
1A
1A
Page 16
5
4
3
2
1
16
D D
C C
del XDP
B B
A A
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
5
Size Document Number Rev
16 -- SKYLAKE 15/15 XDP&APS *
16 -- SKYLAKE 15/15 XDP&APS *
NB5
NB5
4
3
2
NB5
16 -- SKYLAKE 15/15 XDP&APS *
Date: Sheet
Date: Sheet
Date: Sheet
1
16 51 Wednesday, March 08, 2017
16 51 Wednesday, March 08, 2017
16 51 Wednesday, March 08, 2017
1A
1A
1A
1A
1A
1A
of
of
of
Page 17
5
M_A_A[13:0] <3>
D D
M_A_WE# <3>
M_A_CAS# <3>
M_A_RAS# <3>
M_A_ACT# <3>
M_A_PARITY <3>
M_A_ALERT# <3>
DDR3_DRAMRST# <3,18>
PM_EXTTS#0 <18>
+1.2VSUS
R228 240_4
PM_EXTTS#0
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
1
*
TP105
1
*
TP106
C216 *0.1U/16V_4
1005 Change R228 from 10K to 240 and PU to +1.2VSUS
C C
+3V
R230
*10K_4
CHA_SA1 CHA_SA0
R233
10K_4
R231
*10K_4
CHA_SA2
R234
10K_4
5
R229
*10K_4
R232
10K_4
Follow reference board
DIMM0 SA0,1,2=LLL
B B
A A
M_A_DIM0_ODT0 <3>
M_A_DIM0_ODT1 <3>
+1.2VSUS
M_A_BS#0 <3>
M_A_BS#1 <3>
M_A_BG#0 <3>
M_A_BG#1 <3>
M_A_CS#0 <3>
M_A_CS#1 <3>
M_A_CKE0 <3>
M_A_CKE1 <3>
M_A_CLKP0 <3>
M_A_CLKN0 <3>
M_A_CLKP1 <3>
M_A_CLKN1 <3>
SMB_RUN_CLK <10,18,26,33>
SMB_RUN_DAT <10,18,26,33>
CHA_SA0
CHA_SA1
CHA_SA2
R235 *240_4
R238 *240_4
R239 *240_4
R240 *240_4
R241 *240_4
R242 *240_4
R243 *240_4
R244 *240_4
+1.2VSUS
SMB_RUN_CLK
SMB_RUN_DAT
M_A_CB0
M_A_CB1
M_A_CB2
M_A_CB3
M_A_CB4
M_A_CB5
M_A_CB6
M_A_CB7
4
JDIM1A
144
A0
133
A1
132
A2
131
A3
128
A4
126
A5
127
A6
122
A7
125
A8
121
A9
146
A10/AP
120
A11
119
A12
158
A13
151
A14/WE#
156
A15/CAS#
152
A16/RAS#
162
S2#/C0
165
S3#/C1
114
ACT#
143
PARITY
116
ALERT#
134
EVENT#
108
RESET#
150
BA0
145
BA1
115
BG0
113
BG1
149
S0#
157
S1#
109
CKE0
110
CKE1
137
CK0
139
CK0#
138
CK1
140
CK1#
155
ODT0
161
ODT1
253
SCL
254
SDA
256
SA0
260
SA1
166
SA2
92
CB0
91
CB1
101
CB2
105
CB3
88
CB4
87
CB5
100
CB6
104
CB7
12
DM0
33
DM1
54
DM2
75
DM3
178
DM4
199
DM5
220
DM6
241
DM7
96
DM8
DDR4-DIMM0_H=4.0_STD
4
3
M_A_DQ[63:0] <3>
M_A_DQ4
8
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
(260P)
DDR4 SODIMM 260 PIN
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
EZIW
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
DQS#8
+1.2VSUS
M_A_DQ0
7
M_A_DQ7
20
M_A_DQ3
21
M_A_DQ1
4
M_A_DQ5
3
M_A_DQ2
16
M_A_DQ6
17
M_A_DQ9
28
M_A_DQ12
29
M_A_DQ10
41
M_A_DQ14
42
M_A_DQ8
24
M_A_DQ13
25
M_A_DQ15
38
M_A_DQ11
37
M_A_DQ17
50
M_A_DQ21
49
M_A_DQ22
62
M_A_DQ18
63
M_A_DQ20
46
M_A_DQ16
45
M_A_DQ23
58
M_A_DQ19
59
M_A_DQ28
70
M_A_DQ24
71
M_A_DQ31
83
M_A_DQ27
84
M_A_DQ25
66
M_A_DQ29
67
M_A_DQ26
79
M_A_DQ30
80
M_A_DQ37
174
M_A_DQ33
173
M_A_DQ38
187
M_A_DQ35
186
M_A_DQ32
170
M_A_DQ36
169
M_A_DQ34
183
M_A_DQ39
182
M_A_DQ40
195
M_A_DQ43
194
M_A_DQ41
207
M_A_DQ47
208
M_A_DQ45
191
M_A_DQ44
190
M_A_DQ42
203
M_A_DQ46
204
M_A_DQ53
216
M_A_DQ52
215
M_A_DQ55
228
M_A_DQ50
229
M_A_DQ49
211
M_A_DQ48
212
M_A_DQ54
224
M_A_DQ51
225
M_A_DQ56
237
M_A_DQ60
236
M_A_DQ59
249
M_A_DQ63
250
M_A_DQ57
232
M_A_DQ61
233
M_A_DQ62
245
M_A_DQ58
246
M_A_DQSP0
13
M_A_DQSP1
34
M_A_DQSP2
55
M_A_DQSP3
76
M_A_DQSP4
179
M_A_DQSP5
200
M_A_DQSP6
221
M_A_DQSP7
242
M_A_DQSP8
97
M_A_DQSN0
11
M_A_DQSN1
32
M_A_DQSN2
53
M_A_DQSN3
74
M_A_DQSN4
177
M_A_DQSN5
198
M_A_DQSN6
219
M_A_DQSN7
240
M_A_DQSN8
95
EC7 180P/50V_4
EC8 180P/50V_4
M_A_DQSP[7:0] <3>
M_A_DQSN[7:0] <3>
+1.2VSUS DDR_VTT
2.48A
+1.2VSUS +1.2VSUS
R236
240_4
M_A_DQSP8
Place these Caps near So-Dimm0.
1uF/10uF 4pcs on each side of connector
C217 1U/6.3V_4
C219 1U/6.3V_4
C221 1U/6.3V_4
C223 1U/6.3V_4
C225 1U/6.3V_4
C227 1U/6.3V_4
C229 1U/6.3V_4
C230 1U/6.3V_4
C233 10U/6.3V_6
C235 10U/6.3V_6
C237 10U/6.3V_6
C239 10U/6.3V_6
C241 10U/6.3V_6
C243 10U/6.3V_6
C244 10U/6.3V_6
C246 10U/6.3V_6
3
R237
240_4
M_A_DQSN8
+SMDDR_VREF_DIMM
+2.5VSUS
C218 1U/6.3V_4
C220 1U/6.3V_4
C222 1U/6.3V_4
C224 1U/6.3V_4
C226 10U/6.3V_6
C228 10U/6.3V_6
C231 *0.1U/16V_4
C232 *2.2U/10V_4
C236 1U/6.3V_4
C238 1U/6.3V_4
C240 10U/6.3V_6
C242 10U/6.3V_6
+3V
C245 0.1U/16V_4
C247 2.2U/10V_4
+1.2VSUS
2
111
112
117
118
123
124
129
130
135
136
141
142
147
148
153
154
159
160
163
103
107
167
171
175
181
185
189
193
197
201
205
209
213
217
223
227
231
235
239
243
247
251
263
264
2
JDIM1B
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
1
VSS1
5
VSS2
9
VSS3
15
VSS4
19
VSS5
23
VSS6
27
VSS7
31
VSS8
35
VSS9
39
VSS10
43
VSS11
47
VSS12
51
VSS13
57
VSS14
61
VSS15
65
VSS16
69
VSS17
73
VSS18
77
VSS19
81
VSS20
85
VSS21
89
VSS22
93
VSS23
99
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS99
VSS100
DDR4-DIMM0_H=4.0_STD
SM_VREF <3>
255
VDDSPD
257
VPP1
259
VPP2
258
VTT
+SMDDR_VREF_DQ0 +SMDDR_VREF_DIMM
164
VREF_CA
2
VSS48
6
VSS49
10
VSS50
14
VSS51
18
VSS52
22
VSS53
26
VSS54
30
VSS55
36
VSS56
40
VSS57
44
VSS58
48
VSS59
52
VSS60
56
VSS61
60
VSS62
64
VSS63
68
VSS64
72
VSS65
78
VSS66
82
VSS67
86
VSS68
90
(260P)
DDR4 SODIMM 260 PIN
VSS69
94
VSS70
98
VSS71
102
VSS72
106
VSS73
168
VSS74
172
VSS75
176
VSS76
180
VSS77
184
VSS78
188
VSS79
192
VSS80
196
VSS81
202
VSS82
206
VSS83
210
VSS84
214
VSS85
218
VSS86
222
VSS87
226
VSS88
230
VSS89
234
VSS90
238
VSS91
244
VSS92
248
VSS93
252
VSS94
261
GND
262
GND1
VREF DQ0 M1 Solution
+1.2VSUS
R246 2/F_6
C234
0.022U/25V_4
R248 24.9/F_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
17
+3V
+2.5VSUS
DDR_VTT
R227 *0_6/S
+3V <2,4,10,11,12,13,14,15,18,26,27,28,29,30,31,33,34,35,37,43,45>
+1.2VSUS <3,6,18,40,42>
DDR_VTT <18,40>
+SMDDR_VREF_DIMM
R245
1K/F_4
+SMDDR_VREF_DIMM
R247
1K/F_4
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
17 -- DDR4 DIMM0-STD(4.0H)
17 -- DDR4 DIMM0-STD(4.0H)
17 -- DDR4 DIMM0-STD(4.0H)
1
17 51 Wednesday, March 08, 2017
17 51 Wednesday, March 08, 2017
17 51 Wednesday, March 08, 2017
1A
1A
1A
1A
1A
1A
Page 18
5
M_B_A[13:0] <3>
D D
C C
+3V
R250
*10K_4
CHB_SA0 CHB_SA2
R253
10K_4
Follow reference
board DIMM1
SA0,1,2=LHL
B B
R251
10K_4
CHB_SA1
R254
*10K_4
R252
*10K_4
R255
10K_4
DDR3_DRAMRST# <3,17>
M_B_WE# <3>
M_B_CAS# <3>
M_B_RAS# <3>
M_B_ACT# <3>
M_B_PARITY <3>
M_B_ALERT# <3>
PM_EXTTS#0 <17>
M_B_BS#0 <3>
M_B_BS#1 <3>
M_B_BG#0 <3>
M_B_BG#1 <3>
M_B_CS#0 <3>
M_B_CS#1 <3>
M_B_CKE0 <3>
M_B_CKE1 <3>
M_B_CLKP0 <3>
M_B_CLKN0 <3>
M_B_CLKP1 <3>
M_B_CLKN1 <3>
M_B_DIM0_ODT0 <3>
M_B_DIM0_ODT1 <3>
SMB_RUN_CLK <10,17,26,33>
SMB_RUN_DAT <10,17,26,33>
+1.2VSUS
R256 *240_4
R257 *240_4
R258 *240_4
R259 *240_4
R260 *240_4
R262 *240_4
R263 *240_4
R264 *240_4
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
*
TP107
*
TP108
PM_EXTTS#0
C248 *0.1U/16V_4
CHB_SA0
CHB_SA1
CHB_SA2
+1.2VSUS
M_B_ODT0
M_B_ODT1
M_B_CB0
M_B_CB1
M_B_CB2
M_B_CB3
M_B_CB4
M_B_CB5
M_B_CB6
M_B_CB7
JDIM2A
144
133
132
131
128
126
127
122
125
121
146
120
119
158
151
156
152
1
162
1
165
114
143
116
134
108
150
145
115
113
149
157
109
110
137
139
138
140
155
161
253
254
256
260
166
92
91
101
105
88
87
100
104
12
33
54
75
178
199
220
241
96
Co-lay for ODT
From Intel MOW, ODT directly connection to CPU
+1.2VSUS +3V_DEEP_SUS
R268
*47K/F_4
A A
DDR_VTT_CNTL <3>
5
R269
*47K/F_4
2
1 3
Q6 *DRC5144E0L
R270
*47K/F_4
4
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14/WE#
A15/CAS#
A16/RAS#
S2#/C0
S3#/C1
ACT#
PARITY
ALERT#
EVENT#
RESET#
BA0
BA1
BG0
BG1
S0#
S1#
CKE0
CKE1
CK0
CK0#
CK1
CK1#
ODT0
ODT1
SCL
SDA
SA0
SA1
SA2
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
DDR4-DIMM0_H=4.0_RVS
(260P)
DDR4 SODIMM 260 PIN
+5VPCU <38,39,45,49>
+1.2VSUS <3,6,17,40,42>
DDR_VTT <17,40>
4
8
DQ0
7
DQ1
20
DQ2
21
DQ3
4
DQ4
3
DQ5
16
DQ6
17
DQ7
28
DQ8
29
DQ9
41
DQ10
42
DQ11
24
DQ12
25
DQ13
38
DQ14
37
DQ15
50
DQ16
49
DQ17
62
DQ18
63
DQ19
46
DQ20
45
DQ21
58
DQ22
59
DQ23
70
DQ24
71
DQ25
83
DQ26
84
DQ27
66
DQ28
67
DQ29
79
DQ30
80
DQ31
174
DQ32
173
DQ33
187
DQ34
186
DQ35
170
DQ36
169
DQ37
183
DQ38
182
DQ39
195
DQ40
194
DQ41
207
DQ42
208
DQ43
191
DQ44
190
DQ45
203
DQ46
204
DQ47
216
DQ48
215
DQ49
228
DQ50
229
DQ51
211
DQ52
212
DQ53
224
DQ54
225
DQ55
237
DQ56
236
DQ57
249
DQ58
250
DQ59
232
DQ60
233
DQ61
245
DQ62
246
DQ63
13
DQS0
34
DQS1
55
DQS2
76
DQS3
179
DQS4
200
DQS5
221
DQS6
242
DQS7
97
DQS8
11
DQS#0
32
DQS#1
53
DQS#2
74
DQS#3
177
DQS#4
198
DQS#5
219
DQS#6
240
DQS#7
95
DQS#8
DDR_VTT_PG_CTRL_R <40>
+5VS5 <4,31,32,39,40,41,42,43,44,45,46,48>
+3V <2,4,10,11,12,13,14,15,17,26,27,28,29,30,31,33,34,35,37,43,45>
M_B_DQ12
M_B_DQ8
M_B_DQ11
M_B_DQ10
M_B_DQ9
M_B_DQ13
M_B_DQ15
M_B_DQ14
M_B_DQ4
M_B_DQ0
M_B_DQ3
M_B_DQ6
M_B_DQ5
M_B_DQ1
M_B_DQ2
M_B_DQ7
M_B_DQ17
M_B_DQ16
M_B_DQ18
M_B_DQ19
M_B_DQ21
M_B_DQ20
M_B_DQ22
M_B_DQ23
M_B_DQ25
M_B_DQ24
M_B_DQ30
M_B_DQ31
M_B_DQ28
M_B_DQ29
M_B_DQ26
M_B_DQ27
M_B_DQ36
M_B_DQ37
M_B_DQ39
M_B_DQ35
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ38
M_B_DQ44
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ45
M_B_DQ40
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ52
M_B_DQ55
M_B_DQ54
M_B_DQ49
M_B_DQ53
M_B_DQ50
M_B_DQ51
M_B_DQ57
M_B_DQ56
M_B_DQ58
M_B_DQ62
M_B_DQ61
M_B_DQ60
M_B_DQ59
M_B_DQ63
M_B_DQSP1
M_B_DQSP0
M_B_DQSP2
M_B_DQSP3
M_B_DQSP4
M_B_DQSP5
M_B_DQSP6
M_B_DQSP7
M_B_DQSP8
M_B_DQSN1
M_B_DQSN0
M_B_DQSN2
M_B_DQSN3
M_B_DQSN4
M_B_DQSN5
M_B_DQSN6
M_B_DQSN7
M_B_DQSN8
MBCLK2 <10,26,37>
MBDATA2 <10,26,37>
+3V
3
M_B_DQ[63:0] <3>
M_B_DQSP8
M_B_DQSN8
R261
240_4
R265
240_4
+1.2VSUS
+1.2VSUS
M_B_DQSP[7:0] <3>
M_B_DQSN[7:0] <3>
Local Thermal Sensor
DDR4 Thermal Sensor
U6
MBCLK2
MBDATA2
PM_EXTTS#0
R273 *10K/F_4
8
SCLK
7
SDA
6
ALERT#
4
OVERT#
*EMC1412-1-ACZL -TR
Need Check PN(EOD)
Main:AL001412003 EMC1412-1-ACZL-TR(98h)
2nd:AL000431014 TMP431ADGKR(98h)
3
2.48A
VCC
DXP
DXN
GND
+1.2VSUS
1
2
3
5
JDIM2B
111
VDD1
112
VDD2
117
VDD3
118
VDD4
123
VDD5
124
VDD6
129
VDD7
130
VDD8
135
VDD9
136
VDD10
141
VDD11
142
VDD12
147
VDD13
148
VDD14
153
VDD15
154
VDD16
159
VDD17
160
VDD18
163
VDD19
1
VSS1
5
VSS2
9
VSS3
15
VSS4
19
VSS5
23
VSS6
27
VSS7
31
VSS8
35
VSS9
39
VSS10
43
VSS11
47
VSS12
51
VSS13
57
VSS14
61
VSS15
65
VSS16
69
VSS17
73
VSS18
77
VSS19
81
VSS20
85
VSS21
89
VSS22
93
VSS23
99
VSS24
103
VSS25
107
VSS26
167
VSS27
171
VSS28
175
VSS29
181
VSS30
185
VSS31
189
VSS32
193
VSS33
197
VSS34
201
VSS35
205
VSS36
209
VSS37
213
VSS38
217
VSS39
223
VSS40
227
VSS41
231
VSS42
235
VSS43
239
VSS44
243
VSS45
247
VSS46
251
VSS47
263
VSS99
264
VSS100
DDR4-DIMM0_H=4.0_RVS
C279 *0.01U/50V_4
DDR_THERMDA
C281
*2200P/50V_4
DDR_THERMDC
2
255
VDDSPD
257
VPP1
259
VPP2
258
VTT
164
VREF_CA
2
VSS48
6
VSS49
10
VSS50
14
VSS51
18
VSS52
22
VSS53
26
VSS54
30
VSS55
36
VSS56
40
VSS57
44
VSS58
48
VSS59
52
VSS60
56
VSS61
60
VSS62
64
VSS63
68
VSS64
72
VSS65
78
VSS66
82
VSS67
86
VSS68
90
(260P)
DDR4 SODIMM 260 PIN
VSS69
94
VSS70
98
VSS71
102
VSS72
106
VSS73
168
VSS74
172
VSS75
176
VSS76
180
VSS77
184
VSS78
188
VSS79
192
VSS80
196
VSS81
202
VSS82
206
VSS83
210
VSS84
214
VSS85
218
VSS86
222
VSS87
226
VSS88
230
VSS89
234
VSS90
238
VSS91
244
VSS92
248
VSS93
252
VSS94
261
GND
262
GND1
+3V
+2.5VSUS
DDR_VTT
R249 *0_6/S
1uF/10uF 4pcs on each side of connector
+1.2VSUS
+1.2VSUS
SMDDR_VREF_DQ1_M1 +SMDDR_VREF_DQ1
Place these Caps near So-Dimm1.
C249 1U/6.3V_4
C251 1U/6.3V_4
C253 1U/6.3V_4
C254 1U/6.3V_4
C255 1U/6.3V_4
C257 1U/6.3V_4
C259 1U/6.3V_4
C261 1U/6.3V_4
C263 10U/6.3V_6
C265 10U/6.3V_6
C267 10U/6.3V_6
C268 10U/6.3V_6
C269 10U/6.3V_6
C270 10U/6.3V_6
C272 10U/6.3V_6
C274 10U/6.3V_6
EC9 180P/50V_4
EC10 180P/50V_4
1
18
+SMDDR_VREF_DQ1
C250 *0.1U/16V_4
C252 *2.2U/10V_4
DDR_VTT
C256 1U/6.3V_4
C258 1U/6.3V_4
C260 1U/6.3V_4
C262 1U/6.3V_4
C264 10U/6.3V_6
C266 10U/6.3V_6
+3V
C271 0.1U/16V_4
C273 2.2U/10V_4
+2.5VSUS
C275 1U/6.3V_4
C276 1U/6.3V_4
C277 10U/6.3V_6
C278 10U/6.3V_6
+1.2VSUS
VREF DQ1 M1 Solution
R266
1K/F_4
1
SMDDR_VREF_DQ1_M1
R271
1K/F_4
18 51 Wednesday, March 08, 2017
18 51 Wednesday, March 08, 2017
18 51 Wednesday, March 08, 2017
of
of
of
1A
1A
1A
1A
1A
1A
SMDDR_VREF_DQ1_M3 <3>
+3V
2
Q7
*METR3904-G
1 3
2
SMDDR_VREF_DQ1_M3
NB5
NB5
NB5
R267 2/F_6
C280
0.022U/25V_4
R272
24.9/F_4
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
18 -- DDR4 DIMM1-RVS(4.0H)
18 -- DDR4 DIMM1-RVS(4.0H)
18 -- DDR4 DIMM1-RVS(4.0H)
Date: Sheet
Date: Sheet
Date: Sheet
Page 19
19
PEG_TXP0 <12>
PEG_TXN0 <12>
PEG_TXP1 <12>
PEG_TXN1 <12>
PEG_TXP2 <12>
PEG_TXN2 <12>
PEG_TXP3 <12>
PEG_TXN3 <12>
CLK_GFX_P <13>
CLK_GFX_N <13>
R1474 1K_1%_4
PEG_TXP0
PEG_TXN0
PEG_TXP1
PEG_TXN1
PEG_TXP2
PEG_TXN2
PEG_TXP3
PEG_TXN3
CLK_GFX_P
CLK_GFX_N
TEST_PG
PEGX_RST#
AF30
AE31
AE29
AD28
AD30
AC31
AC29
AB28
AB30
AA31
AA29
W31
W29
AK30
AK32
AL27
Y28
Y30
V28
V30
U31
U29
T28
T30
R31
R29
P28
P30
N31
N29
M28
M30
K30
N10
L31
L29
U1010A
PCIE_RX0P
PCIE_RX0N
PCIE_RX1P
PCIE_RX1N
PCIE_RX2P
PCIE_RX2N
PCIE_RX3P
PCIE_RX3N
PCIE_RX4P
PCIE_RX4N
PCIE_RX5P
PCIE_RX5N
PCIE_RX6P
PCIE_RX6N
PCIE_RX7P
PCIE_RX7N
NC#V30
NC#U31
NC#U29
NC#T28
NC#T30
NC#R31
NC#R29
NC#P28
NC#P30
NC#N31
NC#N29
NC#M28
NC#M30
NC#L31
NC#L29
NC#K30
CLOCK
PCIE_REFCLKP
PCIE_REFCLKN
TEST_PG
PERSTB
MESO_S3
C_PEG_RXP0
AH30
PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
PCIE_TX4P
PCIE_TX4N
PCI EXPRESS INTERFACE
PCIE_TX5P
PCIE_TX5N
PCIE_TX6P
PCIE_TX6N
PCIE_TX7P
PCIE_TX7N
NC#W24
NC#W23
NC#V27
NC#U26
NC#U24
NC#U23
NC#T26
NC#T27
NC#T24
NC#T23
NC#P27
NC#P26
NC#P24
NC#P23
NC#M27
NC#N26
CALIBRATION
PCIE_CALR_TX
PCIE_CALR_RX
AG31
AG29
AF28
AF27
AF26
AD27
AD26
AC25
AB25
Y23
Y24
AB27
AB26
Y27
Y26
W24
W23
V27
U26
U24
U23
T26
T27
T24
T23
P27
P26
P24
P23
M27
N26
Y22
AA22
C_PEG_RXN0
C_PEG_RXP1
C_PEG_RXN1
C_PEG_RXP2
C_PEG_RXN2
C_PEG_RXP3
C_PEG_RXN3
SUN_PCIE_CALRP
SUN_PCIE_CALRN
C1179 0.22u/10V_4
C1180 0.22u/10V_4
C1190 0.22u/10V_4
C1286 0.22u/10V_4
C1500 0.22u/10V_4
C1501 0.22u/10V_4
C1502 0.22u/10V_4
C1503 0.22u/10V_4
R1493 1.69K_1%_4
R1494 1K_1%_4
PEG_RXP0 <12>
PEG_RXN0 <12>
PEG_RXP1 <12>
PEG_RXN1 <12>
PEG_RXP2 <12>
PEG_RXN2 <12>
PEG_RXP3 <12>
PEG_RXN3 <12>
+1.0V_VGA
+1.8V_VGA
+1.0V_VGA
GPU Reset Signal
PLTRST# <4,30,34,36,37>
DGPU_HOLD_RST# <12>
1.8V ( 40mA)
C1331
10U/6.3VS_6
1.0V ( 32mA)
C1118
1u/6.3V_4
C1504 *0.1u/16V_4
R1303 *0_5%_4/S
C1114
1u/6.3V_4
C1117
0.1u/16V_4
PCIE_RST#
DGPU_HIN_RST#
U1010G
AG15
NC_DP_VDDR#1
AG16
NC_DP_VDDR#2
AF16
NC_DP_VDDR#3
AG17
NC_DP_VDDR#4
AG18
NC_DP_VDDR#5
AG19
NC_DP_VDDR#6
AF14
DP_VDDR
AG20
NC_DP_VDDC#1
AG21
NC_DP_VDDC#2
AF22
NC_DP_VDDC#3
AG22
NC_DP_VDDC#4
AD14
DP_VDDC
AG14
NC_DP_VSSR#1
AH14
NC_DP_VSSR#2
AM14
NC_DP_VSSR#3
AM16
NC_DP_VSSR#4
AM18
NC_DP_VSSR#5
AF23
NC_DP_VSSR#6
AG23
NC_DP_VSSR#7
AM20
NC_DP_VSSR#8
AM22
NC_DP_VSSR#9
AM24
NC_DP_VSSR#10
AF19
NC_DP_VSSR#11
AF20
NC_DP_VSSR#12
AE14
DP_VSSR
AF17
NC_UPHYAB_DP_CALR
MESO_S3
D1500
1
2
BAT54AW-L
NC/DP POWER DP POWER
+3V_VGA
R1294
1K_1%_4
3
PEGX_RST#
R1296
100K_1%_4
NC#AE11
NC#AF11
NC#AE13
NC#AF13
NC#AG8
NC#AG10
NC#AF6
NC#AF7
NC#AF8
NC#AF9
NC#AE1
NC#AE3
NC#AG1
NC#AG6
NC#AH5
NC#AF10
NC#AG9
NC#AH8
NC#AM6
NC#AM8
NC#AG7
NC#AG11
NC#AE10
AE11
AF11
AE13
AF13
AG8
AG10
AF6
AF7
AF8
AF9
AE1
AE3
AG1
AG6
AH5
AF10
AG9
AH8
AM6
AM8
AG7
AG11
AE10
PEGX_RST# <20>
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
M1-70_S3_PCIE/DP POWER
M1-70_S3_PCIE/DP POWER
NB5
NB5
NB5
M1-70_S3_PCIE/DP POWER
Date: Sheet of
Date: Sheet of
Date: Sheet of
1A
1A
1A
1A
1A
1A
19 51 Wednesday, March 08, 2017
19 51 Wednesday, March 08, 2017
19 51 Wednesday, March 08, 2017
Page 20
20
+3V_VGA
R1304
10K_1%_4
VGA_ALERT
R1300 *0_5 %_4
R1295 *10K _1%_4
+3V_VGA
DGPU_OVT# <37>
AMD reco mmend
GPUT_DATA <37>
GPUT_CLK <37>
Thermal Solution(Close to GPU)
U1500
DGPUT_CLK
8
SMBCLK
DGPUT_DATA GPU_THERMDA
7
SMBDATA
VGA_ALERT_R
6
ALERT
4
THERM
*G781P8
Main:AL000781012 G781P8(98h)
+3V_VGA
R1305 10K_1 %_4
R1449 *10K _1%_4
R1309 *10K _1%_4
R1395 *10K _1%_4
R1520 *5. 1K_1%_4
R1601 *10K _1%_4
R1602
R1603 *10K _1%_4
R1604 *0_5%_ 4/S
R1605 *0_5%_ 4/S
C1507 8.2p/5 0V_4
C1508 8.2p/5 0V_4
*10K_1%_4
DGPU_OCP_L <46>
Q1500A
*2N7002KDW
3 4
5
2
6 1
*2N7002KDW
Q1500B
1
2
4
3
Y1500
27MHZ/10ppm
GPU_GPIO5
DGPU_TDI
DGPU_TMS
DGPU_TDO
DGPU_TCK
TESTEN
DGPU_TRSTB
PCIE_REQ_GPU#
DGPU_PROCHOT#
+3V_VGA
DGPUT_DATA
R1606 *0_5%_ 4
R1607
DGPUT_CLK
+1.8V_VGA
C1505 *0.01u/50V_ 4
1
VCC
2
DXP
3
DXN
5
GND
R1302 *10K_1% _4
R1399 *10K_1% _4
R1526 1K_1%_4
R1614
*10K_1%_4
R1615 *1K_1%_4
PEGX_RST# <19>
*4.7K_5%_4
+3V_VGA
27M-XTALI
R1608
1M_5%_4
27M-XTALO
MV
L1501
1 2
*0_HCB1608KF-121T30(120+-25%,3A)/S
C1506
*2200p/50V_4
GPU_THERMDC
C1509
*0.1u/16V_4
+3V_VGA
+3V_VGA
R1609 *4. 7K_5%_4
R1610 *4. 7K_5%_4
DGPUT_DATA
DGPUT_CLK
DGPU_PROCHOT_EC# <37>
1.8V(13mA TSVDD)
C1567
1u/6.3V_4
R17M-M1-70: Stuff
R17M-M1-30: NA
+3V_VGA
R1381 4.7 K_5%_4
R1380 4.7 K_5%_4
R1611 *0_5 %_4/S
R1612 *0_5 %_4/S
R1613 *0_5 %_4/S
R1616
10K_1%_4
+1.8V_VGA
R1065
*10K_1%_4
TP1501
TP1502
TP1503
TP1504
TP1505
TP1506
TP1507
TP1508
TP1509
TP1520
TP1521
TP1522
TP1523
TP1524
TP1525
TP1526
R1617 10K_1 %_4
R1618 10K_1 %_4
R1638 10K_1 %_4
R17M-M1-70: NA
R17M-M1-30: Stuff
DGPUT_DATA_R
DGPUT_CLK_R
GPU_GPIO5
GPU_GPIO6
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPU_SVD_JET
VGA_ALERT
TEMP_FAIL
GPU_SVC_JET
GPIO22
DGPU_PROCHOT#
GPIO30
PCIE_REQ_GPU#
DGPU_TRSTB
DGPU_TDI
DGPU_TCK
DGPU_TMS
DGPU_TDO
TESTEN
PX_EN
27M-XTALI
27M-XTALO
GPU_THERMDA
GPU_THERMDC
+1.8V_TSVDD
R1070
*10K_1%_4
U1010B
N9
DBG_DATA16
L9
DBG_DATA15
AE9
DBG_DATA14
Y11
DBG_DATA13
AE8
DBG_DATA12
AD9
DBG_DATA11
AC10
DBG_DATA10
AD7
DBG_DATA9
AC8
DBG_DATA8
AC7
DBG_DATA7
AB9
DBG_DATA6
AB8
DBG_DATA5
AB7
DBG_DATA4
AB4
DBG_DATA3
AB2
DBG_DATA2
Y8
DBG_DATA1
Y7
DBG_DATA0
W6
NC#W6
V6
NC#V6
AC5
NC#AC5
AC6
N#CAC6
AA5
NC#AA5
AA6
NC#AA6
U1
NC#U1/B P_0
U3
NC#U3/B P_1
Y6
NC#Y6
R1
SCL
R3
SDA
GENERAL PURPOSE I/O
U6
GPIO_0
U8
SMBDATA
U7
SMBCLK
T9
GPIO_5_AC_BATT
T8
PCC/GPIO_6
T7
NC_GPI O_7
P10
GPIO_8_ROMSO
P4
GPIO_9_ROMSI
P2
GPIO_10_ROMSCK
N6
NC_GPI O_11
N5
NC_GPI O_12
N3
NC_GPI O_13
N1
GPIO_15_PWRCNTL_0
M4
GPIO_16
R6
GPIO_17_THERMAL_INT
M2
GPIO_19_CTF
P8
GPIO_20_PWRCNTL_1
P7
GPIO_21
N8
GPIO_22_ROMCSB
AK10
GPIO_29
AM10
GPIO_30
N7
CLKREQB
L6
JTAG_TRSTB
L5
JTAG_TDI
L3
JTAG_TCK
L1
JTAG_TMS
K4
JTAG_TDO
K7
TESTEN
AF24
NC#AF24
W8
NC_GENE RICB
W7
NC_GENE RICD
AD10
NC_GENE RICE_ HPD4
AJ9
NC#AJ9
AL9
DBG_CNTL0
AB16
PX_EN
AC16
NC_DBG_ VREFG
AM28
XTALIN
AK28
XTALOUT
AC22
XO_IN
AB22
XO_IN2
T4
DPLUS
T2
DMINUS
R5
GPIO28_FDO
AD17
TSVDD
AC17
TSVSS
MESO_S3
DVO
I2C
PLL/CLOCK
THERMAL
NC#AF2
NC#AF4
NC#AG3
DPA
NC#AG5
NC#AH3
NC#AH1
NC#AK3
NC#AK1
NC#AK5
NC#AM3
NC#AK6
NC#AM5
DPB
NC#AJ7
NC#AH6
NC#AK8
NC#AL7
DPC
NC#W5
NC#AA1/P LL_ ANALOG_I N
NC#AA3/P LL_ ANALOG_O UT
DCM/NC_R
NC_AVSSN# AK26
NC_AVSSN# AJ25
NC_AVSSN# AG25
DAC1
NC_HSYNC
NC_VSYNC /WAK Eb
NC_RSE T
NC_AVDD
NC_AVSSQ
NC_VDD1 DI
NC_VSS1 DI
NC_SVI2 #1/G PIO_S VD
NC_SVI2 #2/G PIO_S VT
NC_SVI2 #3/G PIO_S VC
NC_GENL K_CL K
NC_GENL K_VSY NC
DAC2
NC_SW APLOC KA
NC_SW APLOC KB
DDC/AUX
NC_DDC1 CLK
NC_DDC1 DATA
NC_AUX1P
NC_AUX1N
NC_AUX2P
NC_AUX2N
NC#AE16
NC#AD16
NC_DDCV GACLK
NC_DDCV GADATA
AF2
AF4
AG3
AG5
AH3
AH1
AK3
AK1
AK5
AM3
AK6
AM5
AJ7
AH6
AK8
AL7
V4
NC#V4
U5
NC#U5
V2
NC#V2
Y4
NC#Y4
W5
Y2
NC#Y2
J8
NC#J8
AA1
AA3
R1187 *16.2K_1 %_4
R17M-M1-70: Stuff
R17M-M1-30: NA
AM26
R1269 *10K_1% _4
AK26
+3V_VGA
AL25
NC_G
AJ25
AH24
NC_B
AG25
AH26
AJ27
AD22
AG24
AE22
AE23
AD23
AM12
NC
AK12
AL11
AJ11
AL13
AJ13
AG13
AH12
PS_0
AC19
PS_0
PS_1
AD19
PS_1
PS_2
AE17
PS_2
PS_3
AE20
PS_3
TS_A
AE19
TS_A
AE6
AE5
AD2
AD4
AD13
AD11
AE16
AD16
AC1
TP1529
AC3
TP1530
For AMD tuning timing purpose
R1619 *4.7 K_5%_4
R1620
*4.7K_5%_4
R1621
*4.7K_5%_4
Level: 1.8V
GPU_SVD
GPU_SVT
GPU_SVC
Level: 3.3V
GPU_SVD_JET
GPU_SVC_JET
R1251 *0_5 %_4
R17M-M1-70: NA
R17M-M1-30: Stuff
TP1527
321
Q1501
*2N7002K
R17M-M1-70: Stuff
R17M-M1-30: NA
R1207 *0_5 %_4
R1201 *0_5 %_4
R1204 *0_5 %_4
R17M-M1-70: Stuff
R17M-M1-30: NA
R1635 0_5% _4
R1637 0_5% _4
R17M-M1-70: NA
R17M-M1-30: Stuff
+1.8V_VGA
PS_0
+1.8V_VGA
PS_2
000
Micron
001
010
Hynix H5TC4G63EFR-N0C
011
100
101
Hynix H5TC4G63EFR-N0C 3.24K 5.62K
TP1528
SVI2_DATA
SVI2_DATA < 46>
SVI2_SVT <46>
SVI2_CLK
SVI2_CLK < 46>
Level Setting by Power BOM!!
SVI2_DATA
SVI2_CLK
+3V_VGA
R1639
10K_1%_2
GPU_SVD_JET
GPU_SVC_JET
R1642
*10K_1%_2
R1246
8.45K_1%_4
PS0 => 11001 (BIT5~1)
R1256
C1153
2K_1%_4
*0.01u/50V_4
R1244
*0_5%_4
PS2 => 11000 (BIT5~1)
C1151
R1254
*0.68U/4V_4
4.75K_1%_4
Vendor Type Vendor P/N PS_3[3:1]
For R17M-M1-30 debug
+1.8V_VGA
R1640
*10K_1%_2
3 4
6 1
R1641
+1.8V_VGA
10K_1%_2
+1.8V_VGA
R1492
8.45K_1%_4
PS1 => 11001 (BIT5~1)
PS_1
R1491
2K_1%_4
+1.8V_VGA
R1245
3.24K_1%_4
PS3 => 11000 (BIT5~1)
PS_3
R1255
5.62K_1%_4
256Mx16 *4
256Mx16 *4 K4W4G1646E-BC1A Samsung
256Mx16 *4
256Mx16 *8
256Mx16 *8 Samsung K4W4G1646E-BC1A
256Mx16 *8
5
Q1502A
*DMN5L06DWK-7
Q1502B
*DMN5L06DWK-7
2
MT41J256M16LY-091G:N
MT41J256M16LY-091G:N Micron
SVI2_DATA
SVI2_CLK
C1376
*0.082u/16V_4
C1152
*0.01u/50V_4
4.75K CS24752FB12
8.45K CS28452FB12
4.53K CS24532FB08
2.00K CS22002FB19
6.98K CS26982FB01
4.99K CS24992FB26
PU PD
NC 4.75K
8.45K 2.00K
4.53K 2.00K
6.98K
4.99K
4.53K
4.99K
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
M1-70_S3_MAIN
M1-70_S3_MAIN
NB5
NB5
NB5
M1-70_S3_MAIN
Date: Sheet of
Date: Sheet of
Date: Sheet of
1A
1A
1A
1A
1A
1A
20 51 Wednesday, March 08, 2017
20 51 Wednesday, March 08, 2017
20 51 Wednesday, March 08, 2017
Page 21
AA27
AB24
AB32
AC24
AC26
AC27
AD25
AD32
AE27
AF32
AG27
AH32
K28
K32
L27
M32
N25
N27
P25
P32
R27
T25
T32
U25
U27
V32
W25
W26
W27
Y25
Y32
N11
N13
N16
N18
N21
R12
R15
R17
R20
T13
T16
T18
T21
U15
U17
U20
V13
V16
V18
Y10
Y15
Y17
Y20
AA11
M12
V11
M6
P6
P9
T6
U9
U1010E
PCIE_VSS#1
PCIE_VSS#2
PCIE_VSS#3
PCIE_VSS#4
PCIE_VSS#5
PCIE_VSS#6
PCIE_VSS#7
PCIE_VSS#8
PCIE_VSS#9
PCIE_VSS#10
PCIE_VSS#11
PCIE_VSS#12
PCIE_VSS#13
PCIE_VSS#14
PCIE_VSS#15
PCIE_VSS#16
PCIE_VSS#17
PCIE_VSS#18
PCIE_VSS#19
PCIE_VSS#20
PCIE_VSS#21
PCIE_VSS#22
PCIE_VSS#23
PCIE_VSS#24
PCIE_VSS#25
PCIE_VSS#26
PCIE_VSS#27
PCIE_VSS#28
PCIE_VSS#29
PCIE_VSS#30
PCIE_VSS#31
GND#56
GND#57
GND#58
GND#59
GND#60
GND#61
GND#62
GND#63
GND#64
GND#65
GND#66
GND#67
GND#68
GND#69
GND#70
GND#71
GND#72
GND#73
GND#74
GND#75
GND#76
GND#77
GND#78
GND#79
GND#80
GND#81
GND#82
GND#83
GND#86
GND#87
GND#88
GND
GND#1
GND#2
GND#3
GND#4
GND#5
GND#6
GND#7
GND#8
GND#9
GND#10
GND#11
GND#12
GND#13
GND#14
GND#15
GND#16
GND#17
GND#18
GND#19
GND#20
GND#21
GND#22
GND#23
GND#24
GND#25
GND#26
GND#27
GND#28
GND#29
GND#30
GND#31
GND#32
GND#33
GND#34
GND#35
GND#36
GND#37
GND#38
GND#39
GND#40
GND#41
GND#42
GND#43
GND#44
GND#45
GND#46
GND#47
GND#48
GND#49
GND#50
GND#51
GND#52
GND#53
GND#54
GND#55
GND#84
GND#85
VSS_MECH#1
VSS_MECH#2
VSS_MECH#3
A3
A30
AA13
AA16
AB10
AB15
AB6
AC9
AD6
AD8
AE7
AG12
AH10
AH28
B10
B12
B14
B16
B18
B20
B22
B24
B26
B6
B8
C1
C32
E28
F10
F12
F14
F16
F18
F2
F20
F22
F24
F26
F6
F8
G10
G27
G31
G8
H14
H17
H2
H20
H6
J27
J31
K11
K2
K22
K6
T11
R11
A32
AM1
AM32
U1010F
LVDS CONTROL
NC_UPHYAB_TMDPA_TX0N
NC_UPHYAB_TMDPA_TX0P
NC_UPHYAB_TMDPA_TX1N
NC_UPHYAB_TMDPA_TX1P
NC_UPHYAB_TMDPA_TX2N
NC_UPHYAB_TMDPA_TX2P
NC_UPHYAB_TMDPA_TX3N
NC_UPHYAB_TMDPA_TX3P
TMDP
NC_UPHYAB_TMDPB_TX0N
NC_UPHYAB_TMDPB_TX0P
NC_UPHYAB_TMDPB_TX1N
NC_UPHYAB_TMDPB_TX1P
NC_UPHYAB_TMDPB_TX2N
NC_UPHYAB_TMDPB_TX2P
NC_UPHYAB_TMDPB_TX3N
NC_UPHYAB_TMDPB_TX3P
MESO_S3
NC_TXOUT_L3P
NC_TXOUT_L3N
NC_TXOUT_U3P
NC_TXOUT_U3N
AL15
AK14
AH16
AJ15
AL17
AK16
AH18
AJ17
AL19
AK18
AH20
AJ19
AL21
AK20
AH22
AJ21
AL23
AK22
AK24
AJ23
RECOMME NDED SETTINGS
CONFIGURATION STRAPS-- SEE EACH DATABOOK FOR STRAP DETAILS
ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
THEY MUST NOT CONFLICT DURING RESET
STRAPS DESCRIPTION OF DEFAULT SETTINGS PIN
GPIO0 PCIE FULL TX OUTPUT SWING TX_PWRS_ENB
GPIO1 TX_DEEMPH_EN PCIE TRANSMITTER DE-EMPHASIS ENABLED
RSVD GPIO2 RESERVED 0
RSVD GPIO8 RESERVED 0
RSVD GPIO21 RESERVED 0
BIOS_ROM_EN
VIP_DEVICE_STRAP_ENA V2SYNC IGNORE VIP DEVICE STRAPS (Removed on Seymour/W histler)
RSVD H2SYNC RESERVED 0
RSVD GENERICC RESERVED 0
GPIO_22_ROMCSB
GPIO[13:11] ROMIDCFG(2:0)
HSYNC 0 AUD[1]
VSYNC 0 AUD[0]
ENABLE EXTERNAL BIOS ROM
SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT
SEE DATABOOK FOR DETAIL
SEE DATABOOK FOR DETAIL
0= DO NOT INSTALL RESISTOR
1 = INSTALL 3K RESISTOR
X = DESIGN D EPENDANT
NA = NOT A PPLICABLE
0
X
0 GPIO9 VGA ENABLED BIF_VGA DIS
0
01 0
0
NOTE1: AMD RESERVED CONFIGURATION STRAPS
ALLOW FOR PULLUP PADS FOR THESE STRAPS BUT DO NOT INSTALL RESISTOR. IF THESE GPIOS ARE USED,
THEY MUST KEEP "LOW" AND NOT CONFLICT DURING RESET.
H2SYNC GENERICC GPIO21
GPIO8
GPIO2
21
MESO_S3
NB5
NB5
NB5
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
M1-70_S3_GND/LVDS/Strap
M1-70_S3_GND/LVDS/Strap
M1-70_S3_GND/LVDS/Strap
Date: Sheet of
Date: Sheet of
Date: Sheet of
21 51 Wednesday, March 08, 2017
21 51 Wednesday, March 08, 2017
21 51 Wednesday, March 08, 2017
1A
1A
1A
1A
1A
1A
Page 22
22
+1.5V_VGA
1.5V ( DDR3, MVDDQ = 1.5V@2A)
C1510
10U/6.3VS_6
C1516
0.1u/16V_4
C1511
2.2u/10V_4
C1517
0.01u/50V_4
C1512
2.2u/10V_4
C1513
2.2u/10V_4
+1.8V_VGA
C1514
2.2u/10V_4
C1515
2.2u/10V_4
VDD_GPIO18 @13mA
C1518
+3V_VGA
1u/6.3V_4
VDD_GPIO33@25mA
C1519
1u/6.3V_4
Memory Phase Lock Lo op Powe r : Dedi cated a nalog p ower pin for memory PLLs 1.8V @ 90mA
+1.8V_VGA
1 2
*0_6/S
C1520
1u/6.3V_4
C1521
10U/6.3VS_6
MPV18
C1522
10U/6.3VS_6
L1502
Engine Phase Lock Loop Power : Dedicated analog power pin for engine PLL 1.8V @ 75mA
+1.8V_VGA
1 2
*0_6/S
C1523
1u/6.3V_4
C1524
10U/6.3VS_6
SPV18
L1503
Engine Phase Lock Loop Power :Dedicated digital power pin for engine PLL 0.95V @ 100mA
+1.0V_VGA
1 2
*0_6/S
L1504
+1.0V_VGA_SPV10
C1525
0.1u/16V_4
C1526
1u/6.3V_4
MPV18
SPV18
AA20
AA21
AB20
AB21
AA17
AA18
AB17
AB18
H13
H16
H19
K10
K23
K24
V12
Y12
U12
J10
J23
J24
L11
L12
L13
L20
L21
L22
U1010D
J9
K9
L8
H7
H8
J7
MESO_S3
MEM I/O
VDDR1#1
VDDR1#2
VDDR1#3
VDDR1#4
VDDR1#5
VDDR1#6
VDDR1#7
VDDR1#8
VDDR1#9
VDDR1#10
VDDR1#11
VDDR1#12
VDDR1#13
VDDR1#14
VDDR1#15
VDDR1#16
VDDR1#17
LEVEL
TRANSLATION
VDD_CT#1
VDD_CT#2
VDD_CT#3
VDD_CT#4
I/O
VDDR3#1
VDDR3#2
VDDR3#3
VDDR3#4
NC_VDDR4#1
NC_VDDR4#2
NC_VDDR4#3
PLL
MPLL_PVDD
SPLL_PVDD
SPLL_VDDC
SPLL_PVSS
PCIE_PVDD
PCIE
NC#AB23
NC#AC23
NC#AD24
NC#AE24
NC#AE25
NC#AE26
NC#AF25
NC#AG26
PCIE_VDDC#1
PCIE_VDDC#2
PCIE_VDDC#3
PCIE_VDDC#4
PCIE_VDDC#5
PCIE_VDDC#6
PCIE_VDDC#7
PCIE_VDDC#8
PCIE_VDDC#9
PCIE_VDDC#10
PCIE_VDDC#11
PCIE_VDDC#12
VDDC#1
CORE
VDDC#2
VDDC#3
POWER
VDDC#4
VDDC#5
VDDC#6
VDDC#7
VDDC#8
VDDC#9
VDDC#10
VDDC#11
VDDC#12
VDDC#13
VDDC#14
VDDC#15
VDDC#16
VDDC#17
VDDC#18
VDDC#20
VDDC#21
VDDC#22
VDDC#23
VDDC#24
VDDC#25
VDDC#26
VDDC/VARY_BL
VDDC/DIGON
VDDC/GENERICA
VDDC/GENERICC
VDDC/DDC2CLK
VDDC/DDC2DATA
VDDC/HPD1
VDDC/GPIO_1
VDDC/GPIO_2
VDDC/GPIO_18
VDDC/GPIO_14_HPD2
BIF_VDDC_1
BIF_VDDC_2
VDDCI#1
ISOLATED
VDDCI#2
CORE I/O
VDDCI#3
VDDCI#4
VDDCI#5
VDDCI#6
VDDCI#7
VDDCI#8
NC#W1/FB_VDDCI
NC#W3/FB_VSS
NC#FB_VDDC
NC#FB_VSS
AM30
AB23
AC23
AD24
AE24
AE25
AE26
AF25
AG26
L23
L24
L25
L26
M22
N22
N23
N24
R22
T22
U22
V22
AA15
N15
N17
R13
R16
R18
Y21
T12
T15
T17
T20
U13
U16
U18
V21
V15
V17
V20
Y13
Y16
Y18
AA12
M11
N12
U11
AB11
AB12
AB13
W9
AC11
AC13
AC14
U10
T10
W10
Y9
R21
U21
M13
M15
M16
M17
M18
M20
M21
N20
W1
W3
AC20
AD20
PCIE_VDDR : 1.8V @ 100mA
C1527
1u/6.3V_4
PCIE_VDDC : 0.95V @ 2.5A (GEN3.0)
C1529
1u/6.3V_4
TDP=25W/TDC=36 A/
EDC=54A(1ms)/EDP=35W(sustained)/Peak=53W(1ms)
VDDC+VDDCI: 0.85~1.1V(36A peak )( Ripple < 87.2mV)
C1536
2.2u/10V_4
C1544
2.2u/10V_4
C1552
10U/6.3VS_6
R1634 *0_5%_8
R17M-M1-70: Stuff
R17M-M1-30: NA
BIF_VDDC : 0.95V @ 1.4A
VDDCI: 0.9V~1.15V @ 5A
C1560
0.1u/16V_4
R1622 *0_5%_4
R1623 *0_5%_4
R1624 *0_5%_4
R1625 *0_5%_4
R17M-M1-70: Stuff
R17M-M1-30: NA
C1528
10U/6.3VS_6
C1530
1u/6.3V_4
C1537
2.2u/10V_4
C1545
2.2u/10V_4
C1553
10U/6.3VS_6
C1559
1u/6.3V_4
C1561
0.1u/16V_4
+VGA_CORE
+1.8V_VGA
C1531
1u/6.3V_4
C1538
2.2u/10V_4
C1546
2.2u/10V_4
C1554
10U/6.3VS_6
C1562
1u/6.3V_4
C1532
1u/6.3V_4
C1539
2.2u/10V_4
C1547
2.2u/10V_4
C1555
10U/6.3VS_6
+VGA_CORE
+1.0V_VGA
C1563
1u/6.3V_4
VGPU_CORE_SENSE <46>
VSS_GPU_SENSE <46>
C1533
1u/6.3V_4
C1540
2.2u/10V_4
C1548
2.2u/10V_4
C1556
10U/6.3VS_6
C1564
1u/6.3V_4
+1.0V_VGA
C1534
1u/6.3V_4
C1541
2.2u/10V_4
C1549
2.2u/10V_4
C1557
10U/6.3VS_6
C1535
10U/6.3VS_6
+VGA_CORE
C1543
C1542
2.2u/10V_4
2.2u/10V_4
C1551
C1550
2.2u/10V_4
2.2u/10V_4
+
C1558
*330u/2.5 V_3528H1.9
On GPU Bottom Center
+VGA_CORE
C1565
10U/6.3VS_6
C1566
10U/6.3VS_6
NB5
NB5
NB5
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
M1-70_S3_POWER
M1-70_S3_POWER
M1-70_S3_POWER
Date: Sheet
Date: Sheet
Date: Sheet
of
of
of
22 51 Wednesday, March 08, 2017
22 51 Wednesday, March 08, 2017
22 51 Wednesday, March 08, 2017
1A
1A
1A
1A
1A
1A
Page 23
VMA_ODT0 <24,25>
VMA_ODT1 <24,25>
VMA_RAS0# <24,25>
VMA_RAS1# <24,25>
VMA_CAS0# <24,25>
VMA_CAS1# <24,25>
VMA_WE0# <24,25>
VMA_WE1# <24,25>
VMA_CSA0#_0 <24>
VMA_CSA0#_1 <24,25>
VMA_CSA1#_0 <24>
VMA_CSA1#_1 <24,25>
VMA_CKE0 <24,25>
VMA_CKE1 <24,25>
VMA_CLK0 <24,25>
VMA_CLK0# <24,25>
VMA_CLK1 <24,25>
VMA_CLK1# <24,25>
VMA_WDQS[7..0] <24,25>
VMA_RDQS[7..0] <24,25>
VMA_DM[7..0] <24,25>
VMA_DQ[63..0] <24,25>
VMA_MA[15..0] <24,25>
VMA_BA0 <24,25>
VMA_BA1 <24,25>
VMA_BA2 <24,25>
R1501
40.2_1%_4
C1416
1u/6.3V_4
R1500
100_1%_4
25mm (max) 25mm (max) 5mm (max)
DRAM_RST_M <24,25>
Place all these components very close to GPU. (Within 25mm)
Keep all component close to each Other. (within 5mm)
R1459 51_5%_4
R1466 10_1%_4
C1302
120p/50V_4
VMA_ODT0
VMA_ODT1
VMA_RAS0#
VMA_RAS1#
VMA_CAS0#
VMA_CAS1#
VMA_WE0#
VMA_WE1#
VMA_CSA0#_0
VMA_CSA0#_1
VMA_CSA1#_0
VMA_CSA1#_1
VMA_CKE0
VMA_CKE1
VMA_CLK0
VMA_CLK0#
VMA_CLK1
VMA_CLK1#
VMA_WDQS[7..0]
VMA_RDQS[7..0]
VMA_DM[7..0]
VMA_DQ[63..0]
VMA_MA[15..0]
VMA_BA0
VMA_BA1
VMA_BA2
C1431
1u/6.3V_4
+1.5V_VGA +1.5V_VGA
R1510
40.2_1%_4
R1504
100_1%_4
DRAM_RST_C
R1470
4.99K_1%_4
MVREFD MVREFS
From GPU
This basic topology should be used for DRAM_RST for DDR3/GDDR5.
R1497 120_1%_4
C1002
*0.1u/16V_4
R1008
*51.1_1%_4
VMA_DQ0
VMA_DQ1
VMA_DQ2
VMA_DQ3
VMA_DQ4
VMA_DQ5
VMA_DQ6
VMA_DQ7
VMA_DQ8
VMA_DQ9
VMA_DQ10
VMA_DQ11
VMA_DQ12
VMA_DQ13
VMA_DQ14
VMA_DQ15
VMA_DQ16
VMA_DQ17
VMA_DQ18
VMA_DQ19
VMA_DQ20
VMA_DQ21
VMA_DQ22
VMA_DQ23
VMA_DQ24
VMA_DQ25
VMA_DQ26
VMA_DQ27
VMA_DQ28
VMA_DQ29
VMA_DQ30
VMA_DQ31
VMA_DQ32
VMA_DQ33
VMA_DQ34
VMA_DQ35
VMA_DQ36
VMA_DQ37
VMA_DQ38
VMA_DQ39
VMA_DQ40
VMA_DQ41
VMA_DQ42
VMA_DQ43
VMA_DQ44
VMA_DQ45
VMA_DQ46
VMA_DQ47
VMA_DQ48
VMA_DQ49
VMA_DQ50
VMA_DQ51
VMA_DQ52
VMA_DQ53
VMA_DQ54
VMA_DQ55
VMA_DQ56
VMA_DQ57
VMA_DQ58
VMA_DQ59
VMA_DQ60
VMA_DQ61
VMA_DQ62
VMA_DQ63
MVREFD
MVREFS
MEM_CAL RP0
DRAM_RST_C
CLKTESTA
CLKTESTB
C1003
*0.1u/16V_4
R1009
*51.1_1%_4
K27
J29
H30
H32
G29
F28
F32
F30
C30
F27
A28
C28
E27
G26
D26
F25
A25
C25
E25
D24
E23
F23
D22
F21
E21
D20
F19
A19
D18
F17
A17
C17
E17
D16
F15
A15
D14
F13
A13
C13
E11
A11
C11
F11
K26
J26
J25
K25
L10
A9
C9
F9
D8
E7
A7
C7
F7
A5
E5
C3
E1
G7
G6
G1
G3
J6
J1
J3
J5
K8
L7
U1010C
DQA0_0
DQA0_1
DQA0_2
DQA0_3
DQA0_4
DQA0_5
DQA0_6
DQA0_7
DQA0_8
DQA0_9
DQA0_10
DQA0_11
DQA0_12
DQA0_13
DQA0_14
DQA0_15
DQA0_16
DQA0_17
DQA0_18
DQA0_19
DQA0_20
DQA0_21
DQA0_22
DQA0_23
DQA0_24
DQA0_25
DQA0_26
DQA0_27
DQA0_28
DQA0_29
DQA0_30
DQA0_31
DQA1_0
DQA1_1
DQA1_2
DQA1_3
DQA1_4
DQA1_5
DQA1_6
DQA1_7
DQA1_8
DQA1_9
DQA1_10
DQA1_11
DQA1_12
DQA1_13
DQA1_14
DQA1_15
DQA1_16
DQA1_17
DQA1_18
DQA1_19
DQA1_20
DQA1_21
DQA1_22
DQA1_23
DQA1_24
DQA1_25
DQA1_26
DQA1_27
DQA1_28
DQA1_29
DQA1_30
DQA1_31
MVREFD A
MVREFSA
NC
MEM_CAL RP0
DRAM_RST
CLKTESTA
CLKTESTB
MESO_S3
K17
MAA0_0
J20
MAA0_1
H23
MAA0_2
G23
MAA0_3
G24
MAA0_4
H24
MAA0_5
J19
MAA0_6
K19
MAA0_7
G20
MAA0_8
L17
MAA0_9
J14
MAA1_0
K14
MAA1_1
J11
MAA1_2
J13
MAA1_3
H11
MAA1_4
G11
MAA1_5
J16
MAA1_6
L15
MAA1_7
G14
MMA1_8
L16
MAA1_9
E32
WCKA0_0
WCKA0_1
WCKA1_0
WCKA1_1
EDCA0_0
EDCA0_1
EDCA0_2
EDCA0_3
EDCA1_0
EDCA1_1
EDCA1_2
EDCA1_3
DDBIA0_0
DDBIA0_1
DDBIA0_2
DDBIA0_3
DDBIA1_0
DDBIA1_1
DDBIA1_2
DDBIA1_3
ADBIAO
ADBIA1
CLKA0
CLKA0B
CLKA1
CLKA1B
RASA0B
RASA1B
CASA0B
CASA1B
CSA0B_0
CSA0B_1
CSA1B_0
CSA1B_1
CKEA0
CKEA1
WEA0B
WEA1B
E30
A21
C21
E13
D12
E3
F4
H28
C27
A23
E19
E15
D10
D6
G5
H27
A27
C23
C19
C15
E9
C5
H4
L18
K16
H26
H25
G9
H9
G22
G17
G19
G16
H22
J22
G13
K13
K20
J17
G25
H10
WCKA0B_0
WCKA0B_1
WCKA1B_0
WCKA1B_1
MEMORY INTERFACE
VMA_MA0
VMA_MA1
VMA_MA2
VMA_MA3
VMA_MA4
VMA_MA5
VMA_MA6
VMA_MA7
VMA_MA13
VMA_MA15
VMA_MA8
VMA_MA9
VMA_MA10
VMA_MA11
VMA_MA12
VMA_BA2
VMA_BA0
VMA_BA1
VMA_MA14
VMA_DM0
VMA_DM1
VMA_DM2
VMA_DM3
VMA_DM4
VMA_DM5
VMA_DM6
VMA_DM7
VMA_RDQS0
VMA_RDQS1
VMA_RDQS2
VMA_RDQS3
VMA_RDQS4
VMA_RDQS5
VMA_RDQS6
VMA_RDQS7
VMA_WDQS0
VMA_WDQS1
VMA_WDQS2
VMA_WDQS3
VMA_WDQS4
VMA_WDQS5
VMA_WDQS6
VMA_WDQS7
VMA_ODT0
VMA_ODT1
VMA_CLK0
VMA_CLK0#
VMA_CLK1
VMA_CLK1#
VMA_RAS0#
VMA_RAS1#
VMA_CAS0#
VMA_CAS1#
VMA_CSA0#_0
VMA_CSA0#_1
VMA_CSA1#_0
VMA_CSA1#_1
VMA_CKE0
VMA_CKE1
VMA_WE0#
VMA_WE1#
NB5
NB5
NB5
23
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
M1-70_S3_MEM
M1-70_S3_MEM
M1-70_S3_MEM
Date: Sheet of
Date: Sheet of
Date: Sheet of
23 51 Wednesday, March 08, 2017
23 51 Wednesday, March 08, 2017
23 51 Wednesday, March 08, 2017
1A
1A
1A
1A
1A
1A
Page 24
5
4
3
2
1
VMA_MA[15..0] <23,25>
VMA_DM[7..0] <23,25> VMA_WDQS[7..0] <23,25>
VREFC_VMA1
C1163
0.1u/16V_4
U1013
M8
H1
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
M2
N8
M3
J7
K7
K9
K1
L2
J3
K3
L3
F3
G3
E7
D3
C7
B7
T2
J1
L1
J9
L8
L9
H5TC4G63EFR-N0C
DQL0
VREFCA
DQL1
VREFDQ
DQL2
DQL3
A0
DQL4
A1
A2
DQL5
A3
DQL6
A4
DQL7
A5
A6
A7
DQU0
A8
DQU1
A9
DQU2
A10/AP
DQU3
A11
DQU4
A12/BC
DQU5
DQU6
A13
DQU7
A14
A15
BA0
VDD#B2
BA1
VDD#D9
VDD#G7
BA2
VDD#K2
VDD#K8
VDD#N1
CK
VDD#N9
CK
VDD#R1
CKE
VDD#R9
VDDQ#A1
ODT
CS
VDDQ#A8
RAS
VDDQ#C1
CAS
VDDQ#C9
WE
VDDQ#D2
VDDQ#E9
VDDQ#F1
DQSL
VDDQ#H2
DQSL
VDDQ#H9
VSS#A9
DML
VSS#B3
DMU
VSS#E1
VSS#G8
DQSU
VSS#J2
DQSU
VSS#J8
VSS#M1
VSS#M9
VSS#P1
RESET
VSS#P9
VSS#T1
VSS#T9
NC#J1/ODT1
NC#L1/CS1
VSSQ#B1
NC#J9/CKE1
VSSQ#B9
VSSQ#D1
VSSQ#D8
ZQ
VSSQ#E2
VSSQ#E8
NC#L9/ZQ1
VSSQ#F9
VSSQ#G1
VSSQ#G9
96-BALL
SDRAM DDR3
+1.5V_VGA +1.5V_VGA +1.5V_VGA
R1268
4.99K_1%_4
R1273
4.99K_1%_4
VREFC_VMA1
VREFD_VMA1
VMA_MA0
VMA_MA1
D D
VMA_BA0 <23,25>
VMA_BA1 <23,25>
VMA_BA2 <23,25>
VMA_CLK0 <23,25>
VMA_CKE0 <23,25>
VMA_ODT0 <23,25>
VMA_CSA0#_0 <23>
VMA_CAS0# <23,25> VMA_CAS1# <23,25>
VMA_WE0# <23,25>
C C
DRAM_RST_M <23,25>
Should be 240
Ohms +- 1%
B B
VMA_MA2
VMA_MA3
VMA_MA4
VMA_MA5
VMA_MA6
VMA_MA7
VMA_MA8
VMA_MA9
VMA_MA10
VMA_MA11
VMA_MA12
VMA_MA15 VMA_MA15 VMA_MA15 VMA_MA15
VMA_RDQS1
VMA_WDQS1
VMA_DM1
VMA_DM0
VMA_RDQS0
VMA_WDQS0
VMA_ZQ1 VMA_ZQ2 VMA_ZQ3 VMA_ZQ4
R1292
240_1%_4
+1.5V_VGA
R1257
4.99K_1%_4
R1259
4.99K_1%_4
VMA_DQ[63..0] <23,25>
VMA_RDQS[7..0] <23,25>
C1165
0.1u/16V_4
U1012
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
G3
DQSL
E7
DML
D3
DMU
C7
DQSU
B7
DQSU
T2
RESET
J1
NC#J1/ODT1
L1
NC#L1/CS1
J9
NC#J9/CKE1
L8
ZQ
L9
NC#L9/ZQ1
H5TC4G63EFR-N0C
96-BALL
SDRAM DDR3
R1291
4.99K_1%_4
R1293
4.99K_1%_4
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
INT
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
C1171
0.1u/16V_4
R1272
240_1%_4
VREFC_VMA2
VREFD_VMA2
VMA_MA0
VMA_MA1
VMA_MA2
VMA_MA3
VMA_MA4
VMA_MA5
VMA_MA6
VMA_MA7
VMA_MA8
VMA_MA9
VMA_MA10
VMA_MA11
VMA_MA12
VMA_BA0
VMA_BA1
VMA_BA2
VMA_CLK0
VMA_CLK0#
VMA_CKE0
VMA_ODT0
VMA_CSA0#_0
VMA_RAS0#
VMA_CAS0#
VMA_WE0#
VMA_RDQS2
VMA_WDQS2
VMA_DM2
VMA_DM3
VMA_RDQS3
VMA_WDQS3
DRAM_RST_M
R1261
4.99K_1%_4
R1266
4.99K_1%_4
VMA_DQ8
E3
VMA_DQ14
F7
VMA_DQ10
F2
VMA_DQ13
F8
VMA_DQ9
H3
VMA_DQ12
H8
VMA_DQ11
G2
VMA_DQ15
H7
VMA_DQ5
D7
VMA_DQ3
C3
VMA_DQ6
C8
VMA_DQ2
C2
VMA_DQ4
A7
VMA_DQ1
A2
VMA_DQ7
B8
VMA_DQ0
A3
+1.5V_VGA +1.5V_VGA
B2
D9
G7
K2
K8
N1
N9
R1
R9
+1.5V_VGA +1.5V_VGA +1.5V_VGA
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
Should be 240
G1
Ohms +- 1%
G9
VREFD_VMA1 VREFC_VMA2 VREFD_VMA2
C1168
0.1u/16V_4
DDR3L
VMA_DQ18
VMA_DQ19
VMA_DQ16
VMA_DQ20
VMA_DQ21
VMA_DQ23
VMA_DQ17
VMA_DQ22
VMA_DQ31
VMA_DQ27
VMA_DQ30
VMA_DQ24
VMA_DQ28
VMA_DQ25
VMA_DQ29
VMA_DQ26
+1.5V_VGA +1.5V_VGA
VMA_CLK1 <23,25>
VMA_CLK1# <23,25> VMA_CLK0# <23,25>
+1.5V_VGA
VMA_CKE1 <23,25>
VMA_ODT1 <23,25>
VMA_CSA1#_0 <23>
VMA_RAS1# <23,25> VMA_RAS0# <23,25>
VMA_WE1# <23,25>
Should be 240
Ohms +- 1%
VREFC_VMA3
VREFD_VMA3
VMA_MA0
VMA_MA1
VMA_MA2
VMA_MA3
VMA_MA4
VMA_MA5
VMA_MA6
VMA_MA7
VMA_MA8
VMA_MA9
VMA_MA10
VMA_MA11
VMA_MA12
VMA_BA0
VMA_BA1
VMA_BA2
VMA_RDQS7
VMA_WDQS7
VMA_DM7
VMA_DM6
VMA_RDQS6
VMA_WDQS6
DRAM_RST_M DRAM_RST_M
R1191
240_1%_4
+1.5V_VGA +1.5V_VGA +1.5V_VGA +1.5V_VGA
R1197
4.99K_1%_4
R1195
4.99K_1%_4
U1008
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
BA1
BA2
CK
CK
CKE
ODT
CS
RAS
CAS
WE
DQSL
DQSL
DML
DMU
DQSU
DQSU
RESET
NC#J1/ODT1
NC#L1/CS1
NC#J9/CKE1
ZQ
NC#L9/ZQ1
96-BALL
SDRAM DDR3
H5TC4G63EFR-N0C
R1163
4.99K_1%_4
R1158
4.99K_1%_4
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
N8
M3
J7
K7
K9
K1
L2
J3
K3
L3
F3
G3
E7
D3
C7
B7
T2
J1
L1
J9
L8
L9
VREFC_VMA3 VREFD_VM A3 VREFC_VMA4 VREFD_VMA4
C1090
0.1u/16V_4
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
C1074
0.1u/16V_4
VMA_DQ59
VMA_DQ62
VMA_DQ57
VMA_DQ60
VMA_DQ58
VMA_DQ63
VMA_DQ56
VMA_DQ61
VMA_DQ52
VMA_DQ51
VMA_DQ55
VMA_DQ50
VMA_DQ54
VMA_DQ49
VMA_DQ53
VMA_DQ48
Should be 240
Ohms +- 1%
R1175
240_1%_4
VREFC_VMA4
VREFD_VMA4
VMA_MA0
VMA_MA1
VMA_MA2
VMA_MA3
VMA_MA4
VMA_MA5
VMA_MA6
VMA_MA7
VMA_MA8
VMA_MA9
VMA_MA10
VMA_MA11
VMA_MA12
VMA_MA13 VMA_MA13 VMA_MA13 VMA_MA13
VMA_MA14 VMA_MA14 VMA_MA14 VMA_MA14
VMA_BA0
VMA_BA1
VMA_BA2
VMA_CLK1
VMA_CLK1#
VMA_CKE1
VMA_ODT1
VMA_CSA1#_0
VMA_RAS1#
VMA_CAS1#
VMA_WE1#
VMA_RDQS4
VMA_WDQS4
VMA_DM4
VMA_DM5
VMA_RDQS5
VMA_WDQS5
R1196
4.99K_1%_4
R1198
4.99K_1%_4
C1093
0.1u/16V_4
U1007
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
G3
DQSL
E7
DML
D3
DMU
C7
DQSU
B7
DQSU
T2
RESET
J1
NC#J1/ODT1
L1
NC#L1/CS1
J9
NC#J9/CKE1
L8
ZQ
L9
NC#L9/ZQ1
H5TC4G63EFR-N0C
96-BALL
SDRAM DDR3
R1188
4.99K_1%_4
R1181
4.99K_1%_4
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
C1086
0.1u/16V_4
VMA_DQ34
VMA_DQ38
VMA_DQ35
VMA_DQ39
VMA_DQ32
VMA_DQ37
VMA_DQ33
VMA_DQ36
VMA_DQ47
VMA_DQ43
VMA_DQ46
VMA_DQ42
VMA_DQ44
VMA_DQ41
VMA_DQ45
VMA_DQ40
+1.5V_VGA
R1226 100_1%_4
R1236 100_1%_4
R1240 100_1%_4
R1239 100_1%_4
R1235 100_1%_4
R1234 100_1%_4
R1232 100_1%_4
R1222 100_1%_4
R1220 100_1%_4
R1216 100_1%_4
R1211 100_1%_4
R1217 100_1%_4
R1212 100_1%_4
R1225 100_1%_4
R1218 100_1%_4
R1233 100_1%_4
R1214 100_1%_4
R1229 100_1%_4
R1208 100_1%_4
R1271 100_1%_4
R1454 100_1%_4
R1512 100_1%_4
R1189 100_1%_4
R1514 100_1%_4
R1464 100_1%_4
R1283 100_1%_4
R1177 100_1%_4
R1263 100_1%_4
R1180 100_1%_4
R1626 100_1%_4
R1628 100_1%_4
R1630 100_1%_4
R1632 100_1%_4
VMA_MA0
VMA_MA1
VMA_MA2
VMA_MA3
VMA_MA4
VMA_MA5
VMA_MA6
VMA_MA7
VMA_MA8
VMA_MA9
VMA_MA10
VMA_MA11
VMA_MA12
VMA_MA13
VMA_MA14
VMA_MA15
VMA_BA0
VMA_BA1
VMA_BA2
VMA_CKE0
VMA_CKE1
VMA_ODT0
VMA_ODT1
VMA_RAS0#
VMA_RAS1#
VMA_CAS0#
VMA_CAS1#
VMA_WE0#
VMA_WE1#
VMA_CSA0#_0
VMA_CSA0#_1
VMA_CSA1#_0
VMA_CSA1#_1
R1483 100_1%_4
R1485 100_1%_4
R1487 100_1%_4
R1489 100_1%_4
R1490 100_1%_4
R1488 100_1%_4
R1486 100_1%_4
R1482 100_1%_4
R1478 100_1%_4
R1480 100_1%_4
R1473 100_1%_4
R1481 100_1%_4
R1476 100_1%_4
R1231 100_1%_4
R1219 100_1%_4
R1230 100_1%_4
R1479 100_1%_4
R1477 100_1%_4
R1475 100_1%_4
R1270 100_1%_4
R1453 100_1%_4
R1279 100_1%_4
R1193 100_1%_4
R1515 100_1%_4
R1455 100_1%_4
R1284 100_1%_4
R1178 100_1%_4
R1262 100_1%_4
R1182 100_1%_4
R1627 100_1%_4
R1629 100_1%_4
R1631 100_1%_4
R1633 100_1%_4
24
VMA_CSA0#_1
VMA_CSA1#_1
VMA_CLK0
R1286
80.6_1%_4
VMA_CLK0_COMM
R1281
80.6_1%_4
VMA_CLK0#
A A
VMA_CLK1
VMA_CLK1#
R1179
80.6_1%_4
VMA_CLK1_COMM
R1185
80.6_1%_4
5
C1170
0.01u/50V_4
Single Rank & Dual Rank :
80.6 ohm - PN: CS08062FB19
PS: 40.2 ohm - CS04022FB28
C1085
0.01u/50V_4
VMA_CSA0#_1 <23,25>
VMA_CSA1#_1 <23,25>
+1.5V_VGA
+1.5V_VGA
+1.5V_VGA
C1063
1u/6.3V_4
C1057
1u/6.3V_4
C1052
10U/6.3VS_6
C1126
1u/6.3V_4
C1060
1u/6.3V_4
C1053
10U/6.3VS_6
C1064
1u/6.3V_4
C1061
1u/6.3V_4
C1054
10U/6.3VS_6
4
+1.5V_VGA
C1154
C1065
1u/6.3V_4
1u/6.3V_4
C1062
C1270
1u/6.3V_4
1u/6.3V_4
+1.5V_VGA +1.5V_VGA +1.5V_VGA
C1055
C1081
10U/6.3VS_6
10U/6.3VS_6
C1206
1u/6.3V_4
C1076
1u/6.3V_4
C1127
10U/6.3VS_6
C1066
1u/6.3V_4
C1084
1u/6.3V_4
C1207
10U/6.3VS_6
1u/6.3V_4
C1082
1u/6.3V_4
C1208
10U/6.3VS_6
C1067
C1209
1u/6.3V_4
+1.5V_VGA
C1104
1u/6.3V_4
C1202
10U/6.3VS_6
C1155
1u/6.3V_4
C1106
1u/6.3V_4
C1203
10U/6.3VS_6
3
C1166
1u/6.3V_4
C1115
1u/6.3V_4
C1195
10U/6.3VS_6
C1199
1u/6.3V_4
C1120
1u/6.3V_4
C1196
10U/6.3VS_6
C1098
1u/6.3V_4
C1108
1u/6.3V_4
C1161
10U/6.3VS_6
C1096
1u/6.3V_4
C1139
1u/6.3V_4
C1156
10U/6.3VS_6
C1200
1u/6.3V_4
C1140
1u/6.3V_4
C1158
10U/6.3VS_6
C1201
1u/6.3V_4
C1142
1u/6.3V_4
C1164
10U/6.3VS_6
2
Micron 2G
Hynix 2G
AKD59GSTL00
AKD5PZDTW02
TOP BSQ QBCON PN
AKD59GSTL01
AKD5PGDT500 SAMSUNG 2G AKD5PGDT501
AKD5PZDTW01
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
M1-70_S3_VRAM_DDR3L BGA96
M1-70_S3_VRAM_DDR3L BGA96
NB5
NB5
NB5
M1-70_S3_VRAM_DDR3L BGA96
Date: Sheet
Date: Sheet
Date: Sheet
1
of
of
of
24 51 Wednesday, March 08, 2017
24 51 Wednesday, March 08, 2017
24 51 Wednesday, March 08, 2017
1A
1A
1A
1A
1A
1A
Page 25
5
4
3
2
1
VMA_MA[15..0] <23,24>
VMA_DM[7..0] <23,24> VMA_WDQS[7..0] <23,24>
VREFC_VMA5
VREFD_VMA5
VMA_MA0
D D
VMA_BA0 <23,24>
VMA_BA1 <23,24>
VMA_BA2 <23,24>
VMA_CLK0 <23,24>
VMA_CKE0 <23,24>
VMA_ODT0 <23,24>
VMA_CSA0#_1 <23,24>
VMA_CAS0# <23,24> VMA_CAS1# <23,24>
VMA_WE0# <23,24>
C C
DRAM_RST_M <23,24>
Should be 240
Ohms +- 1%
VMA_MA1
VMA_MA2
VMA_MA3
VMA_MA4
VMA_MA5
VMA_MA6
VMA_MA7
VMA_MA8
VMA_MA9
VMA_MA10
VMA_MA11
VMA_MA12
VMA_MA13
VMA_MA15 VMA_MA15 VMA_MA15 VMA_MA15
VMA_RDQS1
VMA_WDQS1
VMA_DM1
VMA_DM0
VMA_RDQS0
VMA_WDQS0
VMA_ZQ5 VMA_ZQ7
R1506
240_1%_4
U1027
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
G3
DQSL
E7
DML
D3
DMU
C7
DQSU
B7
DQSU
T2
RESET
J1
NC#J1/ODT1
L1
NC#L1/CS1
J9
NC#J9/CKE1
L8
ZQ
L9
NC#L9/ZQ1
H5TC4G63EFR-N0C
96-BALL
SDRAM DDR3
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
VMA_DQ[63..0] <23,24>
VMA_RDQS[7..0] <23,24>
R1282
240_1%_4
VREFC_VMA6
VREFD_VMA6
VMA_MA0
VMA_MA1
VMA_MA2
VMA_MA3
VMA_MA4
VMA_MA5
VMA_MA6
VMA_MA7
VMA_MA8
VMA_MA9
VMA_MA10
VMA_MA11
VMA_MA12
VMA_MA13
VMA_BA0
VMA_BA1
VMA_BA2
VMA_CLK0
VMA_CLK0#
VMA_CKE0
VMA_ODT0
VMA_CSA0#_1
VMA_RAS0#
VMA_CAS0#
VMA_WE0#
VMA_RDQS2
VMA_WDQS2
VMA_DM2
VMA_DM3
VMA_RDQS3
VMA_WDQS3
DRAM_RST_M
VMA_ZQ6
VMA_DQ14
E3
VMA_DQ8
F7
VMA_DQ13
F2
VMA_DQ10
F8
VMA_DQ15
H3
VMA_DQ11
H8
VMA_DQ12
G2
VMA_DQ9
H7
VMA_DQ3
D7
VMA_DQ5
C3
VMA_DQ2
C8
VMA_DQ6
C2
VMA_DQ0
A7
VMA_DQ7
A2
VMA_DQ1
B8
VMA_DQ4
A3
+1.5V_VGA +1.5V_VGA
B2
D9
G7
K2
K8
N1
N9
R1
R9
+1.5V_VGA +1.5V_VGA +1.5V_VGA
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
Should be 240
Ohms +- 1%
DDR3L
U1028
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
G3
DQSL
E7
DML
D3
DMU
C7
DQSU
B7
DQSU
T2
RESET
J1
NC#J1/ODT1
L1
NC#L1/CS1
J9
NC#J9/CKE1
L8
ZQ
L9
NC#L9/ZQ1
96-BALL
SDRAM DDR3
H5TC4G63EFR-N0C
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
25
U1024
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
G3
DQSL
E7
DML
D3
DMU
C7
DQSU
B7
DQSU
T2
RESET
J1
NC#J1/ODT1
L1
NC#L1/CS1
J9
NC#J9/CKE1
L8
ZQ
L9
NC#L9/ZQ1
H5TC4G63EFR-N0C
96-BALL
SDRAM DDR3
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
VMA_DQ62
VMA_DQ59
VMA_DQ60
VMA_DQ57
VMA_DQ61
VMA_DQ56
VMA_DQ63
VMA_DQ58
VMA_DQ51
VMA_DQ52
VMA_DQ50
VMA_DQ55
VMA_DQ48
VMA_DQ53
VMA_DQ49
VMA_DQ54
Should be 240
Ohms +- 1%
R1436
240_1%_4
VREFC_VMA7
VREFD_VMA7
VMA_MA0
VMA_MA1
VMA_MA2
VMA_MA3
VMA_MA4
VMA_MA5
VMA_MA6
VMA_MA7
VMA_MA8
VMA_MA9
VMA_MA10
VMA_MA11
VMA_MA12
VMA_MA13
VMA_BA0
VMA_BA1
VMA_BA2
VMA_RDQS7
VMA_WDQS7
VMA_DM7
VMA_DM6
VMA_RDQS6
VMA_WDQS6
DRAM_RST_M
VMA_DQ19
E3
VMA_DQ18
F7
VMA_DQ20
F2
VMA_DQ16
F8
VMA_DQ22
H3
VMA_DQ17
H8
VMA_DQ23
G2
VMA_DQ21
H7
VMA_DQ27
D7
VMA_DQ31
C3
VMA_DQ24
C8
VMA_DQ30
C2
VMA_DQ26
A7
VMA_DQ29
A2
VMA_DQ25
B8
VMA_DQ28
A3
+1.5V_VGA +1.5V_VGA
B2
D9
G7
K2
K8
N1
N9
R1
R9
+1.5V_VGA
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
INT
VMA_CLK1 <23,24>
VMA_CLK1# <23,24> VMA_CLK0# <23,24>
VMA_CKE1 <23,24>
VMA_ODT1 <23,24>
VMA_CSA1#_1 <23,24>
VMA_RAS1# <23,24> VMA_RAS0# <23,24>
VMA_WE1# <23,24>
Should be 240
Ohms +- 1%
R1465
240_1%_4
VREFC_VMA8
VREFD_VMA8
VMA_MA0
VMA_MA1
VMA_MA2
VMA_MA3
VMA_MA4
VMA_MA5
VMA_MA6
VMA_MA7
VMA_MA8
VMA_MA9
VMA_MA10
VMA_MA11
VMA_MA12
VMA_MA13
VMA_MA14 VMA_MA14 VMA_MA14 VMA_MA14
VMA_BA0
VMA_BA1
VMA_BA2
VMA_CLK1
VMA_CLK1#
VMA_CKE1
VMA_ODT1
VMA_CSA1#_1
VMA_RAS1#
VMA_CAS1#
VMA_WE1#
VMA_RDQS4
VMA_WDQS4
VMA_DM4
VMA_DM5
VMA_RDQS5
VMA_WDQS5
DRAM_RST_M
VMA_ZQ8
U1025
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
G3
DQSL
E7
DML
D3
DMU
C7
DQSU
B7
DQSU
T2
RESET
J1
NC#J1/ODT1
L1
NC#L1/CS1
J9
NC#J9/CKE1
L8
ZQ
L9
NC#L9/ZQ1
H5TC4G63EFR-N0C
96-BALL
SDRAM DDR3
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
VMA_DQ38
E3
VMA_DQ34
F7
VMA_DQ39
F2
VMA_DQ35
F8
VMA_DQ36
H3
VMA_DQ33
H8
VMA_DQ37
G2
VMA_DQ32
H7
VMA_DQ43
D7
VMA_DQ47
C3
VMA_DQ42
C8
VMA_DQ46
C2
VMA_DQ40
A7
VMA_DQ45
A2
VMA_DQ41
B8
VMA_DQ44
A3
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
+1.5V_VGA +1.5V_VGA +1.5V_VGA +1.5V_VGA
R1469
4.99K_1%_4
R1467
4.99K_1%_4
Micron 2G
Hynix 2G
C1437
1u/6.3V_4
C1128
1u/6.3V_4
C1353
10U/6.3VS_6
3
R1468
4.99K_1%_4
VREFC_VMA7 VREFD_VMA7
C1317
R1471
0.1u/16V_4
4.99K_1%_4
C1401
C1188
1u/6.3V_4
C1282
1u/6.3V_4
C1347
10U/6.3VS_6
C1187
1u/6.3V_4
C1323
1u/6.3V_4
C1348
10U/6.3VS_6
1u/6.3V_4
C1110
1u/6.3V_4
C1336
10U/6.3VS_6
R1448
4.99K_1%_4
R1451
4.99K_1%_4
C1078
1u/6.3V_4
C1315
1u/6.3V_4
C1299
10U/6.3VS_6
C1288
0.1u/16V_4
C1080
1u/6.3V_4
C1313
1u/6.3V_4
C1279
10U/6.3VS_6
C1133
1u/6.3V_4
C1304
1u/6.3V_4
C1265
10U/6.3VS_6
2
C1370
1u/6.3V_4
C1301
1u/6.3V_4
C1267
10U/6.3VS_6
R1431
4.99K_1%_4
VREFC_VMA8 VREFD_VM A8
R1438
C1303
0.1u/16V_4
4.99K_1%_4
C1278
0.1u/16V_4
AKD59GSTL00
AKD5PZDTW02
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
M1-70_S3_VRAM_DDR3L BGA96
M1-70_S3_VRAM_DDR3L BGA96
NB5
NB5
NB5
M1-70_S3_VRAM_DDR3L BGA96
Date: Sheet of
Date: Sheet of
Date: Sheet of
TOP BSQ QBCON PN
AKD59GSTL01
AKD5PGDT500 SAMSUNG 2G AKD5PGDT501
AKD5PZDTW01
1
1A
1A
1A
1A
1A
1A
25 51 Wednesday, March 08, 2017
25 51 Wednesday, March 08, 2017
25 51 Wednesday, March 08, 2017
VMA_CLK0
VMA_CLK0#
VMA_CLK1
VMA_CLK1#
+1.5V_VGA
R1499
4.99K_1%_4
R1502
4.99K_1%_4
5
VREFC_VMA5
C1425
0.1u/16V_4
R1285
80.6_1%_4
VMA_CLK0_COMM_2
R1280
80.6_1%_4
Single Rank & Dual Rank :
80.6 ohm - PN: CS08062FB19
PS: 40.2 ohm - CS04022FB28
R1192
80.6_1%_4
VMA_CLK1_COMM_2
R1194
80.6_1%_4
B B
A A
+1.5V_VGA +1.5V_VGA +1.5V_VGA
C1167
0.01u/50V_4
C1094
0.01u/50V_4
R1516
4.99K_1%_4
R1517
4.99K_1%_4
VREFD_VMA5
C1444
0.1u/16V_4
+1.5V_VGA
C1369
1u/6.3V_4
+1.5V_VGA
C1452
1u/6.3V_4
+1.5V_VGA
C1414
10U/6.3VS_6
C1385
1u/6.3V_4
C1449
1u/6.3V_4
C1438
10U/6.3VS_6
4
R1250
4.99K_1%_4
VREFC_VMA6 VREFD_VM A6
C1146
R1248
0.1u/16V_4
4.99K_1%_4
C1393
C1392
1u/6.3V_4
1u/6.3V_4
C1454
C1458
1u/6.3V_4
1u/6.3V_4
C1440
C1446
10U/6.3VS_6
10U/6.3VS_6
R1509
4.99K_1%_4
C1435
R1513
0.1u/16V_4
4.99K_1%_4
+1.5V_VGA
C1397
C1398
C1395
1u/6.3V_4
1u/6.3V_4
C1455
C1457
1u/6.3V_4
1u/6.3V_4
+1.5V_VGA +1.5V_VGA +1.5V_VGA
C1399
C1422
10U/6.3VS_6
10U/6.3VS_6
1u/6.3V_4
C1204
1u/6.3V_4
C1415
10U/6.3VS_6
C1434
1u/6.3V_4
C1426
1u/6.3V_4
C1411
10U/6.3VS_6
+1.5V_VGA
Page 26
5
DDI1_HPD_CON <2>
D D
+3V
R3002 *1M_ 5%_4
1 2
R3005 *100K_5 %_4
+3V
INT_DDI1_AUXP <2>
INT_DDI1_AUXN <2>
C C
B B
1 2
R3004 *0_5%_4/S
1 2
R3008 *0_5%_4/S
DDI1_TX0_P <2>
DDI1_TX0_N <2>
DDI1_TX1_P <2>
DDI1_TX1_N <2>
INT_DDI1_AUXP_C
1 2
INT_DDI1_AUXN_C
L3001 PBY160808T-600Y-N
INT_DDI1_AUXP_C
INT_DDI1_AUXN_C
1 2
R3003 *100K_5 %_4
R3006 *1M_ 5%_4
1 2
C3004 0. 1u/16V_4
C3005 0. 1u/16V_4
C3006 0. 1u/16V_4
C3007 0. 1u/16V_4
C3008 0. 1u/16V_4
C3009 0. 1u/16V_4
C3010 0. 1u/16V_4
1 2
AVCC33
RXAUXP
RXAUXN
VCCK_V12
RRX0P
RRX0N
RRX1P
RRX1N
1
2
3
4
5
6
7
8
RTD2166-CG
1 2
+3V
R3015 4.7K_5%_4
1 2
R3016 4.7K_5%_4
1 2
+3V
R3017 *4.7K_5%_4
CIIC_SCL, CIIC_SDA Connection
EP mode: Pin2, Pin3 connect to EC SMBUS
ROM or EEPROM mode: c onnect to PCH SMBUS
IIC Protocol is used
From PCH
SMB_RUN_DAT <10,17,18,33>
SMB_RUN_CLK <10,17,18,33>
A A
5
From EC
MBDATA2 <10,18,37>
MBCLK2 <10,18,37>
4
R3001
100K_1%_4
1 2
32
33
U3001
HPD
EPAD
AVCC_33
AUX_P
AUX_N
AVCC_12
RTD2166
LANE0_P
LANE0_N
LANE1_P
LANE1_N
POL29POL1/SPI_CEB10SPI_CLK11SPI_SI12SPI_SO13VCC_3314VGA_SCL15VGA_SDA
4
CIIC_SCL
CIIC_SDA
28
31
29
30
SMB_SCL
SMB_SDA
EXT1.2V_CTRL
TP3002
TP3001
1 2
R3020 *0_5%_4/S
1 2
R3021 *0_5%_4/S
3
+3V
C3001
0.1u/16V_4
C3002
0.1u/16V_4
VCCK_V12
27
25
XI
PVCC_3326VCCK_12
LDO_RSTB
GND
RED_P
GREEN_P
BLUE_P
VDD_DAC_33
HSYNC
VSYNC
HVSYNC_PWR
16
VGADDCSDA
VGADDCCLK
+3V +3V
1 2
R3018
*4.7K_5%_4
+3V
5
3 4
Q3001A *2N7002KDW
2
6 1
Q3001B *2N7002KDW
C3003
2.2u/10V_4
24
CRT_R
23
CRT_G
22
CRT_B
21
VDD_DAC_33
20
19
HSYNC CRTHSYNC
18
VSYNC
17
C3011
0.1u/16V_4
+3V
1 2
R3019
*4.7K_5%_4
CIIC_SDA
CIIC_SCL
1 2
R3007 75_1%_4
1 2
R3009 75_1%_4
1 2
R3010 75_1%_4
1 2
L3002 PBY160808T-600Y-N
1 2
R3011 47_5%_4
1 2
R3013 47_5%_4
C3012
0.1u/16V_4
CRT_R
CRT_G
CRT_B
3
CRTVSYNC
C3013
4.7u/6.3V_4
+3V
+5V
C3017
2p/50V_4
+3V +5V_HDMIC
C3018
2p/50V_4
D3001 *BAV99W
2
1
D3003 *BAV99W
2
1
D3005 *BAV99W
2
1
L3003 BLM15BB750SN1D
L3004 BLM15BB750SN1D
L3005 BLM15BB750SN1D
C3019
2p/50V_4
2
3
3
3
SSM14 spec is 40V 1A
1 2
1 2
1 2
C3020
2p/50V_4
2
CRT_R1
CRT_G1
CRT_B1
VGADDCSDA
VGADDCCLK
C3014 0. 1u/16V_4
C3021
2p/50V_4
EMI
D3002 *BAV99W
2
1
D3004 *BAV99W
2
1
D3006 *BAV99W
2
1
D3007 *BAV99W
2
1
1 2
R3012 2.2K_5%_4
1 2
R3014 2.2K_5%_4
SI
40 MIL
+5V_HDMIC
CRT_R1
CRT_G1
CRT_B1
+5V_HDMIC
C3022
2p/50V_4
NB5
NB5
NB5
1
3
VGADDCCLK
3
CRTVSYNC
3
CRTHSYNC
3
VGADDCSDA
2
+5VCRT2
Size Document Num ber Rev
Size Document Num ber Rev
Size Document Num ber Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet
1
D3008 RB500 V-40
16
6
11 1
7
12
2
8
3
9
4
10
5
17
DFDS15FR689
dsub-dhrd4-15k5200-15p
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
VGADDCSDA
13
CRTHSYNC
14
CRTVSYNC
15
VGADDCCLK
CRT CONN
CN3001
26 -- VRAM DDR3L - RANK1
26 -- VRAM DDR3L - RANK1
26 -- VRAM DDR3L - RANK1
1
26
+5V_HDMIC
C3015 *470p/50V_4
C3016 2p/50V_4
C3023 2p/50V_4
C3024 *470p/50V_4
26 51 Wednesday, March 08, 2017
26 51 Wednesday, March 08, 2017
26 51 Wednesday, March 08, 2017
1A
1A
1A
1A
1A
1A
of
Page 27
5
4
3
2
1
27
USBP7-_C
USBP7+_C
TS_INT#
CABLE_NC
SI
VADJ1
R3512
100K/F_4
Need confirm
C3527
10U/6.3V_6
CN3501
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
31 32
1A
1A
1A
1A
1A
27 51 Wednesday, March 08, 2017
27 51 Wednesday, March 08, 2017
27 51 Wednesday, March 08, 2017
1A
D D
C C
B B
A A
LID Switch
EMU_LID <37>
LVDS_BLON1
LVDS_BLON1
+VIN
+VIN
C3508
4.7U/25V_8
R3501 *0_4/S
R3503 1K/F_4
R3504 100K/F_4
2A / 80mils
1 2
F1 FUSE SMD 1.5A 24V POLY
C3509
0.1U/25V_4
5
PN_BLON
C3504 0.1U/25V_4
C3505 0.01U/50V_4
C3510
0.1U/25V_4
+VIN_BLIGHT
C3511
0.1U/25V_4
+3V
D3501
2
1
RB500V-40
+VIN_BLIGHT
C3512
4.7U/25V_8
F3 8V 1.5A
BLON_CON
1 2
R8559 *0_6/S
C3523
0.1U/16V_4
F4 *8V 1.5A
C3501 22P/50V_4
R3502 100K/F_4
+3V_TS +3V_TS
+5V_TS +5V +5V_TS
1 2
C3529
0.1U/16V_4
C3521
*22U/6.3V_6
PV
4
R8560 *0_6/S
PV
C3528
*22U/6.3V_6
10P/50V_4
PV
C3516
+3V_CAM
+3V_CAM
C3517
4.7U/6.3V_4
eDP Conn.
R3505 *0_4/S
USBP7USBP7+
R3506 *0_4/S
USBP_CAM-
R3507 *0_4/S
USBP_CAM+
R3508 *0_4/S
INT_eDP_TXP0 <2>
INT_eDP_TXN0 <2>
INT_eDP_TXP1 <2>
INT_eDP_TXN1 <2>
INT_eDP_AUXN <2>
INT_eDP_AUXP <2>
PCH_DPST_PWM <2>
PCH_LVDS_BLON <2>
PCH_DISP_ON <2>
3
USBP7-_C
USBP7+_C
USBP_CAM-_C
USBP_CAM+_C
DIGITAL_CLK <28>
DIGITAL_D1 <28>
C3513 0.1U/16V_4
C3514 0.1U/16V_4
C3515 0.1U/16V_4
C3519 0.1U/16V_4
C3520 0.1U/16V_4
C3522 0.1U/16V_4
Need confirm
R3513 10_4
R3516 *0_4/S
R3517 *0_4/S
+3V <2,4,10,11,12,13,14,15,17,18,26,28,29,30,31,33,34,35,37,43,45>
+3VPCU <6,13,31,33,36,37,38,39>
+5V <26,28,29,33,35,36,45>
+VIN <35,38,39,40,41,43,44,46,47,48,50>
TS USB Interface
C3524
1U/6.3V_4
DISP_ON
1 2
1 2
L3503 120/300MA
L3504 120/300MA
INT_eDP_TXP0_C
INT_eDP_TXN0_C
INT_eDP_TXP1_C
INT_eDP_TXN1_C
INT_eDP_AUXN_C
INT_eDP_AUXP_C
BRIGHT
LVDS_BLON1
DISP_ON
USBP_CAM- <12>
USBP_CAM+ <12>
C3506
*10P/50V_4
+3V
R3518
100K/F_4
2
C3507
*10P/50V_4
+3V
R3514 *1K_4
R3515 *1K_4
U3501
4
VIN#1
5
VIN#2
3
EN
AL005245000
the Part is for FHD/
+3VLCD_CON
C3502 0.047U/16V_4
C3503 0.047U/16V_4
USBP7- <12>
USBP7+ <12>
ULT_EDP_HPD <2>
+5V_TS
TS_ON <37>
+3V_TS
USBP_CAM-_C
1
2
USBP_CAM+_C
4 3
L3502 *MCM2012B900GBE
+VIN_BLIGHT
2A/80mils
BRIGHT
LVDS_BLON1
1
VOUT
2
GND
60mil
INT_eDP_AUXP_C
INT_eDP_AUXN_C
INT_eDP_TXN0_C
INT_eDP_TXP0_C
INT_eDP_TXN1_C
INT_eDP_TXP1_C
2
+3V_CAM
4 3
1
R3509 *0_4/S
R3510 *0_4/S
+3V_CAM
DIGITAL_CLK_L
DIGITAL_D1_L
L3501 *MCM2012B900GBE
VADJ1
BLON_CON
PIN11:NC NFL-C use
BRIGHT
R3511 1K/F_4
C3518 33P/50V_4
2.5A / 100mils
L3505
1 2
*0_6/S
MV
NB5
NB5
NB5
C3525
0.01U/50V_4
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
GS12401-1011-9H
51519-0300t-v01-30p-l
DFFC30FR149
ULT_EDP_HPD_R
R9057 *0_4/S
+3VLCD_CON
C3526
0.1U/16V_4
27 -- eDP CONN/LID/CAM/D-MIC/TS
27 -- eDP CONN/LID/CAM/D-MIC/TS
27 -- eDP CONN/LID/CAM/D-MIC/TS
1
Page 28
5
Close to PIN1
+3V
D D
HCB1005KF-181T15_4
C4004
1U/6.3V_4
TO Digital MIC
DIGITAL_D1 <27>
DIGITAL_CLK <27>
ACZ_SDOUT_AUDIO <14>
BIT_CLK_AUDIO <14>
1 2
L4002
Close to PIN7
ACZ_SDIN0 <14>
ACZ_SYNC_AUDIO <14>
ACZ_RST#_AUDIO <14>
+3V_DVDD
C C
+5V_DVDD
+5V
HCB1005KF-181T15_4
B B
VOLMUTE# <37>
A A
Close to Pin 34,35,36
L4011
1 2
+5V_DVDD
ACZ_RST#_AUDIO
FOR EMI
ACZ_SDIN0
ACZ_SDOUT_AUDIO
ACZ_SYNC_AUDIO
BIT_CLK_AUDIO
+5V_DVDD
+3V_DVDD
C4005
10U/6.3VS_6
C4017 10P/50V_4
R4001 *0_4/S
R4002 600 bead_4
C4016 10P/50V_4
R4005 *0_4/S
R4006 75/F_4
C4025 *0.1U/16V_4
C4027 2.2U/6.3V_6
C4028 2.2U/6.3V_6
C4030 4.7U/6.3V_4
C4033 0.1U/16V_4
C4038 10U/6.3VS_6
C4039 0.1U/16V_4
C4040 10U/6.3VS_6
+1.8V
R4020
*2.2K_4
Q4003
2
*MMBT3904
1 3
D4001
2
1
RB500V-40
EC4006 *33P/50V_4
EC4007 *10P/50V_4
EC4008 *10P/50V_4
EC4009 *33P/50V_4
C4006
0.1U/16V_4
C4021 10U/6.3VS_6
Close to Pin 41
Close to Pin 46
PV
+3V_DVDD
SI
+1.8V
+3V
DMIC0
DMIC_CLK_R
ACZ_SDOUT_AUDIO
HD_BCLK
HD_SDIN0
+3V_DVDD-IO
ACZ_SYNC_AUDIO
AMP_BEEP
CAP-
CAP+
L_SPK+
L_SPK-
R_SPK-
R_SPK+
R4021
1K/F_4
PD#
R4022
10K/F_4
L4003
L4004
TP4001
1 2
*HCB1005KF-181T15_4
1 2
HCB1005KF-181T15_4
U4002
1
DVDD
2
GPIO0/ DMIC-DATA
3
GPIO1 / DMIC-CLK
4
DVSS
5
SDATA-OUT
6
BCLK
7
LDO3-CAP
8
SDATA-IN
9
DVDD-IO
10
SYNC
11
RESETB
12
PCBEEP
34
CPVEE
35
CBN
37
CBP
36
CPVDD
42
SPK-L+
43
SPK-L-
44
SPK-R-
45
SPK-R+
NC
49
PD#
HP_EAPD
Head Phone out
4
>40mils trace
+3V_DVDD-IO
C4007
C4008
10U/6.3VS_6
0.1U/16V_4
LDO1-CAP
LDO2-CAP
Analog
HPOUT-L (PORT I)
HPOUT-R (PORT I)
Digital
LINE1-L (PORTC)
LINE1-R (PORTC)
MIC1-R (PORTB)
MIC1-L (PORTB)
MIC1-VREFO-L
MIC1-VREFO-R
MIC2-R (PORTF)
MIC2-L (PORTF)
MIC2-VREFO
MONO-OUT
PVDD1
PVDD246SPDIF-OUT/GPIO2
PDB
41
47
SenseA
13
14
SENSE_A_1
SenseB
48
Audio JACK ESD
EXT_MIC_1
LINEOUT_L_C2
LINEOUT_R_C2
SENSE_A
VC4001
*TVM0G140M900R_90p
26
AVDD1
40
AVDD2
25
AVSS1
38
AVSS2
27
39
28
VREF
32
33
24
LINE2-L
23
LINE2-R
22
21
20
19
31
30
18
17
29
16
JDREF
ALC3227 x QFN48
15
R4013 *20K/F_4
R4015 20K/F_4
R4017 39.2K/F_4
Close to codec
VC4003
VC4002
*TVM0G140M900R_90p
3
+5V_AVDD
C4001
10U/6.3VS_6
+1.5V_AVDD
C4009
10U/6.3VS_6
AGND
R4004 100K/F_4
C4018 10U/6.3VS_6
C4019 10U/6.3VS_6
C4020 0.1U/16V_4
C4022 2.2U/6.3V_6
HPOUT_L
HPOUT_R
MUTE_L ED_CNT L_L
MIC_R1
C4029 *4.7U/6.3V_4
MIC_L1 EXT_MIC_L
C4031 4.7U/6.3V_4
VREFOUT_C
C4032
*1U/6.3V_4
AGND
AGND
SENSE_A
VC4004
L4001
1 2
HCB1005KF-181T15_4
C4002
0.1U/16V_4
Close to PIN26
AGND
1 2
L4005
*HCB1005KF-181T15_4
1 2
L4006
HCB1005KF-181T15_4
Close to PIN40
AGND
AGND
Close to PIN28
AGND
321
AGND SH IELD
AGND SH IELD
AGND SH IELD
R4010 *0_4/S
R4011 1K/F_4
R4012 2.2K_4
Q4002
*DMN601K-7
AGND AGND
AGND SH IELD
AGND SH IELD
MUTE_L ED_CNT L <33>
EXT_MIC_L
R4014 *0_4/S
R4016 22K/F_4
C4041
4.7U/6.3V_4
+3V
+1.8V
1 2
C581 need check!
EXT_MIC_L
HPOUT_L
HPOUT_R
*AZ2015-01H
C4003
SENSE_A
EXT_MIC_L
R4018
22K/F_4
+5V
+5V_AVDD
C4010
*2.2U/6.3V_6
AGND
AMP_BEEP
C4023 0.1U/16V_4
Close to Speaker
Speaker 4 ohm: 40mils
1 2
L4012 H CB1608KF-601T10
R4023
*22K_1%_4
AGND
R4025 30_1%_4
R4026 30_1%_4
C4026
0.01U/50V_4
L_SPK+
L4007 PBY160808T -600Y-N(60,3A)
L_SPK-
L4008 PBY160808T -600Y-N(60,3A)
R_SPK-
L4009 PBY160808T -600Y-N(60,3A)
R_SPK+
L4010 PBY160808T -600Y-N(60,3A)
LINEOUT_L_C1 LINEOUT _L_C2
LINEOUT_R_C1 LINEOUT_R_C2
AGND SH IELD
*TVM0G140M900R_90p
*TVM0G140M900R_90p
AGND AGND AGND AGND AGND
SENSE_A SENSE_A
2
C4011
*0.1U/16V_4
C4015
*1U/6.3V_4
R4008 100K/F_4
R4009
10K/F_4
AGND
1 2
1 2
1 2
1 2
C4042
1000p/50V_4
AGND
C4043 1000p/50V_4
AGND
1 2
L4013 F CM1005KF-301T03
1 2
L4014 F CM1005KF-301T03
C4044 1000p/50V_4
AGND
EC4010
*100p/50V_4
AGND
U4001
5
Vout
4
BYP
GND2EN
*TPS793475DBVR
HPA01091DBVR
AMP_BEEP_R2 AMP_BEEP_R AMP_BEEP_L
C4034
1000P/50V_4
1
Vin
3
R4003 *10K/F_4
Vset=1.242V
C4024 0.1U/16V_4
C4035
C4036
1000P/50V_4
1000P/50V_4
C4012
*0.1U/16V_4
L_SPK+_R
L_SPK-_R
R_SPK-_R
R_SPK+_R
C4037
EXT_MIC_1
28
C4013
*0.047U/10V_4
+5V_AVDD
3
1
AGND
1000P/50V_4
R4007
10K/F_4
Q4001
DMN53D0L-7
2
CN4001
1
2
3
4
SPEAK CONN
1
+5V
C4014
*1U/6.3V_4
+5V
ACZ_SPKR <11,14>
Close to CODEC
5 6
EC4001 0.1U/16V_4
EC4002 0.1U/16V_4
EC4003 0.1U/16V_4
EC4004 0.1U/16V_4
EC4005 0.1U/16V_4
AGND
place to near or under codec
R4019 *0_8/S
AGND
3
1
2
6
5
4
AGND
CN4002
Audio_Combo_Jac k
7
audio-2sj3095-102211f-6p
R4027
*0_5%_4
5
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Nu mber Rev
Size Document Nu mber Rev
Size Document Nu mber Rev
Custom
Custom
Custom
28 -- Codec ALC3227-CG
28 -- Codec ALC3227-CG
NB5
NB5
4
3
2
NB5
28 -- Codec ALC3227-CG
Date: Sheet
Date: Sheet
Date: Sheet
1
1A
1A
1A
1A
1A
1A
of
of
of
28 51 Wednesday, March 08, 2017
28 51 Wednesday, March 08, 2017
28 51 Wednesday, March 08, 2017
Page 29
5
4
3
2
1
HDMI CONN
29
C_TX2_HDMI+
D D
IN_D0
IN_D0 <2>
IN_D0# <2>
IN_D1 <2>
IN_D1# <2>
IN_D2 <2> HDMI_HPD_CON <2>
IN_D2# <2>
IN_CLK <2>
IN_CLK# <2>
C4501 0.1u/16V_4
IN_D0#
C4503 0.1u/16V_4
IN_D1
C4504 0.1u/16V_4
IN_D1#
C4502 0.1u/16V_4
IN_D2
C4505 0.1u/16V_4
IN_D2#
C4506 0.1u/16V_4
IN_CLK
C4507 0.1u/16V_4
IN_CLK#
C4508 0.1u/16V_4
C_TX0_HDMI+
C_TX0_HDMI-
C_TX1_HDMI+
C_TX1_HDMI-
C_TX2_HDMI+
C_TX2_HDMI-
C_IN_CLK
C_IN_CLK#
+3V
R4505
1M_4
2
HDMI_HPD
3
1 R4506 20K/F_4
Q4501
2N7002K
SSM14 spec is 40V 1A
C C
HDMI SMBus Isolation
R4511
+3V
2.2K_4
SDVO_CLK <2>
SDVO_DATA <2>
R4519
+3V
2.2K_4
5
Q4502A 2N7002KDW
2
Q4502B
2N7002KDW
+3V
3 4
6 1
HDMI_SCLK
HDMI_SDATA
Close to HDMI connector
+3V
R4517 *100K_1%_4
C4513 *0.1u/16V_4
Q4503
2N7002K
3
2
1
DGPU_CL_HDMIP
Close to Q33
R4509 470_1%_4
R4510 470_1%_4
R4512 470_1%_4
R4513 470_1%_4
R4514 470_1%_4
R4515 470_1%_4
R4516 470_1%_4
R4518 470_1%_4
C_TX2_HDMI+
C_TX2_HDMI-
C_TX1_HDMI+
C_TX1_HDMI-
C_TX0_HDMI+
C_TX0_HDMI-
C_IN_CLK
C_IN_CLK#
C_TX2_HDMI+
C_TX2_HDMI-
C_TX0_HDMI+
C_TX0_HDMI- C_TX0_HDMI-
C_TX1_HDMI+
C_TX0_HDMI+
C_IN_CLK C_IN_CLK#
+5V_HDMIC
40 mils
+5V
VC4501
*TVM0G5R5M220R
U4501
1
IN1
2
IN2
3
GND1
4
IN3
5
IN4
*AZ1045-04F(5V)
EMI Solution
R4501 180_1%_4
R4502 180_1%_4
R4503 180_1%_4
R4504 180_1%_4
BAT54AW-L
H=1.4mm(Max)
F4500 8V 1.5A
1 2
10
NC1
9
NC2
8
GND2
7
NC3
6
NC4
3
D4501
1
2
C4511
0.1U/16V_4
C_TX2_HDMI+
C_TX2_HDMI-
C_TX0_HDMI+
C_TX2_HDMI-
C_TX1_HDMI-
C_TX0_HDMI-
5V_HSMBCK
5V_HSMBDT
R4507 2.2K_5%_4
R4508 2.2K_5%_4
C4509 *10p/50V_4
C4510 *10p/50V_4
HDMI_DET_C HDMI_HPD
VC4502
*TVM0G5R5M220R
C_TX1_HDMI+
C_IN_CLK
C_IN_CLK#
C_TX2_HDMI+
C_TX2_HDMIC_TX1_HDMI+
C_TX1_HDMIC_TX0_HDMI+
C_TX0_HDMIC_IN_CLK
C_IN_CLK#
HDMI_SCLK
HDMI_SDATA
+5V_HDMIC
C4512
220p/50V_4
U4502
1
IN1
2
IN2
3
GND1
4
IN3
5
IN4
*AZ1045-04F(5V)
NC1
NC2
GND2
NC3
NC4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
CN4501
SHELL1
D2+
D2 Shield
D2D1+
D1 Shield
D1D0+
SHELL2
D0 Shield
D0CK+
CK Shield
CK-
SHELL3
CE Remote
NC
DDC CLK
DDC DATA
GND
+5V
HP DET
SHELL4
HDMI CONN
10
9
8
7
6
20
23
22
21
C_TX1_HDMI+
C_TX1_HDMI- C_TX1_HDMI-
C_IN_CLK
C_IN_CLK#
B B
A A
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
29 -- HDMI/AMP HPA022642RTJR
29 -- HDMI/AMP HPA022642RTJR
29 -- HDMI/AMP HPA022642RTJR
1
29 51 Wednesday, March 08, 2017
29 51 Wednesday, March 08, 2017
29 51 Wednesday, March 08, 2017
1A
1A
1A
1A
1A
1A
Page 30
5
4
3
2
1
LAN RTL8166EH/RTL8111HSH
LAN_XTAL1
D D
For SWR mode support RTL8111HSH
Stuff: La, Ca ,Cb
For LDO mode support RTL8166EH
NA : La, Ca, Cb
Power trace Layout > 60mil
+1.05V_LAN_REGOUT
C C
La
1 2
L5001 4.7uH_3.2x2. 5x2
Ca Cb
C5003
0.1u/16V_4
+3VLANVCC
+3VLANVCC
C5004
4.7U/6.3VS_4
R5008 360_5%_4
R5009 360_5%_4
* Place Cc,Cd,Ce,Cf for RTL8111H(S)
close to each VDD10 pin-- 3, 22, 8 , 30
* Place Cg,Ch for RTL8111H(S)
close to each VDD10 pin-- 22(reserved)
* Place Cq,Cr for RTL8166EH
close to each VDD10 pin-- 30(reserved)
* Place Ce,Cd for RTL8166EH
close to each VDD10 pin-- 8 , 30
Cc Cd Ce Cf Cg
C5005
0.1u/16V_4
C5006
0.1u/16V_4
*AVLC5S_4
*AVLC5S_4
VC5504
VC5505
C5007
0.1u/16V_4
LAN_AMBLED
LAN_AMBLED#
LAN_WLED
LAN_WLED#
C5008
0.1u/16V_4
TP8527
1
*
TP8528
1
*
SI
PIN22 PIN22 PIN30 PIN8 PIN3
C5009
1u/6.3V_4
+1.05V_LAN
PIN22
Ch
C5010
0.1u/16V_4
SI
PIN30CrPIN30
Cq
C5011
*1u/6.3V_4
C5001
12p/50V_4
C5012
*0.1u/16V_4
Y5000
25MHZ/30ppm
PCIE_CLKREQ_LAN# <13>
R5001 10_5%_4
3
412
+1.05V_LAN
+1.05V_LAN
XTAL1
XTAL2
C5002
12p/50V_4
R5002 2.49K_1%_4
Add 9 GND VIAs with thermal PAD
MDI0+
MDI0-
MDI1+
MDI1MDI2+
MDI2-
+3V_LAN
MDI3+
MDI3-
+3V_LAN
33
1
2
3
4
5
6
7
8
U5001
GND
MDIP0
MDIN0
AVDD10(NC)
MDIP1
MDIN1
MDIP2(N C)
MDIN2(N C)
AVDD10_1
+1.05V_LAN
XTAL2
LAN_LED1
XTAL1
RSET
28
31
26
30
27
32
LED0
RSET
AVDD33
CKXTAL229CKXTAL1
AVDD10_2
RTL8166EH-CG
HSIP13HSIN14REFCLK_P15REFCLK_N
CLKREQB
MDIP3(NC)9MDIN3(NC)
AVDD33(NC)
12
10
11
LAN_LED1
LAN_LED2
Ra
R5003 0_5%_4
Rb
R5005 *0_5%_4
LAN_LED2
25
LED1/GPO
LED2(LED1)
REGOUT(NC)
VDDREG(VDD33)
DVDD10(NC)
LANWAKEB
ISOLAT EB
PERSTB
HSON
HSOP
RTL8166EH-CG
16
LAN_AMBLED#
LAN_WLED#
LAN_WLED#
For GbE
* Place Ra
For 10/100
* Place Rb
+1.05V_LAN_REGOUT
24
23
22
PCIE_WAKE#_R
21
20
ISOLATEB
19
PCIE_RXN6_LAN_L
18
PCIE_RXP6_LAN_L
17
PCIE_TXN6_LAN
PCIE_TXP6_LAN
TP5002
TP5003
if ISOLATEB pin pull-low,
the LAN chip will not drive it's PCI-E outputs
(excluding PCIE_WAKE# pin )
+1.05V_LAN_REGOUT
+3V_LAN
R5007 *0_5%_4/S
R9047 *0_5%_4/S
C5013 0.1u/16V_4
C5014 0.1u/16V_4
+1.05V_LAN
Update net name
For GbE
* Place RTL8111HSH-CG AL008111014
For 10/100
* Place RTL8166EH-CG AL008166001
CLK_PCIE_LANN <13>
CLK_PCIE_LANP <13>
PCIE_TXN6_LAN <12>
PCIE_TXP6_LAN <12>
+3V
R5004
1K_5%_4
ISOLATEB
R5006
15K_1%_4
PCIE_WAKE# <4,36>
PLTRST# <4,19,34,36,37>
PCIE_RXN6_LAN <12>
PCIE_RXP6_LAN <12>
30
* Place Ci and Ck, close to each VDD33 pin-- 23, 32 for RTL8166EH
* Place Cj and Ck, close to each VDD33 pin-- 11, 32 for RTL8111H(S)
* For surge improv ement, place Cm and Cn, close to each
VDD33 pin-- 11, 32(optional)
+3VLANVCC
B B
PIN23
C5016
*0.1u/16V_4
Ci
+3V_LAN
PIN11 PIN11 PIN32 PIN32
C5018
C5017
0.1u/16V_4
0.1u/16V_4
Ck
Cj Cm
C5019
*4.7U/6.3VS_4
C5020
*4.7U/6.3VS_4
Cn
For 10 /100 Ua
MDI1+_1
MDI1-_1
LAN_MCTG1
MDI0+_1
MDI0-_1
LAN_MCTG0
1st source NS681684 DB0LE6LAN20
2nd source N-3110M DB0Y11LAN00
For Gi ga Ub
MDI2+
PIN23 PIN23
C5022
4.7U/6.3VS_4
For SWR mode support RTL8111HSH
Stuff Co, Cp
C5023
0.1u/16V_4
Cp Co
SI
TRA_V_DAC
For GiGA
BOT:GST5009B LF,DB0Z06LAN00
FCE :NS892407 ,DB0LL1LAN00
A A
5
4
MDI2MDI3MDI3+
MDI0MDI0+
MDI1MDI1+
TRA_V_DAC
TRA_V_DAC
TRA_V_DAC
R9058 *0_5%_4
R9059 *0_5%_4/S
Ua
U5002
1
TD1
3
TD3
2
CT2
6
RD6
8
RD8
7
CT7
Ub
U5003
2
TD1+
3
TD1-
5
TD2+
6
TD2-
8
TD3+
9
TD3-
11
TD4+
TD4-12MX4-
1
TCT1
4
TCT2
7
TCT3
10
TCT4
25
GND
DB0LL1LAN00
3
445
121213
5
13
MX1+
MX2+
MX3+
MX4+
MCT1
MCT2
MCT3
MCT4
16
TX16
15
CM15
14
TX14
9
RX9
10
CT10
11
RX11
*NS681684_10/100
23
22
MX1-
20
19
MX2-
17
16
MX3-
14
13
LAN_MCTG0
24
LAN_MCTG1
21
LAN_MCTG2
18
LAN_MCTG3 TRA_V_DAC
15
For 10 /100 ESD1
For Gi ga ESD1,ESD2
MDI1+
TRA_V_DAC
MDI1-
MDI0-
TRA_V_DAC
MDI0+
MDI2+_1
MDI2-_1
MDI3-_1
MDI3+_1
MDI0-_1
MDI0+_1
MDI1-_1
MDI1+_1
R5016 75_1%_4
Ra
R5017 75_1%_4
Rb
R5018 75_1%_4
Rc
R5019 75_1%_4
Rd
For 10 /100 Ra,Rb
For Gi ga Ra,Rb,Rc,Rd
MDI3+_1
MDI3-_1
ESD2
1
1
2
2
334
*IP4220CZ6_NC
6
5
C5021
0.01u/50V_4
C5024
10p/3KV_1808
6
5
4
MDI2+_1
MDI2-_1
For 10/100 stuff only & Close RJ45
MDI3-_1
R5010 *0_5%_4
MDI3+_1
R5011 *0_5%_4
MDI2-_1
R5012 *0_5%_4
MDI2+_1
R5013 *0_5%_4
LAN_WLED
LAN_WLED#
MDI3-_1
MDI3+_1
MDI1-_1
MDI2-_1
MDI2+_1
MDI1+_1
MDI0-_1
MDI0+_1
LAN_AMBLED
LAN_AMBLED#
MDI0-_1
MDI0+_1
2
1
2
NB5
NB5
NB5
C5015 *68p/50V_4
RJ45
CN5001
9
LED_WHT_P
10
11
12
ESD1
*IP4220CZ6_NC
A1
A2
LED_WHT_N
8
RX1-
7
RX1+
6
RX0-
5
TX1-
4
TX1+
3
RX0+
2
TX0-
GND1
1
TX0+
GND
B1
LED_AMB_P
B2
LED_AMB_N
RJ45_CONN
6
1
6
5
2
5
4
334
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
R5014
*0_5%_6/S
14
13
R5015
*0_5%_6/S
MDI1-_1
MDI1+_1
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
30 -- LAN RTL8166EH/RTL8111HSH
30 -- LAN RTL8166EH/RTL8111HSH
30 -- LAN RTL8166EH/RTL8111HSH
+3V_LAN +3V_LAN
1
1A
1A
1A
1A
1A
1A
of
of
of
30 51 Wednesday, March 08, 2017
30 51 Wednesday, March 08, 2017
30 51 Wednesday, March 08, 2017
Page 31
5
+3VS5
USB3.0
USBPW_ON <31,37>
D D
C5510
C5509
22u/6.3V_6
22u/6.3V_6
VC5503
AVLC5S_4
C5511
22u/6.3V_6
R9045
10K_4
+5V_USBP1
+5VS5
C5505
1U/6.3V_4
C5512
22u/6.3V_6
R9046 10K_4
C5513
22u/6.3V_6
C5514
22u/6.3V_6
U5501
5
VIN#1
4
EN
3
Fault
EM5213AJ-25
VOUT
4
+5V_USBP1
1
2
GND
+
C5501 *220u/6.3V_3528H1.9
C5502 470p/50V_4
USB 2.0/3.0 Combo
C5503 0.1U/16V_4
C5504 470P/50V_4
VC5501 *AVLC5S_4
La
PV
1
USBP1- <12>
USBP1+ <12>
USB30_RX1- <12>
USB30_RX1+ <12>
USB30_TX1- <12>
USB30_TX1+ <12>
USBP1-
4 3
USBP1+
C5507 0.1U/16V_4
C5515 0.1U/16V_4
L5501
C5506 1000P/50V_4
MCM2012B900GBE
2
+5V_USBP1
USBP1-_C
USBP1+_C
USB30_TX1-_C
USB30_TX1+_C
3
USB 3.0
CN5501
USB3.0 CONN
2A
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
VBUS
DD+
GND
SSRX-
SSRX+
GND
SSTXSSTX+
12
2
1
31
UART for Win7 WHQL DEBUG
11111010131312
USB 2.0/3.0 Combo
C C
La
PV
1
USBP2- <12>
USBP2+ <12>
USB30_RX2- <12>
USB30_RX2+ <12>
USB30_TX2- <12>
USB30_TX2+ <12>
USBP2-
4 3
USBP2+
L5502
C5521 0.1U/16V_4
C5522 0.1U/16V_4
C5516 0.1U/16V_4
C5517 470P/50V_4
VC5502 *AVLC5S_4
C5518 1000P/50V_4
MCM2012B900GBE
2
+5V_USBP1
USBP2-_C
USBP2+_C
USB30_TX2-_C
USB30_TX2+_C
Update net name
USB 3.0
CN5502
USB3.0 CONN
2A
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
VBUS
DD+
GND
SSRX-
SSRX+
GND
SSTXSSTX+
12
11111010131312
USBP1-_C
USBP1+_C
USB30_RX1USB30_RX1+
USB30_TX1-_C
USB30_TX1+_C
1
2
3
4
5
2
U5503
IN1
IN2
GND1
IN3
IN4
PUSB3FR4
3
C5519
AZ5315-02F.R7GR
NC1
NC2
GND2
NC3
NC4
1
10
9
8
7
6
USB30_RX1USB30_RX1+
USB30_TX1-_C
USB30_TX1+_C
USB ESD
USBP2-_C
USBP2+_C
USB30_RX2USB30_RX2+
USB30_TX2-_C
USB30_TX2+_C
1
2
3
4
5
2
U5504
IN1
IN2
GND1
IN3
IN4
PUSB3FR4
3
C5520
AZ5315-02F.R7GR
NC1
NC2
GND2
NC3
NC4
1
10
9
8
7
6
USB30_RX2USB30_RX2+
USB30_TX2-_C
USB30_TX2+_C
Update net name
B B
Daughter Board
USBP3+_C
USBP3-_C
USBP6+_C
USBP6-_C
SI
1
18
2
17
3
16
4
15
5
14
6
13
7
12
8
11
9
10
19
20
DB CONN
1
18
2
17
3
16
4
15
5
14
6
13
7
12
8
11
9
10
22
22
21
21
19
20
IO1
C5523 *0.1U/16V_4
+3VPCU
R5509
10K_4
DEEP_PWRLED#
PWR_LED# <37>
A A
PWR_LED#
C5524
0.1U/16V_4
Q5501
2
DRC5144E0L
1 3
USB2
CR
+3VPCU
SATA_LED# <12>
USBPW_ON <31,37>
USBP3+ <12>
USBP3- <12>
USBP6+ <12>
USBP6- <12>
+5VS5
+3V
Place close to conn
DEEP_PWRLED#
SATA_LED#
USBPW_ON
PV
L5503 MCM2012B900GBE
L5504 *MCM2012B900GBE
USBP6+
USBP6-
Update net name
4 3
1
2
4 3
1
2
R5512 *0_4/S
R5513 *0_4/S
USBP6+_C
USBP6-_C
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
31 -- USB SW & TYPE-C -TPS25810
31 -- USB SW & TYPE-C -TPS25810
NB5
NB5
5
4
3
2
NB5
31 -- USB SW & TYPE-C -TPS25810
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
1A
1A
1A
1A
1A
1A
31 51 Wednesday, March 08, 2017
31 51 Wednesday, March 08, 2017
31 51 Wednesday, March 08, 2017
Page 32
5
4
3
2
1
USB3 to SATA VL711
TP8502
TP8510
+3V_LDO_VL711
DCVDD12FB
DCGND
DCVDD5
VCC33_2
GPIO6
GPIO7
GPIO5
GPIO8
GPIO9
VDD12I
C8516
*0.1U/16V/X7R_4
+1.2V_SWR
36
LX_VL711
35
LX
34
33
GPIO6_VIA
32
GPIO7_VIA
31
GPIO5_VIA
30
GPIO8_VIA
29
GPIO9_VIA
28
27
26
DM
25
DP
C8504
*0.1U/16V/X7R_4
C8508
*0.1U/16V/X7R_4
C8517
*0.1U/16V/X7R_4
RST#_VL711
+5VS5
1 2
L8501 *4.7uH
+5V_VL711
+3V_LDO_VL711
USBP-_VIA
USBP+_VIA
+3V_LDO_VL711
+1.2V_SWR
C8518
*0.1U/16V/X7R_4
1 2
R8501 *4.7K_4
R8502 *0_8/S
TP8508
TP8509
TP8512
+1.2V_SWR
1 2
C8502
*0.1U/16V/X7R_4
GPIO6_VIA
GPIO7_VIA
C8501
*10U/6.3V/X5R_6
1 2
R8564 *0_5%_4
R9044 *0_5%_4
+3V_LDO_VL711
+5V_VL711
TP8524
TP8523
+3V_LDO_VL711
SPI_CS
1
*
SPI_Q
1
*
RST#_VL711
+3V_LDO_VL711
ZERO_PWR_ODD <35,37>
R8503
*10K_4
U8501
1
CS#
VCC
2
SO
HOLD#
3
WP#
SCLK
GND4SI
*MX25L512EMI-10G
D8501 *TVUFB0201AC0
SATA_HOST(Diff. Z = 85~115 ohm,SE=40 ohm)
SATA_TXP1_VL711
SATA_TXN1_VL711
SATA_RXN1_VL711
SATA_RXP1_VL711
Group Rf
R8510 *0_5%_4
R8512 *0_5%_4
R8514 *0_5%_4
R8516 *0_5%_4
SATA_TXP2_ODD_COLAY
SATA_TXN2_ODD_COLAY
SATA_RXN2_ODD_COLAY
SATA_RXP2_ODD_COLAY
X'tal 25MHz
+3V_LDO_VL711
R8504
*10K_4
8
7
6
5
TP8525
SPI_CLK
1
SPI_D
1
*
TP8526
*
SATA_TXP2_ODD_COLAY <35>
SATA_TXN2_ODD_COLAY <35>
SATA_RXN2_ODD_COLAY <35>
SATA_RXP2_ODD_COLAY <35>
D D
U8502
1
TESTEN
C8503
*4.7U/10V/X5R_6
2
3
4
5
6
7
8
9
10
11
12
C8505
*4.7U/10V/X5R_6
USBP+_VIA
USBP-_VIA
GPIO2
GPIO1
SARXP
SARXN
SARXVDD12
SATXN
SATXP
SATXVDD12
MVDD12_ 1
REXT
LDPVDD5
USB30_RX2-_R
USB30_RX2+_R
USB30_TX2-_R
USB30_TX2+_R
TP8511
TP8505
+1.2V_SWR
+1.2V_SWR
R8505 *11.8K/F_6
+5V_VL711
C C
USB30_RX3- <12>
USB30_RX3+ <12>
USB30_TX3- <12>
USB30_TX3+ <12>
USBP8+ <12>
USBP8- <12>
GPIO2
GPIO1
SATA_RXP1_VL711
SATA_RXN1_VL711
SATA_TXN1_VL711
SATA_TXP1_VL711
+3V_LDO_VL711
C8506 *0.1U/16V/X7R_4
C8509 *0.1U/16V/X7R_4
C8507 *0.1U/16V/X7R_4
C8510 *0.1U/16V/X7R_4
R8524 *0_5%_4/S
R8525 *0_5%_4/S
PWRIND
SPI_D
SPI_CLK
SPI_CS
SPI_Q
BUSYIND
48
45
47
42
49
44
46
43
GND
SPI_D
SPI_Q
PWRIND
SPI_CS_
SPI_CLK
PADGND
BUSYIND
*VL711
LDOVDD33O13OSCXI14OSCXO15MVDD12_216USB3TXN17USB3TXP18U3TXVDD1219USB3RXN20USB3RXP21U3RXVDD1222U3RXGND23VCCU
+1.2V_SWR
+1.2V_SWR
XTALO_VIA
XTALI_VIA
+1.2V_SWR
C8515
*0.1U/16V/X7R_4
RST#_VL711
37
40
39
41
RESET_
VCC33_1
DCVCC12_138DCVCC12_2
24
32
SI
+3V_LDO_VL711 +5V_VL711
B B
A A
5
C8520
*0.1U/16V/X7R_4
4
C8523
*0.1U/16V/X7R_4
C8521
*0.1U/16V/X7R_4
C8522
*4.7U/10V/X5R_6
3
C8519
*15P/50V_4
Y5001
123
*25MHZ/30ppm
4
C8524
*15P/50V_4
XTALI_VIA
XTALO_VIA
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
32 -- USB SW & TYPE-C -TPS25810
32 -- USB SW & TYPE-C -TPS25810
NB5
NB5
2
NB5
32 -- USB SW & TYPE-C -TPS25810
Date: Sheet
Date: Sheet
Date: Sheet
1
1A
1A
1A
1A
1A
1A
of
of
of
32 51 Wednesday, March 08, 2017
32 51 Wednesday, March 08, 2017
32 51 Wednesday, March 08, 2017
Page 33
5
4
3
2
1
KEYBOARD Con.
MY[0..17] <37>
MX[0..7] <37>
R6003
10K_4
2
MUTE_LED_CNTL_R1
3
1
D D
MUTE_LED_CNTL <28>
CAPSLED# <37>
C C
MUTE_LED_CNTL_R1
KEYBOARD PULL-UP
RP6001
10
1
*10P8R-8.2K
RP6002
*10P8R-8.2K
MY4
2
MY13
3
MY12
MY11
5 6
1
MY1
2
MY5
3
MY2
MY0
5 6
MY16
MY17
+3VPCU
+3VPCU
+3VPCU
B B
MY7
MY8
MY9
MY10
MY6
MY3
MY15
MY14
9
8
7 4
10
9
8
7 4
R6012 *8.2K_4
R6013 *8.2K_4
MY[0..17]
MX[0..7]
Q6002
2N7002K
R6006 200/F_6
R6007 200/F_6
+3V
MY5
MY6
MY3
MY7
MY8
MY9
MY10
MY11
MY1
MY2
MY4
MY0
MX4
MX6
MX3
MX2
MX7
MX0
MX5
MX1
MY12
MY13
MY14
MY15
MY16
MY17
MX1
MX7
MX6
MY9
MX4
MX5
MY0
MX2
MX3
MY5
MY1
MX0
MY2
MY4
MY7
MY8
MY6
MY3
MY12
MY13
MY14
MY11
MY10
MY15
MY16
MY17
CAPSLED#_R
MUTE_LED_CNTL_R
LED_PW
C6006 220P/50V_4
C6007 220P/50V_4
C6008 220P/50V_4
C6009 220P/50V_4
C6010 220P/50V_4
C6012 220P/50V_4
C6013 220P/50V_4
C6015 220P/50V_4
C6019 220P/50V_4
C6018 220P/50V_4
C6020 220P/50V_4
C6021 220P/50V_4
C6022 220P/50V_4
C6023 220P/50V_4
C6024 220P/50V_4
C6025 220P/50V_4
C6026 220P/50V_4
C6027 220P/50V_4
C6028 220P/50V_4
C6029 220P/50V_4
C6030 220P/50V_4
C6031 220P/50V_4
C6032 220P/50V_4
C6033 220P/50V_4
C6034 220P/50V_4
C6035 220P/50V_4
CN6001
KB CONN
323233
31
31
30
30
29
29
28
28
27
27
26
26
25
25
24
24
23
23
22
22
21
21
20
20
19
19
18
18
17
17
16
16
15
15
14
14
13
13
12
12
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
50690-03201-v01-32p-l
DFFC32FR061
33
34
34
Touch Pad Connector
SMB_RUN_CLK <10,17,18,26>
SMB_RUN_DAT <10,17,18,26>
R6004 4.7K_4
+3VSUS
R6005 4.7K_4
1 2
TPDATA <37>
CN6003
TP_R
TP_L
TP Button_CON N
FAN
+3V
Close to EC Side
L6001 HCB1005KF-330T30
L6002 HCB1005KF-330T30
TPCLK <37>
5
1
2
3
4
6
1 2
FAN1_PWM <37>
FAN1SIG <37>
R6011 4.7K_4
C6004
*10P/50V_4
+5V
Dual
TPCLK
TPDATA
C6002 1 0P/50V_4
C6003 1 0P/50V_4
TP_SMB_CLK
TP_SMB_DATA
C6011 1 0U/6.3VS_6
C6014 0 .1U/16V_4
Q6001A
2N7002KDW
5
2
Q6001B
2N7002KDW
+3VSUS
C6005
*10P/50V_4
4
3
2
1
TP_L
TP_R
5 6
3 4
6 1
FAN1
FAN CONN
TP_SMB_CLK
R6001 4.7K_4
R6002 4.7K_4
TP_SMB_DATA
TPDAT-1
TPCLK-1
+3VSUS +3V
C6001 0 .1U/16V_4
DFFC08FR115
196332-08041-3-8p-l
TP_CONN_8P
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
CN6002
dummy pin, please confirm need GND
FAN1_PWM
C6016 *220P/50V_4
C6017 *220P/50V_4
FAN1SIG
33
Power Button
CN6004
4
5
1
2
3
4
6
Power Button_CONN
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
33 -- KB/TP/FAN
33 -- KB/TP/FAN
NB5
NB5
3
2
NB5
33 -- KB/TP/FAN
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
33 51 Wednesday, March 08, 2017
33 51 Wednesday, March 08, 2017
33 51 Wednesday, March 08, 2017
1A
1A
1A
1A
1A
1A
+3VPCU
LID_EC# <37>
A A
5
NBSWON1# <37>
NBSWON1#
Page 34
5
4
3
2
1
TPM (2.0)
PN:AL009665K05
D D
C C
H1
*H-TC276IBC197D154P2
1
H26
*H-TC276IBC197D154P2
1
B B
H28
*H-TC276IBC197D154P2
H25
*H-TC276IBC197D154P2
1
H27
*H-TC276IBC197D154P2
1
H29
*H-TC276IBC197D154P2
LAD0 <10,36,37>
LAD1 <10,36,37>
LAD2 <10,36,37>
LAD3 <10,36,37>
CLK_PCI_TPM <10>
LFRAME# <10,36,37>
PLTRST# <4,19,30,36,37>
LAD0
LAD1
LAD2
LAD3
LFRAME#
H24
h-tc237ic170d130pt
1
R6501 *0_4
R6502 *0_4
R6506 *0_4
R6503 *0_4
R6505 *0_4
R6507 *0_4
SERIRQ <10,37>
LAD0_T
LAD1_T
LAD2_T
LAD3_T
CLK_PCI_TPM_R
LFRAME#_T
SERIRQ
H4
*PAD-BALL276-NP
U6501
26
LAD0
23
LAD1
20
LAD2
17
LAD3
21
LCLK
22
LFRAME#
16
LRESET#
28
LPCPD#
27
SERIRQ
9
TEST/BADD
15
CLKRUN#
1
NC_1
3
NC_2
12
NC_3
*SLB9665 T2.0
VDD_1
VDD_2
VDD_3
VSB
GND_1
GND_2
GND_3
GND_4
GPIO
GPIO2
PP
TESTI
XTALI/32K IN
XTALO
H30
*PAD-BALL276-NP
1
H32
*H-CT315B400SI178D158P2
+3V
+3V
C6503 *0.1U/16V_4
10
19
24
5
4
11
18
25
6
2
7
8
13
14
TPM_PP
H7
*H-C237D130P2
H2
*H-C237D130P2
C6504
*0.1U/16V_4
R6508 *4.7K_4
C6501
*0.1U/16V_4
H8
*H-IC276BC315D154PB
1
C6502
*0.1U/16V_4
+3V
1
H3
*H-IC276BC315D154PB
TPM_PP
H31
*H-IC276BC315D154PB
+3V
R6504
*4.7K_4
R6509
*0_4
34
1
A A
5
1
4
1
1
3
1
PAD1
*SPAD-RE315X59NP
1
1
PAD2
*SPAD-RE537X138NP
1
1
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
B
B
B
34 -- TPM/G-Sensor/IR CAM
34 -- TPM/G-Sensor/IR CAM
NB5
NB5
2
NB5
34 -- TPM/G-Sensor/IR CAM
Date: Sheet
Date: Sheet
Date: Sheet
1
34 51 Wednesday, March 08, 2017
34 51 Wednesday, March 08, 2017
34 51 Wednesday, March 08, 2017
1A
1A
1A
1A
1A
1A
of
of
of
Page 35
5
+3V <2,4,10,11,12,13,14,15,17,18,26,27,28,29,30,31,33,34,37,43,45>
+5V <26,27,28,29,33,36,45>
+3VPCU <6,13,31,33,36,37,38,39>
2nd SATA SSD
Group Ra
SATA_TXP2_SDD_COLAY_R
SATA_TXP2 <12,35>
SATA_TXN2 <12,35>
SATA_RXN2 <12,35>
D D
SATA_RXP2 <12,35>
SATA_TXP3 <12>
SATA_TXN3 <12>
SATA_RXN3 <12>
SATA_RXP3 <12>
C C
R8553 *0_5%_4
R8552 *0_5%_4
R8551 *0_5%_4
R8550 *0_5%_4
Group Rb
R8537 0_5%_4
R8536 0_5%_4
R8535 0_5%_4
R8534 0_5%_4
SATA_RXP2_SDD_COLAY
SATA_RXN2_SDD_COLAY
SATA_TXN2_SDD_COLAY
SATA_TXP2_SDD_COLAY
SATA_TXN2_SDD_COLAY_R
SATA_RXN2_SDD_COLAY_R
SATA_RXP2_SDD_COLAY_R
SATA_TXP2_SDD_COLAY
SATA_TXN2_SDD_COLAY
SATA_RXN2_SDD_COLAY
SATA_RXP2_SDD_COLAY
C8529 0.01u/50V_4
C8528 0.01u/50V_4
C7053 0.01u/50V_4
C7054 0.01u/50V_4
R7057 *0_4/S
SATA_RXP3_SSD
SATA_RXN3_SSD
SATA_TXN3_SSD
SATA_TXP3_SSD
PEDET2
CN7050
NGFF
1
CONFIG3
3
GND#1
5
GND#2
PWR_ON/OFF
7
USB_DP
9
USB_DN
11
GND#3
CS PS
KEY B
21
CONFIG0
23
WAKE_OUT_WWAN
25
BODYSAR_DET
27
GND#4
29
NC#1
31
NC#2
33
GND#5
35
NC#3
37
NC#4
39
GND#6
41
NC#5
43
NC#6
45
GND#7
47
NC#7
49
NC#8
51
GND#8
53
NC#9
55
NC#10
57
GND#9
59
ANT_T UNE0
61
ANT_T UNE1
63
ANT_T UNE2
65
ANT_T UNE3
67
Reset#
69
CONFIG_1
71
GND#10
73
GND#11
75
CONFIG_2
77777878797976
WWAN_NGFF CONN
76
ngff-nfsb0-s6710-tph4-kb-smt
DFHS75FR210
W_DISABLE
GPIO_5
GPIO_6
GPIO_7
GPIO_10
GPIO_8
SIM_RST
SIM_CLK
SIM_PWR
GPIO_0
GPIO_1
GPIO_2
GPIO_3
GPIO_4
SIM_DET
3V3#1
3V3#2
LED
SIM_IO
NC#11
NC#12
NC#13
NC#14
NC#15
NC#16
COEX3
COEX2
COEX1
SSCLK
3V3#3
3V3#4
3V3#5
2
4
6
8
10
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
100 mils
R7052 *0_4
EC7052
470p/50V/X7R_4
4
+3V_SSD2
C7052
0.01U/50V_4
+3V
G35 added
R7054 *0_8/S
EC7051
10U/6.3V_6
1.4A
R7051
10K_4
EC7050
10U/6.3V_6
C7051
0.1U/16V_4
DEVSLP2 <12>
+3V
R7050 *0_8/S
C7050
4.7U/6.3V_4
3
SATA_TXP2_SDD_COLAY_R
+3V
SATA_TXN2_SDD_COLAY_R
SATA_RXN2_SDD_COLAY_R
SATA_RXP2_SDD_COLAY_R
Group Rc
Group Rd
SATA_TXP2 <12,35>
SATA_TXN2 <12,35>
SATA_RXN2 <12,35>
SATA_RXP2 <12,35>
SATA_TXP2_ODD_COLAY_R
SATA_TXN2_ODD_COLAY_R
SATA_RXN2_ODD_COLAY_R
SATA_RXP2_ODD_COLAY_R
Group Re
R8545 *0_5%_4
R8544 *0_5%_4
R8543 *0_5%_4
R8542 *0_5%_4
R8557 0_5%_4
R8556 0_5%_4
R8555 0_5%_4
R8554 0_5%_4
R8529 0_5%_4
R8527 0_5%_4
R8528 0_5%_4
R8526 0_5%_4
SATA_TXP2_SDD_COLAY
SATA_TXN2_SDD_COLAY
SATA_RXN2_SDD_COLAY
SATA_RXP2_SDD_COLAY
SATA_TXP2_ODD_COLAY_R
SATA_TXN2_ODD_COLAY_R
SATA_RXN2_ODD_COLAY_R
SATA_RXP2_ODD_COLAY_R
SATA_TXP2_ODD_COLAY
SATA_TXN2_ODD_COLAY
SATA_RXN2_ODD_COLAY
SATA_RXP2_ODD_COLAY
2
1
35
R7003
2M_5%_4
+VIN
1 2
R7002
1M_5%_4
C7006
0.022u/25V_4
3
2
1
ZERO_PWR_ODD
Q7002
PJA3404
+5V
C7005
0.1u/16V_4
+5V_ODD
R7100
22_5%_8
3
2
Q7003
2N7002K
1
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
35 -- SSD_ODD_EM MC_ASM 1153
35 -- SSD_ODD_EM MC_ASM 1153
NB5
NB5
3
2
NB5
35 -- SSD_ODD_EM MC_ASM 1153
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
1A
1A
1A
35 51 Wednesday, March 08, 2017
35 51 Wednesday, March 08, 2017
35 51 Wednesday, March 08, 2017
SATA ODD
C7009
0.1u/16V_4
R7001
10K_5%_4
C7010
0.1u/16V_4
+3V
321
ODD_EJECT# <37>
Q7001
2N7002K
C7011
0.1u/16V_4
5
Q7100A 2N7002KDW
2
Q7100B 2N7002KDW
ACIN <37,3 8>
3 4
ZERO_PWR_ODD <32,37>
6 1
4
CN7001
SATA_TXP2_ODD_C
S1
2
TXP
SATA_TXN2_ODD_C
3
TXN
14
14
SATA_RXN2_ODD_C
5
RXN
SATA_RXP2_ODD_C
6
16
RXP
16
ZERO_ODD_DP#
8
DP
9
+5V_1
S7
10
+5V_2
ZERO_ODD_DA#
P1
11
MD
1
17
GND1
17
4
GND2
7
15
GND3
15
12
GND4
ODD_DET
13
GND5
P6
SATA ODD
B B
A A
PV
ODD_DET <12>
ODD_DET
C7001 0.01u/50V_4
C7002 0.01u/50V_4
C7003 0.01u/50V_4
C7004 0.01u/50V_4
+5V_ODD
5
+5V_ODD
SATA_TXP2_ODD_COLAY
SATA_TXN2_ODD_COLAY
SATA_RXN2_ODD_COLAY
SATA_RXP2_ODD_COLAY
2.5A = 100mil
C7007
10U/6.3VS_4
SATA_TXP2_ODD_COLAY <32>
SATA_TXN2_ODD_COLAY <32>
SATA_RXN2_ODD_COLAY <32>
SATA_RXP2_ODD_COLAY <32>
ZERO_ODD_DP# <12>
C7008
0.1u/16V_4
1A
1A
1A
Page 36
5
4
3
2
1
HDD
36
SATA HDD
DEVSLP0
SATA_TXP1_C
SATA_TXN1_C
SATA_RXN1_C
SATA_RXP1_C
DEVSLP0 <12>
GPP_D9 <14>
+5V
C7510 *10U/6.3VS_6
C7511 10U/6.3VS_4
C7512 0.1U/16V_4
C7504 0.01U/50V_4
C7505 0.01U/50V_4
C7506 0.01U/50V_4
C7507 0.01U/50V_4
SATA_TXP1 <12>
SATA_TXN1 <12>
SATA_RXN1 <12>
SATA_RXP1 <12>
D D
C C
HDD1
24
hole2
23
hole1
C166MP-12201-L
GND1
GND2
GND3
3V01
3V02
3V03
GND4
GND5
GND6
5V01
5V02
5V03
GND7
RSVD
GND8
12V01
12V02
12V03
1
SATA_TXP1_C
2
TXP
TXN
RXN
RXP
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
SATA_TXN1_C
SATA_RXN1_C
SATA_RXP1_C
GPP_D9_R
R8563 *0_4/S
+5V
R8562 *0_4/S
WLAN
Mini Card
WLAN/BT(Option)
B B
EC_AOCS <37>
2
R7515
10K_4
R7516 200K_4
3
Q7503
2N7002K
1
+3V_WLAN_P
Support Wake Function(Reserve)
2
PCIE_WAKE# <4,30>
A A
PCIE_CLKREQ_WLAN# <13> CLK_24M_DEBUG <10>
5
Q7506 *2N7002K
R7524 *0_4/S
Q7505 *DRC5144E0L
+3V_WLAN_P
R7522 *10K_4
321
+3VS5 +3VPCU +3V_WLAN_P
1
2
3
C7517
0.022U/25V_4
R7519 *10K_4
1 3
REQ_WLAN#
Q7502
PJA3415
100mils
+3V_AOCS
4
C7518
*0.1U/16V_4
MINICAR_PME#
0302 Reserved the MOSFET at CLKREQ#
even the current leakage test passed
for HP requested
For EMI Suggestion
CLK_24M_DEBUG
PCIE_WAKE#
C7513
0.1U/16V_4
R7523 *0_4
100mils
C7514
0.1U/16V_4
EC7504 *33P/50V_4
EC7505 *220P/50V_4
C7515
0.1U/16V_4
+3V_WLAN_P
C7516
10U/6.3VS_4
3
+3V_WLAN_P
CN7503
NGFF
1
GND_1
USBP4+ <12>
USBP4- <12>
PCIE_TXP5_WLAN <12>
PCIE_TXN5_WLAN <12>
PCIE_RXP5_WLAN <12>
PCIE_RXN5_WLAN <12>
CLK_PCIE_WLANP <13>
CLK_PCIE_WLANN <13>
LFRAME# <10,34,37>
REQ_WLAN#
MINICAR_PME# INT_R F_OFF #
LFRAME#
3
USB_D+
5
USB_D-
7
GND_2
9
SDIO CLK(O)
11
SDIO CMDIO)
13
SDIO DAT0(IO)
15
SDIO DAT1(IO)
17
SDIO DAT2(IO)
19
SDIO DAT3(IO)
21
SDIO Wake(I)
23
SDIO Reset
33
GND_3
35
PETp0
37
PETn0
39
GND_4
41
PERp0
43
PERn0
45
GND_5
47
REFCLKP0
49
REFCLKN0
51
GND_6
53
CLKREQ0#
55
PEWake0#
57
GND_7
59
PETp1
61
PETn1
63
GND_8
65
PERp1
67
PERn1
69
GND_9
71
Reserved1
73
Reserved2
75
GND_10
SUSCLK(32KHz)
W_DISABLE2#
W_DISABLE1#
NFC I2C SM DA TA
NFC I2C SM CLK
UIM_SWP/ PERST1#
UIM_POWER_ SNK
UIM_POWER_ SRC
GND_1276GND_1377787879
79
2
2
3.3Vaux_1
4
3.3Vaux_2
6
LED#1
8
PCM_CLK
10
PCM_SYNC
12
PCM_IN
14
PCM_OUT
16
LED#2
18
GND_11
20
UART Wake
22
UART Rx
32
UART Tx
34
UART CTS
36
UART RTS
38
Clink RESET
40
CLink DATA
42
CLink CLK
44
COEX3
46
COEX2
48
COEX1
50
52
PERST0#
54
56
58
60
62
ALERT#
64
RESERVED
66
68
70
72
3.3Vaux_3
74
3.3Vaux_4
WLAN_NGFF CONN (E-Key)
Remove Net RF_LINK# and need check if
Ra and Rb can be NI
Ra
WLAN_LED#
R7517 4.7K_4
R7518 *0_4/S
+3V_WLAN_P
Rb
5
INT_ BT_O FF#
3 4
2
INT_ RF_OF F#
6 1
PLTRST# <4,19,30,34,37>
R7520 10K_4
R7521 10K_4
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size D ocument Number Rev
Size D ocument Number Rev
Size D ocument Number Rev
Custom
Custom
Custom
36 -- HDD/WLAN(NGFF)
36 -- HDD/WLAN(NGFF)
NB5
NB5
NB5
36 -- HDD/WLAN(NGFF)
Date: Sheet
Date: Sheet
Date: Sheet
PLTRST#
INT_ BT_O FF#
LAD0
LAD1
LAD2
LAD3
Q7504A 2N7002KDW
Q7504B 2N7002KDW
LAD0 < 10,34,37>
LAD1 < 10,34,37>
LAD2 < 10,34,37>
LAD3 < 10,34,37>
1
BT_OFF <14>
RF_OFF_PCH <4>
+3V_WLAN_P
36 51 Wednesday, March 08, 2017
36 51 Wednesday, March 08, 2017
36 51 Wednesday, March 08, 2017
1A
1A
1A
1A
1A
1A
of
of
of
Page 37
5
4
3
2
1
+3VPCU_KBC
+3V
+3VPCU_KBC
C2003 0. 1U/16V_4
11
U2000
USBPW_ON#
BIOS_SPI_CLK
BIOS_RD#
BIOS_WR#
BIOS_CS#
S5_ON
R2037
*10K_4
10
9
8
7
22
13
6
17
126
5
15
23
14
4
16
113
123
86
85
88
87
90
89
119
33
108
109
125
105
103
102
101
100
36
37
38
39
40
41
42
43
44
45
46
51
52
53
54
55
58
59
60
61
62
63
64
65
128
2
*2N7002KDW
Q2005A
VCC
LAD0
LAD1
LAD2
LAD3
LPCRST#/WUI4/GPD2
LPCCLK
LFRAME#
LPCPD#/WUI6/GPE6
GA20/GPB5
SERIRQ
ECSMI#/GPD4
ECSCI#/GPD3
WRST#
KBRST#/GPB6
PWUREQ#/BBO/GPC 7
CRX0/GPC0
TMA0/GPB2
PS2DAT0/TMB1/GPF1
PS2CLK0/TMB0/GPF0
PS2DAT1/RTS0#/GPF3
PS2CLK1/DTR0#/GPF2
PS2DAT2/WUI21/ GPF5
PS2CLK2/WUI2 0/GPF4
DSR0#/GPG6
GINT/CTS0#/GPD5
RXD/SIN0/GPB0
TXD/SOUT0/GPB1
SSCE1#/GPG0
FSCK/GPG7
FMISO/GPG5
FMOSI/GPG4
FSCE#/GPG3
SSCE0#/GPG2
KSO0/PD0
KSO1/PD1
KSO2/PD2
KSO3/PD3
KSO4/PD4
KSO5/PD5
KSO6/PD6
KSO7/PD7
KSO8/ACK#
KSO9/BUSY
KSO10/PE
KSO11/ERR#
KSO12/SLCT
KSO13
KSO14
KSO15
KSI0/STB#
KSI1/AFD#
KSI2/INIT#
KSI3/SLIN#
KSI4
KSI5
KSI6
KSI7
GPJ6
GPJ7
AJ089870F01
IT8987E/BX
5
2
Q2006B
*2N7002KDW
D D
+3V
PV
20160524
For Touch-Pad
C C
GPIO33_EC <11>
USBPW_ON <31>
PCH_SPI1_CLK_R <10>
PCH_SPI1_SO_R <10>
PCH_SPI1_SI_R <10>
PCH_SPI_CS0#_R <10>
S5_ON <39>
B B
1 2
L2002 *HCB1608KF-181T15_S0_6/S
Check
For HW Throttling
ACIN <35,37,38>
A A
DC_PROCHOT_OFF
CLK_24M_KBC <10>
SIO_EXT_SMI# <10>
SLP_SUS#_EC <4>
TS_ON <27>
ZERO_PWR_ODD <32,35>
Q2005B
*2N7002KDW
5
LAD0 <10,34,36>
LAD1 <10,34,36>
LAD2 <10,34,36>
LAD3 <10,34,36>
PLTRST# <4,19,30,34,36>
LFRAME# <10,34,36>
SERIRQ <10,34>
SIO_EXT_SCI# <14>
EC_RCIN# <10>
GPUT_CLK <20>
BATSHIP <38>
LID_EC# <33>
TPDATA <33>
TPCLK <33>
SUSB# <4>
DSWROK_EC <4>
SLP_SUS_ON <15,41,42>
RSMRST# <4>
MAINON <40,41,42,45>
Close to BIOS
TP8516
2
R2012 15 /F_4
R2013 15 /F_4
R2014 15 /F_4
R2016 15 /F_4
LAD0
LAD1
LAD2
LAD3
PLTRST#
CLK_24M_KBC
LFRAME#
R2004 10K_4
TP2001
DC_PROCHOT_OFF_R DC_PROCHOT_OFF
R2006 *0_4
SERIRQ
SIO_EXT_SMI#
SIO_EXT_SCI#
EC_WRST
EC_RCIN#
GPUT_CLK
BATSHIP
LID_EC#
TPDATA
TPCLK
SUSB#
DSWROK_EC
SLP_SUS#_EC
RSMRST#
MAINON
D2002
2
1
TS_ON KB_LED_EN#
RB500V-40
MY0
MY0 <33>
MY1
MY1 <33>
MY2
MY2 <33>
MY3
MY3 <33>
MY4
MY4 <33>
MY5
MY5 <33>
MY6
MY6 <33>
MY7
MY7 <33>
MY8
MY8 <33>
MY9
MY9 <33>
MY10
MY10 <33>
MY11
MY11 <33>
MY12
MY12 <33>
MY13
MY13 <33>
MY14
MY14 <33>
MY15
MY15 <33>
MX0
MX0 <33>
MX1
MX1 <33>
MX2
MX2 <33>
MX3
MX3 <33>
MX4
MX4 <33>
MX5
MX5 <33>
MX6
MX6 <33>
MX7
MX7 <33>
ZERO_PWR_ODD
IT8502_AGND
+3V
6 1
3 4
Q2006A
5
*2N7002KDW
106
114
121
VSTBY_126VSTBY_250VSTBY_392VSTBY_4
VSTBY_6
VSTBY_FSPI
LPC
IT8987
PS/2
UART
FLASH
KBMX
RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7
CLOCK
VSS_2
VSS_327VSS_4
1
49
91
3 4
6 1
+3V_VSTBY
+3V_ECACC
127
74
AVCC
VSTBY_5
L80HLAT/BAO/WUI24/GPE0
GPIO
DTR1/SBUSY/GPG1/ID7
HSCE#/WUI19/GPH3/ID3
CTX1/WUI18/GPH2/SMDAT3/ID2
CRX1/WUI17/GPH1/SMCLK3/ID1
CLKRUN#/WUI16/GPH0/ID0
SMCLK2/WUI2 2/GPF6/PECI
SM_BUS
PWM
WAKE UP
A/D D/A
VSS_1
VCORE
AVSS
VSS_5
12
75
104
C2015
0.1U/16V_4
IT8502_AGND
SKL-H
H_PROCHOT# <2,43>
4
EGCLK/WUI27/ GPE3
EGCS#/WUI26/ GPE2
EGAD/WUI25/G PE1
KSO16/SMOSI/GPC3
KSO17/SMISO/GPC5
L80LLAT/WUI7/GPE7
HMOSIGPH6/ID6
HMISO/GPH5/ID5
HSCK/GPH4/ID4
SMDAT2/WUI23/ GPF7
SMCLK0/GPB3
SMDAT0/GPB4
SMCLK1/GPC1
SMDAT1/GPC2
PWM0/GPA0
PWM1/GPA1
PWM2/GPA2
PWM3/GPA3
PWM4/GPA4
PWM5/GPA5
PWM6/SSCK/GPA6
PWM7/GPA7
TACH0/GPD6
TACH1/TMA1/G PD7
DAC1/GPJ1
DAC0/GPJ0
TMR0/WU I2/GPC4
TMR1/WU I3/GPC6
PWRSW/G PE4
RI1#/WUI0/GPD0
RI2#/WUI1/GPD1
WUI5/GPE5
ADC0/GPI0
ADC1/GPI1
ADC2/GPI2
ADC3/GPI3
ADC4/WUI28/ GPI4
ADC5/WUI29/ GPI5
ADC6/WUI30/ GPI6
ADC7/WUI31/ GPI7
DAC5/RIG0#/GPJ5
DAC4/DCD0#/GPJ4
DAC3/GPJ3
DAC2/GPJ2
DGPU_PROCHOT_EC# <20,37>
GPH7
C2001 0. 1U/16V_4
C2002 0. 1U/16V_4
C2004 0. 1U/16V_4
C2005 0. 1U/16V_4
C2006 0. 1U/16V_4
C2007 0. 1U/16V_4
EC_AOCS
84
83
VRON
SUSACK#_EC
82
56
MY16
57
MY17
19
CRY1
EC_PWROK
20
ODD_EJECT#
122
PCI_SERR#
99
98
HWPG
97
ACIN
DGPU_PROCHOT_EC#
96
95
MBDATA3
94
MBCLK3
93
CLKRUN#
SUSWARN#_EC
3
EC_PECI_R
117
GPUT_DATA
118
110
111
115
116
PWR_LED#
24
25
MBATLED0#
AC_LED_ON#
28
29
FAN1_PWM
30
FAN2_PWM
31
32
VOLMUTE#
34
CAPSLED#
47
FAN1SIG
48
GPU_OVERT#_EC
77
EC_NVVDD_CORE1_EN
76
TEMP_MBAT
120
H_PROCHOT#_EC
124
107
NBSWON1#
18
SUSC#
21
DNBSWON#
35
SUSON
LAN_POWER
112
66
GPI0
AD_TYPE
67
SYS_I
68
AD_AIR
69
70
R2021 *0_4/S
71
THERMISTOR_SH DN
72
ADAPTER_SEL_EC
73
EMU_LID
81
THRM_ALERT_H W#1
80
79
FAN2SIG
TP_EN
78
AC IN:
AC mode Operation
AC remove:
AC mode to DC mode
DC mode recover
from PROCHOT
R2005 *0_4/ S
R2009 33 _4
R2100
2.2_5%_6
EC_AOCS < 36>
VRON <43>
TP8515
MY16 <33>
MY17 <33>
AC_PRESENT_EC <4>
EC_PWROK <4>
ODD_EJECT# <35>
PCI_SERR# <10>
HWPG <4,39,40, 41>
TP2003
TP2004
CLKRUN# <10>
TP8519
EC_PECI (50ohm)
Trace Length: <0.5 iches
EC_PECI <2>
GPUT_DATA <20>
MBCLK <38>
MBDATA <38>
MBCLK2 <10,18,26>
MBDATA2 <10,18,26>
PWR_LED# <31>
MBATLED0# <38>
AC_LED_ON# <38>
TP2005
FAN1_PWM <33>
TP2006
VOLMUTE# <28>
CAPSLED# <33>
FAN1SIG <33>
R2015 *0_4/ S
TP2007
TP2008
TEMP_MBAT <38>
NBSWON1# <33>
SUSC# <4 >
DNBSWON# <4>
SUSON <4 0,42,45>
LAN_POWER <45>
SYS_I <38>
TP2100
THERMISTOR_SH DN <6>
EMU_LID < 27>
TP2010
TP8514
+3V_ECACC
C2013
1U/6.3V_4
+3V_VSTBY
C2018
0.1U/16V_4
AC_PRESENT_EC
3
D2100
*PDZ5.6B
2 1
TP2002
For Gsensor
H_PECI (50ohm)
Route on microstrip only
Spacing >18 mils
Trace L ength: 0.4 ~6.125 ic hes
For GPU thermal
for Battery char ge/charge
for DDR Thermal IC
EC_RTC_RST
R9060 10K_4
PV
+3V
THERMISTOR <6>
EC_SRTC_RST <13>
1 2
L2001 *HCB1608KF-181T15_S0_6/S
C2014
1000P/50V_4
1 2
L2003 *HCB1608KF-181T15_S0_6/S
H_PROCHOT#_ECLH_PROCHOT#
H
L L
L
H H
+3VPCU
C2100
0.1U/16V_4
VC2001 *A VLC5S_4
DGPU_PROCHOT_EC# <20,37>
EC_RTC_RST <13>
+3VPCU
+3VPCU
H
L
EC_WRST
Q2001
METR3904-G
2
1 3
Q2002 *2N7002K
321
2
1 3
Q2004
METR3904-G
Adapter select for EC
+3VPCU
R2001 4.7K_4
D2001 *RB500V-40
R2003 10K_4
THRM_ALERT_H W#1
R2007 4.7K_4
C2010 22 0P/50V_4
PM_THRMTRIP# <2 >
Ra Rb
R2010 10K_4
Ra
150W
10K(CS31002FB26)
120W
10K(CS31002FB26)
90W
10K(CS31002FB26)
65W
10K(CS31002FB26) 2.94K(CS22942FB01) DIS
45W
NC
Adapter Type check
AD_TYPE
R2020 *10K_4
+3V
R2022 4.7K_4
R2024 4.7K_4
R2027 *4.7K_4
R2029 *4.7K_4
R2031 *4.7K_4
R2032 100K_4
R2034 100K_4
R2035 100K_4
THERMISTOR_SH DN
THERMISTOR
ADAPTER_SEL_EC
CLOSE to EC Pin
2
D2004
PDZ5.6B
2 1
C2017
*0.1U/16V_4
R2017 2K/F _4
2
Open Drain need pu high
DGPU_OVT# <20>
ADAPTER_SEL_EC
0.1U/25V_4
GPIO33_EC
GPUT_CLK
GPUT_DATA
DGPU_PROCHOT_EC#
MBCLK2
MBDATA2
VRON
MAINON
SUSON
C2019
*0.1U/16V_4
TP8522
1
*
+3V
EC_PWROK OVT_DETC
1
+3VPCU
DGPU_PWROK <12,46,48,49> ACI N <35,37,3 8>
+1.0V
R2011 2.94K_1%_4
Rb
100K(CS41002FB28)
21.5K
8.33K
10K(CS31002FB26)
+3VPCU
2 1
C2011
C2020
*0.1U/16V_4
NB5
NB5
NB5
EC_WRST
Q2003
2N7002K
37
H_PROCHOT#_EC
R2008
*10K_4
+3VPCU
R2002
100K_4
C2008
1U/6.3V_4
2
3
1
SI
ADAPT ER_S EL_E C
3V
2.25V
1.5V
0.75V
0V
Change to 1SS355 as Current loss
D2003
*1SS355
R2018 10 0/F_4
R2019
7.15K/F_4
+3VPCU
100P/50V_4
R2023 10K_4
R2025 4.7K_4
R2026 4.7K_4
R2028 47K/F_4
R2030 10K_4
R2033 10K_4
+3VS5
CLK_24M_KBC
HWPG
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Num ber Rev
Size Document Num ber Rev
Size Document Num ber Rev
Custom
Custom
Custom
37 -- EC (IT8987)
37 -- EC (IT8987)
37 -- EC (IT8987)
Date: Sheet of
Date: Sheet of
Date: Sheet of
AD_ID <38>
C2012
R2036 *10_4
C2021 0. 1U/16V_4
1
NBSWON1#
MBCLK
MBDATA
LID_EC#
S5_ON
DNBSWON#
+3V <2,4,10,11,12,13,14,15,17,18,26,27,28,29,30,31,33,34,35,43,45>
+3VS5 <4,15,31,36,39,40,41,42,45,46,49>
+3VPCU <6,13,31,33,36,38,39>
H_PROCHOT#
C2009
*47P/50V_4
BOM
UMA
SI
C2016 *10P/50V_4
37 51 Wednesday, March 08, 2017
37 51 Wednesday, March 08, 2017
37 51 Wednesday, March 08, 2017
1A
1A
1A
1A
1A
1A
Page 38
5
+3VPCU <6,13,31,33,36,37,38,39>
+5VPCU <39,45,49>
+BAT_RTC
+VIN <27,35,39,40,41,43,44,46,47,48,50>
+3VPCU <6,13,31,33,36,37,38,39>
4
3
2
1
38
ADP=65W
CN1
D D
51483-00801-V01_Header
9 10
1
J1-1
2
3
4
5
AD_ID
6
7
8
C C
PC27
0.1u/25V_4
B B
LED2
0.1u/25V_4
LED1
PC21
0.1u/25V_4
+5VPCU
1 3
PC7
EC11
1000p/50V_4
+5VPCU
1 3
PR25
2.43K_1%_6
PQ8
METR3904-G
2
PR16
2.43K_1%_6
METR3904-G
PL2
*Short_0805
PL4
*Short_0805
AD_ID <37>
Place this ZVS close to
DCIN CONN
PQ5
2
PR19
*100K_1%_4
PR29
75K_1%_4
PR32
*100K_1%_4
+VA
PC8
0.1u/25V_4
PR18
75K_1%_4
PD1
P4SMAFJ20A
2 1
MBATLED0# <37>
AC_LED_ON# <37>
VIN>22.5V (AC OVP)
VIN>17.2V (Enable Charging)
A A
5
PQ1
AP0203GMT-HF
D
5
PC6
2200p/50V_4
BATDIS_G
Do Not add test pad on
BATDIS_G signal
2 1
+VA
+BATCHG
2 1
+PRWSRC
MIN. BATV=7.2V
+VA
G
4
PD40
BAS316
PD41
BAS316
3
S
2
1
1M_5%_4
PR47
75K_1%_4
PC9
0.1u/50V_6
PR26
22_5%_8
PR42
4
PR3454
1M_5%_4
100K_1%_4
ACIN <35,37>
430K_1%_4
PR48
3.9K_1%_4
+VAD
PR23
PR35
Ra VIN>15.2V (AC present)
PR45
1M_5%_4
2
1 2
PR3455
3M_5%_4
REGN6V
PC28
0.47u/25V_6
Vacdet=2.4V
PR37
69.8K_1%_4
1 3
2
PR21
100K_1%_4
MBDATA
2
PQ11
METR3904-G
N-channel MOS
3
2
1
1
PQ95
2N7002K
3
PR13
4.02K_1%_4
BQACDRV
MBCLK
PR38
88.7K_1%_4
3
PQ9
2N7002K
1
PQ2
AON7408
S
G
4
PR30
*Short_0402
PR33
*Short_0402
D
+VAD
BQCMSRC
BQVCC
PC32
*0.1u/50V_6
+PRWSRC
5
PR14
4.02K_1%_4
PC14
0.1u/25V_4
ACIN
+3VPCU
PR11
*Short_0201
3
CMSRC
4
ACDRV
5
ACPRES
20
VCC
8
SDA
9
SCL
100K_1%_4
BQBATDRV
1 2
CSIP
0.1u/25V_4
2
ACP
ACDET
6
PR41
PR6
0.01_1%_12
PC13
PU9
BQ24738HRGRR
ILIM
10
PR44
43.2K_1%_4
3
4.02K_1%_4
PR12
*Short_0201
CSIN
1
ACN
PR3
PC15
0.1u/25V_4
BATDIS_ID_DOD
+VIN
PD2
*P4SMAFJ20A
2 1
Place this ZVS close to
Far-Far away +VIN
REGN6V
PC16
1u/16V_4
16
HIDRV
REGN
BTST
PHASE
LODRV
GND#1
GND#2
SRP
SRN
BATDRV
IOUT
7
BQIOUT
PR39
300_5%_4
PC33
100p/50V_4
PQ3
AON6414AL
D
S
5
G
4
18
BQHIDRV
BQB_2
17
19
BQPHASE
15
BQLODRV
14
21
13
BQSRP
12
BQSRN
11
BQBATDRV
PC34
2200p/50V_4
Place this R&C
close to EC
+BATCHG
3
2
1
1_5%_6
PC10
0.01u/50V_4
RB500V-40
1PR20
0.047u/25V_4
PR31
10_1%_6
PR34
5.6_1%_6
SYS_I <37>
PD6
PC22
PC4
0.1u/25V_4
2
PQ7
EMB20N03V
PC29
0.1u/25V_4
PC31
0.1u/25V_4
4
REGN6V
4
PC30
0.1u/25V_4
PL1
*Short_0805
PL3
*Short_0805
G
153
G
153
2
BATT+
SMD
PC5
0.1u/25V_4
PR4
330_5%_4
MBDATA <37>
MBCLK <37>
PC11
*100p/50V_4
PD3
*PDZ5.6B
PC17
D
4.7u/25V_8
S
PQ6
EMB20N03V
2
PL5
4.7uH_7x7x3
1 2
PR24
2.2_5%_6
D
S
2
PC26
2200p/50V_4
PC18
PR5
330_5%_4
PC12
*100p/50V_4
PD4
2 1
2 1
*PDZ5.6B
+VIN
PC19
0.1u/25V_4
BQLR
*Short_0201
CSOP
CSON
EC12
10u/25V_8
2200p/50V_4
PR22
0.01_1%_12
1 2
PR27
NB5
NB5
NB5
PR28
*Short_0201
BATSHIP <37>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
SMC
B_TEMP_MBAT
PR1
200K_5%_4
PR2
1K_1%_4
PC1
0.01u/50V_4
Place this cap
close to EC
PC24
10u/25V_8
+BATCHG
PR40
470_5%_8
3
2
PQ10
2N7002K
1
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Charger (BQ24738H)
Charger (BQ24738H)
Charger (BQ24738H)
1
2
3
4
5
6
+3VPCU
PC2
0.01u/50V_4
PC25
10u/25V_8
1
14"
7 8
CN2
BBP26CC-B520Q-9H
TEMP_MBAT <37>
+BATCHG
PC23
0.1u/25V_4
1
2
38 51 Wednesday, March 08, 2017
38 51 Wednesday, March 08, 2017
38 51 Wednesday, March 08, 2017
PD7
*MEK500V-40
of
of
of
1A
1A
1A
1A
1A
1A
Page 39
5
DC/DC +3VS5/+5VS5
4
3
2
1
+VIN <27,35,38,40,41,43,44,46,47,48,50>
+3VS5 <4,15,31,36,37,40,41,42,45,46,49>
+5VS5 <4,31,32,40,41,42,43,44,45,46,48>
+3VPCU <6,13,31,33,36,37,38>
+5VPCU <38,45,49>
D D
HWPG <4,37,40,41>
S5_ON <37,39>
C C
B B
S5_ON <37,39>
A A
Do Not add test pad on LDO pin
+3VPCU
SY8286BPG
SY8286BLDOEN
PR59
150K_1%_4
Vih>0.8V
SY8286BEN
PC49
*0.1u/16V_4
17
PC41
2.2u/10V_4
9
11
12
15
PR50
*Short_0402
+VIN
PR54
*Short_0402
+3VS5
PR49
10K_1%_4
PR57
499K_1%_4
PR56
1M_5%_4
Do Not add test pad on VCC & LDO pin
PR64
1K_1%_4
+VIN
PR60
*Short_0402
PR3264
499K_1%_4
Vih>0.8V
PR67
1M_5%_4
+5VPCU
PC67
2.2u/10V_4
Do Not add test pad
on VCC & LDO pin
PC52
2.2u/10V_4
SY8208CPG HWPG
PR3268
150K_1%_4
SY8208CEN
PC66
*0.1u/16V_4
15
9
11
12
17
PU10
SY8286BRAC
LDO
PG
EN2
EN1
NC#2
PU11
SY8286CRAC
LDO
PG
EN2
EN1
VCC
GND#28GND#318GND#4
GND#28GND#318GND#4
IN#1
IN#2
IN#3
IN#4
GND#1
LX#1
LX#2
LX#3
NC#1
NC#3
OUT
21
IN#1
IN#2
IN#3
IN#4
GND#1
LX#1
LX#2
LX#3
NC#1
NC#2
OUT
21
BS
FF
BS
FF
2
3
4
5
7
1
SY8286BBST
6
SY8286BBSW
19
20
10
16
14
SY8286BVOUT
13
SY8286BFB
2
3
4
5
7
1
SY8208CBST
6
SY8208CSW
19
20
10
16
14
SY8208CVOUT
13
SY8208CFB
PC36
0.1u/25V_4
PR51
1_5%_6
PC53
0.1u/25V_4
PR61
1_5%_6
PC37
4.7u/25V_8
SY8286BBST_S
PR58
1K_1%_4
PC54
4.7u/25V_8
0.1u/25V_4
SY8208CBST_S
PR68
1K_1%_4
+VIN_3VS5 +VIN
PC38
PC39
4.7u/25V_8
2200p/50V_4
PC42
0.1u/25V_4
PR53
*2.2_5%_6
PC50
*2200p/50V_4
PC51
470p/50V_4
+VIN_5VS5 +VIN
PC56
PC55
2200p/50V_4
4.7u/25V_8
PC58
PR63
*2.2_5%_6
PC65
*2200p/50V_4
PC68
470p/50V_4
PL8
*Short_0805
2.2uH_7x7x3
1 2
7x7x3mm
PC40
0.1u/25V_4
7x7x3mm
PL7
1 2
1.5uH_7x7x3
PC57
0.1u/25V_4
PL9
PR55
*Short_0201
PR65
*Short_0201
PC44
22u/6.3V_8
PC60
22u/6.3V_8
PC45
22u/6.3V_8
PC61
22u/6.3V_8
PC46
22u/6.3V_8
PC62
22u/6.3V_8
PC47
*22u/6.3V_8
PC63
*22u/6.3V_8
+3.3 Volt +/- 5%
TDC:8A
EDP:9A
+3VS5
+
PC48
0.1u/16V_4
PC43
*150u/6.3V_3528
+5 Volt +/- 5%
TDC:8A
EDP:9A
+5VS5
+
PC64
0.1u/16V_4
PC59
*150u/6.3V_3528
39
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
3/5VS5 (SY8208B/SY8208C)
3/5VS5 (SY8208B/SY8208C)
NB5
NB5
5
4
3
2
NB5
3/5VS5 (SY8208B/SY8208C)
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
39 51 Wednesday, March 08, 2017
39 51 Wednesday, March 08, 2017
39 51 Wednesday, March 08, 2017
1A
1A
1A
1A
1A
1A
Page 40
1
+VIN <27,35,38,39,41,43,44,46,47,48,50>
+5VS5 <4,31,32,39,41,42,43,44,45,46,48>
+1.2VSUS <3,6,17,18,42>
DDR_VTT <17,18>
PR69
PR71
*Short_0402
*Short_0402
PR70
*Short_0402
DDR_VTT
PC70
*0.1u/16V_4
PC74
10u/6.3V_6
HWPG <4,37,39,41>
A A
DDR_VTT_PG_CTRL_R <18>
( 3mA )
B B
DDR_VTTREF
100_1%_4
PC78
0.1u/16V_4
MAINON <37,41,42,45>
PR77
SUSON <37,42,45>
PC79
0.033u/25V_4
PR73
*Short_0402
PC69
*0.1u/16V_4
PC86
*10u/6.3V_6
+5VS5
2
20
2
1
4
19
PU12
VTT
VTTSNS
VTTGND
VTTREF
VLDOIN
PR80
*Short_0201
PR81
*Short_0201
1P35V_S5
1P35V_S3
7
G5619RZ1U
GND#1
3
11
3
4
5
40
PR72
243K_1%_4
PR74
17
18
16
15
12
499K_1%_4
1P35V_UGATE
1P35V_BOOT
1P35V_PHASE
1P35V_LGATE
1P35V_VDD
PC87
1u/6.3V_4
PR75
2.2_5%_6
+5VS5 +1.2VSUS
PC77
0.1u/25V_4
G
4
G
4
PQ13
AON7752
Rds(on) 14m ohm
153
2
5
213
D
S
D
S
PC75
0.1u/25V_4
PQ12
EMB20N03V
PR78
*2.2_5%_6
*2200p/50V_4
PC85
PC76
4.7u/25V_8
PC71
4.7u/25V_8
1uH_7x7x3
1 2
7x7x3mm
1P35V_TON
1P35V_CS
1P35V_PGOOD
9
10
13
S58S3
CS
TON
PGOOD
PGND
VID
VDDQSET
6
14
1P35V_FB
1P35V_VID
GND#2
VDDQSNS
5
21
1P35V_VDDQ
DH
BST
LX
DL
VCC
PL11
*Short_0603
PC72
2200p/50V_4
PL10
PR79
*Short_0201
+VIN +VIN_DDR
PC73
0.1u/25V_4
+1.2VSUS_S
+1.2VSUS +/- 5%
Countinue current:6A
Peak current:8A
OCP minimum:12A
+1.2VSUS
PR76
*short-solderjumper-3
1 2
PC81
PC80
0.1u/16V_4
PC82
PC83
22u/6.3V_8
22u/6.3V_8
PC84
*22u/6.3V_8
*22u/6.3V_8
PR82
PR83
10K_1%_4
C C
7.87K_1%_4
+2.5VSUS +/- 3%
+3VS5
+5VS5
PC93
1u/6.3V_4
PR87
*Short_0402
PC89
0.1u/16V_4
PC88
10u/6.3V_6
PR84
SUSON
D D
1
2
0_5%_4
PC92
*0.1u/16V_4
HWPG
PU13
G9661MF11U
3
VIN
2
VEN
VPP4GND#1
1
POK
R2
3
GND#2
ADJ
7
PR86
100K_1%_4
NC
VO
PR85
215K_1%_4
5
6
8
9
R1
Countinue current:2A
Peak current:3A
OCP minimum:4A
+2.5VSUS
PC90
*10u/6.3V_6
VO=(0.8(R1+R2)/R2)
R2<120Kohm
PC91
0.1u/16V_4
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
NB5
NB5
NB5
Date: Sheet
Wednesday, March 08, 2017
Date: Sheet of
Wednesday, March 08, 2017
Date: Sheet of
4
Wednesday, March 08, 2017
DDR4 (G5619RZ1U)
DDR4 (G5619RZ1U)
DDR4 (G5619RZ1U)
5
40 51
40 51
40 51
1A
1A
1A
1A
1A
1A
of
Page 41
5
+VIN <27,35,38,39,40,43,44,46,47,48,50>
+3VS5 <4,15,31,36,37,39,40,42,45,46,49>
+5VS5 <4,31,32,39,40,42,43,44,45,46,48>
+1.0V_DEEP_SUS <9,13,15,42>
+1.8V_DEEP_SUS <9,15,49>
MAINON <37,40,41,42,45>
+1.5V
D D
HWPG <4,37,39,40>
SLP_SUS_ON <15,37,42>
C C
HWPG
PR95
*Short_0402
4
PR91
*Short_0402
PR92
*Short_0201
PC99
1u/6.3V_4
1237PGPCH
1237PFMPCH
1237ENPCH
1237SSPCH
+5VS5
PC108
*0.1u/16V_4
PC109
0.1u/16V_4
PU8
21
VCC
1
PGOOD
3
PFM
2
EN
23
SS
AOZ2260QI-18
3
2
1
41
PR88
84.5K_1%_4
6
7
TON
IN#1
22
IN#4
BST
LX#1
LX#3
LX#4
LX#5
PGND#1
PGND#2
PGND#3
PGND#4
PGND#5
AGND
FB
20
1237BSTPCH
10
1237LX
16
17
18
12
13
14
15
19
4
5
1237FBPCH
PC94
PC95
0.1u/25V_4
PR90
0_5%_6
PR96
2.61K_1%_4
PR97
10K_1%_4
+VIN_0.95V +VIN
PC96
PC97
2200p/50V_4
4.7u/25V_8
4.7u/25V_8
PC100
0.1u/25V_4
1237FBPCH_S
Vout1=(1+R1/R2)*0.8
PL12
*Short_0603
PR93
*2.2_5%_6
PC107
*2200p/50V_4
PC98
0.1u/25V_4
PL13
1uH_7x7x3
1 2
7x7x3mm
PR94
*Short_0201
(V1.00A+V1.00_MODPHY+VccPRIM_CORE)
+1.0VS5 Volt +/- 5%
Countinue current:6A
Peak current:9A
+1.0V_DEEP_SUS
PC101
PC102
PC103
PC106
0.1u/16V_4
22u/6.3V_8
22u/6.3V_8
PC104
*22u/6.3V_8
*22u/6.3V_8
+
PC105
*220u/2V_7343H1.9
2
+VIN
PR98
1M_5%_4 PC110
PQ16
2N7002K
2
PR102
3
1M_5%_4
1
+1.8V_DEEP_SUS +/- 5%
+3VS5
B B
PR101
SLP_SUS_ON
A A
*Short_0402
*0.1u/16V_4
5
PC116
PC111
*10u/6.3V_6
HWPG
+5VS5
PC119
1u/6.3V_4
PR108
*Short_0402
PC112
0.1u/16V_4
PU15
G9661MF11U
3
VIN
2
VEN
VPP4GND#1
1
POK
R2
5
NC
6
VO
8
9
GND#2
ADJ
7
R1
PR105
127K_1%_4
PR371
100K_1%_4
VO=(0.8(R1+R2)/R2)
R2<120Kohm
4
1 2
Countinue current:1.0A
Peak current:3A
+1.8V_DEEP_SUS
PC114
*10u/6.3V_6
PC115
0.1u/16V_4
+VIN
PR99
1M_5%_4
PQ17
PR106
METR3904-G
2
PR104
1M_5%_4
1 3
PR103
MAINON <37,40,41,42,45>
75K_1%_4
*100K_1%_4
3
+1.8V
PR100
*22_5%_8
3
2
PQ15
*2N7002K
1
+1.8V_DEEP_SUS
65241
3
PC113
2200p/50V_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
Date: Sheet of
0.1u/16V_4
PQ14
EMB32N03K
PC117
*10u/6.3V_6
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
0.05A
+1.8V
PC118
0.1u/16V_4
+1.0V/+1.8V_DEEP_SUS
+1.0V/+1.8V_DEEP_SUS
+1.0V/+1.8V_DEEP_SUS
1
1A
1A
1A
1A
1A
41 51 Wednesday, March 08, 2017
41 51 Wednesday, March 08, 2017
41 51 Wednesday, March 08, 2017
1A
Page 42
5
+1.0V <2,4,37,43>
+3VS5 <4,15,31,36,37,39,40,41,45,46,49>
+5VS5 <4,31,32,39,40,41,43,44,45,46,48>
+VCCIO <2,6>
+1.2VSUS <3,6,17,18,40>
+VCCSTPLL <2,4,5,6,9>
+1.0V_DEEP_SUS <9,13,15,41>
+1.2V_VCCPLL_OC <6>
MAINON <37,40,41,45>
4
3
2
1
42
Volume Segment
Vcc_STG: 0.04A
D D
+1.0V_DEEP_SUS +VCCSTPLL
PC124
0.1u/16V_4
C C
PC125
*10u/6.3V_6
Volume Segment
Vcc_ST: 0.12A
Vcc_PLL: 0.12A
<= 10ms, full load ready
(Vcc_ST+Vcc_PLL)
Imax:0.24A
PL15
*Short_0603
MAINON
+1.0V_DEEP_SUS
PC120
1u/6.3V_4
PR109
*Short_0402
+3VS5
PC123
0.1u/16V_4
PC126
*0.1u/16V_4
PU34
1
VIN#1
2
VIN#2
VIN#39VOUT
3
VBIAS
4
ON
AOZ1335DI
GND
8
5
Imax:3.4A
PC121
0.1u/16V_4
Vcc_IO: 3.4A
<= 10ms full load ready
+VCCIO
PC122
*10u/6.3V_6
PL14
*Short_0603
Imax:0.04A
+1.0V
2015/10/26 updated
+3VS5
PC127
PR110
SUSON <37,40,45>
SLP_SUS_ON <15,37,41>
B B
A A
5
*0_5%_4
PR111
*0_5%_4
4
1
2
3 5
*0.1u/16V_4
PR112
*47K_1%_4
4
PU17
*MC74VHC1G08D FT2G
PQ19B
*2N7002KDW
2
PC129
*1000p/50V_4
6 1
+5VS5
3
+1.2VSUS
2
3
PQ18
*DMG3414U-7
1
PC130
*0.1u/16V_4
+1.2V_VCCPLL_OC
PR114
*1M_5%_4
PR115
*2M_5%_4
PC128
0.1u/16V_4
5
PR113
*22_5%_8
3 4
PQ19A
*2N7002KDW
PR116
0_1%_6
*Short_0603
PC131
*10u/6.3V_6
<= 240us, full load ready
TDC:0.26A
+1.2V_VCCPLL_OC
PL16
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet
Date: Sheet
2
Date: Sheet
+1.0V/+VCCSTPLL
+1.0V/+VCCSTPLL
+1.0V/+VCCSTPLL
1
42 51 Wednesday, March 08, 2017
42 51 Wednesday, March 08, 2017
42 51 Wednesday, March 08, 2017
1A
1A
1A
1A
1A
1A
of
of
of
Page 43
1
+VIN <27,35,38,39,40,41,44,46,47,48,50>
+1.0V <2,4,37,42>
+VCCSA <6,44>
+VCC_CORE <5,7>
+VCCGT <7>
PR3547
100_1%_4
+VCCSA
VCCSA_SENSE <6>
VSSSA_SENSE <6>
Place close to
VCCSA Inductor
SWN_SA
RcNARd
U22
U42
32.4K
H_PROCHOT# <2,37>
VR_SVID_DATA <5>
VR_SVID_ALERT# <5>
VR_SVID_CLK <5>
+1.0V
PR3548
PR3549
PR3550
*75_1%_4
PR3558
100_1%_4
PR3561
100_1%_4
CSN_SA <44>
PR3566
14K_1%_4
PR3571
7.5K_1%_6
NA
100K
PWM_SA <44>
DRON <44>
IMVP_PW RGD
TSENSE_GT TSENSE_CORE
PR3604
*Short_0402
PR3608
15K_5%_4
place close to
GT MOSFET
45.3_1%_4
1 2
PR3564
100K_NTC_4_1%
0.018u/16V_4
PR3573
1K_1%_4
VRON <37>
PMON
+VCC_CORE
VCC_SENSE <5>
VSS_SENSE <5>
1 2
1
*75_1%_4
VR_SVID_DATA
VR_SVID_ALERT#
VR_SVID_CLK
H_PROCHOT#
PR3559
*Short_0402
PR3562
*Short_0402
PC563
PC566
150p/50V_4
PR3580
10_5%_4
PR3582
49.9_1%_4
PR3609
100K_NTC_4_1%
A A
B B
C C
D D
VCCGT_SENSE <7>
VSSGT_SENSE <7>
PC538
0.1u/16V_4
PC547
1000p/50V_4
PR3565
10_5%_4
PC558
*390p/50V_4
PC568
0.01u/50V_4
PR3574
102K_1%_4
PR3576 *Short_0402
PR3578 *Short_0402
+VIN
+3V
+VCCGT
PR3539
100_1%_4
PR3543
100_1%_4
U22
U42
PC544
1000p/50V_4
PR3560
2.49K_1%_4
PR3563
1K_1%_4
PC549
1000p/50V_4
PC560
2200p/50V_4
CSN_SA_1
PC909
1000p/50V_4
Rc
PR3572
32.4K_1%_4
PC569
470p/50V_4
PR3577
51.1K_1%_4
PR3579
75_1%_4
PR3581
*Short_0402
PR3583
1K_1%_4
PR3584
10K_1%_4
PR3592
20K_1%_4
PC588
100p/50V_4
PR3597
100_1%_4
PR3598
100_1%_4
PR3605
*Short_0402
PR3610
15K_5%_4
place close to
VCORE MOSFET
Ra
34K
40.2K
470p/50V_4
CSP_SA
ILIM_SA
COMP_SA
IOUT_SA
Rd
DRON
VR_HOT#
SDIO
ALERT#
SCLK
VRMP
*Short_0402
PR3591
*Short_0402
PR3593
*Short_0402
PR3599
*Short_0402
PR3611
100K_NTC_4_1%
1 2
PR3540
*Short_0402
1000p/50V_4
PR3544
*Short_0402
Rb
16.5K
18.7K
PC545
VSP_SA
VSN_SA
PC580
0.01u/50V_4
PR3586
PR3588
*Short_0402
PC535
Ra Rb
PU32
49
48
45
44
46
47
43
40
39
35
36
37
38
12
VR_RDY
U22
U42
2
PC522
1000p/50V_4
PR3545
1K_1%_4
PC536
1000p/50V_4
PR3551
1K_1%_4
0.01u/50V_4
PC542
15p/50V_4
PC910
1000p/50V_4
PR3557
31.6K_1%_4
16.5K_1%_4
PR3556
ILIM_GT
IOUT_GT
34
31
ILIM_1a
IOUT_1a
VSP_1b
VSN_1b
CSN_1b
CSP_1b
ILIM_1b
COMP_1b
IOUT_1b
PWM/ADDR_VBOOT
DRON
VR_HOT#
SDIO
ALERT#
SCLK
VRMP
VR_RDY42EN
41
VR_EN
PC587
0.1u/16V_4
PC589
1000p/50V_4
PR3600
1K_1%_4
PC591
2200p/50V_4
Re
26.7K
25.5K
Rf
102K
U22
U42
154K
2
PR3536
2K_1%_4
PR3541
1.65K_1%_4
PC539
PC546
TSENSE_GT
27
TSENSE_1a
0.1u/16V_4
VSN_GT
COMP_GT
30
29
VSN_1a
COMP_1a
PR3537
10_5%_4
PC523
2200p/50V_4
HG_GT
CSP_GT
CSN_GT_1
VSP_GT
33
32
25
28
HG3
VSP_1a
CSP_1a
CSN_1a
NCP81236MNTXG
DIFFOUT_2ph/IccMax_2ph2FB_2ph3ILIM_2ph5CSCOMP_2ph
VSP_2ph
PSYS50VSN_2ph
TSENSE_2ph
IOUT_2ph
4
1
51
52
11
PSYS
26.7K_1%_4
PR3612
49.9_1%_4
program IccMax_2ph
TSENSE_CORE
VSP_CORE
Re
PR3602
PR3616
102K_1%_4
VSN_CORE
PC594
330p/50V_4
PR3613
1K_1%_4
Rf
IOUT_CORE
DIFFOUT_CORE
PC592
470p/50V_4
FB_CORE
PR3614
3K_1%_4
BST_GT
26
COMP_2ph
COMP_CORE
BST3
ILIM_CORE
15p/50V_4
CSN_GT
PC524
0.015U/16V_4
LG_GT
SW_GT
24
23
15
SW3
LG3/ICCMAX_1b
LG1/ROSC
LG2/ICCMAX_1a
CSP1_2ph
CSREF_2ph
CSP2_2ph
CSSUM_2ph
EPAD
6
53
13
CSCOMP_CORE
Rg
PR3594
U22
U42
10K_1%_4
PC595
PC596
2200p/50V_4
PR3538
100K_NTC_4_1%
PC525
1000p/50V_4
PR3555
11K_1%_4
HG1
14
BST1
16
SW1
17
21
HG2
22
BST2
20
SW2
19
10
8
9
7
18
PVCC
VCC
PR3585
2.2_5%_6
PC584
1u/6.3V_4
U22
U42
Rg
10K
19.1K
1 2
PR3542
14K_1%_4
PC537
0.22u/25V_6
CSP_CORE1
CSREF_CORE
CSP_CORE2
CSSUM_CORE
Rh
0-ohm
N/A
PR3546
7.5K_1%_6
+5VS5
PC581
3
Place close to
GT Inductor
SWN_GT
PR3338
1_5%_6
SW_GT
PQ28
AON6760
PC559
0.22u/25V_6
PR3568
14K_1%_4
PC567
*0.22u/25V_6
PR3575
29.4K_1%_4
PC578
+5VS5
Rh
PR3629
2.2u/10V_4
0_5%_4
3
G
4
G
4
SW1
Rk
0.01u/50V_4
PC593
*0.022u/16V_4
2
153
5
213
PR3627
1_5%_6
PR3628
*1_5%_6
D
S
D
S
SW2
PR3595
4.02K_1%_4
PC590
0.022u/16V_4
PR3606
*4.02K_1%_4
PC526
4.7u/25V_8
PQ27
AON6414AL
PR3552
*2.2_5%_6
PC543
*2200p/50V_4
PQ21
AON6760
PQ46
*AON6760
SWN_CORE1
PR3601
10_1%_4
PR3603
*10_1%_4
SWN_CORE2
PC527
4.7u/25V_8
G
4
153
G
4
U22
U42
G
4
153
G
4
CSN_CORE1
CSN_CORE2
*Short_0201
D
S
2
5
D
S
213
Rk
29.4K
17.2K
D
S
2
5
D
S
213
169K_1%_4
PR3607
Rj
*169K_1%_4
PC597
470p/50V_4
PC528
4.7u/25V_8
PR3553
PR3596
PL46
0.15uH_7x7x3
1 2
PC550
4.7u/25V_8
PQ20
AON6414AL
PQ110
AON6760
G
4
PC570
*4.7u/25V_8
PQ45
*AON6414AL
PQ111
*AON6760
G
4
Ri
165K_1%_4
PC598
*390p/50V_4
4
PC530
PC529
0.1u/25V_4
*4.7u/25V_8
DCR=1.9m-ohm+/-7%
7x7x3mm
PR3554
*Short_0201
CSN_GT
SWN_GT
PC552
PC551
4.7u/25V_8
4.7u/25V_8
5
PR3567
D
2.2_5%_6
S
213
PC565
2200p/50V_4
PC571
PC572
*4.7u/25V_8
U22
U42
PR3615
5
213
D
S
Ri
169K
169K 169K
PR3617
75K_1%_4
4
PR3587
*2.2_5%_6
PC586
*2200p/50V_4
Place close to
CORE1 Inductor
*Short_0805
PC531
2200p/50V_4
*4.7u/25V_8
Rj
NA
PR3618
100K_NTC_4_1%
1 2
PL45
For Acoustic
PC615
22u/6.3V_8
PC548
*4.7u/25V_8
PR3569
*Short_0201
PC573
*4.7u/25V_8
PR3589
*Short_0201
PC532
0.1u/25V_4
PC614
PC553
0.1u/25V_4
PL48
0.15uH_7x7x3
1 2
PC574
0.1u/25V_4
PL50
*0.15uH_7x7x3
1 2
5
+VIN +VIN_VCCGT
+
PC533
+VCC_GT
U-line 42 (15W)
+
TDC:12A
PC534
Icc max:28A
L/L=3.1mV/A
100u/25V_D6.3H5.8
+
22u/6.3V_8
PC554
2200p/50V_4
DCR=1.9m-ohm+/-7%
7x7x3mm
PR3570
*Short_0201
CSN_CORE1
SWN_CORE1
PC540
*220u/2V_7343H1.9
PC555
+VCCGT
*100u/25V_D6.3H5.8
+
+VIN +VIN_VCC_CORE
0.1u/25V_4
+VIN +VIN_VCC_CORE
+VCC_GT
U-line 22 (15W)
TDC:18A
PC350
Icc max:31A(22)
L/L=3.1mV/A
330u/2V_D5H4.2
EC13
10u/25V_8
PC613
22u/6.3V_8
+VCC_CORE
U-line 22(15W)
TDC:21A
Icc max:29A
L/L=2.4mV/A
PC414
+VCC_CORE
PC579
2200p/50V_4
PC575
0.1u/25V_4
U-line 42(15W)
TDC:42A
Icc max:64A
L/L=2.4mV/A
DCR=1.9m-ohm+/-7%
7x7x3mm
PR3590
*Short_0201
CSN_CORE2
SWN_CORE2
+VCC_CORE +VCC_CORE +VCC_CORE +VCC_CORE
PC407
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
Date: Sheet of
PC415
PC416
22u/6.3V_8
PC406
PC408
22u/6.3V_8
22u/6.3V_8
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
CPU VR IC (NCP81236)
CPU VR IC (NCP81236)
CPU VR IC (NCP81236)
5
+VCC_CORE
22u/6.3V_8
+VCC_CORE
22u/6.3V_8
*22u/6.3V_8
43
+
PC564
*220u/2V_7343H1.9
+
PC583
*220u/2V_7343H1.9
PC410
*22u/6.3V_8
43 51 Wednesday, March 08, 2017
43 51 Wednesday, March 08, 2017
43 51 Wednesday, March 08, 2017
+
PC908
*330u/2V_D5H4.2
1A
1A
1A
1A
1A
1A
Page 44
1
2
3
4
5
44
A A
+VIN_VCCSA +VIN
PC600
PR3622
4.7u/25V_8
PL52
0.47uH_7x7x3
1 2
PC601
0.1u/25V_4
DRVH
BST
DRVL
PR3619
1_5%_6
G
PQ104
4
153
G
4
PC604
0.22u/25V_6
1
7
SW
5
MDV1595SURH
VCCSA
8
PU33
B B
C C
PWM_SA <43>
DRON <43>
PR3620
*Short_0402
+5VS5
PC611
2.2u/10V_4
2
PWM
3
EN
NCP81253MNTBG
4
VCC
GND#16GND#2
9
2
5
213
D
S
D
S
PC599
PQ103
EMB20N03V
PR3621
*2.2_5%_6
PC612
*2200p/50V_4
4.7u/25V_8
*Short_0201
PL51
*Short_0805
PC602
2200p/50V_4
DCR=4.2m ohm(max)
PR3623
*Short_0201
PC603
0.1u/25V_4
PC605
22u/6.3V_8
CSN_SA <43>
SWN_SA <43>
PC606
VCCSA
+VCCSA
PC609
*22u/6.3V_8
PC610
*22u/6.3V_8
PC608
PC607
22u/6.3V_8
22u/6.3V_8
*22u/6.3V_8
D D
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet
Date: Sheet
1
2
3
4
Date: Sheet
+VCCSA (NCP81253)
+VCCSA (NCP81253)
+VCCSA (NCP81253)
5
44 51 Wednesday, March 08, 2017
44 51 Wednesday, March 08, 2017
44 51 Wednesday, March 08, 2017
1A
1A
1A
1A
1A
1A
of
of
of
Page 45
5
+3V <2,4,10,11,12,13,14,15,17,18,26,27,28,29,30,31,33,34,35,37,43>
+5V <26,27,28,29,33,35,36>
+VIN <27,35,38,39,40,41,43,44,46,47,48,50>
+3VS5 <4,15,31,36,37,39,40,41,42,46,49>
+5VS5 <4,31,32,39,40,41,42,43,44,46,48>
+3VSUS <33>
+5VPCU <38,39,49>
+3VLANVCC <30>
4
3
2
1
45
D D
PL24
*Short_080 5
PC267
*10U/6.3V_6
+5VPCU
MAINON <37,40,41,42>
C C
PR293 *Short_0402
5.1A 0.04A
+5V +3VSUS
PL25
*Short_080 5
PC278
B B
MAINON
*10U/6.3V_6
+5VPCU
PR296 *Short_0402
+3VS5 +3VS5
PC265
PC268
0.1U/16V_4
PC271
0.1U/16V_4
PC272
*0.1U/16V_4
PC279
0.1U/16V_4
PC282
0.1U/16V_4
PC283
*0.1U/16V_4
+5VS5
0.1U/16V_4
PC276
0.1U/16V_4
13
VOUT1#1
14
VOUT1#2
4
BIAS
APL3523AQBI-TRG
3
EN1
PC274
1000P/50V_4
13
VOUT1#1
14
VOUT1#2
4
BIAS
APL3523AQBI-TRG
3
EN1
PC285
1000P/50V_4
2
VIN1#21VIN1#1
PU20
SS1
12
2
VIN1#21VIN1#1
PU21
SS1
12
6
VIN2#1
10
6
VIN2#1
10
7
VIN2#2
VOUT2#1
VOUT2#2
GND#1
GND#2
EN2
SS2
PC275
1000P/50V_4
7
VIN2#2
VOUT2#1
VOUT2#2
GND#1
GND#2
EN2
SS2
PC286
1000P/50V_4
8
9
11
15
5
+3VS5
8
9
11
15
5
PC266
0.1U/16V_4
PC269
0.1U/16V_4
PR294 *Short_0402
PC273
*0.1U/16V_4
PC277
0.1U/16V_4
PC280
0.1U/16V_4
PR297 *Short_0402
PC284
*0.1U/16V_4
*Short_060 3
PC270
*10U/6.3V_6
PC281
*10U/6.3V_6
0.67A 5.2A
+3VLANVCC +3V
PR292
LAN_POWER <37>
PR295
*Short_060 3
SUSON <37,40,42>
A A
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Load switch IC (APL3523A)
Load switch IC (APL3523A)
NB5
NB5
5
4
3
2
NB5
Load switch IC (APL3523A)
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
45 51 Wednesday, Mar ch 08, 2017
45 51 Wednesday, Mar ch 08, 2017
45 51 Wednesday, Mar ch 08, 2017
1A
1A
1A
1A
1A
1A
Page 46
5
R17M-M1-70
+1.8V_VGA
VID Override table (VDD)
3662SVD
PC449
*0.1u/16V_4
VREF_PINSET
VREF_PINSET
DGPU_PR_EN <12,13,49>
3662EN <48>
PR3457
*10K_1%_4
D D
C C
3662SVC
PR1210
*10K_1%_4
PR3458
*10K_1%_4
PR1208
*10K_1%_4
R17M-M1-30
R17M-M1-70
SVI2_CLK <20>
SVI2_DATA <20>
SVI2_SVT <20>
B B
DGPU_PWROK <12,37,48,49>
+3VS5
DGPU_OCP_L <20>
Put close to
VGACORE hot sport
PHASE 1
1 Phase setting
R1
R2
R3
A A
R2
PR3502
14K_1%_4
SVD SVC
0
0
0
1100 . 9 V
1 1
PR1201
10K_1%_4
PR3470
60.4K_1%_4
PR3473
10K_1%_4
+3VS5
PR3471
6.04K_1%_4
PR3474
23.7K_1%_4
1
+3V_VGA
+1.8V_VGA
DGPU_PWROK
DGPU_PWROK
1 2
PR3499
100K_NTC_4_1%
R3
PR3503
11K_1%_4
PD16
RB500V-40
PR3491
10K_1%_4
4
Boot Voltage
1.1V
1.0V
0.8V
PR1205
10K_1%_4
2
PR3476
10K_1%_4
PR3479 2.2_5%_6
PR3480 *2.2_5%_6
PR3483 *Short_0201
PR3485 *Short_0201
PR3486 *Short_0201
PR3488 *Short_0201
PR3493
*10K_1%_4
PR3497
6.98K_1%_4
PR1204
48.7K_1%_4
PR3472
60.4K_1%_4
1 2
100K_NTC_4_1%
Put close to VGACORE
HOT SPOT
PC454
0.47u/6.3V_4
PR1207
*Short_0201
PR3494
*Short_0402
PR1206
2.94K_1%_4
PR3464
3662TSEN
PC456
1u/6.3V_4
3662PWROK
3662PGOOD
3662VRHOT
3662SET1
3662VDDIO
3662SVC
3662SVD
3662SVT
R1
PC462
VREF_PINSET
*100p/50V_4
2.2u/10V_4
3662EN
Vih=2V
PR3504
3.9_1%_4
PC464
0.47u/6.3V_4
PC448
22
11
10
32
19
15
16
17
18
20
12
13
NC
SET1
TSEN
EN
VDDIO
PWROK
SVC
SVD
SVT
PGOOD
9
VRHOT_L
IMON
VREF_PINSET
8899VCC
14
PR3456
4.7_5%_4
PC450
2.2u/10V_4
VCC
RT3662EBGQW
PU16
27
PVCC
+5VS5
8899PVCC
1
UGATE1
BOOT1
PHASE1
LGATE1
ISEN1P
ISEN1N
UGATE2
BOOT2
PHASE2
LGATE2
ISEN2P
ISEN2N
COMP
3
PR3459 *Short_0402
VIN
24
23
25
26
7
8
30
31
29
28
5
6
3
PC451
0.1u/25V_4
3662UGATE1
3662BOOT1
3662LX1
3662LGATE1
3662ISEN1P_1
3662ISEN1N_1
3662UGATE2
3662BOOT2
3662LX2
3662LGATE2
3662ISEN2P_1
3662ISEN2N_1
3662COMPA
PR1209
4.7_5%_4
PR3465
1_5%_6
0.1u/25V_4
+5VS5
PC452
PR3481
1_5%_6
+VIN_GPU
PC457
0.1u/25V_4
PC460
39p/50V_4
PR3495
56.2K_1%_4
3662UGATE1_G <47>
2
3662LX1 <47>
3662LGATE1 <47>
PR3478 *Short_0402
3662UGATE2_G <47>
3662LX2 <47>
3662LGATE2 <47>
PC461
270p/50V_4
PR3492
10K_1%_4
PR3475
3.3K_1%_4
PC453 0.47u/6.3V_4
PR3477 357_1%_4
PR3484
3.3K_1%_4
PC458
0.47u/6.3V_4
PR3487
357_1%_4
PR3489
0_5%_4
PR3490 *10K_1%_2
+VGA_CORE
+5VS5
PC455
0.1u/16V_4
PC459
0.1u/16V_4
Unstuff
stuff
1
46
3662ISEN1P <47>
3662ISEN1N <47>
3662ISEN2P <47>
3662ISEN2N <47>
1 Phase setting
1 Phase setting
R4
4
3662FBA
FB
21
2
PR3500 *Short_0402
PC463
*82p/50V_4
VSEN
RGND
GND
33
VGPU_CORE_SENSE_SRC
VSS_GPU_SENSE_SRC
1 Phase setting
PR3498
10_1%_4
PR3506
10_1%_4
VGPU_CORE_SENSE <22>
VSS_GPU_SENSE <22>
R4
5
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet
Date: Sheet
4
3
2
Date: Sheet
EC ENE KB9027B
EC ENE KB9027B
EC ENE KB9027B
1
1A
1A
1A
1A
1A
1A
46 51 Wednesday, March 08, 2017
46 51 Wednesday, March 08, 2017
46 51 Wednesday, March 08, 2017
of
of
of
Page 47
5
4
3
2
1
47
D D
VGACORE ( R17M-M1-30_ 25W/38W(1ms) )
+VIN +VIN_GPU
PC480
0.1u/25V_4
+
PR3508
*Short_0201
3662ISEN1P
3662ISEN1N
PR3511
*Short_0201
PC907
*100u/25V_D6.3H5.8
DCR=4mohm
PL40
0.47uH_7x7x3
1 2
DCR=4mohm
PL41
0.47uH_7x7x3
1 2
PC469
2200p/50V_4
+VIN_GPU
PC470
0.1u/25V_4
PC466
PC476
4.7u/25V_8
PC467
PC468
4.7u/25V_8
*4.7u/25V_8
*4.7u/25V_8
3662ISEN1P <46>
3662ISEN1N <46>
PC478
PC477
*4.7u/25V_8
PC479
2200p/50V_4
*4.7u/25V_8
PC465
D
PQ96
AON6414AL
PQ100
AON6760
PQ98
AON6414AL
PQ99
AON6760
G
4
S
2
153
5
D
G
4
S
213
D
G
4
S
2
153
5
D
G
4
S
213
4.7u/25V_8
PR3507
*2.2_5%_6
PC474
*2200p/50V_4
PC475
4.7u/25V_8
PR3510
*2.2_5%_6
PC485
*2200p/50V_4
3662UGATE1_G <46>
3662LX1 <46>
C C
B B
3662LGATE1 <46>
3662UGATE2_G <46>
3662LX2 <46>
3662LGATE2 <46>
3662UGATE1_G
3662UGATE2_G
PR3509
*Short_0201
PR3512
*Short_0201
+
PC294
100u/25V_D6.3H5.8
Countinue current:28A
Peak current=38A (1ms)
PHOCP_TDC=40A ( soft-start only)
OCP_SPIKE=55A(1ms)
Boot VID=0.9V
LL=1m V/A
+VGA_CORE
+
PC348
330u/2V_D5H4.2
+
PC349
330u/2V_D5H4.2
VGACORE ( R16M-M2-50_ 37W/56W(1ms) )
Countinue current:40A ( R16M-M2-50)
Peak current:56A (1mS) ( R16M-M2-50)
PHOCP_TDC=40A
OCP_SPIKE=75A(1ms)
Boot VID=0.9V
LL=1m V/A
+VGA_CORE
PC481
0.1u/16V_4
+
PC351
*330u/2V_D5H4.2
+
PC482
*220u/2V_7343H1.9
+
PC483
*220u/2V_7343H1.9
3
3662ISEN2P
3662ISEN2N
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
EC ENE KB9027B
EC ENE KB9027B
EC ENE KB9027B
1
1A
1A
1A
1A
1A
1A
47 51 Wednesday, March 08, 2017
47 51 Wednesday, March 08, 2017
47 51 Wednesday, March 08, 2017
3662ISEN2P <46>
3662ISEN2N <46>
A A
5
4
Page 48
5
4
3
2
1
48
D D
PR3513
127K_1%_4
+5VS5
21
VCC
PC489
1u/6.3V_4
C C
PR3516
DGPU_PWROK <12,37,46,49>
3662EN <46>
B B
*Short_0402
PR3518
*Short_0201
PR3520
*Short_0402
1237EN1.35V
PC500
*0.1u/16V_4
1237PG1.35V
1237PFM1.35V
Vih=2.5V
1237SS1.35V
PC501
0.1u/16V_4
1
PGOOD
3
PFM
2
EN
23
SS
AOZ2260QI-18
TON
IN#1
IN#4
LX#1
LX#3
LX#4
LX#5
PGND#1
PGND#2
PGND#3
PGND#4
PGND#5
AGND
7
22
20
BST
10
16
17
18
12
13
14
15
19
4
5
FB
1237BST1.35V
1237LX1.35V
1237FB1.35V
PC490
0.1u/25V_4
PR3514
1_5%_6
PR3521
10.5K_1%_4
PR3522
12K_1%_4
6
PU29
+VIN_1.35V +VIN
PC491
PC486
4.7u/25V_8
4.7u/25V_8
PC492
0.1u/25V_4
PR3517
*2.2_5%_6
PC499
*2200p/50V_4
1237FB1.35V_S
Vout1=(1+R1/R2)*0.8
PL42
*Short_0805
PC487
2200p/50V_4
1uH_7x7x3
1 2
PL43
PC488
0.1u/25V_4
PR3519
*Short_0201
+
PC493
*150u/6.3V_ 3528
+1.35V_VGA_S2
PC494
0.1u/16V_4
+1.5V Volt +/- 5%
Countinue current:6A
Peak current:7A
OCP minimum:9A
+1.5V_VGA
PR3515
*short3720
PC495
PC496
22u/6.3V_8
PC497
*22u/6.3V_8
22u/6.3V_8
PC498
*22u/6.3V_8
Vo
0.95V
1.05V 95.3k
1.35V 113k
1.5V 127k
Rton
82k
84.5k 1V
A A
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Num ber Rev
Size Document Num ber Rev
Size Document Num ber Rev
Custom
Custom
Custom
EC ENE KB9027B
EC ENE KB9027B
NB5
NB5
5
4
3
2
NB5
EC ENE KB9027B
Date: Sheet of
Date: Sheet of
Date: Sheet
1
1A
1A
1A
1A
1A
1A
of
48 51 Wednesday, March 08, 2017
48 51 Wednesday, March 08, 2017
48 51 Wednesday, March 08, 2017
Page 49
1
2
3
4
5
6
7
8
49
+0.95V +/- 3%
Countinue current:2A
A A
PR3523
PC502
*2.2_5%_6
PR3525
DGPU_PWROK <12,37,46,48>
+3VS5
PR3527
*Short_0603
B B
PC507
0.01u/50V_4
10u/6.3V_6
*Short_0402 PU30
PR3529
10_5%_6
PC509
1u/6.3V_4
10
11
+1.8V_DEEP_SUS
4
PGOOD
9
PVIN#1
PVIN#2
8
SVIN
GND
RT8068AZQW
*2200p/50V_4
1
LX#1
2
LX#2
3
LX#3
7
NC
6
FB
5
EN
PUT COLSE TO
+1.8V power.
Vih=1.6V
PC510
0.47u/6.3V_4
+3VS5
PC506
*68p/50V_4
PR3531
8.2K_1%_4
R2
PR3530
11.3K_1%_4
PL44
1uH_2.5x2.0x1.2
1 2
PC503
*22p/50V_4
PR3528
6.65K_1%_4
V0=0.6*(R1+R2)/R2
DGPU_PR_EN <12,13,46>
PR3526
*Short_0201
R1
Peak current:3A
OCP minimum:4A
+1.0V_VGA
+1.0V_VGA_S2
PR3524
*Short_0603
PC505
PC504
10u/6.3V_6
0.1u/16V_4
+1.8V_VGA & +0.95V_VGA
+VGA_CORE & +1.5_VGA
+0.95V_VGA
+3V_VGA
PC616
*10u/6.3V_6 PC508
PC514
0.1u/16V_4
PC517
0.1u/16V_4
Vih=1.2V
PC518
0.47u/6.3V_4
PC511
0.1u/16V_4
13
14
4
3
1000p/50V_4
VOUT1#1
VOUT1#2
BIAS
EN1
PC520
4
2
6
7
VIN1#21VIN1#1
VIN2#1
VIN2#2
VOUT2#1
VOUT2#2
PU31
APL3523AQBI-TRG
SS1
SS2
12
10
PC521
1000p/50V_4
0.3A
C C
D D
1
2
+1.8V_VGA +3V_VGA
DGPU_PR_EN DGPU_PR_EN
*Short_0603
3
PR3532
PD43
*RB500V-40
1
PR3534
10K_1%_4
+1.8V_VGA_S2
PC513
*10u/6.3V_6
2
+5VPCU
GND#1
GND#2
EN2
8
9
11
15
Vih=1.2V
5
0.47u/6.3V_4
PC512
0.1u/16V_4
PC519
PC515
0.1u/16V_4
PD17
RB500V-40
1
PR3535
10K_1%_4
5
+3V_VGA_S2
PC516
*10u/6.3V_6
2
PR3533
*Short_0603
0.06A
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
6
Date: Sheet of
7
EC ENE KB9027B
EC ENE KB9027B
EC ENE KB9027B
8
1A
1A
1A
1A
1A
1A
49 51 Wednesday, March 08, 2017
49 51 Wednesday, March 08, 2017
49 51 Wednesday, March 08, 2017
Page 50
1
2
3
4
5
6
7
8
50
A A
B B
EC50
*0.1u/25V_4
C C
D D
EC49
*0.1u/25V_4
EC48
*0.1u/25V_4
EC47
*0.1u/25V_4
EC46
*0.1u/25V_4
EMI request for ISN EMI request for ISN
+VIN +PRWSRC +VIN
EC22
*10u/25V_8
EC33
*10u/25V_8
EC44
*10u/25V_8
EC5
10u/25V_8
EC6
*10u/25V_8
EC77
*10u/25V_8
EC88
*10u/25V_8
EC99
*10u/25V_8
1
2
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet
Date: Sheet
3
4
5
6
Date: Sheet
7
EMI solution
EMI solution
EMI solution
50 51 Wednesday, March 08, 2017
50 51 Wednesday, March 08, 2017
50 51 Wednesday, March 08, 2017
8
1A
1A
1A
1A
1A
1A
of
of
of
Page 51
5
4
3
2
1
51
D D
C C
B B
A A
PROJECT : 0P1B
PROJECT : 0P1B
PROJECT : 0P1B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
EC ENE KB9027B
EC ENE KB9027B
EC ENE KB9027B
1
1A
1A
1A
1A
1A
1A
51 51 Wednesday, March 08, 2017
51 51 Wednesday, March 08, 2017
51 51 Wednesday, March 08, 2017