HOLT HI-8382UT, HI-8382U, HI-8382ST, HI-8382SM-01, HI-8382S Datasheet

...
January2001
TheHI-8382andHI-8383businterfaceproductsaresilicon gateCMOSdevicesdesignedasalinedriverinaccordancewith theARINC429busspecifications.
HI-8382,HI-8383
PINCONFIGURATION (TopView)GENERALDESCRIPTION
Inputsareprovidedforclockingandsynchronization.These signalsareAND'dwiththeDATAinputstoenhancesystem performanceandallowtheHI-8382tobeusedinavarietyof applications.Bothlogicandsynchronizationinputsfeature built-in2,000VminimumESDinputprotectionaswellasTTL andCMOScompatibility.
ThedifferentialoutputsoftheHI-8382areindependently programmabletoeitherthehighspeedorlowspeedARINC 429 outputriseandfalltimespecificationsthroughtheuseoftwo externalcapacitors.Theoutputvoltageswingisalsoadjustable bytheapplicationofanexternalvoltagetotheVREFinput.The HI-8382hason-chipZenerdiodesinserieswithafusetoeach differentialoutputprotectingtheARINCbusfromanovervoltage failure.Theoutputseachhaveaseriesresistanceof37.5ohms. TheHI-8383isidenticaltotheHI-8382exceptthattheseries resistorsare13ohmsandtheovervoltageprotectioncircuitry hasbeeneliminated.
TheHI-8382andHI-8383areintendedforusewherelogic sig nalsmustbeconvertedtoARINC429levelssuchasauser ASICortheHI-8282ARINC429SerialTransmitter/Dual ReceiverortheHI-6010ARINC429Transmitter/Receiver.Holt productsarereadilyavailableforbothindustrialandmilitary applications.PleasecontacttheHoltSalesDepartmentfor additionalinformation,includingdatasheetsfortheHI-8282and HI-6010products.
N/C
DATA(A)
N/C N/C
C
A
N/C N/C
(SeePage4-46foradditionalpackagepinconfigurations)
FUNCTION
4321282726
5 6
HI-8382J
7 8
9 10 11
28-PIN
PLASTIC
PLCC
12131415161718
+
HI-8382
25 24 23 22 21 20 19
CLOCK N/C DATA(B) C
B
N/C N/C N/C
FEATURES
!
LowpowerCMOS
!
TTLandCMOScompatibleinputs
!
Programmableoutputvoltageswing
!
AdjustableARINCriseandfalltimes
!
Operatesatdataratesupto100Kbits
!
Overvoltageprotection
!
IndustrialandMilitarytemperatureranges
!
DSCCSMDpartnumber
ARINC429DIFFERENTIALLINEDRIVER
TRUTHTABLE
SYNCCLOCKDATA(A)DATA(B)AOUTBOUTCOMMENTS
XLXX0V0VNULL LXXX0V0VNULL HHLL0V0VNULL HHLH-V+VLOW HHHL+V-VHIGH HHHH0V0VNULL
HOLTINTEGRATEDCIRCUITS
1(DS8382Rev.A)01/01
REFREF
REFREF
FUNCTIONALDESCRIPTION
HI-8382,HI-8383
TheSYNCandCLOCKinputsestablishdatasynchronization utilizingtwoANDgates,oneforeachdatainput.Eachlogic input,includingthepowerenable()input,are
STROBE TTL/CMOScompatible.Besidesreducingchipcurrentdrain, STROBE
alsofloatseachoutput.Howevertheovervoltage
fusesanddiodesoftheHI-8382arenotswitchedout. Figure1illustratesatypicalARINC429busapplication.
ThreepowersuppliesarenecessarytooperatetheHI-8382; typically+15V,-15Vand+5V.Thechipalsoworkswith±12V supplies.The+5Vsupplycanalsoprovideareference voltagethatdeterminestheoutputv oltageswing.The differentialoutputvoltageswingwillequal2V.Ifavalueof Votherthan+5Visneeded,aseparate+5Vpowersupply
REF
isrequiredforpinV.
1
REF
WiththeDATA(A)inputatalogichighandDATA(B)inputata logiclow,Awillswitchtothe+VrailandBwill switchtothe-Vrail(ARINCHIGHstate).Withbothdata
OUTREFOUT
REF
inputsignalsatalogiclowstate,theoutputswillbothswitchto 0V(ARINCNULLstate).
Thedriveroutputimpedance,R,isnominally75ohms.
OUT
Theriseandfalltimesoftheoutputscanbecalibratedthrough theselectionoftwoexternalcapacitorvaluesthre connectedtotheCandCi nputpins.Typicalvaluesfor high-speedoperation(100KBPS)areC=C=75pFandfor low-speedoperation(12.5to14KBPS)C=C=500pF.
AB
AB
AB
ata
Thedrivercanbeexternallypowereddownbyapplyingalogic hightotheinputpin.Ifthisfeatureisnotbeingused,
STROBE
thepinshouldbetiedtoground. TheCandCpinsareinputstounitygainamplifiers.
AB
Thereforetheymustbeallowedtoswingto-5V.Provisionto switchcapacitorsmustbedonewithanalogswitchesthat allowvoltagesbelowtheirground.
+15V+5V
V
REF
V
1
DATA(A)
INPUTS TOARINCBUS
DATA(B)
SYNC
CLOCK
+V
-V
STROBE
GND
C
C
-15V
OUT
B
DATA(A)
CLOCK
SYNC
DATA(B)
STROBE
Figure1. ARINC429BUSAPPLICATION
+V
C
REF
LEVELSHIFTER
ANDSLOPE
CONTROL(A)
LEVELSHIFTER
ANDSLOPE
CONTROL(B)
V 1
CURRENT
REGULATOR
A
OUTPUT
DRIVER(A)
R/2OUT
R/2OUT
OUTPUT
DRIVER(B)
F A
F B
OVERVOLTAGE
CLAMPS
R L
C L
NotincludedonHI-8383
-V
CGND
B
B
OUT
Figure2. FUNCTIONALBLOCKDIAGRAM
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HI-8382,HI-8383
SYMBOLFUNCTIONDESCRIPTION
VPOWERTHEREFERENCEVOLTAGEUSEDTODETERMINETHEOUTPUTVOLTAGESWING
REF
STROBE
SYNCINPUTSYNCHRONIZESDATAINPUTS
DATA(A)INPUTDATAINPUTTERMINALA
CINPUTCONNECTIONFORDATA(A)SLEW-RATECAPACITOR
A
AOUTPUTARINCOUTPUTTERMINALA
OUT
-VPOWER-12Vto-15V
GNDPOWER0.0V
+VPOWER+12Vto+15V
BOUTPUTARINCOUTPUTTERMINALB
OUT
CINPUTCONNECTIONFORDATA(B)SLEW-RATECAPACITOR
B
DATA(B)INPUTDATAINPUTTERMINALB
CLOCKINPUTSYNCHRONIZESDATAINPUTS
VPOWER+5V±5%
1
INPUTALOGICHIGHONTHISINPUTPLACESTHEDRIVERINPOWERDOWNMODE
AllVoltagesreferencedtoGND,TA=OperatingTemperatureRange(unlessotherwisespecified)
PARAMETERSYMBOLCONDITIONSOPERATINGRANGEMAXIMUMUNIT
DifferentialVoltageVVoltagebetween+Vand-Vterminals40V
DIF
SupplyVoltage+V+10.8to+16.5V
-V-10.8to-16.5V V+5±10%+7V
1
VoltageReferenceVForARINC429+5±5%6V
REF
ForApplicationsotherthanARINC0to66V
InputVoltageRangeVGND-0.3V
IN
>
V1+0.3V
< OutputShort-CircuitDurationSeeNote:1 OutputOvervoltageProtectionSeeNote:2 OperatingTemperatureRangeTHi-temp&Military-55to+125°C
A
Industrial-40to+85°C
StorageTemperatureRangeTCeramic&Plastic-65to+150°C
STG
LeadTemperatureSoldering,10seconds+275°C JunctionTemperatureT+175°C PowerDissipationP16-PinCeramic DIPSeeNote:31.725W
J
D
28-PinCeramicLCCSeeNote:31.120W 28-PinPlasticPLCCSeeNote:32.143W 32-PinCERQUADSeeNote:31.725W
ThermalResistance,Ø16-PinCeramicDIP86.5°C/W
JA
(Junction-to-Ambient)28-PinCeramicLCC133.7°C/W
28-PinPlasticPLCC70.0°C/W 32-PinCERQUAD86.5°C/W
Note1.HeatsinkingmayberequiredforOutputShortCircuitat+125°Candfor100KBPSat+125°C. Note2.ThefusesusedforOutputOvervoltageProtectionmaybeblownbythepresenceofavoltageateitheroutputthat isgreater
than±12.0VwithrespecttoGND.(HI-8382only)
Note3.Derateabove+25°C,11.5 mW/°Cfor16-PINDIPand32-PINCERQUAD,7.5mW/°Cfor28-PINLCC,14.2mW/°Cfor28-PINPLCC
NOTE:Stressesabovethoselistedunder"AbsoluteMaximumRatings"maycausepermanentdamagetothedevice.Thesea restressratings only.Functionaloperationofthedeviceattheseoranyotherconditionsabovethoseindicatedintheoperationalse ctionsofthespecifications isnotimplied.Exposuretoabsolutemaximumratingconditionsforextendedperiodsmayaffectdevicereliability.
HOLTINTEGRATEDCIRCUITS
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