HOLT HI-8382, HI-8383 User Manual

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HI-8382, HI-8383

August 2006

The HI-8382 and HI-8383 bus interface products are silicon
gate CMOS devices designed as a line driver in accordance
with theARINC 429 bus specifications.

Inputs are provided for clocking and synchronization. These
signals are AND'd with the DATA inputs to enhance system
performance and allow the HI-8382 to be used in a variety of
applications. Both logic and synchronization inputs feature
built-in 2,000V minimum ESD input protection as well as TTL
and CMOS compatibility.

The differential outputs of the HI-8382 are independently
programmable to either the high speed or low speed ARINC
429 output rise and fall time specifications through the use of
two external capacitors. The output voltage swing is also
adjustable by the application of an external voltage to the VREF
input. The HI-8382 has on-chip Zener diodes in series with a
fuse to each differential output protecting the ARINC bus from
an overvoltage failure. The outputs each have a series
resistance of 37.5 ohms. The HI-8383 is identical to the HI­8382 except that the series resistors are 13 ohms and the
overvoltage protection circuitry has been eliminated.

The updated HI-318X and HI-8585 ARINC 429 line drivers are
recommended for all new designs where logic signals must be
converted to ARINC 429 levels such as a user ASIC, the
HI-3282 or HI-8282A ARINC 429 Serial Transmitter/Dual
Receiver, the HI-6010 ARINC 429 Transmitter/Receiver or the
HI-8783 ARINC interface device. Holt products are readily
available for both industrial and military applications. Please
contact the Holt Sales Department for additional information,
including data sheets for any of the Holt products.mentioned
above

ARINC 429 DIFFERENTIAL LINE DRIVER

PIN CONFIGURATION (Top View)GENERAL DESCRIPTION

1

VREF

STROBE

DATA(A)

2

3

SYNC

4

5

CA

6

AOUT

7

-V

89

GND +V

HI-8382C / CT / CM-01 / CM-03

SMD # 5962-8687901EA

16 - PIN CERAMIC SIDE-BRAZED DIP

(See Page 6 for additional package pin configurations)

16

15

14

13

12

11

10

V1

N/C

CLOCK

DATA(B)

CB

BOUT

N/C

FUNCTION

+

HI-8382

_

ARINC 429 DIFFERENTIAL LINE DRIVER

FEATURES

!

Low power CMOS

!

TTL and CMOS compatible inputs

!

Programmable output voltage swing

!

Adjustable ARINC rise and fall times

!

Operates at data rates up to 100 Kbits

!

Overvoltage protection

!

Industrial and Military temperature ranges

!

DSCC SMD part number

HOLT INTEGRATED CIRCUITS

(DS8382 Rev. C) 08/06

www.holtic.com

TRUTH TABLE

SYNC CLOCK DATA(A) DATA(B) AOUT BOUT COMMENTS

X L X X 0V 0V NULL

L X X X 0V 0V NULL

H H L L 0V 0V NULL

H H L H -V +V LOW

H H H L +V -V HIGH

H H H H 0V 0V NULL

REF REF

REF REF

HI-8382, HI-8383

FUNCTIONAL DESCRIPTION

The SYNC and CLOCK inputs establish data synchronization
utilizing two AND gates, one for each data input. Each logic
input, including the power enable ( ) input, are
TTL/CMOS compatible. Besides reducing chip current drain,
STROBE

also floats each output. However the overvoltage

fuses and diodesof the HI-8382 arenot switched out.

Figure 1 illustrates a typical ARINC 429 bus application.
Three power supplies are necessary to operate the HI-8382;
typically +15V, -15V and +5V. The chip also works with ±12V
supplies. The +5V supply can also provide a reference
voltage that determines the output voltage swing. The
differential output voltage swing will equal 2V . If a value of
V other than +5V is needed, a separate +5V power supply

REF

is required forpin V .

1

With the DATA(A) input at a logic high and DATA (B) input at a
logic low, A will switch to the +V rail and B will
switch to the -V rail (ARINC HIGH state). With both data

OUT REF OUT

REF

input signals at a logic low state, the outputs will both switch to
0V (ARINC NULLstate).

The driver output impedance, R , is nominally 75 ohms.
The rise and fall times of the outputs can be calibrated through
the selection of two external capacitor values th re
connected to the C and C input pins. Typical values for

AB

high-speed operation (100KBPS) are C = C = 75pF and for
low-speed operation (12.5to 14KBPS) C = C = 500pF.
The driver can be externally powered down by applying a logic
high to the input pin. If this feature is not being used,

STROBE

the pin shouldbe tied to ground.

The C and C pins are inputs to unity gain amplifiers.

AB

Therefore they must be allowed to swing to -5V. Provision to

STROBE

REF

OUT

at a

AB

AB

switch capacitors must be done with analog switches that
allow voltages belowtheir ground.

Both ARINC outputs of the HI-8382 are protected by internal
fuses capable of sinking between 800 - 900 mA for short
periods of time(125µs).

POWER SUPPLY SEQUENCING

The power supplies should be controlled to prevent large
currents during supply turn-on and turn-off. The recom­mended sequence is +V followed by V , always ensuring that

1

+V is the most positive supply. The -V supply is not critical
and can be asserted at any time.

+15V+5V

V

REF

V

1

DATA (A)

INPUTS TO ARINC BUS

DATA (B)

SYNC

CLOCK

+V

-V

STROBE

GND

C

B

C

A

-15V

A

B

OUT

OUT

Figure 1. ARINC 429 BUS APPLICATION

DATA (A)

CLOCK

SYNC

DATA (B)

V1

STROBE

CURRENT

REGULATOR

+V

REF

LEVEL SHIFTER

AND SLOPE

CONTROL (A)

LEVEL SHIFTER

AND SLOPE

CONTROL (B)

CV

A

OUTPUT

DRIVER (A)

OUTPUT

DRIVER (B)

Not included on HI-8383

-V

CGND

B

Figure 2. FUNCTIONAL BLOCK DIAGRAM

HOLT INTEGRATED CIRCUITS

2

R/2OUT

OUT

R/2

FA

FB

OVER VOLTAGE

CLAMPS

A

OUT

RL

B

CL

OUT

HI-8382, HI-8383

PIN DESCRIPTIONS

SYMBOL FUNCTION DESCRIPTION

V POWER THE REFERENCE VOLTAGE USED TO DETERMINE THE OUTPUT VOLTAGE SWING

REF

STROBE

SYNC INPUT SYNCHRONIZES DATA INPUTS

DATA (A) INPUT DATA INPUT TERMINAL A

A

C INPUT CONNECTION FOR DATA (A) SLEW-RATE CAPACITOR

A OUTPUT ARINC OUTPUT TERMINAL A

OUT

-V POWER -12V to -15V

GND POWER 0.0V

+V POWER +12V to +15V

OUT

B OUTPUT ARINC OUTPUT TERMINAL B

B

C INPUT CONNECTION FOR DATA (B) SLEW-RATE CAPACITOR

DATA (B) INPUT DATA INPUT TERMINAL B

CLOCK INPUT SYNCHRONIZES DATA INPUTS

1

V POWER +5V ±5%

INPUT A LOGIC HIGH ON THIS INPUT PLACES THE DRIVER IN POWER DOWN MODE

ABSOLUTE MAXIMUM RATINGS

All Voltages referenced to GND, TA = Operating Temperature Range (unless otherwise specified)

PARAMETER SYMBOL CONDITIONS OPERATING RANGE MAXIMUM UNIT

Differential Voltage V Voltage between +V and -V terminals 40 V

Supply Voltage +V +10.8 to +16.5 V

Voltage Reference V For ARINC 429 +5 ±5% 6 V

Input Voltage Range V GND -0.3 V

Output Short-Circuit Duration See Note: 1

Output Overvoltage Protection See Note: 2

Operating Temperature Range T Hi-temp & Military -55 to +125 °C

Storage Temperature Range T Ceramic & Plastic -65 to +150 °C

Lead Temperature Soldering, 10 seconds +275 °C

Junction Temperature T +175 °C

Power Dissipation P 16-Pin Ceramic DIP See Note: 3 1.725 W

Thermal Resistance, Ø 16-Pin Ceramic DIP 86.5 °C/W
(Junction-to-Ambient) 28-Pin Ceramic LCC 133.7 °C/W

Note 1. Heatsinking may be required for Output Short Circuit at +125°C and for 100KBPS at +125°C.
Note 2. The fuses used for Output Overvoltage Protection may be blown by the presence of a voltage at either output that is greater

than ±12.0V with respect to GND. (HI-8382 only)

Note 3. Derate above +25°C, 11.5mW/°C for 16-PIN DIP and 32-PIN CERQUAD, 7.5 mW/°C for 28-PIN LCC, 14.2 mW/°C for 28-PIN PLCC

NOTE: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings
only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications
is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

DIF

-V -10.8 to -16.5 V
V +5 ±5% +7 V

1

REF

For Applications other than ARINC 0 to 6 6 V

IN

A

>

V1 +0.3 V

<

Industrial -40 to +85 °C

STG

J

D

28-Pin Ceramic LCC See Note: 3 1.120 W
28-Pin Plastic PLCC See Note: 3 2.143 W
32-Pin CERQUAD See Note: 3 1.725 W

JA

28-Pin Plastic PLCC 70.0 °C/W
32-Pin CERQUAD 86.5 °C/W

HOLT INTEGRATED CIRCUITS

3

HI-8382, HI-8383

DC ELECTRICAL CHARACTERISTICS

+V = +15V, -V = -15V, V = V = +5.0V, T = Operating Temperature Range (unless otherwise specified).1 REF A

PARAMETER SYMBOL CONDITION MIN TYP MAX UNITS

Supply Current +V (Operating) (+V) No Load (0 - 100KBPS) +11 mA

Supply Current -V (Operating) (-V) No Load (0 - 100KBPS) -11 mA

VIV

Supply Current (Operating) ( ) No Load (0 - 100KBPS) 500 µA

Supply Current (Operating) ( ) No Load (0 - 100KBPS) 500 µA

1 CCOP 1

VIV

REF CCOP REF

Supply Current +V (Power Down) (+V) STROBE = HIGH 475 uA

Supply Current -V (Power Down) (-V) STROBE = HIGH -475 uA

Supply Current +V (During Short Circuit Test) (+V) Short to Ground (See Note: 1) 150 mA

Supply Current -V (During Short Circuit Test) (-V) Short to Ground (See Note: 1) -150 mA

Output Short Circuit Current (Output High) Short to Ground =0 (See Note: 2) -80 mA

Output Short Circuit Current (Output Low) Short to Ground =0 (See Note: 2) +80 mA

Input Current (Input High) 1.0 µA

Input Current (Input Low) -1.0 µA

Input Voltage High 2.0 V

Input Voltage Low 0.5 V

Output Voltage High (Output to Ground) No Load (0 -100KBPS) +V +V V

Output Voltage Low (Output to Ground) No Load (0 -100KBPS) -V -V V

Output Voltage Null No Load (0-100KBPS) -250 +250 mV

Input Capacitance 15 pF

Note 1. Not tested, but characterized at initial device design and after major process and/or design change which affects this parameter.
Note 2. Interchangeability of force and sense is acceptable.

I

CCOP

I

CCOP

I

CCPD

I

CCPD

I

SC

I

SC

IV

OHSC MIN

IV

OLSC MIN

I

IH

I

IL

V

IH

V

IL

V

OH

V

OL

V

NULL

C

IN See Note 1

REF REF

25 25

-. +.

REF REF

-. +.

25 25

AC ELECTRICAL CHARACTERISTICS

+V = +15V, -V = -15V, V = V = +5.0V, T = Operating Temperature Range (unless otherwise specified).1 REF A

PARAMETER SYMBOL CONDITION MIN TYP MAX UNITS

Rise Time ( , ) = = 75pF See Figure 3. 1.0 2.0 µs

Fall Time ( , ) = = 75pF See Figure 3. 1.0 2.0 µs

Propagtion Delay Input to Output = = 75pF See Figure 3. 3.0 µs

Propagtion Delay Input to Output = = 75pF See Figure 3. 3.0 µs

DIFFERENTIAL

()ABOUT - OUT

NOTE: OUTPUTS UNLOADED

AB t CC

OUT OUT R A B

AB t CC

OUT OUT F A B

tCC

PLH A B

tCC

PHL A B

CA

t PHL

t R

50%

50%

50%

ADJUST

BY

CA

50%

t PLH

-VREF

+VREF

ADJUST

BY

2VREF

CB

DATA (A) 0V

DATA (B) 0V

AOUT 0V

BOUT 0V

OUTPUT 0V

VREF

ADJUST

BY

-VREF

t F

Figure 3. SWITCHING WAVEFORMS

ADJUST

BY

-2VRE

CB

HIGH

NULL

LOW

2.0V

0.5V

2.0V

0.5V

+4.75V to +5.25V

-4.75V to -5.25V

+4.75V to +5.25V

-4.75V to -5.25V

+9.5V to +10.5V

-9.5V to -10.5V

HOLT INTEGRATED CIRCUITS

4

HI-8382, HI-8383

HI-8382 PACKAGE THERMAL CHARACTERISTICS

MAXIMUM ARINC LOAD

PACKAGE STYLE

28 Lead PLCC

16 Lead Ceramic SB DIP

1

ARINC 429 SUPPLY CURRENT (mA) JUNCTION TEMP, Tj (°C)

DATA RATE

Low Speed 17.6 17.2 17.0 48 107 142

High Speed 25.4 24.5 24.2 56 110 150

Low Speed 17.9 17.4 17.1 41 103 145

High Speed 25.8 24.8 24.4 47 112 147

Ta = 25°C Ta = 85°C Ta = 125°C Ta = 25°C Ta = 85°C Ta = 125°C

3

4

A and B Shorted To GroundOUT OUT

PACKAGE STYLE

28 Lead PLCC

16 Lead Ceramic SB DIP

1

Notes:

1. All data taken on devices soldered to a single layer copper PCB (3" X 4.5" X .062").

in still air

2. At 100% duty cycle, 15V power supplies. For 12V power supplies multiply all tabulated values by 0.8.

3. Low Speed: Data Rate = 12.5 Kbps, Load: R = 400 Ohms,C=30nF.

4. High Speed: Data Rate = 100 Kbps, Load: R = 400 Ohms,C=10nF. Data not presented forC=30nF
as this is considered unrealistic for high speed operation.

5. Similar results would be obtained with A shorted to B .

6. For applications requiring survival with continuous short circuit, operation above Tj = 175°C is not recommended.

7. Data will vary depending on air flow and the method of heat sinking employed.

ARINC 429 SUPPLY CURRENT (mA) JUNCTION TEMP, Tj (°C)

DATA RATE

Low Speed 60.1 55.7 52.4 110 157 194

High Speed 63.1 56.3 52.3 100 150 182

Low Speed 62.1 56.2 53.0 90 145 180

High Speed 64.0 56.2 52.2 86 144 176

Ta = 25°C Ta = 85°C Ta = 125°C Ta = 25°C Ta = 85°C Ta = 125°C

3

4

OUT OUT

7

2

5, 6, 7

2

ORDERING INFORMATION

HI - (Ceramic)838xxx-xx

PART
NUMBER

Blank

T

M-01

M-03

PART
NUMBER

C

S

U

PART
NUMBER

8382

8383

TEMPERATURE
RANGE

-40°C TO +85°C NO

-55°C TO +125°C

-55°C TO +125°C

(1)

-55°C TO +125°C

PACKAGE
DESCRIPTION

16 PIN CERAMIC SIDE BRAZED DIP Gold (‘M’ flow: solder)

28 PIN CERAMIC LEADLESS CHIP CARRIER Gold (‘M’ flow: solder)

32 PIN CERQUAD (not available with ‘M’ flow) Solder

RESISTANCE FUSE

37.5 Ohms YES

OUTPUT SERIES

13 Ohms

NO

FLOW

I

T

M

DSCC

BURN

IN

NO

YES

YES

LEAD
FINISH (2)

(1) Only available in ‘8382C’ package. SMD# 5962-8687901EA

(2) Gold terminal finish is Pb-Free, RoHS compliant.

HOLT INTEGRATED CIRCUITS

5

HI - (Plastic)838xJ x x

HI-8382, HI-8383

PART
NUMBER

Blank

F

PART
NUMBER

Blank

T

PART
NUMBER

8382J

8383J

LEAD
FINISH

Tin / Lead (Sn / Pb) Solder

100% Matte Tin (Pb-free, RoHS compliant)

TEMPERATURE
RANGE

-40°C TO +85°C NO

-55°C TO +125°C

FLOW

I

T

PACKAGE
DESCRIPTION

28 PIN PLASTIC J LEAD (1)

28 PIN PLASTIC J LEAD (1)

BURN

IN

NO

OUTPUT SERIES

RESISTANCE FUSE

37.5 Ohms YES

13 Ohms

NO

(1) NOT RECOMMENDED FOR NEW DESIGNS. The newer HI-3182PJxx and HI-3183PJxx are drop-in replacements for the

older HI-8382Jxx and HI-8383Jxx respectively. The HI-318x parts are rated as Moisture Sensitive Level 1 (MSL 1) and do not
require any special handling. The older HI-8382Jxx and HI-8383Jxx are rated as MSL 3 and require dry-packaging and /or
bake-out in accordance with IPC/JEDEC J-STD-020A.

ADDITIONAL PIN CONFIGURATIONS

(See page 1 for the 16-pin Ceramic Side-Brazed DIP Package )

N/C

N/C

N/C

DATA(A

DATA(B)

)

B

C

N/C

N/C

20

N/C

19

N/C

18

+V

17

GND

16

N/C

15

-V

A

C

N/C

N/C

N/C

DATA (A)

N/C

N/C

N/C

SYNC

STROBE

4 3 2 1 28 27 26

5

6

7

HI-8382S

8

HI-8382ST

9

A

C

10

12 13 14 15 16 17 18

OUT

N/C

A

N/C

-V

CLOCK

N/C

REF

V

STROBE

SYNC

N/C

N/C

29 28 27 26 25 24 23 22

30

1

V

31

32

HI-8382U

1

HI-8382UT

2

3

56 789101112

N/C

N/C

32-PIN J-LEAD CERQUAD 28-PIN CERAMIC LCC

REF

N/C

-V

V

GND

1

V

+V

N/C

OUT

B

25

24

23

22

21

20

CLOCK
N/C
DATA (B)

B

C
N/C
N/C
N/C

N/C

DATA (A)

N/C
N/C

C

N/C

SYNC

43212827

5

6

7

HI-8382J

8

HI-8382JT

9

A

10

12 13 14 15 16 17 18

N/C

STROBE

OUT

A

28-PIN PLASTIC PLCC

REF

V

GND

1

V

+V

N/C

OUT

B

25

24

23

22

21

20

19

CLOCK

N/C

DATA
(B)

B

C

N/C

N/C

HOLT INTEGRATED CIRCUITS

6

16-PIN CERAMIC SIDE-BRAZED DIP

HI-8382 PACKAGE DIMENSIONS

inches (millimeters)

.125 MIN

(3.175 MIN)

PIN 1

.200 MAX

(5.080 MAX)

.018 ± .002

(.457 ± .051)

.810 MAX

(20.574 MAX)

(2.540 BSC)

.050 ± .005

(1.270 ± .127)

.035 ± .010

(.889 ± .254)

SEATING

.100 BSC

.295 ± .010

(7.493 ± .254)

BASE

PLANE

PLANE

.300 ± .010

(7.620 ± .254)

Package Type:

.010 ± .002

(.254 ± .051)

16C

28-PIN PLASTIC PLCC

.045 x 45°

.490 ± .005

(12.446 ± .127)

SQ.

.173 ± .008

(4.394 ± .203)

PIN NO. 1

.410 ± .020

(10.414 ± .508)

PIN NO. 1 IDENT

.453 ± .003

(11.506 ± .076)

SQ.

SEE DETAIL

A

.045 x 45°

DETAILA

.017 ± .004

(.432 ± .102)

.009

.011

Package Type:

.050 ± .005

(1.27 ± .127)

.031 ± .005

(.787 ± .127)

.015 ± .002

(.381 ± .051)

.020 MIN
(.508 MIN)
.025

R

.045

28J

HOLT INTEGRATED CIRCUITS

7

HI-8382 PACKAGE DIMENSIONS

28-PIN CERAMIC LEADLESS CHIP CARRIER

inches (millimeters)

.020 INDEX

(.508 INDEX)

PIN 1

.040 x 45° 3PLS

(1.016 x 45° 3PLS)

.451 ± .009

(11.455 ± .229)

SQ.

.080 ±.020

(2.032 ±.508)

.050 BSC

(1.270 BSC)

.008R ± .006

(.203R ±.152)

Package Type:

PIN 1

28S

.050 ± .005

(1.270 ± .127)

.025 ± .003

(.635 ± .076)

32-PIN J-LEAD CERQUAD

31

32

1

2

.588 ± .008

(14.935 ± .203)

.550 ± .009

(13.970 ± .229)

.040 TYP.

(1.016) TYP.

.019 ± .003

(.483 ± .076)

.520 ± .012

(13.208 ± .305)

.050 TYP.

(1.270) TYP.

.488 ± .008

(12.395 ± .203)

.083 ± .009

(2.108 ± .229)

.450 ± .008

(11.430 ± .203)

.190 MAX.

(4.826) MAX.

Package Type:

.420 ± .012

(10.668 ± .305)

32U

HOLT INTEGRATED CIRCUITS

8