Hitachi HT-DK180-EUK Service Manual

SERVICE MANUAL

MANUEL D'ENTRETIEN
WARTUNGSHANDBUCH

CAUTION:

Before servicing this chassis, it is important that the service technician read the “Safety
Precautions” and “Product Safety Notices” in this service manual.

No. 0155

HTD-K180UK
HTD-K180E

Data contained within this Service
manual is subject to alteration for
improvement.

ATTENTION:

Avant d’effectuer l’entretien du châassis, le technicien doit lire les «Précautions de sécurité»
et les «Notices de sécurité du produit» présentés dans le présent manuel.

VORSICHT:

Vor Öffnen des Gehäuses hat der Service-Ingenieur die „Sicherheitshinweise“ und „Hinweise
zur Produktsicherheit“ in diesem Wartungshandbuch zu lesen.

Les données fournies dans le présent
manuel d’entretien peuvent faire l’objet
de modifications en vue de perfectionner
le produit.

Die in diesem Wartungshandbuch
enthaltenen Spezifikationen können sich
zwecks Verbesserungen ändern.

SPECIFICATIONS AND PARTS ARE SUBJECT TO CHANGE FOR IMPROVEMENT

Home Cinema

October 2004

1. GENERAL DESCRIPTION

1.1 MT 1379

The MT1370 Progressive Scan DVD Player Combo chip is a single-chip MPEG video decoding chip that
integrates audio/video stream data processing, TV encoder four video DACs with macrovision, copy protection,
DVD system navigation, system control and housekeeping functions.
These features can be listed as follows:

General Features:

- Progressive scan DVD-player combo chip.

- Support NTSC, PAL-BDGHI, PAL-N, PAL-M interlace TV format and 480p, 576p progressive TV format.

- Built -in progressive video output.

- DVD-Video, VCD 1.1, 2.0 and SVCD.

- Unified track buffer A/V decoding buffer .

- Supports 16-bit/32-bit SDRAM data bus interface.

- Servo controlling and data channel processing.

Video Related Features:

· Macrovision 7.1 for NTSC/PAL interlaced video.

· Simultaneous composite video and S-video outputs, or composite and YUV outputs, or
composite and RGB outputs.

· 8-bit CCIR 601 YUV 4:2:2 output.

. Decodes MPEG video and MPEG2 main profile at main level.

· Maximum input bit rate of 15 Mbits/sec.

Audio Related Features:

· Dolby Digital (AC-3) and Dolby Pro Logic.

· Dolby Digital S/PDIF digital oudio outputs.

· High-Definition Compatible Digital (HDCD) decoding.

· CD -DA.

· MP3.

1.2 MEMORY

SDRAM Memory Interface

The MT1379 provides a glueless a 16-bit interface to DRAM memory devices used as OSD MPEG stream and
video buffer memory for a DVD player. The maximum amount of memory supported is 16 Mb of Synchronous
DRAM ( SDRAM ). The memory interface is configurable in depth to support 128 Mb adressing. The memory

interface controls access to both external SDRAM memories, which can be the sole unified external read/write
memory acting as program and data memory as well as various decoding and display buffers.

1.3 DRIVE INTERFACES

The MT1379 supports the DV34 interface, and other RF and servo interfaces used by any types of DVD loaders.
These interfaces meet the specifications of many DVD loader manufacturers.

1.4 FRONT PANEL

The front panel is based around an Futaba VFD and a common NEC front panel controller chip, (uPD16311).
The MT1379 controls the uPD16311 using several control signals, (clock, data, chip select). The infrared remote
control signal is passed directly to the MT1379 for decoding.

1.5 REAR PANEL

A typical rear panel is included in the referance design. This rear panel supports:

- Six channel or two channel audio outputs .

- Optical and coax S/PDIF outputs.

- Composite, S-Video, and SCART outputs.

The six -video signals used to provide CVBS, S-Video, and RGB are generated by the MT1379’s internal video
DAC. The video signals are buffered by external circutiry.

The S/PDIF serial stream is also generated by the MT1379 output by the rear panel. AK4382, CS4392 Audio
DACs are used for two channel audio output with MT1379.

12-pin DDX board output jack gives out the amplified audio. Digital Audio is processed in the DDX-8228 IC
and then amplified in the DDX-2050 Power Amplifier ICs.

2. SYSTEM BLOCK DIAGRAM and MT1379 PIN DESCRIPTION

2.1 MT1379 PIN DESCRIPTION

2.1 SYSTEM BLOCK DIAGRAM

System block diagram is shown in the following figure:

3. AUDIO OUTPUT

The MT1379 supports the stereo (2 channel) outputs .

The MT1379 alTrso provides digital output in S/PDIF format. The board supports coaxial S/PDIF input.

AV2300 has also 5.1 channel Class-D amplifier outputs to 8 ohms satelites and 4 ohms
subwoofer.

4 AUDIO DACS

The MT1379 supports several variations of an I 2 S type bus, varying the order of the data bits (leading or no
leading zero bit, left or right alignment within frame, and MSB or LSB first) is possible usin g the MT1379
internal configuration registers. The I 2 S format uses four stereo data lines and three clock lines. The I 2 S data
and clock lines can be connected directly to one or more audio DAC to generate analog audio output.

The two-channel DAC is an AKM AK4382 . The DACs support up to 192kHz sampling rate.

The outputs of the DACs are differential, not single ended so a buffering circuit is required. The buffer circuits
use National LM833 op-amps to perform the low-pass filtering and the buffering.

5 VIDEO INTERFACE

5.1 Video Display Output

The video output section controls the transfer of video frames stored in memory to the internal TV encoder of the
Vibratto. The output section consists of a programmable CRT controller capable of operating either in Master or
Slave mode.

The video output section features internal line buffers which allow the outgoing luminance and chrominance data
to match the internal clock rates with external pixel clock rates, easily facilitating YUV4: 2:2 to YUV4: 2:0
component and sample conversion. A polyphase filter achieves arbitrary horizontal decimation and interpolation.

Video Bus

The video bus has 8 YUV data pins that transfer luminance and chrominance (YUV) pixels in CCIR601 pixel
format (4:2:2). In this format, there are half as many chrominance (U or V) pixels per line as luminance (Y)
pixels; there are as many chrominance lines as luminance.

Video Post -Processing

The MT1379 video post-processing circuitry provides support for the color conversion, scaling, and filtering
functions through a combination of special hardware and software. Horizontal up-sampling and filtering is done
with a programmable, 7-tap polyphase filter bank for accurate non-integer interpolations. Vertical scaling is
achieved by repeating and dropping lines in accordance with the applicable scaling ratio.

Video Timing

The video bus can be clocked either by double pixel clock and clock qualifier or by a single pixel clock. The
double clock typically is used for TV displays, the single for computer displays.

6 FLASH MEMORY

The decoder board supports AMD class Flash memories. Currently 4 configurations are
supported:

FLASH_512K_8b
FLASH_1024K_8b
FLASH_512Kx2_8b
FLASH_512Kx2_16b

The Vibratto permits both 8- and 16 -bit common memory I/O accesses with a removable storage
card via the host interface.

7 SERIAL EEPROM MEMORY

An I2C serial EEPROM is used to store user configuration (i.e. language preferences, speaker setup, etc.) and
software configuration.. Industry standard EEPROM range in size from 1kbit to 256kbit and share the same IC

footprint and pinout. The default device is 2kbit, 256kx 8, SOIC8 SGS Thomson ST24C02M1 or equivalent.

8 AUDIO INTERFACE AUDIO SAMPLING RATE AND PLL COMPONENT
CONFIGURATION

The MT1379 audio mode configuration is selectable, allowing it to interface directly with low-cost audio DACs
and ADCs. The audio port provides a standard I 2 S interface input and output and S/PDIF (IEC958) audio
output. Stereo mode is in I 2 S format while six channels Dolby Digital (5.1 channel) audio output can be
channeled through the S/PDIF. The S/PDIF interface consists of a bi-phase mark encoder, which has low skew.
The transmit I 2 S interface supports the 128, 192, 256, 384, and 512 sampling frequency formats, where
sampling frequency Fs is usually 32 kHz, 44.1 kHz, 48 kHz, 96 kHz, or 192 kHz. The audio samples for the
I 2 S transmit interface can be 16, 18, 20, 24, and 32-bit samples.

For Linear PCM audio stream format, the MT1379 supports 48 kHz and 96 kHz. Dolby Digital audio only
supports 48 kHz. MT1379 incorporates a built -in programmable analog PLL in the device architecture in order
to generate a master audio clock. The MCLK pin is for the audio DAC clock and can either be an output from or
an input to the MT1379. Audio data out (TSD) and audio frame sync (TWS) are clocked out of the MT1379
based on the audio transmit bit clock (TBCK). Audio receive bit clock (RBCK) is used to clock in audio data in
(RSD) and audio receive frame sync (RWS).

9 FRONT PANEL

9.1 VFD CONTROLLER

The VFD controller is a NEC uPD16311. This controller is not a processor, but doesinclude a simple state
machine which scans the VFD and reads the front panel button matrix. The 16311 also includes RAM so it can
store the current state of all the VFD icons and segments. Therefore, the 16311 need only be accessed when the
VFD status changes and when the button status is read. The MT1379 can control this chip by using 3 wire

communication.

10 CONNECTORS

10.1 SCART CONNECTORS

Pinout of the scart connec tor:
1 - Audio Right Out
2 - Audio Right In
3 - Audio Left / Mono Out
4 - Audio Gnd
5 - Blue Gnd