SERVICE MANUAL
MANUEL D'ENTRETIEN
WARTUNGSHANDBUCH
CAUTION:
Before servicing this chassis, it is important that the service technician read the “Safety
Precautions” and “Product Safety Notices” in this service manual.
ATTENTION:
Avant d’effectuer l’entretien du châssis, le technicien doit lire les «Précautions de sécurité»
et les «Notices de sécurité du produit» présentés dans le présent manuel.
VORSICHT:
Vor Öffnen des Gehäuses hat der Service-Ingenieur die „Sicherheitshinweise“ und „Hinweise
zur Produktsicherheit“ in diesem Wartungshandbuch zu lesen.
32LD8D20UA
32LD8D20UC
37LD8D20E
37LD8D20U
37LD8D20UA
37LD8D20UC
Data contained within this Service
manual is subject to alteration for
improvement.
Les données fournies dans le présent
manuel d’entretien peuvent faire l’objet
de modifications en vue de perfectionner
le produit.
Die in diesem Wartungshandbuch
enthaltenen Spezifikationen können sich
zwecks Verbesserungen ändern.
Contents
1. Introduction
2. Tuner
3. Audio Amplifier Stage
4. Power Stage
5. Microcontroller (VCTP)
6. DRX 3961A
7. Serial 64K I2C EEPROM
8. Class AB Stereo Headphone
Driver
9. SAW Filter X6966M
10. IC Descriptions
SPECIFICATIONS AND PARTS ARE SUBJECT TO CHANGE FOR IMPROVEMENT
11.Service Menu Settings
12. Block Diagrams
13. Troubleshooting Guide
14. Connectors
15. Concept ICs
16. Replacement Parts
17. Assembly Drawing
18. Schematic Diagrams
19. PCB Layout Diagrams
Colour Television
December 2007
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1. INTRODUCTION
17MB22 Main Board consists of Micronas concept , VCTP as controller. This IC is
capable of handling Audio processing, video processing, motion adaptive up
conversion(MAU), Scaling-Display processing and FPD control (DPS), unified memory
for audio video and Text, 3D comb filter, PC connectivity, OSD and text processing.
TV supports PAL, SECAM, NTSC colour standards and multiple transmission standards
as B/ G, D/K, I/I’ and L/L’ including German and NICAM stereo.
Sound system output is supplying 2x 8W (10%THD) for stereo 8Ω speakers
Supported peripherals are:
As the thickness of the TV set has a limit, a horizontal mounted tuner is used in the
product, which is suitable for CCIR systems B/G, H, L/ L’, I/I’ and D/ K. The tuning is
available through the digitally controlled I2C bus (PLL). Below you will find info on the
Tuner in use.
2.1 General description of UV1316
The UV1316 tuner belongs to the UV 1300 family of tuners, which are designed to meet
a wide range of applications. It is a combined VHF, UHF tuner suitable for CCIR
systems B/G, H, L, L’, I and I’. The low IF output impedance has been designed for
direct drive of a wide variety of SAW filters with sufficient suppression of triple transient.
2.2 Brief description
The DTT 713XX is designed for digital terrestrial reception in VHFIII and UHF, compliant
with the European digital terrestrial standard ETS 300744. In addition it covers all channels
from 44.25MHz to 863.25MHz. It is a two band concept, VHF and UHF, with VHF switched
between VHF low (VHFI) and VHF high (VHFIII). Optional an antenna loop through function,
a combiner to feed through an RF-modulator signal to the TV output, a buffered 4MHz
crystal oscillator output, a DC/DC converter to generate 32V tuning voltage can be provided.
Instead of RF modulator input, an antenna power supply input is possible.
The DTT 713XX has the possibility to activate an internal wide band RF AGC.
Tuning, band switching and internal RF AGC is controlled via I2C bus. The metal housing
is in world standard tuner size. The module complies with the requirements of radiation,
signal handling capability and immunity interference of CENELEC standards EN 55013
and EN 55020.
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3. AUDIO AMPLIFIER STAGE WITH MP7722
3.1 General Description
The MP7722 is a stereo 20W Class D Audio amplifier, intended for use as low
frequency power amplifier in a wide range of applications in radio and TV sets.
It uses a minimum number of external components to complete a stereo Class D audio
amplifier.
3.2 Features
x 2 x 20W Output at VDD = 24V into a 4 load
x THD+N = 0.06% at 1W, 8
x 93% Efficiency at 20W
x Low Noise (190μV Typical)
x Switching Frequency Up to 1MHz
x 9.5V to 24V Operation from a Single Supply
x Integrated Startup and Shutdown Pop Elimination Circuit
x Thermal and Short Circuit Protection
x Integrated 180m Switches
x Mute/Standby Modes (Sleep)
x Thermally Enhanced 20-Pin TSSOP Package with Exposed Pad
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3.3 Applications
x Surround Sound DVD Systems
x Televisions
x Flat Panel Monitors
x Multimedia Computers
xHome Stereo Systems
3.4 Absolute Ratings
3.5 Pinning
4. POWER STAGE
The DC voltages required at various parts of the chassis and inverters are provided by a
main power supply unit and power interface board. The main power supply unit is
designed for 24V and 12V DC supply. Power stage which is on-chasis generates +24V
for audio amplifier, 1.8V and 3.3V stand by voltage and 8V, 12V, 5V and 3.3Vsupplies
for other different parts of the chassis.
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5. MICROCONTROLLER (VCTP)
5.1 General Features
The VCT 6wxyP is dedicated to high-quality FPD and double-scan TV sets. The VCT
6wxyP family is based on functional blocks contained and approved in existing products
like VCT 49xxI, VSP 94x5B, and DPS 94xxA.
Each member of the family contains the entire audio, video, up-conversion processing
for 4:3 and 16:9 50/
60 Hz progressive or 100/120 Hz interlaced stereo TV sets and the control/data
interface for flat-panel displays. The integrated microcontroller is supported by a
powerful OSD and graphics generator with integrated teletext acquisition.
Controller:
x High-performance 8-bit microcontroller, 8051 compatible
x Up to 512 kByte in system program Flash
x WST, PDC, VPS, and WSS acquisition
x Closed caption and V-chip acquisition
x Up to 10 page on chip teletext memory
x Up to 1000 pages with internal memory
x Up to 30 GPIO
Audio:
x Multistandard TV-sound demodulation:
-All A2/NICAM standards
-BTSC/SAP with DBX
-EIA-J
x Baseband sound processing for loudspeaker channel:
-Volume, bass, treble, loudness, balance
-Spatial effect (e.g. pseudo stereo)
-Micronas AROUND
(Virtual Dolby Surround optional)
-Micronas BASS
-BBE
-SRS WOW
-SRS TruSurround XT
-Lipsync function
Video:
x CVBS, S-VHS, YCrCb and RGB inputs
x HDTV YPrPb and RGB inputs
x ITU656 input
x Linedoubling with vertical detail enhancement (without internal memory)
x State of the art motion adaptive up conversion (with internal memory)
x 4H adaptive comb filter for PAL/NTSC (without internal memory)
x 3D comb filter for PAL/NTSC (with internal memory) (Optional)
x Internal SDR RAM interface
x Powerful horizontal and vertical scaling inclusive
x Nonlinear horizontal scaling “panorama vision”
x picture adaptive image improvements (DCE, LSE, CTI, SCE, NCE)
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x non-linear colorspace enhancement (NCE) with 32 programmable slopes and
sections per RGB component (blue stretch, static black stretch, gamma
correction).
x Dynamic contrast enhancement (DCE) (histogram based black stretch with peak
black and activity detection and contrast adaption)
x Luma sharpness enhancement (LSE)
x Colour transient improvement (CTI)
x Selective colour enhancement (SCE) for skin tone correction, blue and green
stretch
5.2 Multistandard Sound Processor (MSP) Features
The MSP receives the analog Sound IF signal from the tuner and converts it to digital
with its internal SIF-AD converter. The MSP is able to demodulate all TV sound
standards worldwide including the digital NICAM system. TV stereo sound standards
that are unavailable for a specific VCTP version are processed in analog mono sound of
the standard. In that case, stereo or bilingual processing will not be possible.
x Sound IF input
x Worldwide FM/AM-mono sound demodulation
x FM stereo sound demodulation (A2, EIA-J)
x BTSC/SAP demodulation with DBX
x NICAM demodulation
x FM radio & RDS/RBDS demodulation
x Automatic standard detection
x automatic volume correction (AVC)
x Automatic sound select
x Baseband processing for loudspeaker channel:
volume, bass, treble, loudness, balance
-spatial effect (e.g. pseudo stereo)
-Micronas AROUND
-Micronas BASS
-SRS WOW (optional)
-SRS TruSurround XT (optional)
-delayline for lipsync function (shared memory)
-Virtual Dolby Surround (optional)
x 1 I2S input for external ATSC/DVD decoder
x 1 I2S interface for audio delayline
x 1 SPDIF output
x Audio i/o switches
-4 analog stereo line inputs and 2 analog stereo line outputs (configurable 5
analog stereo line inputs and 1 analog stereo line output)
-1 analog stereo loudspeaker output
-1 analog subwoofer output
-1 analog stereo headphone output
5.3 Video Features
The TVT is a Teletext decoder for decoding World System Teletext data, as well as
Video Programming System (VPS), Program Delivery Control (PDC), and Wide-Screen
Signalling (WSS) data used for PALplus transmissions (line 23). The device also
supports Closed Caption acquisition and decoding.
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The TVT provides an integrated general-purpose, fully 8051-compatible microcontroller
with television-specific hardware features. The microcontroller has been enhanced to
provide powerful features such as memory banking, data pointer, additional interrupts,
shared memory access etc.
The TVT has an internal XRAM of 32 KB and a BOOT ROM of 4 KB. For operation the
code is fetched from a 16bit FLASH, which can be addressed up to 1 MByte.
The controller with dedicated hardware does most of the internal TTX acquisition
processing, transfers data to/from external memory interface, and receives/transmits
data via I2C-bus interface. In combination with dedicated hardware, the slicer stores
TTX data in a VBI buffer of 1 KB. The microcontroller firmware performs all the
acquisition tasks (hamming and parity checks, page search, and evaluation of header
control bits) once per field. Additionally, the firmware can provide high-end Teletext
features like Packet-26 handling, FLOF/TOP and list-pages. The interface-to-user
software is optimised for minimal overhead. TVT is realised in deep submicron
technology with 1.8 V supply voltage and 3.3 V I/O (TTL compatible).
x 16 analog video inputs (4xCVBS/Y/C + 3xRGB/YCrCb/YPrPb)
x Video input switch matrix
x 3 analog video outputs (integrated Y+C adder)
x 24-bit RGB/H/V/clk input (e.g. ext. DVI decoder) or 656 8bit input
x 656 8bit input/output (e. g. for external high-end up conversion by FRCA)
x Multi-standard color decoder PAL/NTSC/SECAM including all substandards
x 2D adaptive comb filter for PAL/NTSC with vertical peaking
x 3D-comb filter for PAL/NTSC (Optional)
x Macrovision compliant multi-standard sync processing
x Trilevel sync slicer for HDTV
x Macrovision detection
x High-quality soft mixer controlled by Fast Blank (alpha blending)
x Fastblank monitor via I2C
x Noise measurement
x Letterbox detection (auto-wide)
x Split screen (OSD and video side by side) and AV PIP
5.4 Controller Features
The TVT is a Teletext decoder for decoding World System Teletext data, as well as
Video Programming System (VPS), Program Delivery Control (PDC), and Wide-Screen
Signalling (WSS) data used for PALplus transmissions (line 23). The device also
supports Closed Caption acquisition and decoding.
The TVT provides an integrated general-purpose, fully 8051-compatible microcontroller
with television-specific hardware features. The microcontroller has been enhanced to
provide powerful features such as memory banking, data pointer, additional interrupts,
shared memory access etc.
x High performance 8-bit microcontroller, 8051 instruction set compatible
x 81 MHz system clock, two machine cycles per instruction
x On-chip debug support (OCDS)
x Up to 512 kByte in system program Flash
x 256 byte on-chip program RAM
x 128 byte on-chip extended stack RAM
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x 4-level, 24-input interrupt controller
x Patch module for 16 ROM locations
x Two 16-bit reloadable timers
x Capture compare timer for infrared decoding
x Watchdog timer
x Uart
x Real time clock
x PWM units (2 channels 14-bit, 6 channels 8-bit)
x 8-bit ADC (4 channels)
x I2C bus master/slave interface
x Up to 32 programmable I/O ports
5.5 OSD and Teletext Features
The on-chip display unit for displaying Level 1.5 Teletext data can also be used for
customer-defined onscreen displays.
The TVT has an internal XRAM of 32 KB and a BOOT ROM of 4 KB. For operation the
code is fetched from a 16bit FLASH, which can be addressed up to 1 MByte.
In combination with dedicated hardware, the slicer stores TTX data in a VBI buffer of 1
KB. The microcontroller firmware performs all the acquisition tasks (hamming and parity
checks, page search, and evaluation of header control bits) once per field. Additionally,
the firmware can provide high-end Teletext features like Packet-26 handling, FLOF/TOP
and list-pages. The interface-to-user software is optimised for minimal overhead.
5.6 Port Allocation
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6. DRX 3961A
6.1 General Desription
The DSP-based Analog TV IF Demodulator DRX 396xA performs the entire
multistandard Quasi Split Sound (QSS) TV IF processing, AGC, video demodulation,
and generation of the sound IF (SIF), requiring only one SAW filter. The IC is designed
for applications in TV sets, VCRs, PC cards, and TV tuners.
The alignment-free DRX 396xA does not need special external components. All control
functions and status registers are accessible via I2C bus interface.
6.2 Features
x Multistandard QSS IF processing with a single SAW
x Highly reduced amount of external components (no tank circuit, no
potentiometers, no SAW switching)
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x Programmable IF frequency (38.9 MHz, 45.75 MHz, 32.9 MHz, 58.75 MHz,
36.125 MHz etc.)
x Digital IF processing for the following standards: B/G, D/K, I, L/L’, and M/N
x Standard specific digital post filtering
x Standard specific digital video/audio splitting
x Standard specific digital picture carrier recovery:
-Alignment-free
-Quartz-stable and accurate
-Stable frequency lock at 100% modulation and overmodulation up to
150%
-Quartz-accurate AFC information
x Programmable standard specific digital group delay equalization
x Automatically frequency-adjusted Nyquist slope, therefore optimum picture and
sound performance over complete lock in frequency range
x Standard-specific digital AGC and delayed tuner AGC with programmable tuner
take-over point
x Fast AGC due to linear structure
x Adaptive back porch control, therefore fast positive modulation AGC
x No sound traps needed at video output
x SIF output with standard-dependent pre-filtering and amplitude-controlled output
level
x Optimal sound SNR due to carrier recovery without quadrature distortions
x FM radio capability without external components and with standard TV tuner
x Prepared for digital TV (DVB-C, DVB-T, ATSC)
x I2C bus interface
7. SERIAL 64K I2C EEPROM M24C64WBN6
7.1 General Description
M24C64WBN6 is a 64 Kbit Electrically Erasable PROM. These I2C-compatible
electrically erasable programmable memory (EEPROM) devices are organized as
8192x8 bits. It supports 400kHz Protocol I2C uses a two-wire serial interface,
comprising a bi-directional data line and a clock line.
The M24C64WBN6 is available in the standard 8-pin (Vcc, WC, SDA (I2C data), SCL
(I2C clock), Vss,E0,E1,E2). WC pin is critcal pin. If WP is high, writing is not possible to
EEPROM. If WP is low, writing is possible to EEPROM.
7.2 Features
x Two-Wire I2C Serial Interface Supports 400kHz Protocol
x Single Supply Voltage:
– 4.5 to 5.5V for M24Cxx
– 2.5 to 5.5V for M24Cxx-W
– 1.8 to 5.5V for M24Cxx-R
x Write Control Input
x BYTE and PAGE WRITE (up to 32 Bytes)
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x RANDOM and SEQUENTIAL READ Modes
x Self-Timed Programming Cycle
x Automatic Address Incrementing
x Enhanced ESD/Latch-Up Protection
x More than 1 Million Erase/Write Cycles
x More than 40-Year Data Retention
7.3 Absolute Maximum Ratings
7.4 Pinning
8. CLASS AB STEREO HEADPHONE DRIVER TDA1308
8.1. General Description
The TDA1308 is an integrated class AB stereo headphone driver contained in an SO8
or a DIP8 plastic package. The device is fabricated in a 1 mm CMOS process and has
been primarily developed for portable digital audio applications. It gets its input from two
analog audio outputs (DACA_L and DACA_R) of MSP 34x0G. The gain of the output is
adjustable by the feedback resistor between the inputs and outputs.
8.2 Features
x Wide temperature range
x No switch ON/OFF clicks
x Excellent power supply ripple rejection
x Low power consumption
x Short-circuit resistant
x High performance
x High signal-to-noise ratio
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x High slew rate
x Low distortion
x Large output voltage swing.
x Power supply maximum 60 mW to 32 (THD<0.1%)
x 5V single supply
x SNR 110 dB
x Power supply ripple rejection
x Typically 3 mA supply current at no load
The LM1117 is a series of low dropout voltage regulators with a dropout of 1.2V at
800mA of load current. It has the same pin-out as National Semiconductor’s industry
standard LM317. The LM1117 is available in an adjustable version, which can set the
output voltage from 1.25V to 13.8V with only two external resistors. In addition, it is also
available in five fixed voltages, 1.8V, 2.5V, 2.85V, 3.3V, and 5V. The LM1117 offers
current limiting and thermal shutdown. Its circuit includes a zener trimmed bandgap
reference to as-sure output voltage accuracy to within ±1%. The LM1117 series is
available in SOT- 223, TO-220, and TO-252 D-PAK packages. A minimum of 10μF
tantalum capacitor is required at the output to improve the transient response and
stability.
10.1.2. Features
x Available in 1.8V, 2.5V, 2.85V, 3.3V, 5V, and Adjustable Versions
x Space Saving SOT-223 Package
x Current Limiting and Thermal Protection
x Output Current 800mA
x Line Regulation 0.2% (Max)
x Load Regulation 0.4% (Max)
x Temperature Range
x LM1117 0°C to 125°C
x LM1117I -40°C to 125°C
10.1.3. Applications
x 2.85V Model for SCSI-2 Active Termination
x Post Regulator for Switching DC/DC Converter
x High Efficiency Linear Regulators 15
x 32” TFT TV Service Manual
x Battery Charger
x Battery Powered Instrumentation
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10.1.4. Absolute Maximum Ratings
10.1.5. Pinning
10.2. LM1086
10.2.1. General Description
The LM1086 is a low dropout three terminal regulator with 1.5A output current capability.
The output voltage is adjustable with the use of a resistor divider. Dropout is guaranteed
at a maximum of 500 mV at maximum output current. It's low dropout voltage and fast
transient response make it ideal for low voltage microprocessor applications. Internal
current and thermal limiting provides protection against any overload condition
that would create excessive junction temperature.
10.2.2. Features
x Low Dropout Voltage 500mV at 1.5A Output Current
x Fast Transient Response
x 0.015% Line Regulation
x 0.1% Load Regulation
x Current Limiting and Thermal Protecion.
x Adjustable or Fixed Output Voltage(1.8, 2.5, 2.85, 3.0, 3.3, 3.45, 5.0V)
x Surface Mount Package SOT-223 & TO-263 (D2 Package)
x 100% Thermal Limit Burn-in
10.2.3. Applications
xBattery Charger
Adjustable Power Supplies
x
Constant Current Regulators
x
Portable Instrumentation
x
High Efficiency Linear Power Supplies
x
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xHigh Efficiency "Green" Computer Systems
SMPS Post-Regulator
x
Power PC Supplies
x
x Powering VGA & Sound Card
10.2.4. Absolute Maximum Ratings
10.2.5. Pinning
10.3. MP1593
10.3.1. General Description
The MP1593 is a step-down regulator with an internal Power MOSFET. It achieves 3A
continuous output current over a wide input supply range with excellent load and line
regulation. Current mode operation provides fast transient response and eases loop
stabilisation. Fault condition protection includes cycle-by-cycle current limiting and
thermal shutdown. Adjustable soft-start reduces the stress on the input source at turnon. In shutdown mode the regulator draws 20μA of supply current. The MP1593
requires a minimum number of readily available external components to complete a 3A
step down DC to DC converter solution.
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10.3.2. Features
x 3A Output Current
x Programmable Soft-Start
x 100mȍ Internal Power MOSFET Switch
x Stable with Low ESR Output Ceramic Capacitors
x Up to 95% Efficiency
x 20μA Shutdown Mode
x Fixed 385KHz Frequency
x Thermal Shutdown
x Cycle-by-Cycle Over Current Protection
x Wide 4.75 to 28V Operating Input Range
x Output Adjustable from 1.22V
x Under Voltage Lockout
x Available in 8-Pin SOIC Package
10.3.3. Applications
x Distributed Power Systems
x Battery Chargers
x Pre-Regulator for Linear Regulators
x Flat Panel TVs
x Set-Top Boxes
x Cigarette Lighter Powered Devices
x DVD/PVR Devices
10.3.4. Absolute Maximum Ratings
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10.3.5. Electrical Characteristics
10.3.6. Pinning
Pin1:BS
High-Side Gate Drive Boost Input. BS supplies the drive for the high-side N-Channel
MOSFET switch. Connect a 10nF or greater capacitor from SW to BS to power the high
side switch.
Pin2:IN
Power Input. IN supplies the power to the IC, as well as the step-down converter
switches. Drive IN with a 4.75V to 28V power source. Bypass IN to GND with a suitably
large capacitor to eliminate noise on the input to the IC.
Pin3:SW
Power Switching Output. SW is the switching node that supplies power to the output.
Connect the output LC filter from SW to the output load. Note that a capacitor is required
from SW to BS to power the high-side switch
Pin4:GND
Ground.
Pin5:FB
Feedback Input. FB senses the output voltage to regulate that voltage. Drive FB with a
resistive voltage divider from the output voltage. The feedback threshold is 1.222V.
Pin6:COMP
Compensation Node. COMP is used to compensate the regulation control loop. Connect
a series RC network from COMP to GND to compensate the regulation control loop. In
some cases, an additional capacitor from COMP to GND is required.
Pin7:EN
Enable Input. EN is a digital input that turns the regulator on or off. Drive EN high to turn
on the regulator, drive EN low to turn it off. An Under Voltage Lockout (UVLO) function
can be implemented by the addition of a resistor divider from VIN to GND. For complete
low current shutdown its needs to be less than 0.7V. For automatic startup, leave EN
unconnected.
Pin8:SS
.
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Soft-Start Control Input. SS controls the soft-start period. Connect a capacitor from SS
to GND to set the soft-start period. A 0.1μF capacitor sets the soft-start period to 10ms.
To disable the soft-start feature, leave SS unconnected.
10.4. FDC642P
10.4.1. General Description
This p-channel 2.5V specified MOSFET is produced using Fairchild’s advanced
PowerTrench process that has been especially tailored to minimize on state resistance
and yet maintain low gate charge for superior switching performance.
10.4.2 . Features
10.4.3. Absolute Maximum Ratings
10.4.4. Pinning
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10.5. SIL9011
The Sil 9011 is a third generation HDMI receiver compatible with the HDMI 1.1 specification.
Backwards compatibility with DVI 1.0 allows HDMI systems to connect to existing DVI 1.0
hosts over a single cable.
The Sil 9011 is capable of receiving and outputting 2 to 8 channels of digital audio of up to
192kHz. An industry-standard I
S/PDIF port supports up to 96kHz audio.
Silicon Image’s HDMI receivers use the latest generation of PanelLink TMDS core technology.
These PanelLink cores pass all HDMI compliance tests.
10.5.1 Features
x HDMI 1.1, HDCP 1.1 and DVI 1.0 compliant receiver
x Integrated PanelLink core supports:
DTV resolutions (480i/576i/480p/576p/720p/1080i)
PC resolutions (VGA, SVGA, XGA, SXGA, UXGA) up to 165MHz.
x Digital video interface supports video processors:
x S/PDIF output supports bothIEC 60958 and IEC 67937 for PCM, Dolby Digital,
DTS digital or any S/PDIF type audio transmission (32-96kHz Fs)
2
S port allows direct connection to low-cost audio DACs. An
2
x Four Programmable I
S outputs for connection to low-cost audio DACs.
x Sample rates up to 192kHz
x Auto audio error detection with programmable soft mute.
x Integrated HDCP decryption engine for receiving protected audio and video
content
x Pre-programmed HDCP keys provide highest level of key security, simplifies
manufacturing
10.6. 24LC02
10.6.1. General Description
24AA02/24LC02B (24XX02*) is a 2 Kbit Electrically Erasable PROM. The device is
organized as one block of 256 x 8-bit memory with a 2-wire serial interface. Low-voltage
design permits operation down to 1.8V, with standby and active currents of only 1μA
and 1mA, respectively. The 24XX02 also has a page write capability for up to 8 bytes of
data.
10.6.2 Features
x Single supply with operation down to 1.8V
x Low-power CMOS technology
-1mA active current typical
-1μA standby current typical (I-temp)
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x Organized as 1 block of 256 bytes (1 x 256 x 8)
x 2-wire serial interface bus, I
2
C™ compatible
x Schmitt Trigger inputs for noise suppression
x Output slope control to eliminate ground bounce
x 100 kHz (24AA02) and 400 kHz (24LC02B) compatibility
x Self-timed write cycle (including auto-erase)
x Page write buffer for up to 8 bytes
x 2ms typical write cycle time for page write
x Hardware write-protect for entire memory
x Can be operated as a serial ROM
x Factory programming (QTP) available
x ESD protection > 4,000V
x 1,000,000 erase/write cycles
x Data retention > 200 years
x 8-lead PDIP, SOIC, TSSOP and MSOP packages
x 5-lead SOT-23 package
x Pb-free finish available
x Available for extended temperature ranges:
-Industrial (I): -40°C to +85°C
-Automotive (E): -40°C to +125°C
10.6.3 Pinning
10.7. μPA672T
10.7.1. General Description
N-channel Mos-Fet array for switching.The μPA672T is a super-mini-mold device
provided with two MOS FET elements. It achieves high-density mounting and saves
mounting costs.
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10.7.2. Features
x Two MOS FET circuits in package the same size as SC-70
x Automatic mounting supported
10.7.3 Absolute Maximum Ratings
10.7.4 Pinning
10.8. M74HC4052
10.8.1. General Description
The M74HC4052 is a dual four-channel analog MULTIPLEXER/DEMULTIPLEXER
fabricated with silicon gate C2MOS technology and it is pin to pin compatible with the
equivalent metal gate CMOS4000B series. It contains 8 bidirectional and digitally
controlled analog switches.
10.8.2. Features
x LOW POWER DISSIPATION: ICC = 4mA(MAX.) at TA=25°C
x LOGIC LEVEL TRANSLATION TO ENABLE 5V LOGIC SIGNAL TO
COMMUNICATE
x WITH ±5V ANALOG SIGNAL
x LOW "ON" RESISTANCE:
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70W TYP. (VCC - VEE = 4.5V)
50W TYP. (VCC - VEE = 9V)
x WIDE ANALOG INPUT VOLTAGE RANGE: ±6V
x FAST SWITCHING:
tpd = 15ns (TYP.) at TA = 25 °C
x LOW CROSSTALK BETWEEN SWITCHES
x HIGH ON/OFF OUTPUT VOLTAGE RATIO
x WIDE OPERATING SUPPLY VOLTAGE RANGE (VCC - VEE) = 2V TO 12V
x LOW SINE WAVE DISTORTION: 0.02% at VCC - VEE = 9V
x HIGH NOISE IMMUNITY: VNIH = VNIL = 28 % VCC (MIN.)
x PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 4052
10.8.3 Absolute Maximum Ratings
10.8.4 Pinning
VEE supply pin is provided for analog input signals. It has an inhibit (INH) input terminal
to disable all the switches when high. For operation as a digital
multiplexer/demultiplexer, VEE is connected to GND.
A and B control inputs select one channel out of four in each section. All inputs are
equipped with protection circuits against static discharge and transient excess voltage.
Page 32
10.9. Max809
10.9.1. General Description
The MAX809 and MAX810 are costíeffective system supervisor circuits designed to
monitor VCC in digital systems and provide a reset signal to the host processor when
necessary. No external components are required.
The reset output is driven active within 10 _sec of VCC falling through the reset voltage
threshold. Reset is aintained active for a timeout period which is trimmed by the factory
after VCC rises above the reset threshold. The MAX810 has an activeíhigh RESET
output while the MAX809 has an activeílow RESET output. Both devices are available
in SOTí23 and SCí70 packages.
10.9.2. Features
x Precision VCC Monitor for 1.5 V, 1.8 V, 2.5 V, 3.0 V, 3.3 V, and 5.0 V Supplies
x Precision Monitoring Voltages from 1.2 V to 4.9 V Available in 100 mV Steps
x Four Guaranteed Minimum PoweríOn Reset Pulse Width Available (1 ms, 20
ms, 100 ms, and 140 ms)
x RESET Output Guaranteed to VCC = 1.0 V.
x Low Supply Current
x Compatible with Hot Plug Applications
x VCC Transient Immunity
x No External Components
x Wide Operating Temperature: í40°C to 105°C
x PbíFree Packages are Available
10.9.3 Absolute Maximum Ratings
Page 33
10.9.4 Pinning
Page 34
10.10. 24LC21
10.10.1. General Description
The 24LC21 is a 1K bit electrically erasable programmable memory (EEPROM), organized by 8
bits.This device can operate in two modes: Transmit Only mode and I2C bidirectional mode.
When powered, the device is in Transmit Only mode with EEPROM data clocked out from the
rising edge of the signal applied on VCLK.
10.10.2. Features
x 1 MILLION ERASE/WRITE CYCLES
x 40 YEARS DATA RETENTION
x 2.5V to 5.5V SINGLE SUPPLY VOLTAGE
x 400k Hz COMPATIBILITY OVER the FULL RANGE of SUPPLY VOLTAGE
x TWO WIRE SERIAL INTERFACE I2C BUS COMPATIBLE
x PAGE WRITE (up to 8 BYTES)
x BYTE, RANDOM and SEQUENTIAL READ MODES
x SELF TIMED PROGRAMMING CYCLE
x AUTOMATIC ADDRESS INCREMENTING
x ENHANCED ESD/LATCH UP PERFORMANCES
10.10.3 Absolute Maximum Ratings
Page 35
10.10.4 Pinning
11.SERVICE MENU SETTINGS
In order to reach service menu,
x First Press “MENU”
x Then press the remote control code, which is “4725”
11.1. Video Setup
x Picture Mute <.....>
If “Yes” selected, “Picture mute” feature is active.
x Blue Screen <.....>
If “Yes” selected, “Blue Background” item is seen in “Feature”
menu.
x YC Delay <...........>
Tuner PAL <.....> Value between -8 to+7
Ext PAL <.....> Value between -8 to+7
SECAM <.....> Value between -8 to+7
NTSC <.....> Value between -8 to+7
x AGC (dB) <.....> Value between 0 to+8
11.2. AudioSetup
x Equaliser <.....>
If “Yes” selected, “Equaliser” item is seen in “Sound” menu.
Page 36
x BBE
x SRS WOW
x Virtual Dolby Surround <.....>
If “Yes” selected, Virtual Dolby Surround feature is seen in “Sound”
menu with selected Virtual Dolby Text.
x Virtual Dolby Text The selected item is seen as Virtual Dolby Srround Text.
3DS
Virtual Dolby
3D Panorama
x AVL <.....>
If “Yes” selected, “AVL” item is seen in “Sound” menu.
x Carrier Mute <.....>
If “Yes” selected, “Carrier mute” feature is active.
x Audio Delay Offset
x Prescale
FM Presc. AVL On <.......> Value between 0 to +127
AM Presc. AVL On <.......> Value between 0 to +127
NICAM Presc. AVL On <.......> Value between 0 to +127
I2S Presc. AVL On <.......> Value between 0 to +127
SCART Presc. AVL On <.......> Value between 0 to +127
FM Presc. AVL Off <.......> Value between 0 to +127
AM Presc. AVL Off <.......> Value between 0 to +127
NICAM Presc. AVL Off <.......> Value between 0 to +127
I2S Presc. AVL Off <.......> Value between 0 to +127
SCART Presc. AVL Off <.......> Value between 0 to +127
x Dynamic Bass <.....>
If “Yes” selected, “Dynamic Bass” item is seen in “Sound” menu.
x Subwoofer <.....>
If “Yes” selected, “Subwoofer” item is seen in “Sound” menu.
11.3. Options 1
x VCTP Version <.......>
Basic+
Basic
x Double Digit <.....>
If “Yes” selected, “Double Digit” button is active for channel
selection.
x TEA6415C Available <.....>
If “Yes” selected, video switch IC is active on hardware.
x TEA642X Available<.....>
If “Yes” selected, audio switch IC is active on hardware.
x Power-Up Mode <.......>
StandBy If selected, TV opens in stand by mode.
L.State If selected, TV opens in Last State mode.
x TV Open Mode <.......>
Source
1st TV
Last TV
Page 37
x Select Languages <.......> “Yes” selected languages are seen as option under
the “Language” item in “Feature” menu
Language Set 1
oGerman <.......>
oFrench <.......>
oSpanish <.......>
oItalian <.......>
oDanish <.......>
oFinnish <.......>
oSwedish <.......>
Language Set 2
oGreek <.......>
oNorwegian <.......>
oDutch <.......>
oPortuguse <.......>
oPolish <.......>
oTurkish <.......>
oRussian <.......>
oCzech <.......>
Language Set 3
oHungarian <.......>
oSlovak <.......>
oSlovenian <.......>
oRomanian <.......>
oBulgarian <.......>
oCroatian <.......>
oSerbian <.......>
oHebrew <.......>
x First APS <.......>
If “Yes” selected, first time TV opens by asking APS.
x APS Volume <.......> value between 0 to+63
Burn In Mode <.......>
x
If “Yes” selected, TV opens with Burn-In mode. This mode is
used in manufacturing.
x APS Test
x HDMI WP <.......>
If “Yes” selected, HDMI EDID ROM is write protected.
11.4. Options 2
x Autostore <.......>
If “Yes” selected, Channel is automatically stored.
x Led Type <.............................>
1 Led 1 Colour
1 Led 2 Colours
2 Led 2 Colours
x PC PIP <.......>
x PC Stand By <.......>
Page 38
11.5. Service Scan/Tuning Setup
x Search for L/L’ <.......>
x Pref. Search Standard <...........>
BG, DK, I
L/L’
M
x Station Ident <.......>
x ATS Delay Time (ms) <.......> Value between 20 to 250
x Color Killer Threshold <.......> Value between 0 to +255
x Tuner Options <.......>
Control Byte <.......> Value between 0 to +255
Low-Mid – Low Byte <.......> Value between 0 to +255
Low-Mid – High Byte <.......> Value between 0 to +255
Mid-High – Low Byte <.......> Value between 0 to +255
Mid-High – High Byte <.......> Value between 0 to +255
NO DEFECT APPEARANCEDEFECT IDENTIFICATION AND SOLUTIONS
When the TV is operated for the first time,
1
STANDBY LED lights but the TV switches on
Standby LED does not ligh ever.
2
Standby LED does not light and/or IR receiver
3
does not work.
Picture is available but there is no sound.
4
Sound is available but there is no picture.
5
Neither picture nor sound is available.
6
TV switches on but constantly switches to HDMI
input. While trying to tune a channel, always
7
switches to C05.
No sound from PC or YPbPr.
8
TFT backlight level cannot be controlled, it's level
9
is fixed.Q002, Q003, 1006 or surrounding eqipment can be defective or SMD material can be disintegrated.
TV switches on; however, after a short break, it
10
switches off again by itself.
IC403 E2Epron is plugged empty, after the programming process of the first values has finished, TV will switch on by itself.
Are there 3.3V on IC001's bottomright pin? If no, 3.3V are not drawing in, there can be an error in PW board; underneath VCTP, SMD material can be disintegrated.
Are there 1.8V in IC001 solder area? If no,1.8V are not drawing in; IC001 can be defective or underneath VCTP, SMD material can be disintegrated.
Are there 3.3V on IC406's top left pin? If no, IC406 can be defective.
Are there 1.8V on S719? If no, IC001 can be defective.
Are there 3.3V on S700? If no, there can be an error in PW board.
Are there 5V on pin PL409 5? If no, there can be a problem in PW board or SMD material can be disintegrated.
Are there 24V on the pin, which is indicated as number 1, of PL001 socket. If no, there can be a problem in PW board. L603 can be cold soldering.
PL406 can be cold soldering.
Is there display voltage in Q005's top points? (for LG 12V, for other displays 5V). If no; L007 for LG, L006 for other displays can be unplugged.
Q005 can be defective.
Are there 5V in 7th pin of tuner? If no, IC007 and surrounding equipment can be defective, L101 can be defective.
Are there 33V in 9th pin of tuner? If no, there can be a problem in PW board.
Are there 3.3V in L104 inductor? If no, there can be a problem in PW board.
Are there 12V in pin 8 of the PL003 socket? If no, there can be a problem in PW board.
Q410 and Q411 can be defective.
Are there 10V in the mid pin of IC004? If no, IC004 can be defective.
Are there 8V on L200? If no, there can be a problem in D004, D005, D006 or there could be cold soldering.
Are there 1.8V on S719? If no, IC001 can be defective.
Are there 3.3V on S700? If no, PW board can be defective.
IC702 can be defective.
S705 and S706 can be cold soldering.
IC905 or surronding equipment can be defective.
IC 905 supply voltage may not be drawing in 10V.
When the TV is switched on; there should be displayed voltages as following: 5V on C074, 3.3V on PL004 pin 4, 8V on IC004 mid pin and Q005 top points. If one is missing, TV may shut
down after a short while after it is switched on.
MP1593 (MPS)
NCP1117-3.3V (Onsemi)
NCP1117-1.8V (Onsemi)
NCP1117-1.5V (Onsemi)
16-bit buffer with OE (Various)
Octal Bus Transceiver (Various)
NAND Gate (Various)
Page 48
13.5.1 IDTV Module Block Diagram
IF INPUT
CON
SAW Filter
COFDM
DEMOD
VCXO
PROGRAM
CON
(UART)
JTAG
CON
ANALOG AV CON
I2C,UART,4 GPIO, IF AGC
VIDEO
AMP
AUDIO
DAC
EMMA2LL
CPU + MPEG DECODER
NEC
DIGITAL AV CON
BUFFERS &
GATES
POWER
5V
3.3V 1.8V 1.5V
LIN.REGULATOR
S/PDIF
CON
16 MB
DDRAM
2 MB
FLASH
PCMCIA
CON
Page 49
14. CONNECTORS
14.1.POWER Connector
PinDescription
+12/24V
1
+12/24V
2
GND
3
GND
4
14.2.EMMA2LL JTAG Connector
PinDescription
GND
1
JTCLK
2
3.3V
3
JTDO
4
NC
5
JTMS
6
NC
7
JTRST
8
GND
9
JTDI
10
14.3.ANALOG AV Connector
PinDescription Pin Description
DVB_SCL
1
DVB_SDA
2
GND
3
GND
4
IRQ
5
DVB_RX
6
DVB_TX
7
GPIO4
8
GPIO3
9
GPIO2
10
GPIO1
11
IF_AGC_DVB
12
GND
13
GND
14
DVB_R_AUDIO
15
DVB_L_AUDIO
16
GND
17
DVB_IN_CVBS
18
GND
19
DVB_IN_B / DVB_IN_C
20
GND
21
DVB_IN_G / DVB_IN_Y
22
GND
23
DVB_IN_R
24
Page 50
14.4.IF Connector
PinDescription
IF +
1
IF -
2
GND
3
14.5.PROGRAMMING Connector
PinDescription
TXD
1
GND
2
RXD
3
14.6.S/PDIF Connector
PinDescription
S/PDIF
1
GND
2
14.7.DIGITAL AV Connector
PinDescription PinDescription
I2S Word Select
1
I2S Serial Clock
2
I2S Serial Data
3
GND
4
GND
5
GND
6
Internal Vertical SYNC
7
Internal Horizontal SYNC
8
GND
9
GND
10
GND
11
Digital Video Pixel Clock
12
Digital Video Y/Cb/Cr DATA7
13
Digital Video Y/Cb/Cr DATA6
14
Digital Video Y/Cb/Cr DATA5
15
Digital Video Y/Cb/Cr DATA4
16
Digital Video Y/Cb/Cr DATA3
17
Digital Video Y/Cb/Cr DATA2
18
Digital Video Y/Cb/Cr DATA1
19
Digital Video Y/Cb/Cr DATA0
20
Page 51
14.8.PCMCIA Connector
PinSignalDescription Pin Signal Description
GND Ground
1
D3 Data bit 3
2
D4 Data bit 4
3
D5 Data bit 5
4
D6 Data bit 6
5
D7 Data bit 7
6
CE1# Card Enable
7
A10 Address bit 10
8
OE# Output Enable
9
A11 Address bit 11
10
A9 Address bit 9
11
A8 Address bit 8
12
A13 Address bit 13
13
A14 Address bit 14
14
WE# Write Enable
15
IREQ# Interrupt Request
16
VCC Supply Voltage
17
Programming and
VPP
18
MIVAL MPEG Data In Valid
19
MCLKI MPEG Data Clock Input
20
A12 Address bit 12
21
A7 Address bit 7
22
A6 Address bit 6
23
A5 Address bit 5
24
A4 Address bit 4
25
A3 Address bit 3
26
A2 Address bit 2
27
A1 Address bit 1
28
A0 Address bit 0
29
D0 Data bit 0
30
D1 Data bit 1
31
D2 Data bit 2
32
IOIS16# I/O Port Is 16-bit
33
GND Ground
34
Peripheral Supply
GND Ground
35
CD1# Card Detect
36
MDO3 MPEG Data Out 3
37
MDO4 MPEG Data Out 4
38
MDO5 MPEG Data Out 5
39
MDO6 MPEG Data Out 6
40
MDO7 MPEG Data Out 7
41
CE2# Card Enable
42
VS1# Voltage Sense 1
43
IORD# I/O Read
44
IOWR# I/O Write
45
MISTRT MPEG Data In Start
46
MDI0 MPEG Data In 0
47
MDI1 MPEG Data In 1
48
MDI2 MPEG Data In 2
49
MDI3 MPEG Data In 3
50
VCC Supply Voltage
51
Programming and
VPP
52
MDI4 MPEG Data In 4
53
MDI5 MPEG Data In 5
54
MDI6 MPEG Data In 6
55
MDI7 MPEG Data In 7
56
MCLKO MPEG Data Clock Output
57
RESET Card Reset
58
WAIT# Extend bus cycle
59
INPACK# Input Port Acknowledge
60
REG#
61
MOVAL MPEG Data Out Valid
62
MOSTRT MPEG Data Out Start
63
MDO0 MPEG Data Out 0
64
MDO1 MPEG Data Out 1
65
MDO2 MPEG Data Out 2
66
CD2# Card Detect
67
GND Ground
68
Peripheral Supply
Register select & I/O
Enable
Page 52
15. CONCEPT ICs
15.1. μPD61115
15.1.1 Description
The μPD61115 device is a member of the second generation of multimedia processors based on NEC’s
Enhanced MultiMedia Architecture (EMMArchitecture). These devices provide nearly all the functionality
required to realise a high performance and cost-effective digital set-top box or integrated digital TV.
15.1.2 Features
x MPEG1 and MPEG2-TS/PS compliant
x High performance MIPS32™ 4Kc™ main CPU core
x High performance MIPS32™ 4Km™ sub-CPU core
x Integrated DVB descrambling with family options for Irdeto and Multi2
x 36 PID filters, 32 section filters
x Video Outputs: 4 DACs for RGB, Component video, S-video and composite output with support
for PAL, NTSC and SECAM
x 4 graphics planes
x Audio Output: 2-channel PCM and SPDIF
x Peripherals support
two fast UARTs with 16byte FIFOs
I
2C interface
infrared receiver
three wire clocked serial interface
x System timers, RTC and Watchdog timer
x Motorola/Intel Bus.
15.2. DRX 3973D
Fourth-Generation COFDM Demodulators
15.2.1 Introduction
The DRX 3973D and the DRX 3977D are fourth-generation COFDM demodulators that offer today’s
highest level of front-end integration resulting in ultimate DVB-T digital reception, compliant to ETS 300
744, DTG D-Book, EICTA E-Book, and Nordig Unified v1.0.2 .
The DRX 3973/77D applies cutting-edge digital filtering techniques in combination with a highperformance A/D-converter and PLL configuration, resulting in superior performance figures in the
presence of digitaland analog adjacent channels.
Progressive channel estimator algorithms provide exceptional performance in multipath- and dynamicecho
conditions – an especially important feature for single-frequency networks and indoor reception.
The state-of-the-art impulsive noise cruncher suppresses interferences originating from sources such as
cars, electrical motors, and household appliances.
Page 53
15.2.2 Features
Highest level of front-end integration and flexibility:
Integrated PGA (programmable gain amplifier) 30 dB
Single 8 MHz SAW filter operation
2 AGC control signals available for RF and IF amplifier control
Flexible clock reference options
Re-use of 4 MHz tuner clock reference
Pre-SAW sense input for optimal RF AGC setting and RF-level measurement
Excellent digital reception performance:
Superior digital and analog adjacent channel performance (> 40dB for QEF)
Impulsive noise cruncher
Multipath and dynamic echoes
The input IF frequency ranging up to 44 MHz ensures upward compatibility for new tuner topologies
Integrated microprocessor to perform autonomous detection and operation of all possible DVB-T
modes, without interaction with the host processor
Fully automatic and fast signal acquisition: UHF and VHF band-scan in <20 seconds
Meets all international DVB-T receiver specifications: Nordig Unified, DTG, EICTA
Comfortable software drivers for integration of tuner and COFDM demodulator
Secondary serial interface for tuner control
5 V tolerant AGC and secondary serial protocol outputs
2 general purpose I/O pins (GPIO)
Configurable parallel or serial MPEG-TS output
PMQFP64-2 package: footprint 1010 mm (DRX 3973D)
PQFN48-1 package: small footprint 77 mm (DRX 3977D)
IEEE 1149.1 boundary scan
The PI6CX100-27 is a low-cost, high-performance 3.3V VCXO, designed to replace expensive VCXO
modules. The on-chip Voltage Controlled Crystal Oscillator accepts a 0 to 3.3V input voltage to cause
clocks to vary by ±120ppm. This device uses an inexpensive external pullable crystal at 27 MHz to
produce the same output frequency.The PI6CX100-27 is designed for Set-Top Box applications.
The 74V1G08 is an advanced high-speed CMOS SINGLE 2-INPUT AND GATE fabricated with submicron silicon gate and double-layer metal wiring C
2MOS technology.
15.5. FMS6145
Low Cost Five Channel 4th Order Standard Definition Video Filter Driver
15.5.1 Features
x Five fourth-order 8MHz (SD) filters
x Transparent input clamping
x Dual video load drive (2Vpp, 75)
x AC or DC-coupled inputs
x AC or DC-coupled outputs
x DC-coupled outputs eliminate AC-coupling capacitors
x 5V only
x Lead (Pb) Free TSSOP-14 package
Page 55
15.5.2 Applications
x Cable set top boxes
x Satellite set top boxes
x DVD players
x HDTV
x Personal video recorders (PVR)
x Video on demand (VOD)
15.5.3 Description
The FMS6145 Low Cost Video Filter (LCVF) is intended to replace passive LC filters and drivers with a
low-cost integrated device. Five 4th order filters provide improved image Quality compared to typical 2nd
or 3rd order passive solutions.
The FMS6145 may be directly driven by a DC-coupled DAC output or an AC-coupled signal. Internal
diode clamps and bias circuitry
may be used if AC-coupled inputs are required.
The outputs can drive AC or DC-coupled single (150) or dual(75) loads. DC-coupling the outputs
removes the need for output coupling capacitors. The input DC levels will be offset approximately +280mV
at the output.
15.6. MP1593
3A, 28V Step-Down Converter
15.6.1 Description
The MP1593 is a step-down regulator with an internal Power MOSFET. It achieves 3A
continuous output current over a wide input supply range with excellent load and line regulation.
Current mode operation provides fast transient response and eases loop stabilisation. Fault
condition protection includes cycle-by-cycle current limiting and thermal shutdown. Adjustable
soft-start reduces the stress on the input source at turn-on. In shutdown mode the regulator
draws 20μA of supply current.
The MP1593 requires a minimum number of readily available external components to complete
a 3A step down DC to DC converter solution.
15.6.2 Features
x 3A Output Current
x Programmable Soft-Start
x 100m Internal Power MOSFET Switch
x Stable with Low ESR Output Ceramic Capacitors
x Up to 95% Efficiency
x 20μA Shutdown Mode
x Fixed 385KHz Frequency
Page 56
x Thermal Shutdown
x Cycle-by-Cycle Over Current Protection
x Wide 4.75 to 28V Operating Input Range
x Output Adjustable from 1.22Vs
x Under Voltage Lockout
x Available in 8-Pin SOIC Package
15.6.3 Applications
x Distributed Power Systems
x Battery Chargers
x Pre-Regulator for Linear Regulators
x Flat Panel TVs
x Set-Top Boxes
x Cigarette Lighter Powered Devices