A. MAIN AMPLIFIER (U62)(6-8-10 W option) ...................................................................................... ........................ 7
B. MAIN AMPLIFIER (U91)(2.5 W option) ................................................................................................................... 9
C. HEADPHONE AMPLIFIER (U85) ............................................................................................................................. 11
5. POWER STAGE .......................................................................................................................................................... 13
A. Hynix H5TQ2G63FFR-PBC (U72) ........................................................................................................................... 30
8.2Gbit (256M x 8 bit) NAND Flash Memory ................................................................................................................ 32
A. MT29F2G08ABAEAWP (U80) ................................................................................................................................ 32
9.16M-BIT [16M x 1] CMOS SERIAL FLASH EEPROM ............................................................................................ 34
A. KH25L1606EM2-12G Macronix SPI Flash (U81) .................................................................................................... 34
A. CY7C65642 (U73) .................................................................................................................................................. 36
11. CI Interface ................................................................................................................................................................... 38
A. Main SW update ................................................................................................................................................... 38
A. No Backlight Problem ........................................................................................................................................... 39
B. CI Module Problem ..........................................................................................................
C. Staying in Stand-by Mode ..................................................................................................................................... 41
D. IR Problem ............................................................................................................................................................ 42
E. Keypad Touchpad Problems ................................................................................................................................. 42
F. USB Problems ........................................................................................................................................................ 43
G. No Sound Problem ................................................................................................................................................ 43
..................................... 40
H. Standby On/Off Problem ...................................................................................................................................... 44
İ. No Signal Problem ........................................................................................................... ...................................... 44
14. Service Menu Settings .................................................................................................................................................. 47
15. PLACEMENT OF BLOCKS ........................................................................................................................................ 52
16. General Block Diagram ................................................................................................................................................ 53
1
WARNING: It is necessary to remove the internal lead connector before removing the back cover of the
TV completely!
1. INTRODUCTION
17MB97 main board is driven by MStar SOC. This IC is a single chip iDTV solution that supports channel
decoding, MPEG decoding, and media-center functionality enabled by a high performance AV CODEC and
CPU.
Key features include:
Combo Front-End Demodulator
A multi standart A/V format decoder
The MACEpro video processor
Home theatre sound processor
Rich internet connectivity and completed digital home network solution
Dual-stream decoder for 3D contents
Mılti-purpose CPU for OS and multimedia
Peripheral and power management
Embedded DRAM
Supported peripherals are:
1 RF input VHF I, VHF III, UHF
1 Satellite input
1 Side AV (CVBS, R/L_Audio)
1 SCART socket(Common)
1 PC input(Common)
3 HDMI input
1 Common interface(Common)
1 Optic/ Quax S/PDIF output
1 Headphone(Common)
2 USB(1x common, 1x optional) and 2x internal USB for Wifi/Bluetooth
1 Ethernet-RJ45
1 External Touchpad(Common)
1 DVD(Optional)
2
2. T/T2/C/A TUNER (U74)
Description
The MxL661 is a highly integrated low-power silicon tuner IC that targets all global and digital cable standards.
Broadband input filtering and channel filtering have been completely integrated on-chip. This integration
enables a compact design resulting in small footprint, low Bill-Of-Material (BOM) cost, and low-power
consumption.
A signal at the 75ohm RF input is filtered and converted to a programmable IF output frequency. Automatic
Gain Control (AGC), LO generation, and channel selectivity functions are completey integrated on the chip. All
functions of the IC can be controlled using the I2C interface.
The MxL is available in a 4 mm x 4mm x 0.85mm3, 24-pin QFN package.
Features
Tuning range from 44MHz to 1002MHz
Programmable channel bandwidths of 6, 7, and 8MHz
Integrated channel filtering
Low power consumption with 3.3V and 1.8V dual-supply operation - 351 mW (digital terrestrial)
On-chip voltage regulator enables single supply 3.3V operation
Programmable IF frequency and IF spectrum inversion
Programmable RF to IF delay for ATV scrambling systems that relies on the H-Sync method
Optioanl balun-less application note for cost-sensitive applications
Reference clock output available for re-use by demodulators and additional tuners in multi-channel
Input power reporting
Open-drain General Purpose Output GPO available for controlling off-chip circuitry
I
applications
2
C compatible digital control interface
RoHS compliance
3
Figure: Pin description
Table: Pin functions
3. S/S2 TUNER & DEMODULATOR (U90) OPTIONAL
Description
The M88RS6000 is highly single-Chip DVB-S2/S receiver. The device is consisting of tuner, a demodulator
and an LNB controller. It is fully compliant with the DVB-S2 and DVB-S standards by supporting
QPSK,(PSK,16APSK and 32APSK demodulator schemes.
The tuner is the device an RF signal in the frequency range from 950 Mhz to 2150 Mhz and down-convert the
signal directly to analog baseband signal, which will be converted to a digital signal in the advanced ADC.
After the ADC, the digital signal will be demodulated in the demodulator, related errors generated during
transmission will be corrected at this stage and finally an MPEG transport stream will be delivered in serial,
parallel or DVB-CI format.
4
Figure: Pin description
5
FEATURES
6
4. AUDIO AMPLIFIER ST AGES
A. MAIN AMPLIFIER (U62)(6-8-10 W option)
Description
AD82587D is a digital audio amplifier capable of driving a pair of 8 ohm, 20W or a single 4ohm, 40W speaker,
both which operate with play music at a 24V supply without external heat-sink or fan requirement.
Using I2C digital control interface, the user can control AD82587D’s input format selection, mute and volume
control functions. AD82587D has many built-in protection circuits to safeguard AD82587D from connection
o 256x~1024x Fs for 32kHz / 44.1kHz / 48kHz
o 128x~512x Fs for 64kHz / 88.2kHz / 96kHz
o 64x~256x Fs for 128kHz /176.4kHz/192kHz
Supply voltage
o 3.3V for digital circuit
o 10V~26V for loudspeaker driver
Loudspeaker output power for Stereo@ 24V
o 10W x 2ch into 8_ @ 0.16% THD+N
o 15W x 2ch into 8_ @ 0.18% THD+N
o 20W x 2ch into 8_ @ 0.24% THD+N
Loudspeaker output power for Mono@ 24V
o 20W x 1ch into 4_ @ 0.17% THD+N
o 30W x 1ch into 4_ @ 0.2% THD+N
o 40W x 1ch into 4_ @ 0.24% THD+N
Sounds processing including:
o Volume control (+24dB~-103dB, 0.125dB/step)
o Dynamic range control
o Power clipping
o Channel mixing
7
o User programmed noise gate with hysteresis window
o DC-blocking high-pass filter
Anti-pop design
Short circuit and over-temperature protection
I2C control interface with selectable device address
Internal PLL
LV Under-voltage shutdown and HV Under-voltage
detection
Power saving mode
Dynamic temperature control
8
Figure: Pin description
Figure: Functional Block Diagram
Table: Absolute Maximum Ratings
Table: Recommended Operating Conditions
B. MAIN AMPLIFIER (U91)(2.5 W option)
Description
The AD52010 is a 3.0W stereo, filter-less class-D audio amplifier. Operating with 5.0V loudspeaker driver
supply, it can deliver 3.0W output power into 4 ohm loudspeaker within 10% THD+N or 2.6W at 1% THD+N.
The AD52010 is a stereo audio amplifier with high efficiency and suitable for the notebook computer, and
portable multimedia device.
Features
Supply voltage range: 2.5 V to 5.5 V
Support single-ended or differential analog input
Low Quiescent Current
Low Output Noise
Low shut-down current
Short power-on transient time
Internal pull-low resistor on shut-down pins
Short-circuit protection
Over-temperature protection
Loudspeaker power within 10% THD+N
o 1.78W/ch into 8 ohm loudspeaker
9
o >3W/ch into 4 ohm loudspeaker
Loudspeaker efficiency
o 93% @ 8 ohm, THD+N=10%
o 85% @ 4 ohm, THD+N=10%
E-TSSOP-14L package
Integrated Feedback Resistor of 300kW
Figure: Pin description
10
Table:Pin functions
Table: Recommended operating conditions
C. HEADPHONE AMPLIFIER (U85)
Description
The AD22657B is a 2-Vrms cap-less stereo line driver. The device is ideal for single supply electronics. Cap-
less design can eliminate output dc-blocking capacitors for better low frequency response and save cost.
The AD22657B is capable of delivering 2-Vrms output into a 10k ohm load with 3.3V supply. The gain settings
can be set by users from 1V/V to 10V/V externally. The AD22657B has under voltage protection to prevent
POP noise. Build-in shutdown control and de-pop control sequence also help AD22657B to be a pop-less
device.
The AD22657B is available in a 10-pin MSOP package.
Features
Operation Voltage: 3V to 3.6V
Cap-less Output
o Eliminates Output Capacitors
o Improves Low Frequency Response
o Reduces POP/Clicks
Low Noise and THD
o Typical SNR 107dB
o Typical Vn 7uVrms
o Typical THD+N < 0.02%
Maximum Output Voltage Swing into 2.5k Load
o 2Vrms at 3.3V Supply Voltage
Single-ended Input
External Gain Setting from 1V/V to 10V/V
Fast Start-up Time: 0.5ms
Integrated De-Pop Control
External Under Voltage Protection
Thermal Protection
11
Less External Components Required
+/-8kV IEC ESD Protection at line outputs
Figure: Pin description
12
Table: Pin functions
Table: Recommended operating conditions
5. POWER STAGE
Power socket is used for taking voltages which are 12V_stby and 24V (VDD_Audio for 10W option). These
voltages are produced in power card. Also socket is used for giving dimming, backlight and stand-by signals
Low Input/Output Leakage
Lead Free By Design/RoHS Compliant (Note 1)
Qualified to AEC-Q101 Standards for High Reliability
Figure: Pin description
TPS54528
Description
The TPS54528 is an adaptive on-time D-CAP2™ mode synchronous buck converter. The TPS54528 enables
system designers to complete the suite of various end-equipment power bus regulators with a cost effective, low
component count, low standby current solution. The main control loop for the TPS54528 uses the D-CAP2™
mode control that provides a fast transient response with no external compensation components. The adaptive
on-time control supports seamless transition between PWM mode at higher load conditions and Eco-mode™
operation at light loads. Eco-mode™ allows the TPS54528 to maintain high efficiency during lighter load
conditions. The TPS54528 also has a proprietary circuit that enables the device to adopt to both low equivalent
series resistance (ESR) output capacitors, such as POSCAP or SP-CAP, and ultra-low ESR ceramic capacitors.
The device operates from 4.5-V to 18-V VIN input. The output voltage can be programmed between 0.76 V
and 6.0 V. The device also features an adjustable soft start time. The TPS54528 is available in the 8-pin DDA
package, and designed to operate from –40 C to 85 C.
Features
D-CAP2™ Mode Enables Fast Transient Response
Low Output Ripple and Allows Ceramic Output Capacitor
Wide VIN Input Voltage Range: 4.5 V to 18 V
Output Voltage Range: 0.76 V to 6.0 V
Highly Efficient Integrated FETs Optimized for Lower Duty Cycle Applications
o 65 mΩ (High Side) and 36 mΩ (Low Side)
High Efficiency, less than 10 μA at shutdown
High Initial Bandgap Reference Accuracy
15
Adjustable Soft Start
Pre-Biased Soft Start
650-kHz Switching Frequency (fSW)
Cycle By Cycle Over Current Limit
Auto-Skip Eco-mode™ for High Efficiency at Light Load
Figure: Pin description
Table: Pin functions
RT7278
Description
The RT7278 is a synchronous step down converter with Advanced Constant On-Time (ACOTTM) mode
control. The ACOTTM provides a very fast transient response with few external components. The low
impedance internal MOSFET supports high efficiency operation with wide input voltage range from 4.5V to
17V. The proprietary circuit of the RT7278 enables to support all ceramic capacitors. The output voltage can be
adjustable between 0.8V and 8V. The soft-start is adjustable by an external capacitor.
Features
TM
ACOT
Mode Enables Fast Transient Response
4.5V to 17V Input Voltage Range
3A Output Current
60mΩ Internal Low Site N-MOSFET
16
Advanced Constant On-Time Control
Support All Ceramic Capacitors
Up to 95% Efficiency
700kHz Switching Frequency
Adjustable Output Voltage from 0.8V to 8V
Adjustable Soft-Start
Cycle-by-Cycle Current Limit
Input Under Voltage Lockout
Thermal Shutdown Protection
RoHS Compliant and Halogen Free
Figure: Pin description
17
Table: Pin functions
MP2315
Description
The MP2315 is a high frequency synchronous rectified step-down switch mode converter with built in internal
power MOSFETs. It offers a very compact solution to achieve 3A continuous output current over a wide input
supply range with excellent load and line regulation. The MP2315 has synchronous mode operation for higher
efficiency over output current load range. Current mode operation provides fast transient response and eases
loop stabilization. Full protection features include OCP and thermal shut down. The MP2315 requires a
minimum number of readily available standard external components and is available in a space saving 8-pin
TSOT23 package.
Features
Wide 4.5V to 24V Operating Input Range
3A Load Current
90mΩ/40mΩ Low Rds(on) Internal Power MOSFETs
Low Quiescent Current
High Efficiency Synchronous Mode Operation
Fixed 500kHz Switching Frequency
Frequency Sync from 200kHz to 2MHz External Clock
AAM Power Save Mode
Internal Soft Start
OCP Protection and Hiccup
Thermal Shutdown
Output Adjustable from 0.8V
Available in an 8-pin TSOT-23 package
18
Figure: Pin description
Table: Pin functions
RT7257
Description
The RT7257G is a high efficiency, monolithic synchronous step-down DC/DC converter that can deliver up to
3A output current from a 4.5V to 18V input supply. The RT7257G's current mode architecture and external
compensation allow the transient response to be optimized over a wide input voltage range and loads. Cycle-by-
cycle current limit provides protection against shorted outputs, and soft-start eliminates input current surge
during start-up. The RT7257G also provides under voltage protection and thermal shutdown protection. The
low current (<3uA) shutdown mode provides output disconnection, enabling easy power management in
battery-powered systems. The RT7257G is available in an SOP-8 (Exposed Pad) package.
Features
±1.5% High Accuracy Reference Voltage
4.5V to 18V Input Voltage Range
3A Output Current
Integrated N-MOSFET Switches
Current Mode Control
Fixed Frequency Operation: 800kHz
Output Adjustable from 0.8V to 12V
Up to 95% Efficiency
Programmable Soft-Start
Stable with Low ESR Ceramic Output Capacitors
Cycle-by-Cycle Current Limit
19
Input Under Voltage Lockout
Output Under Voltage Protection
Thermal Shutdown Protection
RoHS Compliant and Halogen Free
Figure: Pin description
Table: Pin functions
RT7237
Description
The RT7237C is a high efficiency, monolithic synchronous step-down DC/DC converter that can deliver up to
2A output current from a 4.5V to 18V input supply. The RT7237C's current mode architecture and external
compensation allow the transient response to be optimized over a wide input range and loads. Cycle-bycycle
current limit provides protection against shorted outputs, and soft-start eliminates input current surge during
start-up. The RT7237C also provides under voltage protection and thermal shutdown protection. The low
current (<3μA) shutdown mode provides output disconnection, enabling easy power management in battery-
powered systems. The RT7237C is available in an SOP-8 (Exposed Pad) package.
20
Features
±1.5% High Accuracy Reference Voltage
4.5V to 18V Input Voltage Range
2A Output Current
Integrated N-MOSFET Switches
Current Mode Control
Fixed Frequency Operation : 800kHz
Output Adjustable from 0.8V to 12V
Stable with Low ESR Ceramic Output Capacitors
Up to 95% Efficiency
Programmable Soft-Start
Cycle-by-Cycle Over Current Limit
Input Under Voltage Lockout
Output Under Voltage Protection
Thermal Shutdown Protection
RoHS Compliant and Halogen Free
Figure: Pin description
21
Table: Pin functions
LM1117
Description
The LM1117 is a series of low dropout voltage regulators with a dropout of 1.2V at 800mA of load current. It
has the same pin-out as National Semiconductor’s industry Standard LM317.
The LM1117 is available in an adjustable version, which can set the output voltage from 1.25V to 13.8V with
only two external resistors. In addition, it is also available in five fixed voltages, 1.8V, 2.5V, 2.85V, 3.3V, and
5V.
The LM1117 offers current limiting and thermal shutdown. Its circuit includes a zener trimmed bandgap
reference to assure output voltage accuracy to within ±1%.
The LM1117 series is available in SOT-223, TO-220, and TO-252 D-PAK packages. A minimum of 10μF
tantalum capacitor is required at the output to improve the transient response and stability.
Features
Available in 1.8V, 2.5V, 2.85V, 3.3V, 5V, and Adjustable Versions
Space Saving SOT-223 Package
Current Limiting and Thermal Protection
Output Current 800mA
Line Regulation 0.2% (Max)
Load Regulation 0.4% (Max)
Temperature Range
— LM1117 0°C to 125°C
— LM1117I −40°C to 125°C
Figure: Pin description
APL5910
Description
The APL5910 is a 1A ultra low dropout linear regulator. The IC needs two supply voltages, one is a control
voltage (VCNTL) for the control circuitry, the other is a main supply voltage (VIN) for power conversion, to
reduce power dissipation and provide extremely low dropout voltage. The APL5910 integrates many functions.
A Power-On- Reset (POR) circuit monitors both supply voltages on VCNTL and VIN pins to prevent erroneous
22
operations. The functions of thermal shutdown and current-limit protect the device against thermal and current
over-loads. A POK indicates that the output voltage status with a delay time set internally. It can control other
converter for power sequence. The APL5910 can be enabled by other power systems. Pulling and holding the
EN voltage below 0.4V shuts off the output.
The APL5910 is available in a SOP-8P package which features small size as SOP-8 and an Exposed Pad to
reduce the junction-to-case resistance to extend power range of applications.
Features
Ultra Low Dropout
o 0.12V (Typical) at 1AOutput Current
0.8V Reference Voltage
High Output Accuracy
o ±1.5%over Line, Load, and Temperature Range
Fast Transient Response
Adjustable Output Voltage
Power-On-Reset Monitoring on Both VCNTL and VIN Pins
Internal Soft-Start
Current-Limit and ShortCurrent-Limit Protections
Thermal Shutdown with Hysteresis
Open-Drain VOUT Voltage Indicator (POK)
Low Shutdown Quiescent Current (< 30mA )
Shutdown/Enable Control Function
Simple SOP-8P Package with Exposed Pad
Lead Free and Green Devices Available (RoHS Compliant)
23
Figure: Pin description
Table: Pin functions
24
6. MICROCONTROLLER
A. MSTAR MSD88RKM2 (U95)
Description
25
26
27
28
29
7. 2GB DDR3 SDRAM
Table: Recommended operating conditions
A. Hynix H5TQ2G63FFR-PBC (U72)
Description
The H5TQ2G83FFR-xxC, H5TQ2G63FFR-xxC, H5TQ2G83FFR-xxI, H5TQ2G63FFR-xxI, H5TQ2G83FFR-
xxL, H5TQ2G63FFR-xxL, H5TQ2G83FFR-xxJ, H5TQ2G63FFR-xxJ are a 2, 147, 483, 648-bit CMOS Double
Data Rate III (DDR3) Synchronous DRAM, ideally suited for the main memory applications which requires
large memory density and high bandwidth. SK Hynix 2Gb DDR3 SDRAMs offer fully synchronous operations
referenced to both rising and falling edges of the clock. While all addresses and control inputs are latched on
the rising edges of the CK (falling edges of the CK), Data, Data strobes and Write data masks inputs are
sampled on both rising and falling edges of it. The data paths are internally pipelined and 8-bit prefetched to
achieve very high bandwidth.
30
Features
VDD=VDDQ=1.5V +/- 0.075V
Fully differential clock inputs (CK, CK) operation
Differential Data Strobe (DQS, DQS)
On chip DLL align DQ, DQS and DQS transition with CK transition
DM masks write data-in at the both rising and falling edges of the data strobe
All addresses and control inputs except data, data strobes and data masks latched on the rising edges of
the clock
Programmable CAS latency 5, 6, 7, 8, 9, 10, 11, 12, 13 and 14 supported
Programmable additive latency 0, CL-1, and CL-2 supported
Programmable CAS Write latency (CWL) = 5, 6, 7, 8
Programmable burst length 4/8 with both nibble sequential and interleave mode
BL switch on the fly
8banks
Average Refresh Cycle (Tcase 0
o 7.8 μs at 0
o 3.9 μs at 85
o
C ~ 85oC
o
C ~ 95oC
o Commercial Temperature (0
o Industrial Temperature (-40
o
C ~ 95oC)
o
C ~ 95oC)
o
C ~ 95oC)
JEDEC standard 78ball FBGA(x8), 96ball FBGA(x16)
Driver strength selected by EMRS
Dynamic On Die Termination supported
Asynchronous RESET pin supported
ZQ calibration supported
TDQS (Termination Data Strobe) supported (x8 only)
Write Levelization supported
8 bit pre-fetch
31
Table: Recommended operating conditions
8. 2GBIT (256M X 8 BIT) NAND FLASH MEMORY
A. MT29F2G08ABAEAWP (U80)
Description
Micron NAND Flash devices include an asynchronous data interface for high-performance I/O operations.
These devices use a highly multiplexed 8-bit bus (I/Ox) to transfer commands, address, and data. There are five
control signals used to implement the asynchronous data interface: CE#, CLE, ALE, WE#, and RE#. Additional
signals control hardware write protection and monitor device status (R/B#). This hardware interface creates a
low pin-count device with a standard pinout that remains the same from one density to another, enabling future
upgrades to higher densities with no board redesign. A target is the unit of memory accessed by a chip enable
signal. A target contains one or more NAND Flash die. A NAND Flash die is the minimum unit that can
independently execute commands and report status. A NAND Flash die, in the ONFI specification, is referred
to as a logical unit (LUN). There is at least one NAND Flash die per chip enable signal. For further details, see
Device and Array Organization. This device has an internal 4-bit ECC that can be enabled using the GET/SET
features or by factory (always enabled). See Internal ECC and Spare Area Mapping for ECC for more
o Program page cache mode
o Read page cache mode
o One-time programmable (OTP) mode
32
o Two-plane commands
o Interleaved die (LUN) operations
o Read unique ID
o Block lock (1.8V only)
o Internal data move
Operation status byte provides software method for detecting
o Operation completion
o Pass/fail condition
o Write-protect status
Ready/Busy# (R/B#) signal provides a hardware method of detecting operation completion
WP# signal: Write protect entire device
First block (block address 00h) is valid when shipped from factory with ECC. For minimum required
ECC, see Error Management.
Block 0 requires 1-bit ECC if PROGRAM/ERASE cycles are less than 1000
RESET (FFh) required as first command after poweron
Alternate method of device initialization (Nand_Init) after power up (contact factory)
Internal data move operations supported within the plane from which data is read
Quality and reliability
o Data retention: 10 years
Operating voltage range
o VCC: 2.7–3.6V
o VCC: 1.7–1.95V
Operating temperature:
o Commercial: 0°C to +70°C
o Industrial (IT): –40ºC to +85ºC
Package
o 48-pin TSOP type 1, CPL63-ball VFBGA
33
Table: Recommended operating conditions
9. 16M-BIT [16M X 1] CMOS SERIAL FLASH EEPROM
A. KH25L1606EM2-12G Macronix SPI Flash (U81)
Description
The device features a serial peripheral interface and software protocol allowing operation on a simple 3-wire
bus. The three bus signals are a clock input (SCLK), a serial data input (SI), and a serial data output (SO).
Serial access to the device is enabled by CS# input. When it is in Dual Output read mode, the SI and SO pins
become SIO0 and SIO1 pins for data output. The device provides sequential read operation on whole chip.
After program/erase command is issued, auto program/erase algorithms which program/erase and verify the
specified page or sector/block locations will be executed. Program command is executed on byte basis, or page
basis, or word basis for erase command is executes on sector, or block, or whole chip basis. To provide user
with ease of interface, a status register is included to indicate the status of the chip. The status read command
can be issued to detect completion status of a program or erase operation via WIP bit. Advanced security
features enhance the protection and security functions; please see security features section for more details.
When the device is not in operation and CS# is high, it is put in standby mode. The device utilizes Macronix's
proprietary memory cell, which reliably stores memory contents even after typical 100,000 programs and erase
cycles.
Features
Single Power Supply Operation
o 2.7 to 3.6 volt for read, erase, and program operations
Serial Peripheral Interface compatible -- Mode 0 and Mode 3
16,777,216 x 1 bit structure or 8,388,608 x 2 bits (Dual Output mode) structure
512 Equal Sectors with 4K byte each
o Any Sector can be erased individually
32 Equal Blocks with 64K byte each
o Any Block can be erased individually
Program Capability
o Byte base
o Page base (256 bytes)
Latch-up protected to 100mA from -1V to Vcc +1V
34
10. USB INTERFACE
Figure: Pin configuration
Table: Pin description
Mstar IC has two input port for USB, therefore internal Bluetooth , internal Wi-Fi interface and USB2 are
combined with HUB. This property is optional. If Bluetooth and Wi-Fi interfaces are not alined, two USB are
connected directly to main IC.
35
Figure: USB Block Diagram
A. CY7C65642 (U73)
Description
HX2VL is Cypress’s next generation family of high- performance, very low-power USB 2.0 hub controllers.
HX2VL has integrated upstream and downstream transceivers; a USB serial interface engine (SIE); USB hub
control and repeater logic; and transaction translator (TT) logic. Cypress has also integrated external
components such as voltage regulator and pull-up/pull-down resistors, reducing the overall BOM required to
implement a USB hub system. The CY7C65642 is a part of the HX2VL portfolio with four downstream ports
and an independent TT dedicated for each downstream port. This device option is for low-power but high-
performance applications that require up to four downstream ports. The CY7C65642 is available in 48-pin
TQFP and 28-pin QFN package options.
Features
High-performance, low-power USB 2.0 hub, optimized for low-cost designs with minimum bill-of-
USB 2.0 hub controller
material (BOM).
o Compliant with USB2.0 specification
o Up to four downstream ports support
o Downstream ports are backward compatible with FS, LS
o Multiple translator (TT), one per downstream port for maximum performance.
Very low-power consumption
o Supports bus-powered and self-powered modes
o Auto switching between bus-powered and self-powered
o Single MCU with 2K ROM and 64 byte RAM
o Lowest power consumption.
Highly integrated solution for reduced BOM cost
o Internal regulator – single power supply 5 V required.
o Provision of connecting 3.3 V with external regulator.
o Integrated upstream pull-up resistor
o Integrated pull-down resistors for all downstream ports
o Integrated upstream/downstream termination resistors
o Integrated port status indicator control
o 12-MHz +/-500 ppm external crystal with drive level 600uW (integrated PLL) clock input with
optional 27/48-MHz oscillator clock input.
o Internal power failure detection for ESD recovery
Downstream port management
o Support individual and ganged mode power management
36
o Overcurrent detection
o Two status indicators per downstream port
o Slew rate control for EMI management
Maximum configurability
o VID and PID are configurable through external EEPROM
o Number of ports, removable/non-removable ports are configurable through EEPROM and I/O pin
configuration
o I/O pins can configure gang/individual mode power switching, reference clock source and polarity of
power switch enable pin
o Configuration options also available through mask ROM
o Available in space saving 48-pin TQFP (7 × 7 mm) and 28-pin QFN (5 × 5 mm) packages
o Supports 0
o
C to +70oC temperature range
37
Figure: Pin configuration
11. CI INTERFACE
17MB97 Digital CI ve Smart Card Interface Block diagram:
Figure: CI interface
12. SOFTWARE UPDATE
A. Main SW update
In MB97 project, please follow software update procedure:
1. mb97_en.bin, RomBoot.bin, PM51.bin and usb_auto_update_D7L.txt documents should be copied
directly inside of a flash memory (not in a folder).
2. Insert flash memory to the TV when TV is powered off.
3. While pushing the OK button in remote control, power on and wait. TV will power-up itself.
4. If First Time Installation screen comes, it means software update procedure is successful.
38
13. TROUBLESHOOTING
A. No Backlight Problem
Problem: If TV is working, led is normal and there is no picture and backlight on the panel.
BACKLIGHT_ON/OFF pin should be high when the backlight is ON. Collector pin of Q27 must be low when
the backlight is OFF. If it is a problem, please check Q27 and the panel cables. Also it can be tested in TP87 in
main board.
Dimming pin should be high or square wave in open position. If it is low, please check S248 for Mstar side and
panel or power cables, connectors.
Backlight power supply should be in panel specs. Please check Q43, shown below; also it can be checked
TP65.
39
STBY_ON/OFF should be low for TV on condition, please check Q36’s collector.
B. CI Module Problem
Problem: CI is not working when CI module inserted.
Possible causes: Supply, suply control pin, detects pins, mechanical positions of pins.
CI supply should be 5V when CI module inserted. If it is not 5V please check CI_PWR_CTRL, this pin
should be low.
40
Please check mechanical position of CI module. Is it inserted properly or not?
Detect ports should be low. If it is not low please check CI connector pins, CI module pins.
C. Staying in Stand-by Mode
Problem: Staying in stand-by mode, no other operation.
This problem indicates a short on Vcc voltages. Protect pin should be logic high while normal operation. When
there is a short circuit protect pin will be logic low. If you detect logic low on protect pin, unplug the TV set
and control voltage points with a multimeter to find the shorted voltage to ground.
41
D. IR Problem
Problem: LED or IR not working
Check LED card supply on MB97 chasis.
E. Keypad Touchpad Problems
Problem: Keypad or Touchpad is not working
42
Check keypad supply on MB97.
F. USB Problems
Problem: USB is not working or no USB Detection.
Check USB Supply, It should be nearly 5V. Also USB Enable should be logic high.
G. No Sound Problem
Problem: No audio at main TV speaker outputs.
Check supply voltages of 12V_VCC, VDD_AUDIO and 3V3_AMP with a voltage-meter. There may be a
problem in headphone connector or headphone detect circuit (when headphone is connected, speakers are
automatically muted). Measure voltage at HP_DETECT pin, it should be 3.3v.
43
H. Standby On/Off Problem
Problem: Device can not boot, TV hangs in standby mode.
There may be a problem about power supply. Check main supplies with a voltage-meter. Also there may be a
problem about SW. Try to update TV with latest SW. Additionally it is good to check SW printouts via
Teraterm. These printouts may give a clue about the problem. You can use Scart-1 for terraterm connection.
İ. No Signal Problem
Problem: No signal in DVB-T/T2/C mode.
44
Check tuner supply voltage; 3V3_TUNER and VDD_1V8. Check tuner options are correctly set in Service
menu. Check AGC voltage at IF_AGC pin of tuner.
Problem: No signal or Low signal in DVB-S/S2 mode.
Check signal cables and LNB voltage, if there is no problem, check RS6000 supply voltages;
3V3_SAT_VDDA1, 3V3_SAT_VDDA, 3V3_SAT_VDD and 1V3_SAT_VCC.
If the above measurements are OK, then measure the voltage from the PIN1 of U90.
If the PIN1 voltage is equal to 0V, please check i2c waveforms and software. If the PIN1 voltage is lower than
1V(e.g: 0.8Vor 0.3V), change the U90 with a new part.
45
46
14. SERVICE MENU SETTINGS
In order to reach service menu, first Press “MENU” buton, then write “4725” by uisng remote controller.
You can see the service menu main screen below. You can check SW releases by using this menu. In addition,
you can make changes on video, audio etc. by using video settings, audio settings titles.
51 boot from SPI: 4b' 1000 (default)
MIPS boot from ROM: 4b' 1011
R2733
NCNCNC
4k7
R2732
4k7
R2735R2736
4k7
R2734
4k7
10k
R2673
10k
3V3_STBY
12
12
E
4k7
R2737
4k7
3V3_STBYPM_LEDPWM_PM
F
VESTEL
SCH NAME :
DRAWN BY :
MAIN_GPIO
<YOUR NAME HERE>
PROJECT NAME :
17mb97-r2
05-01-2015_16:56
87654321
A3
T. SHT:
10
AX M
12345678
CN34
657498
27p
C1782
GND1
50V
NC
50V
1n
1n
50V
C1776
GND1
3 2
3V3_SAT_VDDA1
27p
C1783
C1777
C1786
1
3p3
50V
27MHz
3V3_SAT_VDD
1n
50V
C1774
C1773
12
50V
2p2F
S375
C1763
10V
100n
41
3
X7
2
3V3_SAT_VDDA1
1V3_SAT_VCC
1n
50V
C1775
100pF
C1761
10V
LNB_OUT
1n
50V
D83
PESD9N5VH
50V
100p
50V
C1781
0p5 C1785
2pF
C1780
100p
50V
C1772
10nF
D82
PESD9N5VH
100n
C1760
R2704
12
4k7
R2705
12
4k7
LNB_OUT
D84
C1753
PESD9N5VH
1n 50V
10V
100n
S2_RESET
C1770
10p
50V
20pF 20pF
1
2
3
4
5
6
7
8
9
10
11
12
C1769
10p
50V
10V100n
48
VDDA5
LNA_IP
LNA_IN
TEST0
CAP
VDDA1
XTAL_OUT
XTAL_IN
CLK_OUT
VDDA2
GNDD1
VCC1
RESETN
SDA
13
33R
R2701
I2CM_SDA
47
VDDA4
SCL
14
33R
R2702
I2CM_SCL
3V3_SAT_VDDA
46
45
TEST2
VDDA3
VCC2
GNDD2
15
16
100n 10V
C1759
1V3_SAT_VCC
3V3_VCC
1V3_SAT_VCC
C1755
100n 10V
44
43
42
VCC5
GNDD5
TEST3
U90
M88RS6000
M_DATA0
TEST1
VDDD
17
18
19
C1758
10V100n
3V3_SAT_VDD
F70
220R
12
41
40
IT_LOCK
ADDR_SEL1
M_DATA2
M_DATA1
20
21
321
R4R3R2
33R
54
TS1_D0
TS1_D1
S374
TS1_D2
C1793
100n
39
38
OLF
LNB_EN
DISEQC_IN
DISEQC
M_SYNC
M_VALID
M_DATA7
M_DATA6
M_DATA4
M_DATA3
22
23
R1
R2697
876
TS1_D3
VSEL
VCC4
GNDD4
M_ERR
M_CLK
GNDD3
VCC3
M_DATA5
33R
R2696
C1794
100n
10V10V
37
24
R4R3R2
54
TS1_D4
36
35
34
33
32
31
30
29
28
27
26
25
321
TS1_D5
DISEQC_OUT
R2698
33R
R2699
33R
R2700
33R
C1757
R1
876
TS1_D6
TS1_D7
3V3_SAT_VDDA1
100n
NC
100n
10V
C1756
10V
1V3_SAT_VCC
C1768
10p
TS1_CLK
TS1_SYNC
TS1_VLD
1V3_SAT_VCC
A
B
C
D
L33
R2600
I2CM_SDA
I2CM_SCL
4k7
4k7
R2535
12
47p
50V
D72
AZ5425-01F
50V
1n
C1648
12n
1M
10V
100n
D_IF_AGC
C264
1u
C263
1u
C1725
3V3_TUNER
10u
16V
21
C1696
22p
50V
F61
1k
F60
1k
L32
12n
D78
C1434
43
C1695
22p
50V
ESD0P8RFL
21
C89
100n
R22
100R
MXL661_RST
C1703C1702
47p
50V
16V
C1704
47p
50V
L10
390n
C1719
82p
50V
L9
220n
220nH
C1720
180p
50V
C1685
100p
50V
NC
R2572
100R
R2573
100R
CLOSE TO DEMOD
390nH
0.7pF
IF_AGC
VDD_1V8
R2451
33R
C1699
27p
50V
2
10nF
C1718
1u
6V3
R14
360R
X3
16Mhz
C1714
2n2
50V
S326
4
F45
1
41
27MHz
3
100n
16V
C269
MST_IF_N
MST_IF_P
GS1
23
I2CM_SCL
I2CM_SDA
19
20
21
22
23
24
NC
R2383
10k
1k
180R
R2588
C1713
12p
XTAL_N
XTAL_P
GND_XTAL
VDD_1P8_2
RESET_N
AS
C1672
100n
16V
S328
S327
R784
22R
22R
R785
NC
560nH
18
17
SDA
CLK_OUT
MXL601
LNA_INP
VDD_3P3_0
1
2
RF_IN_N
3V3_TUNER
C1712
16
SCL
U74
LNA_INN
3
RF_IN_P
L35
3n9
12p
15
VDD_IO
VDD_1P8_0
4
C1673
100n
16V
1n
C1650
1n
C1649
100n
16V
3V3_TUNER
14
GND_DIG
AGC_2
5
F62
1k
50V
50V
C1670
C1715
2n2
50V
13
VDD_1P2
VDD_1P8_1
VDD_3P3_1
IF_OUTN_1
IF_OUTP_1
IF_OUTN_2
IF_OUTP_2
AGC_1
6
D_IF_AGC
RF_IN_P
RF_IN_N
1.8nF
VDD_1V8
12
11
10
9
8
7
VDD_1V8
C1663
1u
10u
C1612
1u
C1664
NC
C1665
1u
100n
16V
3V3_TUNER
DIGITAL_IF_N
DIGITAL_IF_P
6V3
6V3
6V3
6V3
C1671
GND1
JK12
1
8
6
2 4
NC
L34
270n
10V
C1435
100n
9
7
53
A
B
3V3_TUNER
R2536
12
I2CM_SDA
C
DIGITAL_IF_N
DIGITAL_IF_P
I2CM_SCL
IF FILTERS
3V3_VCC
S329
C1705
47p
50V
D
SYS_SCL
10k
EXTM
LX
16V
11
VCTRL
U71
VIN
2
SYS_SDA
100R
R2575
9
10
SDA
VCC
3
4
C1569
1u
16V
100R
R2574
FAULT
EN/ADDR
SCL/VADJ
ISEL
TCAP
AGND
8
7
6
5
130k
C1437
100n
22nF
R2236
100k
10V
R2538
100nF
100n
D60
C1450
10u
16V
NC
C1436
1N5819
F42
1k
10V
C1438
100n
10V
50V
220n
C1641
13
14
15
16
VLNB
VCP
BOOST
PGND
C1451
10u
16V
R2386
12
TPS65233
1
C1564
100n
3V3_VCC4k7
DISEQC_OUT
F44
E
LNB_OUT
LNB_OUT
C1638
10u
25V
1k
F43
1k
12V_VCC
C1636
10u
25V
C22V
C1635
10u
25V
S347
D73
NC
C1634
10u
25V
S348
D64
1N5819
C1632
10u
25V
C1633
10u
25V
L31
10u
1N5819
25V
2u2
C1640
D63
1N5819
NC
D62
F
12V_VCC
3V3_VCC
3V3_VCC
VESTEL
SCH NAME :
DRAWN BY :
F71
220R
S376
C1795
2u2
6V3
PROJECT NAME :
TUNER_SAT_LNB
<YOUR NAME HERE>
C1765
100n
C1764
100n
10V
3V3_SAT_VDDA
10V
3V3_SAT_VDD
17mb97-r2
T. SHT:
31-12-2014_10:42
87654321
E
F
A3
10
AX M
A
B
C
D
E
F
NF_RBZ
3V3_NAND
MCP_TS1_D[4]
MCP_TS1_D[3]
MCP_TS1_D[2]
MCP_TS1_D[0]
MCP_TS1_D[1]
MCP_TS1_SYNC
PCM_A_12
PCM_WAIT_N
PCM_REG_N
PCM_RST
TS0_VALID
TS0_D_0
PCM_D[0]
TS0_SYNC
PCM_D[1]
TS0_D_2
PCM_A13
PCM_A14
PCM_WE
PCM_IRQA
12345678
TP2
SPI-SDI
F1
60R
33R
R2394
33R
R1
R2
R3
R4
R2390
8
7
6
1N5819
C1415
100n
3V3_SPI
SPI-SDI2
R2393
33R
8
R1
7
R2
6
R3
54
R4
R2392
8
7
6
54
50V
10p
1
2
3
33R
R1
R2
R3
R4
D58
C1797
10V
100n
10V
SPI-SCK
R2486
4k7
SPI-SCK2
C1351
10u
10V
1
2
3
33R
1
R1
2
R2
3
R3
R4
MCP_TS1_CLK
C1591
1
PCM_CE
2
PCM_A10
3
PCM_IORD
45
PCM_OE
3V3_STBY
C1798
100n
10V
3V3_STBY
TP3
1
C1414
2
100n
1
10V
PCM-D[4]
TS0_D4
PCM-D[5]
TS0_D5
PCM-D[6]
TS0_D6
PCM-D[7]
TS0_D7
PCM_A11
PCM_IOWR
PCM_A9
PCM_A8
2
1
C1413
100n
10V
CI_PWR
3V3_VCC
R2491
ETH_LED0
ETH_LED1
R2493
Place these capacitors
close to transformer
speed nets, except for the
chassis ground.
Also keep traces short and
route as matched length
differential pairs. Do not place
any parts or traces under the
transformer.