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SM009
«MODEL NAMES»
42PD3200A
42PD6600
42PD6600A
SERVICE MANUAL
MANUEL D'ENTRETIEN
WARTUNGSHANDBUCH
CAUTION:
Before servicing this chassis, it is important that the service technician read the “Safety
Precautions” and “Product Safety Notices” in this service manual.
ATTENTION:
Avant d’effectuer l’entretien du châssis, le technicien doit lire les «Précautions de sécurité»
et les «Notices de sécurité du produit» présentés dans le présent manuel.
VORSICHT:
Vor Öffnen des Gehäuses hat der Service-Ingenieur die „Sicherheitshinweise“ und „Hinweise
zur Produktsicherheit“ in diesem Wartungshandbuch zu lesen.
42PD6600L
42PD6A10
Data contained within this Service
manual is subject to alteration for
improvement.
Les données fournies dans le présent
manuel d’entretien peuvent faire l’objet
de modifications en vue de perfectionner
le produit.
Die in diesem Wartungshandbuch
enthaltenen Spezifikationen können sich
zwecks Verbesserungen ändern.
SPECIFICATIONS AND PARTS ARE SUBJECT TO CHANGE FOR IMPROVEMENT
Plasma TV
August 2005
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TABLE OF CONTENTS
INTRODUCTION ...................................................................................................................................... 1
1.
2. TUNER......................................................................................................................................................1
3. IF PART (TDA9886) .................................................................................................................................1
4. MULTI STANDARD SOUND PROCESSOR............................................................................................ 2
5. VIDEO SWITCH TEA6415 ....................................................................................................................... 2
6. AUDIO AMPLIFIER STAGE WITH TPA3004D2 ...................................................................................... 2
7. POWER SUPPLY (SMPS) ....................................................................................................................... 3
8. MICROCONTROLLER .............................................................................................................................5
9. EEPROM 24LC32..................................................................................................................................... 6
10. CLASS AB STEREO HEADPHONE DRIVER TDA1308 .........................................................................6
11. SAW FILTERS..........................................................................................................................................6
12. IC DESCRIPTIONS ..................................................................................................................................7
12.1. TEA6415C ......................................................................................................................................... 8
12.1.1. General Description ................................................................................................................. 8
12.1.2. Features ....................................................................................................................................8
12.1.3. Pinning ...................................................................................................................................... 8
12.2. 24LC02 .............................................................................................................................................. 9
12.2.1. Description................................................................................................................................9
12.2.2. Features ....................................................................................................................................9
12.2.3. Pinning ...................................................................................................................................... 9
12.3. 24LC32 ............................................................................................................................................ 10
12.3.1. General Description ............................................................................................................... 10
12.3.2. Features ..................................................................................................................................10
12.3.3. Pinning .................................................................................................................................... 10
12.4. 74LVC14A ....................................................................................................................................... 11
12.4.1. Description.............................................................................................................................. 11
12.4.2. Features ..................................................................................................................................11
12.4.3. Pinning .................................................................................................................................... 11
12.5. TEA6420.......................................................................................................................................... 12
12.5.1. Features ..................................................................................................................................12
12.5.2. Description.............................................................................................................................. 12
12.5.3. Pin Connections..................................................................................................................... 12
12.6. CS4334............................................................................................................................................ 12
12.6.1. Features ..................................................................................................................................12
12.6.2. General Description ............................................................................................................... 12
12.6.3. Pin Descriptions..................................................................................................................... 13
12.7. DS90C385 ....................................................................................................................................... 13
12.7.1. General Description ............................................................................................................... 13
12.7.2. Features ..................................................................................................................................13
12.7.3. Pin Description....................................................................................................................... 14
12.8. GAL16LV8 ....................................................................................................................................... 14
12.8.1. Description.............................................................................................................................. 14
12.8.2. Features ..................................................................................................................................15
12.8.3. Pin connections......................................................................................................................15
12.9. K6R4008V1D................................................................................................................................... 15
12.9.1. Description.............................................................................................................................. 15
12.9.2. Features ..................................................................................................................................16
12.9.3. Pin Description....................................................................................................................... 16
12.10. KA278R33 ....................................................................................................................................... 17
12.10.1. Features ..................................................................................................................................17
12.10.2. Description.............................................................................................................................. 17
12.11. LM1086............................................................................................................................................ 17
12.11.1. Description.............................................................................................................................. 17
12.11.2. Features ..................................................................................................................................17
12.11.3. Applications............................................................................................................................ 17
12.11.4. Connection Diagrams ............................................................................................................ 17
12.12. LM1117............................................................................................................................................ 18
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12.12.1. General Description ............................................................................................................... 18
12.12.2. Features ..................................................................................................................................18
12.12.3. Applications............................................................................................................................ 18
12.12.4. Connection Diagrams ............................................................................................................ 18
12.13. LM317.............................................................................................................................................. 18
12.13.1. General Description ............................................................................................................... 18
12.13.2. Features ..................................................................................................................................18
12.13.3. Pin Description....................................................................................................................... 19
12.14. LM809.............................................................................................................................................. 19
12.14.1. General Description ............................................................................................................... 19
12.14.2. Features ..................................................................................................................................19
12.14.3. Pinning .................................................................................................................................... 19
12.15. MSP34X0G (MSP3410G) ...............................................................................................................20
12.15.1. Introduction ............................................................................................................................20
12.15.2. Features ..................................................................................................................................20
12.15.3. Pin connections......................................................................................................................21
12.16. M29W040B......................................................................................................................................22
12.16.1. Description.............................................................................................................................. 22
12.16.2. Features ..................................................................................................................................23
12.16.3. Pin Descriptions..................................................................................................................... 23
12.17. MC33202 ......................................................................................................................................... 23
12.17.1. General Description ............................................................................................................... 23
12.17.2. Features ..................................................................................................................................23
12.17.3. Pin Connections..................................................................................................................... 24
12.18. PCF8574 .........................................................................................................................................24
12.18.1. General Description ............................................................................................................... 24
12.18.2. Features ..................................................................................................................................24
12.18.3. Pinning .................................................................................................................................... 24
12.19. TSOP1836.......................................................................................................................................25
12.19.1. Description.............................................................................................................................. 25
12.19.2. Features ..................................................................................................................................25
12.20. PI5V330...........................................................................................................................................25
12.20.1. General Description ............................................................................................................... 25
12.21. SDA55XX (SDA5550)......................................................................................................................26
12.21.1. General description ...............................................................................................................26
12.22. Sil 9993............................................................................................................................................ 26
12.22.1. General Description ............................................................................................................... 26
12.22.2. Features ..................................................................................................................................26
12.23. SN74CB3Q3305..............................................................................................................................27
12.23.1. General Description ............................................................................................................... 27
12.23.2. Features ..................................................................................................................................27
12.23.3. Pin Connections..................................................................................................................... 27
12.24. ST24LC21 .......................................................................................................................................28
12.24.1. Description.............................................................................................................................. 28
12.24.2. Features ..................................................................................................................................28
12.24.3. Pin connections......................................................................................................................28
12.25. LM2576............................................................................................................................................ 28
12.25.1. General Description ............................................................................................................... 28
12.25.2. Features ..................................................................................................................................29
12.25.3. Pin description .......................................................................................................................29
12.26. MC34063 ......................................................................................................................................... 29
12.26.1. Description.............................................................................................................................. 29
12.26.2. Features ..................................................................................................................................29
12.26.3. Pin connections......................................................................................................................30
12.27. TDA1308 .........................................................................................................................................30
12.27.1. General Description ............................................................................................................... 30
12.27.2. Features ..................................................................................................................................30
12.27.3. Pinning .................................................................................................................................... 30
12.28. TDA9886 .........................................................................................................................................30
12.28.1. General Description ............................................................................................................... 30
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12.28.2. Features ..................................................................................................................................30
12.28.3. Pinning .................................................................................................................................... 31
12.29. TPA3004D2 ..................................................................................................................................... 32
12.29.1. General Description ............................................................................................................... 32
12.29.2. Features ..................................................................................................................................32
12.29.3. Pinning .................................................................................................................................... 32
12.30. μPA672T.......................................................................................................................................... 34
12.30.1. General Description ............................................................................................................... 34
12.30.2. Features ..................................................................................................................................34
12.30.3. Pin Connection....................................................................................................................... 34
12.31. VPC3230D....................................................................................................................................... 34
12.31.1. General Description ............................................................................................................... 34
12.31.2. Pin Connections and Short Descriptions ............................................................................ 34
13. SERVICE MENU SETTINGS ................................................................................................................. 37
13.1. Service Menu Items......................................................................................................................... 37
13.1.1. Picture Adjust......................................................................................................................... 37
13.1.2. SOUND1 ..................................................................................................................................37
13.1.3. SOUND 2 .................................................................................................................................37
13.1.4. Options....................................................................................................................................38
13.1.5. TV Norm ..................................................................................................................................38
13.1.6. Features ..................................................................................................................................38
13.1.7. Teletext.................................................................................................................................... 38
13.1.8.Source.....................................................................................................................................38
14.BOARD LOCATIONS...........................................................................................................................39
15.BLOCK DIAGRAM..................................................................................................................................43
16.CIRCUIT DIAGRAMS.............................................................................................................................44
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1. INTRODUCTION
42” Plasma TV is a progressive TV control system with built-in de-interlacer and scaler. It uses a
1024*1024 panel with 16:9 aspect ratio.The TV is capable of operation in PAL, SECAM, NTSC
(playback) colour standards and multiple transmission standards as B/G, D/K, I/I’, and L/L’ including
German and NICAM stereo. Sound system output is supplying 2x10W (10%THD) for stereo 8ȍ
speakers. The chassis is equipped with many inputs and outputs allowing it to be used as a center of a
media system.
It supports following peripherals:
3 SCART sockets
1 AV input (CVBS + Stereo Audio)
1 SVHS input
1 Stereo Headphone input
1 Component input (YPbPr + Stereo Audio)
1 D-Sub 15 PC input
1 HDMI input
1 Stereo audio input for PC
1 Stereo audio output
1 Subwoofer output
2. TUNER
The tuners used in the design are combined VHF, UHF tuners suitable for CCIR systems B/G, H, L, L’,
I/I’, and D/K. The tuning is available through the digitally controlled I
info on one of the Tuners in use.
2
C bus (PLL). Below you will find
General description of UV1316:
The UV1316 tuner belongs to the UV 1300 family of tuners, which are designed to meet a wide range of
applications. It is a combined VHF, UHF tuner suitable for CCIR systems B/G, H, L, L’, I and I’. The low
IF output impedance has been designed for direct drive of a wide variety of SAW filters with sufficient
suppression of triple transient.
Features of UV1316:
1. Member of the UV1300 family small sized UHF/VHF tuners
2. Systems CCIR: B/G, H, L, L’, I and I’; OIRT: D/K
3. Digitally controlled (PLL) tuning via I
2
C-bus
4. Off-air channels, S-cable channels and Hyperband
5. World standardised mechanical dimensions and world standard pinning
6. Compact size
7. Complies to “CENELEC EN55020” and “EN55013”
Pinning:
1. Gain control voltage (AGC) : 4.0V, Max: 4.5V
2. Tuning voltage
3. I²C-bus address select : Max: 5.5V
4. I²C-bus serial clock : Min:-0.3V, Max: 5.5V
5. I²C-bus serial data : Min:-0.3V, Max: 5.5V
6. Not connected
7. PLL supply voltage : 5.0V, Min: 4.75V, Max: 5.5V
8. ADC input
9. Tuner supply voltage : 33V, Min: 30V, Max: 35V
10. Symmetrical IF output 1
11. Symmetrical IF output 2
3. IF PART (TDA9886)
The TDA9886 is an alignment-free multistandard (PAL, SECAM and NTSC) vision and sound IF signal PLL.
The following figure shows the simplified block diagram of the integrated circuit.
The integrated circuit comprises the following functional blocks:
VIF amplifier, Tuner and VIF-AGC, VIF-AGC detector, Frequency Phase-Locked Loop (FPLL) detector, VCO
and divider, Digital acquisition help and AFC, Video demodulator and amplifier, Sound carrier trap, SIF
amplifier, SIF-AGC detector, Single reference QSS mixer, AM demodulator, FM demodulator and acquisition
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help, Audio amplifier and mute time constant, I²C-bus transceivers and MAD (module address), Internal
voltage stabilizer.
4. MULTI STANDARD SOUND PROCESSOR
The MSP34x0G family of single-chip Multistandard Sound Processors covers the sound processing of
all analogue TV-Standards worldwide, as well as the NICAM digital sound standards. The full TV sound
processing, starting with analogue sound IF signal-in, down to processed analogue AF-out, is
performed on a single chip.
These TV sound processing ICs include versions for processing the multichannel television sound
(MTS) signal conforming to the standard recommended by the Broadcast Television Systems
Committee (BTSC). The DBX noise reduction, or alternatively, Micronas Noise Reduction (MNR) is
performed alignment free. Other processed standards are the Japanese FM-FM multiplex standard
(EIA-J) and the FM Stereo Radio standard.
Current ICs have to perform adjustment procedures in order to achieve good stereo separation for
BTSC and EIA-J. The MSP 34x1G has optimum stereo performance without any adjustments.
5. VIDEO SWITCH TEA6415
In case of three or more external sources are used, the video switch IC TEA6415 is used. The main
function of this device is to switch 8 video-input sources on the 6 outputs.
Each output can be switched on only one of each input. On each input an alignment of the lowest level
of the signal is made (bottom of sync. top for CVBS or black level for RGB signals).
Each nominal gain between any input and output is 6.5dB.For D2MAC or Chroma signal the alignment
is switched off by forcing, with an external resistor bridge, 5VDC on the input. Each input can be used
as a normal input or as a MAC or Chroma input (with external Resistor Bridge). All the switching
possibilities are changed through the BUS. Driving 75ohm load needs an external resistor. It is possible
to have the same input connected to several outputs.
6. AUDIO AMPLIFIER STAGE WITH TPA3004D2
The TPA3004D2 is a 12-W (per channel) efficient, Class-D audio amplifier for driving bridged-tied
stereo speakers. The TPA3004D2 can drive stereo speakers as low as 4 . The high efficiency of the
TPA3004D2 eliminates the need for external heatsinks when playing music.
Stereo speaker volume is controlled with a dc voltage applied to the volume control terminal offering a
range of gain from –40 dB to 36 dB. Line outputs, for driving external headphone amplifier inputs, are
also dc voltage controlled with a range of gain from –56 dB to 20 dB.
An integrated 5-V regulated supply is provided for powering an external headphone amplifier.
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7. POWER SUPPLY (SMPS)
The required DC voltages; at various parts of the chassis; are provided by an SMPS (switch mode
power supply). Block diagram of SMPS as follow
Connector layout as follows
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SMPS can work between 120V – 240 AC and generate following voltages
Vs 80V 3A (For panel)
Va 60V 0.7A (For panel)
15V audio 15V 2.1 A (Audio)
12V 12V 1A (For 60V regulation circuitry)
Vcc on 5.1V 6.2 A ( For panel and main board)
5V stby 5V 1.5A (For panel and main board)
POWER ON/OFF SEQUENCE
START UP SEQUENCE
- Set CPUGO “High”. VCC becomes ready.
- Set PDPGO “High” This product outputs VCEGO “High” after the confirmation of PDPGO
“High” and VCC “Low”.
- Input Vcc after the confirmation of VCEGO “High”. When Vcc becomes higher than a set
voltage, and Va, Vs are confirmed to lower than set voltages.
- Input Vs and Va after confirmation of VSAGO “High”. This product wait 5 sec for Va, Vs more
than set values. If Va and Vs don’t rise up to more than set voltages within 5 sec., this product
once shuts down and retries the start up sequence from the beginning.
*Vcego mentioned as Stanby and Vsage mentioned as PDP go on main board.
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SHUT DOWN SEQUENCE
Shut Down sequence for this product as follows.
-Set PDPGO or CPUGO “low”. This product stops to display and outputs VSAGO “low”.
- Cut Vs and Va after the confirmation of VSAGO “low”. This product outputs VCEGO “low” after the
confirmation that Vs and Va are lower than set Values.
- Cut Vcc after the confirmation of VCEGO “low”.
On daughter board 3.3 V (normal) is generating and transferring the voltages to main board. Main
board gets 5V stby, 5V, 3.3V and 15V.
8. MICROCONTROLLER
The Micronas SDA 55xx TV microcontroller is dedicated to 8 bit applications for TV control and provides
dedicated graphic features designed for modern low class to mid range TV sets. The SDA 55xx provides also
an integrated general purposefully 8051-compatible microcontroller with specific hardware features
especially suitable in TV sets. The microcontroller core has been enhanced to provide powerful features such
as memory banking, data pointers and additional interrupts, etc. The internal XRAM consists of up to 16
kBytes. The microcontroller provides an internal ROM of up to 128 kBytes. ROMless versions can access up
to 1 MByte of external RAM and ROM. The 8-bit microcontroller runs at 33.33 MHz internal clock. SDA 55xx
is realized in 0.25 micron technology with 2.5 V supply voltage for the core and 3.3 V for the I/O port pins to
make them TTL compatible. Based on the SDA 55xx microcontroller the MINTS software package was
developed and provides dedicated device drivers for many Micronas video & audio products and includes a
full blown TV control SW for the PEPER application chassis. The SDA 55xx is also supported with powerful
design tools like emulators from Hitex, Kleinhenz, iSystems, the Keil C51 Compiler and TEDIpro OSD
development SW by Tara Systems.
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9. EEPROM 24LC32
The Microchip Technology Inc. 24AA32A/24LC32A(24XX32A*) is a 32 Kbit Electrically Erasable PROM. The
device is organized as four blocks of 8K x 8-bitmemory with a 2-wire serial interface. Low-voltage design
permits operation down to 1.8V, with standby and active currents of only 1μA and 1mA, respectively. It has
been developed for advanced, low-power applications such as personal communications or data acquisition.
The 24XX32A also has a page write capability for up to 32 bytes of data. Functional address lines allow up to
eight devices on the same bus, for up to 256Kbits address space.
10. CLASS AB STEREO HEADPHONE DRIVER TDA1308
The TDA1308 is an integrated class AB stereo headphone driver contained in a DIP8 plastic package.
The device is fabricated in a 1 mm CMOS process and has been primarily developed for portable digital
audio applications.
11. SAW FILTERS
K9656M:
Standard:
• B/G
• D/K
• I
• L/L’
Features
• TV IF audio filter with two channels
• Channel 1 (L’) with one pass band for sound carriers at 40.40 MHz (L’) and 39.75 MHz (L’- NICAM)
• Channel 2 (B/G, D/K, L, I) with one pass band for sound carriers between 32.35 MHz and 33.40 MHz
Terminals
• Tinned CuFe alloy
Pin configuration
1 Input
2 Switching input
3 Chip carrier - ground
4 Output
5 Output
K3958M:
Standard:
• B/G
• D/K
• I
• L/L’
Features
• TV IF video filter with Nyquist slopes at 33.90 MHz and 38.90 MHz
• Constant group delay
Terminals
Tinned CuFe alloy
Pin configuration
1 Input
2 Input - ground
3 Chip carrier - ground
4 Output
5 Output
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12. IC DESCRIPTIONS
TEA6415C
24LC02
24LC32
74LVC14A
TEA6420D
CS4334
DS90C385
GAL16LV8
K6R4008V1
KA278R33
LM1086
LM1117
LM317T
LM809
MSP3411G
M29W040B
MC33202
PCF8574
TSOP1836
PI5V330
SDA5550
SII9993
SN74CB3Q3305
ST24LC21
LM2576
MC34063
TDA1308
TDA9886T
TPA3004D2
μPA672T
VPC3230D
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12.1. TEA6415C
12.1.1. General Description
The main function of the IC is to switch 8 video input sources on 6 outputs. Each output can be
switched on only one of each input. On each input an alignment of the lowest level of the signal is made
(bottom of synch. top for CVBS or black level for RGB signals). Each nominal gain between any input
and output is 6.5dB. For D2MAC or Chroma signal the alignment is switched off by forcing, with an
external resistor bridge, 5 V
DC on the input. Each input can be used as a normal input or as a MAC or
Chroma input (with external resistor bridge). All the switching possibilities are changed through the
BUS. Driving 75 load needs an external transistor. It is possible to have the same input connected to
several outputs. The starting configuration upon power on (power supply: 0 to 10V) is undetermined. In
this case, 6 words of 16 bits are necessary to determine one configuration. In other case, 1 word of 16
bits is necessary to determine one configuration.
12.1.2. Features
• 20MHz Bandwidth
• Cascadable with another TEA6415C (Internal address can be changed by pin 7 voltage)
• 8 Inputs (CVBS, RGB, MAC, CHROMA,...)
• 6 Outputs
• Possibility of MAC or chroma signal for each input by switching-off the clamp with an external resistor
bridge
• Bus controlled
• 6.5dB gain between any input and output
• 55dB crosstalk at 5mHz
• Fully ESD protected
12.1.3. Pinning
1. Input : Max : 2Vpp, Input Current: 1mA, Max : 3mA
2. Data : Low level : -0.3V Max: 1.5V,
High level : 3.0V Max : Vcc+0.5V
3. Input : Max : 2Vpp, Input Current: 1mA, Max : 3mA
4. Clock : Low level : -0.3V Max: 1.5V,
High level : 3.0V Max : Vcc+0.5V
5. Input : Max : 2Vpp, Input Current: 1mA, Max : 3mA
6. Input : Max : 2Vpp, Input Current: 1mA, Max : 3mA
7. Prog
8. Input : Max : 2Vpp, Input Current: 1mA, Max: 3mA
9. Vcc : 12V
10. Input : Max : 2Vpp, Input Current: 1mA, Max : 3mA
11. Input : Max : 2Vpp, Input Current: 1mA, Max : 3mA
12. Ground
13. Output : 5.5Vpp, Min : 4.5Vpp
14. Output : 5.5Vpp, Min : 4.5Vpp
15. Output : 5.5Vpp, Min : 4.5Vpp
16. Output : 5.5Vpp, Min : 4.5Vpp
17. Output : 5.5Vpp, Min : 4.5Vpp
18. Output : 5.5Vpp, Min : 4.5Vpp
19. Ground
20. Input : Max : 2Vpp, Input Current : 1mA, Max : 3mA
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12.2. 24LC02
12.2.1. Description
The Microchip Technology Inc. 24AA02/24LC02B (24XX02*) is a 2 Kbit Electrically Erasable PROM.
The device is organized as one block of 256 x 8-bit memory with a 2-wire serial interface. Low-voltage
design permits operation down to 1.8V, with standby and active currents of only 1μA and 1mA,
respectively. The 24XX02 also has a page write capability for up to 8 bytes of data.
12.2.2. Features
• Single supply with operation down to 1.8V
• Low-power CMOS technology
-1mA active current typical
-1μA standby current typical (I-temp)
• Organized as 1 block of 256 bytes (1 x 256 x 8)
• 2-wire serial interface bus, I
2
C™ compatible
• Schmitt Trigger inputs for noise suppression
• Output slope control to eliminate ground bounce
• 100 kHz (24AA02) and 400 kHz (24LC02B) compatibility
• Self-timed write cycle (including auto-erase)
• Page write buffer for up to 8 bytes
• 2ms typical write cycle time for page write
• Hardware write-protect for entire memory
• Can be operated as a serial ROM
• Factory programming (QTP) available
• ESD protection > 4,000V
• 1,000,000 erase/write cycles
• Data retention > 200 years
• 8-lead PDIP, SOIC, TSSOP and MSOP packages
• 5-lead SOT-23 package
• Pb-free finish available
• Available for extended temperature ranges:
-Industrial (I): -40°C to +85°C
-Automotive (E): -40°C to +125°C
12.2.3. Pinning
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12.3. 24LC32
12.3.1. General Description
The Microchip Technology Inc. 24AA32A/24LC32A(24XX32A*) is a 32 Kbit Electrically Erasable PROM. The
device is organized as four blocks of 8K x 8-bitmemory with a 2-wire serial interface. Low-voltage design
permits operation down to 1.8V, with standby and active currents of only 1μA and 1mA, respectively. It has
been developed for advanced, low-power applications such as personal communications or data acquisition.
The 24XX32A also has a page write capability for up to 32 bytes of data. Functional address lines allow up to
eight devices on the same bus, for up to 256Kbits address space.
12.3.2. Features
• Single supply with operation down to 1.8V
• Low-power CMOS technology
-1mA active current typical
-1μA standby current typical (I-temp)
• Organized as 4 block of 8K bits (32K bit)
• 2-wire serial interface bus, I
2
C™ compatible
• Schmitt Trigger inputs for noise suppression
• Output slope control to eliminate ground bounce
• 100 kHz (<2.5V) and 400 kHz (2.5V) compatibility
• Self-timed write cycle (including auto-erase)
• Page write buffer for up to 8 bytes
• 2ms typical write cycle time for page write
• Hardware write-protect for entire memory
• Can be operated as a serial ROM
• Factory programming (QTP) available
• ESD protection > 4,000V
• 1,000,000 erase/write cycles
• Data retention > 200 years
• 8-lead PDIP, SOIC, TSSOP and MSOP packages
• 5-lead SOT-23 package
• Standard and Pb-free finishes available
• Available for extended temperature ranges:
-Industrial (I): -40°C to +85°C
-Automotive (E): -40°C to +125°C
12.3.3. Pinning
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12.4. 74LVC14A
12.4.1. Description
The 74LVC14A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most
advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 or 5V devices. This feature
allows the use of these devices as translators in a mixed 3.3 and 5V environment. The 74LVC14A provides
six inverting buffers with Schmitt-trigger action. It is capable of transforming slowly changing input signals
into sharply defined, jitter-free output signals.
12.4.2. Features
•
Wide supply voltage range from 1.2 to 3.6 V
• CMOS low power consumption
• Direct interface with TTL levels
• Inputs accept voltages up to 5.5 V
• Complies with JEDEC standard no.8-1A
• ESD protection:
HBM EIA/JESD22-A114-A exceeds 2000V
MM EIA/JESD22-A115-A exceeds 200V.
• Specified from -40 to +85C and -40 to +125C.
12.4.3. Pinning
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12.5. TEA6420
12.5.1. Features
• 5 Stereo Inputs
• 4 Stereo Outputs
• Gain Control 0/2/4/6dB/Mute for each Output
• Cascadable (2 different addresses)
• Serial Bus Controlled
• Very low Noise
• Very low Distortion
12.5.2. Description
The TEA6420 switches 5 stereo audio inputs on4stereo outputs. All the switching possibilities are
changed through the I
2
C bus.
12.5.3. Pin Connections
12.6. CS4334
12.6.1. Features
•
Complete Stereo DAC System: Interpolation, D/A, Output Analog Filtering
• 24-Bit Conversion
• 96 dB Dynamic Range
• -88 dB THD+N
• Low Clock Jitter Sensitivity
• Single +5V Power Supply
• Filtered Line Level Outputs
• On-Chip Digital De-emphasis
• Popgaurd® Technology
• Functionally Compatible with CS4330/31/33
12.6.2. General Description
The CS4334 family members are complete, stereo digital-to-analog output systems including
interpolation, 1-bitD/A conversion and output analog filtering in an 8-pinpackage. The CS4334/5/6/7/8/9
support all major audio data interface formats, and the individual devices differ only in the supported
interface format. The CS4334 family is based on delta-sigma modulation, where the modulator output
controls the reference voltage input to an ultra-linear analog low-pass filter. This architecture allows for
infinite adjustment of sample rate between 2 kHz and 100 kHz simply by changing the master clock
frequency. The CS4334 family contains on-chip digital de-emphasis, operates from a single +5V power
supply, and requires minimal support circuitry. These features are ideal for set-top boxes, DVD players,
SVCD players, and A/V receivers.
12
Page 17
12.6.3. Pin Descriptions
12.7. DS90C385
12.7.1. General Description
The DS90C385 transmitter converts 28 bits of LVCMOS/LVTTL data into four LVDS (Low Voltage
Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the
data streams over a fifth LVDS link.
Every cycle of the transmit clock 28 bits of input data are sampled and transmitted. At a transmit clock
frequency of 85MHz, 24 bits of RGB data and 3 bits of LCD timing and control data (FPLINE,
FPFRAME, DRDY) are transmitted at a rate of 595 Mbps per LVDS data channel. Using an 85MHz
clock, the data throughput is 297.5Mbytes/sec. Also available is the DS90C365 that converts 21 bits of
LVCMOS/LVTTL data into three LVDS (Low Voltage Differential Signaling) data streams. Both
transmitters can be programmed for Rising edge strobe or falling edge strobe through a dedicated pin.
A Rising edge or Falling edge strobe transmitter will interoperate with a Falling edge strobe Receiver
(DS90CF386/DS90CF366) without any translation logic.
The DS90C385 is also offered in a 64 ball, 0.8mm fine pitch ball grid array (FBGA) package which
provides a 44 % reduction in PCB footprint compared to the TSSOP package. This chipset is an ideal
means to solve EMI and cable size problems associated with wide, high-speed TTL interfaces.
12.7.2. Features
• 20 to 85MHz shift clock support
• Best–in–Class Set & Hold Times on TxINPUTs
• Tx power consumption <130mW (typ) @ 85MHz Grayscale
• Tx Power-down mode <200μW (max)
• Supports VGA, SVGA, XGA and Dual Pixel SXGA.
• Narrow bus reduces cable size and cost
• Up to 2.38Gbps throughput
• Up to 297.5Megabytes/sec bandwidth
• 345mV (typ) swing LVDS devices for low EMI
• PLL requires no external components
• Compatible with TIA/EIA-644 LVDS standard
• Low profile 56-lead or 48-lead TSSOP package
• DS90C385 also available in a 64 ball, 0.8mm fine pitch ball grid array (FBGA) package
13
Page 18
12.7.3. Pin Description
DS90C385 MTD56 (TSSOP) Package Pin Description-FPD Link Transmitter
Pin Name I/O No. Description
TxIN
TxOUT+
TxOUTTxCLKIN
R_FB
TxCLK OUT+
TxCLK OUTPWR DOWN
Vcc
GND
PLL Vcc
PLL GND
LVDS Vcc
LVDS GND
I 28
O 4
O 4
I 1
I 1
O 1
O 1
I 1
I 3
I 4
I 1
I 2
I 1
I 3
TTL level input. This includes: 8 Red, 8 Green, 8 Blue, and 4 control lines —FPLINE,
FPFRAME and DRDY (also referred to as HSYNC, VSYNC, Data Enable).
Positive LVDS differentiaI data output.
Negative LVDS differential data output.
TTL Ievel clock input. Pin name TxCLK IN.
Programmable strobe select
Positive LVDS differential clock output.
Negative LVDS differential clock output.
TTL level input. Assertion (low input) TRI-STATES the outputs, ensuring low current at
power down.
Power supply pins for TTL inputs.
Ground pins for TTL inputs.
Power supply pin for PLL.
Ground pins for PLL.
Power supply pin for LVDS outputs.
Ground pins for LVDS outputs.
DS90C385SLC SLC64A Package Pin Description-FPD Link Transmitter
Pin Name I/O No. Description
TxIN
TxOUT+
TxOUTTxCLKIN
R_FB
TxCLK OUT+
TxCLK OUTPWR DOWN
Vcc
GND
PLL Vcc
PLL GND
LVDS Vcc
LVDS GND
NC
I 28
O 4
O 4
I 1
I 1
O 1
O 1
I 1
I 3
I 5
I 1
I 2
I 2
I 4
6
TTL level input.
Positive LVDS differentiaI data output.
Negative LVDS differential data output.
TTL Ievel clock input. The rising edge acts as data strobe. Pin name TxCLK IN.
Programmable strobe select. HIGH = rising edge, LOW = falling edge.
Positive LVDS differential clock output.
Negative LVDS differential clock output.
TTL level input. Assertion (low input) TRI-STATES the outputs, ensuring low
current at power down.
Power supply pins for TTL inputs.
Ground pins for TTL inputs.
Power supply pin for PLL.
Ground pins for PLL.
Power supply pin for LVDS outputs.
Ground pins for LVDS outputs.
Pins not connected.
12.8. GAL16LV8
12.8.1. Description
The GAL16LV8D, at 3.5ns maximum propagation delay time, provides the highest speed performance
available in the PLD market. The GAL16LV8C can interface with both 3.3V and 5Vsignal levels. The
GAL16LV8 is manufactured using Lattice Semiconductor's advanced 3.3V E
combines CMOS with Electrically Erasable (E
2
) floating gate technology. High speed erase times
2
CMOS process, which
(<100ms) allow the devices to be reprogrammed quickly and efficiently.
The 3.3V GAL16LV8 uses the same industry standard 16V8 architecture as its 5V counterpart and
supports all architectural features such as combinatorial or registered macrocell operations.
Unique test circuitry and reprogrammable cells allow complete AC, DC, and functional testing during
manufacture. As a result, Lattice Semiconductor delivers 100% field programmability and functionality
of all GAL products. In addition, 100 erase/write cycles and data retention in excess of 20 years are
specified.
14
Page 19
12.8.2. Features
• HIGH PERFORMANCE E2CMOS® TECHNOLOGY
- 3.5ns Maximum Propagation Delay
- Fmax = 250MHz
- 2.5 ns Maximum from Clock Input to Data Output
- UltraMOS® Advanced CMOS Technology
• 3.3V LOW VOLTAGE 16V8 ARCHITECTURE
- JEDEC-Compatible 3.3V Interface Standard
- 5V Compatible Inputs
- I/O Interfaces with Standard 5V TTL Devices (GAL16LV8C)
• ACTIVE PULL-UPS ON ALL PINS (GAL16LV8D Only)
• E2 CELL TECHNOLOGY
- Reconfigurable Logic
- Reprogrammable Cells
- 100% Tested/100% Yields
- High Speed Electrical Erasure (<100ms)
- 20 Year Data Retention
• EIGHT OUTPUT LOGIC MACROCELLS
- Maximum Flexibility for Complex Logic Designs
- Programmable Output Polarity
• PRELOAD AND POWER-ON RESET OF ALL REGISTERS
- 100% Functional Testability
• APPLICATIONS INCLUDE:
- Glue Logic for 3.3V Systems
- DMA Control
- State Machine Control
- High Speed Graphics Processing
- Standard Logic Speed Upgrade
• ELECTRONIC SIGNATURE FOR IDENTIFICATION
• LEAD-FREE PACKAGE OPTIONS
12.8.3. Pin connections
12.9. K6R4008V1D
12.9.1. Description
The K6R4008V1D is a 4,194,304-bit high-speed Static Random Access Memory organized as 524,288
words by 8 bits. The K6R4008V1D uses 8 common input and output lines and has an output enable pin
which operates faster than address access time at read cycle. The device is fabricated using
SAMSUNGƍs advanced CMOS process and designed for high-speed circuit technology. It is particularly
well suited for use in high-density high-speed system applications. The K6R4008V1D is packaged in a
400 mil 36-pin plastic SOJ and 44-pin plastic TSOP type II.
15
Page 20
12.9.2. Features
• Fast Access Time 8, 10ns(Max.)
• Low Power Dissipation
- Standby (TTL) : 20mA(Max.)
(CMOS) : 5mA(Max.)
- Operating K6R4008V1D-08 : 80mA(Max.)
K6R4008V1D-10 : 65mA(Max.)
• Single 3.3 ±0.3V Power Supply
• TTL Compatible Inputs and Outputs
• Fully Static Operation
- No Clock or Refresh required
• Three State Outputs
• Center Power/Ground Pin Configuration
• Standard Pin Configuration
K6R4008V1D-J : 36-SOJ-400
K6R4008V1D-K : 36-SOJ-400(Lead-Free)
K6R4008V1D-T : 44-TSOP2-400BF
K6R4008V1D-U : 44-TSOP2-400BF(Lead-Free)
• Operating in Commercial and Industrial Temperature range.
12.9.3. Pin Description
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Page 21
12.10. KA278R33
12.10.1. Features
• 2A / 3.3V Output low dropout voltage regulator
• TO220 Full-Mold package (4PIN)
• Overcurrent protection, Thermal shutdown
• Overvoltage protection, Short-Circuit protection
• With output disable function
12.10.2. Description
The KA278R33 is a low-dropout voltage regulator suitable for various electronic equipments. It provides
constant voltage power source with TO-220 4 lead full mold package. Dropout voltage of KA278R33 is
below 0.5V in full rated current (2A). This regulator has various function such as peak current
protection, thermal shut down, overvoltage protection and output disable function.
12.11. LM1086
12.11.1. Description
The LM1086 is a series of low dropout positive voltage regulators with a maximum dropout of 1.5V at
1.5A of load current. It has the same pin-out as National Semiconductor’s industry standard LM317.
The LM1086 is available in an adjustable version, which can set the output voltage with only two
external resistors. It is also available in five fixed voltages: 2.5V, 2.85V, 3.3V, 3.45V and 5.0V. The fixed
versions integrate the adjust resistors. The LM1086 circuit includes a zener trimmed band-gap
reference, current limiting and thermal shutdown.
12.11.2. Features
• Available in 2.5V, 2.85V, 3.3V, 3.45V, 5V and Adjustable Versions
• Current Limiting and Thermal Protection
• Output Current 1.5A
• Line Regulation 0.015% (typical)
• Load Regulation 0.1% (typical)
12.11.3. Applications
• SCSI-2 Active Terminator
• High Efficiency Linear Regulators
• Battery Charger
• Post Regulation for Switching Supplies
• Constant Current Regulator
• Microprocessor Supply
12.11.4. Connection Diagrams
17
Page 22
12.12. LM1117
12.12.1. General Description
The LM1117 is a series of low dropout voltage regulators with a dropout of 1.2V at 800mA of load
current. It has the same pin-out as National Semiconductor’s industry standard LM317. The LM1117 is
available in an adjustable version, which can set the output voltage from 1.25V to 13.8V with only two
external resistors. In addition, it is also available in five fixed voltages, 1.8V, 2.5V, 2.85V, 3.3V and 5V.
The LM1117 offers current limiting and thermal shutdown. Its circuit includes a zener trimmed bandgap
reference to as-sure output voltage accuracy to within ±1%. The LM1117 series is available in SOT223, TO-220, and TO-252 D-PAK packages. A minimum of 10μF tantalum capacitor is required at the
output to improve the transient response and stability.
12.12.2. Features
• Available in 1.8V, 2.5V, 2.85V, 3.3V, 5V, and Adjustable Versions
• Space Saving SOT-223 Package
• Current Limiting and Thermal Protection
• Output Current 800mA
• Line Regulation 0.2% (Max)
• Load Regulation 0.4% (Max)
• Temperature Range
— LM1117 0°C to 125°C
— LM1117I -40°C to 125°C
12.12.3. Applications
• 2.85V Model for SCSI-2 Active Termination
• Post Regulator for Switching DC/DC Converter
• High Efficiency Linear Regulators
• Battery Charger
• Battery Powered Instrumentation
12.12.4. Connection Diagrams
12.13. LM317
12.13.1. General Description
This monolithic integrated circuit is an adjustable 3-terminal positive voltage regulator designed to
supply more than 1.5A of load current with an output voltage adjustable over a 1.2 to 37V. It employs
internal current limiting, thermal shut-down and safe area compensation.
12.13.2. Features
• Output Current In Excess of 1.5A
• Output Adjustable Between 1.2V and 37V
• Internal Thermal Overload Protection
• Internal Short Circuit Current Limiting
• Output Transistor Safe Operating Area Compensation
• TO-220 Package
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Page 23
12.13.3. Pin Description
12.14. LM809
12.14.1. General Description
The LM809/810 microprocessor supervisory circuits can be used to monitor the power supplies in
microprocessor and digital systems. They provide a reset to the microprocessor during power-up, powerdown and brown-out conditions. The function of the LM809/810 is to monitor the VCC supply voltage and
assert a reset signal whenever this voltage declines below the factory-programmed reset threshold. The
reset signal remains asserted for 240ms after VCC rises above the threshold. The LM809 has an active-low
RESET output, while the LM810 has an active-high RESET output. Seven standard reset voltage options are
available, suitable for monitoring 5V, 3.3V, and 3V supply voltages. With a low supply current of only 15μA,
the LM809/810 are ideal for use in portable equipment.
12.14.2. Features
•
Precise monitoring of 3V, 3.3V, and 5V supply voltages
• Superior upgrade to MAX809/810
• Fully specified overtemperature
• 140ms min. Power-On Reset pulse width, 240ms typical
Active-low RESET Output(LM809)
Active-high RESET Output(LM810)
• Guaranteed RESET Output valid for VCC1V
• Low Supply Current, 15μA typ
• Power supply transient immunity
12.14.3. Pinning
19
Page 24
12.15. MSP34X0G (MSP3410G)
Multistandard Sound Processor Family
12.15.1. Introduction
The MSP 34x0G family of single-chip Multistandard Sound Processors covers the sound processing of
all analog TV-Standards worldwide, as well as the NICAM digital sound standards. The full TV sound
processing, starting with analog sound IF signal-in, down to processed analog AF-out, is performed on
a single chip. Figure shows a simplified functional block diagram of the MSP 34x0G.
This new generation of TV sound processing ICs now includes versions for processing the multichannel
television sound (MTS) signal conforming to the standard recommended by the Broadcast Television
Systems Committee (BTSC). The DBX noise reduction, or alternatively, MICRONAS Noise Reduction
(MNR) is performed alignment free. Other processed standards are the Japanese FM-FM multiplex
standard (EIA-J) and the FM Stereo Radio standard. Current ICs have to perform adjustment
procedures in order to achieve good stereo separation for BTSC and EIA-J. The MSP 34x0G has
optimum stereo performance without any adjustments.
All MSP 34x0G versions are pin and software downward compatible to the MSP 34x0D. The MSP
34x0G further simplifies controlling software. Standard selection requires a single I²C transmission only.
The MSP 34x0G has built-in automatic functions: The IC is able to detect the actual sound standard
automatically (Automatic Standard Detection). Furthermore, pilot levels and identification signals can be
evaluated internally with subsequent switching between mono/stereo/bilingual; no I²C interaction is
necessary (Automatic Sound Selection).
Source Select
2
S bus interface consists of five pins:
I
1. I2S_DA_IN1, I2S_DA_IN2: For input, four channels (two channels per line, 2*16 bits) per sampling
cycle (32kHz) are transmitted.
2. I2S_DA_OUT: For output, two channels (2*16 bits) per sampling cycle (32kHz) are transmitted.
3. I2S_CL: Gives the timing for the transmission of I
2
S serial data (1.024MHz).
4. I2S_WS: The I2S_WS word strobe line defines the left and right sample.
12.15.2. Features
• Standard Selection with single I
2
C transmission
• Automatic Standard Detection of terrestrial TV standards
• Automatic Sound Selection (mono/stereo/bilingual), new registers MODUS, STATUS
• Two selectable sound IF (SIF) inputs
• Automatic Carrier Mute function
• Interrupt output programmable (indicating status change)
• Loudspeaker / Headphone channel with volume, balance, bass, treble, loudness
20
Page 25
• AVC: Automatic Volume Correction
• Subwoofer output with programmable low-pass and complementary high-pass filter
• 5-band graphic equalizer for loudspeaker channel
• Spatial effect for loudspeaker channel
• Four Stereo SCART (line) inputs, one Mono input; two Stereo SCART outputs
• Complete SCART in/out switching matrix
• Two I
2
S inputs; one I2S output
• Dolby Pro Logic with DPL 351xA coprocessor
• All analog FM-Stereo A2 and satellite standards; AM-SECAM L standard
• Simultaneous demodulation of (very) high-deviation FM-Mono and NICAM
• Adaptive deemphasis for satellite (Wegener-Panda, acc. to ASTRA specification)
• ASTRA Digital Radio (ADR) together with DRP 3510A
• All NICAM standards
• Korean FM-Stereo A2 standard
12.15.3. Pin connections
NC = not connected; leave vacant
LV = if not used, leave vacant
OBL = obligatory; connect as described in circuit diagram
DVSS: if not used, connect to DVSS
AHVSS: connect to AHVSS
Pin No. Pin Name Type
PLCC
68-pin
1 16 14 9 8 ADR_WS OUT LV ADR word strobe
2 - - - - NC LV Not connected
3 15 13 8 7 ADR_DA OUT LV ADR Data Output
4 14 12 7 6 I2S_DA_IN1 IN LV I2S1 data input
5 13 11 6 5 I2S_DA_OUT OUT LV I2S data output
6 12 10 5 4 I2S_WS IN/OUT LV I2S word strobe
7 11 9 4 3 I2S_CL IN/OUT LV I2S clock
8 10 8 3 2 I2C_DA IN/OUT OBL I2C data
9 9 7 2 1 I2C_CL IN/OUT OBL I2C clock
10 8 - 1 64 NC LV Not connected
11 7 6 80 63 STANDBYQ IN OBL Stand-by (low-active)
12 6 5 79 62 ADR_SEL IN OBL I2C bus address select
13 5 4 78 61 D_CTR_I/O_0 IN/OUT LV D_CTR_I/O_0
14 4 3 77 60 D_CTR_I/O_1 IN/OUT LV D_CTR_I/O_1
15 3 - 76 59 NC LV Not connected
16 2 - 75 58 NC LV Not connected
17 - - - - NC LV Not connected
18 1 2 74 57 AUD_CL_OUT OUT LV
19 64 1 73 56 TP LV Test pin
20 63 52 72 55 XTAL_OUT OUT OBL Crystal oscillator
21 62 51 71 54 XTAL_IN IN OBL Crystal oscillator
22 61 50 70 53 TESTEN IN OBL Test pin
23 60 49 69 52 ANA_IN2+ IN
24 59 48 68 51 ANA_IN- IN
25 58 47 67 50 ANA_IN1+ IN LV IF input 1
26 57 46 66 49 AVSUP OBL Analog power supply 5V
- - - 65 - AVSUP OBL Analog power supply 5V
- - - 64 - NC LV Not connected
- - - 63 - NC LV Not connected
27 56 45 62 48 AVSS OBL Analog ground
- - - 61 - AVSS OBL Analog ground
28 55 44 60 47 MONO_IN IN LV Mono input
- - - 59 - NC LV Not connected
29 54 43 58 46 VREFTOP OBL
30 53 42 57 45 SC1_IN_R IN LV SCART 1 input, right
PSDIP
64-pin
PSDIP
52-pin
PQFP
80-pin
PLQFP
64-pin
Connection
(if not used)
AVSS via
56 pF/LV
AVSS via
56 pF/LV
Short Description
Audio clock output
(18.432 MHz)
IF Input 2 (can be left
vacant, only if IF input 1 is
also not in use)
IF common (can be left
vacant, only if IF input 1 is
also not in use)
Reference voltage IF A/D
converter
21
Page 26
31 52 41 56 44 SC1_IN_L IN LV SCART 1 input, left
32 51 - 55 43 ASG1 AHVSS Analog Shield Ground 1
33 50 40 54 42 SC2_IN_R IN LV SCART 2 input, right
34 49 39 53 41 SC2_IN_L IN LV SCART 2 input, left
35 48 - 52 40 ASG2 AHVSS Analog Shield Ground 2
36 47 38 51 39 SC3_IN_R IN LV SCART 3 input, right
37 46 37 50 38 SC3_IN_L IN LV SCART 3 input, left
38 45 - 49 37 ASG4 AHVSS Analog Shield Ground 4
39 44 - 48 36 SC4_IN_R IN LV SCART 4 input, right
40 43 - 47 35 SC4_IN_L IN LV SCART 4 input, left
41 - - 46 - NC LV or AHVSS Not connected
42 42 36 45 34 AGNDC OBL Analog reference voltage
43 41 35 44 33 AHVSS OBL Analog ground
- - - 43 - AHVSS OBL Analog ground
- - - 42 - NC LV Not connected
- - - 41 - NC LV Not connected
44 40 34 40 32 CAPL_M OBL Volume capacitor MAIN
45 39 33 39 31 AHVSUP OBL Analog power supply 8V
46 38 32 38 30 CAPL_A OBL Volume capacitor AUX
47 37 31 37 29 SC1_OUT_L OUT LV SCART output 1, left
48 36 30 36 28 SC1_OUT_R OUT LV SCART output 1, right
49 35 29 35 27 VREF1 OBL Reference ground 1
50 34 28 34 26 SC2_OUT_L OUT LV SCART output 2, left
51 33 27 33 25 SC2_OUT_R OUT LV SCART output 2, right
52 - - 32 - NC LV Not connected
53 32 - 31 24 NC LV Not connected
54 31 26 30 23 DACM_SUB OUT LV Subwoofer output
55 30 - 29 22 NC LV Not connected
56 29 25 28 21 DACM_L OUT LV Loudspeaker out, left
57 28 24 27 20 DACM_R OUT LV Loudspeaker out, right
58 27 23 26 19 VREF2 OBL Reference ground 2
59 26 22 25 18 DACA_L OUT LV Headphone out, left
60 25 21 24 17 DACA_R OUT LV Headphone out, right
- - - 23 - NC LV Not connected
- - - 22 - NC LV Not connected
61 24 20 21 16 RESETQ IN OBL Power-on-reset
62 23 - 20 15 NC LV Not connected
63 22 - 19 14 NC LV Not connected
64 21 19 18 13 NC LV Not connected
65 20 18 17 12 I2S_DA_IN2 IN LV I2S2-data input
66 19 17 16 11 DVSS OBL Digital ground
- - - 15 - DVSS OBL Digital ground
- - - 14 - DVSS OBL Digital ground
67 18 16 13 10 DVSUP OBL Digital power supply 5V
- - - 12 - DVSUP OBL Digital power supply 5V
- - - 11 - DVSUP OBL Digital power supply 5V
68 17 15 10 9 ADR_CL OUT LV ADR clock
12.16. M29W040B
12.16.1. Description
The M29W040B is a 4Mbit (512Kb x8) non-volatile memory that can be read, erased and
reprogrammed. These operations can be performed using a single low voltage (2.7 to 3.6V) supply. On
power-up the memory defaults to its Read mode where it can be read in the same way as a ROM or
EPROM. The M29W040B is fully backward compatible with the M29W040.The memory is divided into
blocks that can be erased independently so it is possible to preserve valid data while old data is erased.
Each block can be protected independently to prevent accidental Program or Erase commands from
modifying the memory. Program and Erase commands are writ-ten to the Command Interface of the
memory. An on-chip Program/Erase Controller simplifies the process of programming or erasing the
memory by taking care of all of the special operations that are required to update the memory contents.
The end of a program or erase operation can be detected and any error conditions identified. The
command set required to control the memory is consistent with JEDEC standards. Chip Enable, Output
Enable and Write Enable signals control the bus operation of the memory. They allow simple
connection to most microprocessors, often without additional logic.
22
Page 27
12.16.2. Features
• SINGLE 2.7 to 3.6V SUPPLY VOLTAGE for PROGRAM, ERASE and READ OPERATIONS
• ACCESS TIME: 55ns
• PROGRAMMING TIME
- 10μs per Byte typical8
• UNIFORM 64Kbytes MEMORY BLOCKS
• PROGRAM/ERASE CONTROLLER
- Embedded Byte Program algorithm
- Embedded Multi-Block/Chip Erase algorithm
- Status Register Polling and Toggle Bits
• ERASE SUSPEND and RESUME MODES
- Read and Program another Block during Erase Suspend
• UNLOCK BYPASS PROGRAM COMMAND
- Faster Production/Batch Programming
• LOW POWER CONSUMPTION
- Standby and Automatic Standby
• 100,000 PROGRAM/ERASE CYCLES per BLOCK
• 20 YEARS DATA RETENTION
- Defectivity below 1 ppm/year
• ELECTRONIC SIGNATURE
- Manufacturer Code: 20h
- Device Code: E3h
12.16.3. Pin Descriptions
12.17. MC33202
12.17.1. General Description
The MC33201/2/4 family of operational amplifiers provide railítoírail operation on both the input and
output. The inputs can be driven as high as 200mV beyond the supply rails without phase reversal on
the outputs, and the output can swing within 50mV of each rail. This railítoírail operation enables the
user to make full use of the supply voltage range available. It is designed to work at very low supply
voltages (±0.9V) yet can operate with a supply of up to +12V and ground. Output current boosting
techniques provide a high output current capability while keeping the drain current of the amplifier to a
minimum. Also, the combination of low noise and distortion with a high slew rate and drive capability
make this an ideal amplifier for audio applications.
12.17.2. Features
• Low Voltage, Single Supply Operation (+1.8V and Ground to +12 V and Ground)
• Input Voltage Range Includes both Supply Rails
• Output Voltage Swings within 50mV of both Rails
• No Phase Reversal on the Output for Overídriven Input Signals
• High Output Current (ISC = 80mA, Typ)
• Low Supply Current (ID = 0.9mA, Typ)
23
Page 28
• 600 Output Drive Capability
• Extended Operating Temperature Ranges (í40° to +105°C and í55° to +125°C)
• Typical Gain Bandwidth Product = 2.2 MHz
• PbíFree Packages are Available
12.17.3. Pin Connections
12.18. PCF8574
12.18.1. General Description
The PCF8574 is a silicon CMOS circuit. It provides general purpose remote I/O expansion for most
microcontroller families via the two-line bidirectional bus (I
bidirectional port and an I
2
C-bus interface. The PCF8574 has a low current consumption and includes
2
C).The device consists of an 8-bit quasi-
latched outputs with high current drive capability for directly driving LEDs. It also possesses an interrupt
line (INT) which can be connected to the interrupt logic of the microcontroller. By sending an interrupt
signal on this line, the remote I/O can inform the microcontroller if there is incoming data on its ports
without having to communicate via the I
2
C-bus. This means that the PCF8574 can remain a simple
slave device.
12.18.2. Features
• Operating supply voltage 2.5 to 6V
• Low standby current consumption of 10 μA maximum
2
C to parallel port expander
• I
• Open-drain interrupt output
• 8-bit remote I/O port for the I
2
C-bus
• Compatible with most microcontrollers
• Latched outputs with high current drive capability for directly driving LEDs
• Address by 3 hardware address pins for use of up to 8 devices (up to 16 with PCF8574A)
• DIP16, or space-saving SO16 or SSOP20 packages.
12.18.3. Pinning
24
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12.19. TSOP1836
12.19.1. Description
The TSOP18.. – series are miniaturized receivers for infrared remote control systems. PIN diode and
preamplifier are assembled on lead frame, the epoxy package is designed as IR filter. Carrier frequency
for TSOP1836 is 36KHz.
The demodulated output signal can directly be decoded by a microprocessor. The main benefit is the
reliable function even in disturbed ambient and the protection against uncontrolled output pulses.
12.19.2. Features
• Photo detector and preamplifier in one package
• Internal filter for PCM frequency
• TTL and CMOS compatibility
• Output active low
• Improved shielding against electrical field disturbance
• Suitable burst length >6 cycles/burst
Special Features
• Small size package
• Enhanced immunity against all kinds of disturbance light
• No occurrence of disturbance pulses at the output
• Short settling time after power on (<200μS)
12.20. PI5V330
12.20.1. General Description
The PI5V330 is well suited for video applications when switching composite or RGB analogue. A
picture-in-picture application will be described in this brief. The pixel-rate creates video overlays so two
or more pictures can be viewed at the same time. An inexpensive NTSC titler can be implemented by
superimposing the output of a character generator on a standard composite video background.
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12.21. SDA55XX (SDA5550)
12.21.1. General description
The SDA55XX is a single chip teletext decoder for decoding World System Teletext data as well as
Video Programming System (VPS), Program Delivery Control (PDC), and Wide Screen Signalling
(WSS) data used for PAL plus transmissions (Line 23). The device also supports Closed caption
acquisition and decoding. The device provides an integrated general-purpose, fully 8051-compatible
Microcontroller with television specific hardware features. Microcontroller has been enhanced to provide
powerful features such as memory banking, data pointers, and additional interrupts etc. The on-chip
display unit for displaying Level 1.5 teletext data can also be used for customer defined on screen
displays. Internal XRAM consists of up to16 Kbytes. Device has an internal ROM of up to 128 KBytes.
ROMless versions can access up to 1 MByte of external RAM and ROM. The SDA 55XX supports a
wide range of standards including PAL, NTSC and contains a digital slicer for VPS, WSS, PDC, TTX
and Closed Caption, an accelerating acquisition hardware module, a display generator for Level 1.5
TTX data and powerful On screen Display capabilities based on parallel attributes, and Pixel oriented
characters (DRCS).
The 8-bit Microcontroller runs at 360 ns. cycle time (min.). Controller with dedicated hardware does
most of the internal TTX acquisition processing, transfers data to/from external memory interface and
receives/ transmits data via I
2
C-firmware user-interface. The slicer combined with dedicated hardware
stores TTX data in a VBI buffer of 1 Kilobyte. The Microcontroller firmware performs all the acquisition
tasks (hamming and parity-checks, page search and evaluation of header control bits) once per field.
Additionally, the firmware can provide high-end Teletext features like Packet-26-handling, FLOF, TOP
and list-pages. The interface to user software is optimized for minimal overhead. SDA 55XX is realized
in 0.25 micron technology with 2.5 V supply voltage and 3.3 V I/O (TTL compatible). The software and
hardware development environment (TEAM) is available to simplify and speed up the development of
the software and On Screen Display. TEAM stands for TVT Expert Application Maker. It improves the
TV controller software quality in following aspects:
– Shorter time to market
– Re-usability
– Target independent development
– Verification and validation before targeting
– General test concept
– Graphical interface design requiring minimum programming and controller know how.
– Modular and open tool chain, configurable by customer.
12.22. Sil 9993
12.22.1. General Description
The SiI 9993 is the first generation of PanelLink receivers that are designed for the HDMI 1.0 (High
Definition Multimedia Interface) specification. DTVs, plasma displays, LCD TVs and projectors can now
provide the purest level of protected digital audio/video over a simple, low cost cable. Backwards
compatibility with DVI 1.0 allows HDMI systems to connect to any DVI 1.0 host (DVD players, HD set
top boxes, D-VHS players and receivers, PC). The SiI 9993 incorporates a flexible audio and video
interface. The receiver can connect to RGB input and output YCbCr using an integrated color space
converter. This allows full backward compatibility to DVI, and interfaces to all major video processors.
A S/PDIF port can output PCM encoded data as well as Dolby Digital, DTS and all other formats
capable of being sent over S/PDIF. A 2-channel I2S port outputs data converted from S/PDIF. The SiI
9993 comes pre-programmed with HDCP keys, greatly simplifying the manufacturing process, lowering
costs, all the while providing the highest level of HDCP key security. Silicon Image’s PanelLink
receivers use the latest generation of PanelLink TMDS core technology. These PanelLink cores pass
all HDMI compliancy tests.
12.22.2. Features
• HDMI 1.0 and DVI 1.0 compliant receiver
• Integrated PanelLink core supports DTV resolutions (480i/576i/480p/576p/720p/1080i)
• Digital video interface supports video processors:
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o 24-bit RGB 4:4:4
o 24-bit YCbCr 4:4:4
o 16/20/24-bit YCbCr 4:2:2
o 8/10/12-bit YCbCr 4:2:2 embedded syncs
• Analog RGB and YPbPr output:
o 10-bit DAC
o Separate or Composite Syncs (Sync on G)
• S/PDIF output supports PCM, Dolby Digital, DTS digital audio transmission (32-48kHz Fs) using IEC
60958 and IEC 61937.
• Programmable I
2
S interface for connection to low-cost audio DACs.
• Integrated HDCP decryption engine for receiving protected audio and video content
• Pre-programmed HDCP keys provide highest level of key security, simplifies manufacturing
• Programmable registers via slave I
2
C interface
• 3.3V operation in 100-pin TQFP package
• Flexible power management
12.23. SN74CB3Q3305
12.23.1. General Description
The SN74CB3Q3305 is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate
voltage of the pass transistor, providing a low and flat ON-state resistance (r
). The low and flat ON-
on
state resistance allows for minimal propagation delay and supports rail-to-rail switching on the data
input/output (I/O) ports. The device also features low data I/O capacitance to minimize capacitive
loading and signal distortion on the data bus. Specifically designed to support high-bandwidth
applications, the SN74CB3Q3305 provides an optimized interface solution ideally suited for broadband
communications, networking, and data-intensive computing systems.
12.23.2. Features
• High-Bandwidth Data Path (Up To 500 MHz)
• 5-V Tolerant I/Os with Device Powered-Up or Powered-Down
• Low and Flat ON-State Resistance (r
) Characteristics Over Operating Range (ron = 3 Typical)
on
• Rail-to-Rail Switching on Data I/O Ports
í 0- to 5-V Switching With 3.3-V VCC
í 0- to 3.3-V Switching With 2.5-V VCC
• Bidirectional Data Flow, With Near-Zero Propagation Delay
• Low Input/Output Capacitance Minimizes Loading and Signal Distortion (C
• Fast Switching Frequency (f
= 20 MHz Max)
OE
= 3.5 pF Typical)
io(OFF)
• Data and Control Inputs Provide Undershoot Clamp Diodes
• Low Power Consumption (ICC = 0.25 mA Typical)
• VCC Operating Range From 2.3 V to 3.6 V
• Data I/Os Support 0 to 5-V Signaling Levels (0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)
• Control Inputs Can be Driven by TTL or 5-V/3.3-V CMOS Outputs
Supports Partial-Power-Down Mode Operation
• I
off
• Latch-Up Performance Exceeds 100 mA PerJESD 78, Class II
• ESD Performance Tested Per JESD 22
í 2000-V Human-Body Model (A114-B, Class II)
í 1000-V Charged-Device Model (C101)
• Supports Both Digital and Analog Applications: USB Interface, Differential Signal Interface, Bus
Isolation, Low-Distortion Signal Gating
12.23.3. Pin Connections
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12.24. ST24LC21
12.24.1. Description
The ST24LC21 is a 1K bit electrically erasable programmable memory (EEPROM), organized by 8 bits.
2
This device can operate in two modes: Transmit Only mode and I
the device is in Transmit Only mode with EEPROM data clocked out from the rising edge of the signal
applied on VCLK. The device will switch to the I
2
C bidirectional mode upon the falling edge of the signal
applied on SCL pin. The ST24LC21 can not switch from the I
C bidirectional mode. When powered,
2
C bidirectional mode to the Transmit Only
mode (except when the power supply is removed). The device operates with a power supply value as
low as 2.5V. Both Plastic Dual-in-Line and Plastic Small Outline packages are available.
12.24.2. Features
• 1 million Erase/Write cycles
• 40 years data retention
• 2.5V to 5.5V single supply voltage
• 400k Hz compatibility over the full range of supply voltage
2
• Two wire serial interface I
C bus compatible
• Page Write (Up To 8 Bytes)
• Byte, random and sequential read modes
• Self timed programming cycle
• Automatic address incrementing
• Enhanced ESD/Latch up
• Performances
12.24.3. Pin connections
DIP Pin connections CO Pin connections
NC: Not connected
Signal names
SDA Serial data Address Input/Output
SCL Serial Clock (I2C mode)
Vcc Supply voltage
Vss Ground
VCLK Clock transmit only mode
12.25. LM2576
12.25.1. General Description
The LM2576 series of regulators are monolithic integrated circuits ideally suited for easy and
convenient design of a step–down switching regulator (buck converter). All circuits of this series are
capable of driving a 3.0 A load with excellent line and load regulation.
These devices are available in fixed output voltages of 3.3 V, 5.0 V, 12 V, 15 V, and an adjustable
output version. These regulators were designed to minimize the number of external components to
simplify the power supply design. Standard series of inductors optimized for use with the LM2576 are
offered by several different inductor manufacturers.
Since the LM2576 converter is a switch–mode power supply, its efficiency is significantly higher in
comparison with popular three–terminal linear regulators, especially with higher input voltages. In many
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cases, the power dissipated is so low that no heatsink is required or its size could be reduced
dramatically.
A standard series of inductors optimized for use with the LM2576 are available from several different
manufacturers. This feature greatly simplifies the design of switch–mode power supplies.
The LM2576 features include a guaranteed ±4% tolerance on output voltage within specified input
voltages and output load conditions, and ±10% on the oscillator frequency (±2% over 0°C to 125°C).
External shutdown is included, featuring 80 mA (typical) standby current. The output switch includes
cycle–by–cycle current limiting, as well as thermal shutdown for full protection under fault conditions.
12.25.2. Features
• 3.3 V, 5.0 V, 12 V, 15 V, and Adjustable Output Versions
• Adjustable Version Output Voltage Range, 1.23 to 37 V ±4% Maximum Over Line and Load
Conditions
• Guaranteed 3.0 A Output Current
• Wide Input Voltage Range
• Requires Only 4 External Components
• 52 kHz Fixed Frequency Internal Oscillator
• TTL Shutdown Capability, Low Power Standby Mode
• High Efficiency
• Uses Readily Available Standard Inductors
• Thermal Shutdown and Current Limit Protection
• Moisture Sensitivity Level (MSL) Equals 1
12.25.3. Pin description
12.26. MC34063
12.26.1. Description
The MC34063A Series is a monolithic control circuit containing the primary functions required for DC–
to–DC converters. These devices consist of an internal temperature compensated reference,
comparator, controlled duty cycle oscillator with an active current limit circuit, driver and high current
output switch. This series was specifically designed to be incorporated in Step–Down and Step–Up and
Voltage–Inverting applications with a minimum number of external components.
12.26.2. Features
• Operation from 3.0 V to 40 V Input
• Low Standby Current
• Current Limiting
• Output Switch Current to 1.5 A
• Output Voltage Adjustable
• Frequency Operation to 100 kHz
• Precision 2% Reference
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12.26.3. Pin connections
12.27. TDA1308
12.27.1. General Description
The TDA1308 is an integrated class AB stereo headphone driver contained in an SO8 or a DIP8 plastic
package. The device is fabricated in a 1 mm CMOS process and has been primarily developed for
portable digital audio applications.
12.27.2. Features
•
Wide temperature range
• No switch ON/OFF clicks
• Excellent power supply ripple rejection
• Low power consumption
• Short-circuit resistant
• High performance
• high signal-to-noise ratio
• High slew rate
• Low distortion
• Large output voltage swing.
12.27.3. Pinning
SYMBOL PIN DESCRIPTION PIN VALUE
OUTA 1 Output A (Voltage swing) Min : 0.75V, Max : 4.25V
INA(neg) 2 Inverting input A Vo(clip) : Min : 1400mVrms
INA(pos) 3 Non-inverting input A 2.5V
VSS 4 Negative supply 0V
INB(pos) 5 Non-inverting input B 2.5V
INB(neg) 6 Inverting input B Vo(clip) : Min : 1400mVrms
OUTB 7 Output B (Voltage swing) Min : 0.75V, Max : 4.25V
VDD 8 Positive supply 5V, Min : 3.0V, Max : 7.0V
12.28. TDA9886
12.28.1. General Description
The TDA9886 is an alignment-free single standard (without positive modulation) vision and sound IF
signal PLL.
12.28.2. Features
5 V supply voltage
•
• Gain controlled wide-band Vision Intermediate Frequency (VIF) amplifier (AC-coupled)
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•
Multistandard true synchronous demodulation with active carrier regeneration (very linear demodulation,
good intermodulation figures, reduced harmonics, excellent pulse response)
• Gated phase detector for L/L accent standard
• Fully integrated VIF Voltage Controlled Oscillator (VCO), alignment-free; frequencies switchable for all
negative and positive modulated standards via I
2
C-bus
• Digital acquisition help, VIF frequencies of 33.4, 33.9, 38.0, 38.9, 45.75 and 58.75 MHz
• 4 MHz reference frequency input [signal from Phase-Locked Loop (PLL) tuning system] or operating as
crystal oscillator
• VIF Automatic Gain Control (AGC) detector for gain control, operating as peak sync detector for negative
modulated signals and as a peak white detector for positive modulated signals
• Precise fully digital Automatic Frequency Control (AFC) detector with 4-bit digital-to-analogue converter;
AFC bits via I
• TakeOver Point (TOP) adjustable via I
2
C -bus readable
2
C-bus or alternatively with potentiometer
• Fully integrated sound carrier trap for 4.5, 5.5, 6.0 and 6.5 MHz, controlled by FM-PLL oscillator
• Sound IF (SIF) input for single reference Quasi Split Sound (QSS) mode (PLL controlled)
SIF AGC for gain controlled SIF amplifier; single reference QSS mixer able to operate in high performance
•
single reference QSS mode and in intercarrier mode, switchable via I
2
C-bus
• AM demodulator without extra reference circuit
• Alignment-free selective FM-PLL demodulator with high linearity and low noise
2
• I
C-bus control for all functions
2
• I
C-bus transceiver with pin programmable Module Address (MAD).
12.28.3. Pinning
SYMBOL PIN DESCRIPTION
VIF1 1
VIF2
OP1
FMPLL
DEEM
AFD
DGND
AUD
TOP
SDA
SCL
SIOMA
n.c.
TAGC
REF
VAGC
CVBS
AGND
VPLL
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
VP 20
AFC
OP2
SIF1
SIF2
21
22
23
24
VIF differential input 1
VIF differential input 2
output 1 (open-collector)
FM-PLL for loop filter
de-emphasis output for capacitor
AF decoupling input for capacitor
digital ground
audio output
tuner AGC TakeOver Point (TOP)
I2C-bus data input/output
I2C-bus clock input
sound intercarrier output and MAD select
not connected
tuner AGC output
4 MHz crystal or reference input
VIF-AGC for capacitor; note 1
video output
analog ground
VIF-PLL for loop filter
supply voltage (+5 V)
AFC output
output 2 (open-collector)
SIF differential input 1
SIF differential input 2
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12.29. TPA3004D2
12.29.1. General Description
The TPA3004D2 is a 12-W (per channel) efficient, Class-D audio amplifier for driving bridged-tied
stereo speakers. The TPA3004D2 can drive stereo speakers as low as 4 . The high efficiency of the
TPA3004D2 eliminates the need for external heatsinks when playing music.
Stereo speaker volume is controlled with a dc voltage applied to the volume control terminal offering a
range of gain from –40 dB to 36 dB. Line outputs, for driving external headphone amplifier inputs, are
also dc voltage controlled with a range of gain from –56 dB to 20 dB.
An integrated 5-V regulated supply is provided for powering an external headphone amplifier.
12.29.2. Features
12-W/Ch Into an 8- Load From 15-V Supply
•
• Efficient, Class-D Operation Eliminates Heatsinks and Reduces Power Supply Requirements
• 32-Step DC Volume Control From í40 dB to 36 dB
• Line Outputs For External Headphone Amplifier With Volume Control
• Regulated 5-V Supply Output for Powering TPA6110A2
• Space-Saving, Thermally-Enhanced PowerPAD
TM
Packaging
• Thermal and Short-Circuit Protection.
12.29.3. Pinning
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12.30. μPA672T
12.30.1. General Description
The μPA672T is a super-mini-mold device provided with two MOS FET elements. It achieves highdensity mounting and saves mounting costs.
12.30.2. Features
Two MOS FET circuits in package the same size as SC-70
•
• Automatic mounting supported
12.30.3. Pin Connection
12.31. VPC3230D
12.31.1. General Description
The VPC 323xD is a high-quality, single-chip video front-end, which is targeted for 4:3 and 16:9, 50/60Hz and 100/120 Hz TV sets. It can be combined with other members of the DIGIT3000 IC family (such
as DDP 331x) and/or it can be used with 3rd-party products.
The main features of the VPC 323xD are
• high-performance adaptive 4H comb filter Y/C separator with adjustable vertical peaking
• multi-standard colour decoder PAL/NTSC/SECAM including all substandards
• four CVBS, one S-VHS input, one CVBS output
• two RGB/YC
r Cb component inputs, one Fast Blank (FB) input
• integrated high-quality A/D converters and associated clamp and AGC circuits
• multi-standard sync processing
• linear horizontal scaling (0.25 ... 4), as well as non-linear horizontal scaling ‘Panorama-vision’
• PAL+ preprocessing
• line-locked clock, data and sync, or 656-output interface
• peaking, contrast, brightness, color saturation and tint for RGB/ YC
r C b and CVBS/ S-VHS
• high-quality soft mixer controlled by Fast Blank
• PIP processing for four picture sizes (1/4, 1/9, 1/16 or 1/36 of normal size) with 8-bit resolution
• 15 predefined PIP display configurations and expert mode (fully programmable)
• control interface for external field memory
2
C-bus interface
• I
• one 20.25-MHz crystal, few external components
• 80-pin PQFP package
12.31.2. Pin Connections and Short Descriptions
NC = not connected
LV = if not used, leave vacant
X = obligatory; connect as described in circuit diagram
SUPPLYA = 4.75...5.25 V, SUPPLYD = 3.15...3.45 V
Pin No.
PQFP
80-pin
1 B1/CB1IN IN VREF Blue1/Cb1 Analog Component Input
2 G1/Y1IN IN VREF Green1/Y1 Analog Component Input
3 R1/CR1IN IN VREF Read1/Cr1 Analog Component Input
4 B2/CB2IN IN VREF Blue2/Cb2 Analog Component Input
Pin Name Type Connection
(if not used)
Short Description
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5 G2/Y2IN IN VREF Green2/Y2 Analog Component Input
6 R2/CR2IN IN VREF Read2/Cr2 Analog Component Input
7 ASGF X Analog Shield GND
F
8 FFRSTWIN IN LV or GNDD FIFO Reset Write Input
9 V
10 V
OUT X Digital Decoupling Circuitry Supply Voltage
SUPCAP
SUPPLYD X Supply Voltage, Digital Circuitry
SUPD
11 GNDD SUPPLYD X Ground, Digital Circuitry
12 GND
OUT X Digital Decoupling Circuitry GND
CAP
13 SCL IN/OUT X I2C Bus Clock
14 SDA IN/OUT X I2C Bus Data
15 RESQ IN X Reset Input, Active Low
16 TEST IN GNDD Test Pin, connect to GND
D
17 VGAV IN GNDD VGAV Input
18 YCOEQ IN GNDD Y/C Output Enable Input, Active Low
19 FFIE OUT LV FIFO Input Enable
20 FFWE OUT LV FIFO Write Enable
21 FFRSTW OUT LV FIFO Reset Write/Read
22 FFRE OUT LV FIFO Read Enable
23 FFOE OUT LV FIFO Output Enable
24 CLK20 IN/OUT LV Main Clock output 20.25 MHz
25 GNDPA OUT X Pad Decoupling Circuitry GND
26 V
OUT X Pad Decoupling Circuitry Supply Voltage
SUPPA
27 LLC2 OUT LV Double Clock Output
28 LLC1 IN/OUT LV Clock Output
29 V
30 GND
SUPPLYD X Supply Voltage, LLC Circuitry
SUPLLC
SUPPLYD X Ground, LLC Circuitry
LLC
31 Y7 OUT GNDY Picture Bus Luma (MSB)
32 Y6 OUT GNDY Picture Bus Luma
33 Y5 OUT GNDY Picture Bus Luma
34 Y4 OUT GNDY Picture Bus Luma
35 GNDY SUPPLYD X Ground, Luma Output Circuitry
36 V
SUPPLYD X Supply Voltage, Luma Output Circuitry
SUPY
37 Y3 OUT GNDY Picture Bus Luma
38 Y2 OUT GNDY Picture Bus Luma
39 Y1 OUT GNDY Picture Bus Luma
40 Y0 OUT GNDY Picture Bus Luma (LSB)
41 C7 OUT GNDC Picture Bus Chroma (MSB)
42 C6 OUT GNDC Picture Bus Chroma
43 C5 OUT GNDC Picture Bus Chroma
44 C4 OUT GNDC Picture Bus Chroma
45 V
SUPPLYD X Supply Voltage, Chroma Output Circuitry
SUPC
46 GNDC SUPPLYD X Ground, Chroma Output Circuitry
47 C3 OUT GNDC Picture Bus Chroma
48 C2 OUT GNDC Picture Bus Chroma
49 C1 OUT GNDC Picture Bus Chroma
50 C0 OUT GNDC Picture Bus Chroma (LSB)
51 GNDSY SUPPLYD X Ground Sync Pad Circuitry
52 V
SUPPLYD X Supply Voltage, Sync Pad Circuitry
SUPSY
53 INTLC OUT LV Interlace Output
54 AVO OUT LV Active Video Output
55 FSY/HC/HSYA OUT LV Front Sync/ Horizontal Clamp Pulse/Front-End
Horizontal Sync Output
56 MSY/HS IN/OUT LV Main Sync/Horizontal Sync Pulse
57 VS OUT LV Vertical Sync Pulse
58 FPDAT/VSYA IN/OUT LV Front End/Back-End Data/Front-End Vertical Sync
Output
59 V
SUPPLYA X Standby Supply Voltage
STBYY
60 CLK5 OUT LV CCU 5 MHz Clock Output
61 NC - LV or GNDD Not Connected
62 XTAL1 IN X Analog Crystal Input
63 XTAL2 OUT X Analog Crystal Output
64 ASGF X Analog Shield GND
F
65 GNDF SUPPLYA X Ground, Analog Front-End
66 VRT OUTPUT X Reference Voltage Top, Analog
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67 I2CSEL IN X I2C Bus Address Select
68 ISGND SUPPLYA X Signal Ground for Analog Input, connect to GND
69 V
SUPPLYA X Supply Voltage, Analog Front-End
SUPF
F
70 VOUT OUT LV Analog Video Output
71 CIN IN LV Chroma/Analog Video 5 Input
72 VIN1 IN VRT Video 1 Analog Input
73 VIN2 IN VRT Video 2 Analog Input
74 VIN3 IN VRT Video 3 Analog Input
75 VIN4 IN VRT Video 4 Analog Input
76 V
SUPPLYA X Supply Voltage, Analog Component Inputs Front-End
SUPAI
77 GNDAI SUPPLYA X Ground, Analog Component Inputs Front-End
78 VREF OUTPUT X Reference Voltage Top, Analog Component Inputs
Front-End
79 FB1IN IN VREF Fast Blank Input
80 AISGND SUPPLYA X Signal Ground for Analog Component Inputs, connect
to GND
AI
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13. SERVICE MENU SETTINGS
To enter the service menu, first enter the MENU by pressing “ ” button and then press the digits 4, 7,
2 and 5 respectively.
13.1. Service Menu Items
13.1.1. Picture Adjust
x Source => All possible sources given with the chasis as a list.
x Mode => Three items as a list; NATURAL, DYNAMIC, CINEMA
x Colour Temp => Three items as a list; COOL, NORMAL, WARM
x Contrast => Slider Bar. Changing value between 0 to 63.
x Brightness => Slider Bar. Changing value between 0 to 63.
x Sharpness => Slider Bar. Changing value between 0 to 16.
x Colour => Slider Bar. Changing value between 0 to 99.
x R => Slider Bar. Changing value between 0 to 100.
x G => Slider Bar. Changing value between 0 to 100.
x B => Slider Bar. Changing value between 0 to 100.
In this menu preset values for each Mode (Contrast, Brightness, Sharpness, Colour values for each
Mode-NATURAL, DYNAMIC, CINEMA) and for each Colour Temp. (R, G, B values for each Colour
Temp- COOL, NORMAL, WARM) are determined for each source.
13.1.2. SOUND1
x Menu Subwoofer => If ON, Subwoofer option is available in TV set, and the item
is visible in sound menu, else Subwoofer is not available.
x Subwoofer Level (dB) => This value is gain value of Subwoofer output in dB. -30...12
x Subwoofer Corner Freq. (x10Hz) => Last low frequency value that is amplified. 5...40
x Menu Dolby Prologic => No functionality now.
x Menu Equalizer => If ON, visible in sound menu, else invisible.
x Menu Lineout => No functionality now.
x Menu Headphone => If ON, visible in sound menu, else invisible.
x Menu Hyper Sound => If ON, visible in sound menu, else invisible.
x Menu Wide Sound => If ON, visible in sound menu, else invisible.
x Menu Dynamic Bass => If ON, visible in sound menu, else invisible.
x Menu Virtual Dolby => If ON, visible in sound menu, else invisible.
x Carrier Mute => If ON, in the absence of an FM carrier the output is muted,
else not.
x Virtual Dolby Text => Active if VIRTUAL DOLBY is ON. According to the
selection; seen in sound menu as 3D PANORAMA or VIRTUAL DOLBY.
13.1.3. SOUND 2
x AVL => AVL is controlled from this menu by service user. ON/OFF
x Menu AVL => If ON, AVL item is visible in sound menu, and AVL can be
controlled from sound menu by normal user, else AVL is invisible to normal user.
FM PRESCALE AVL ON => If AVL ON, set value in this item is used as
x
prescale value for the related standard. 0...127
x NICAM PRESCALE AVL ON => If AVL ON, set value in this item is used as
prescale value for the related standard. 0...127
x SCART PRESCALE AVL ON => If AVL ON, set value in this item is used as
prescale value for scart outputs. 0...127
x SCART VOLUME AVL ON => If AVL ON, set value in this item is used as volume
value for scart1 and scart2. 0...127
x FM PRESCALE AVL OFF => If AVL OFF, set value in this item is used as
prescale value for the related standard. 0...127
x NICAM PRESCALE AVL OFF => If AVL OFF, set value in this item is used as
prescale value for the related standard. 0...127
x SCART PRESCALE AVL OFF => If AVL OFF, set value in this item is used as
prescale value for scart outputs. 0...127
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x SCART VOLOUME AVL OFF => If AVL OFF, set value in this item is used as
volume value for scart1 and scart2. 0...127
13.1.4. Options
x Screen Saver =>
x FIRST APS => If ON, first APS menu is opened when the TV opened with
the factory default settings.
x APS VOLUME => After First APS function finishes, the volume of the TV is
that value.
x AGC => Tuner AGC value.
x Factory Reset => OK to activate. When OK pressed on this item, factory
defaults loaded.
x Enter Flash Mode =>
13.1.5. TV Norm
x BG => If ON, supported, else not supported
x DK => If ON, supported, else not supported.
x I => If ON, supported, else not supported.
x L => If ON, supported, else not supported.
x LP => If ON, supported, else not supported.
x M => If ON, supported, else not supported.
13.1.6. Features
x PIP/PAP => If ON, PIP/PAP available else not.
x Blue Background => If ON, Blue Background is visible in Features Menu else
not.
x Menu Transparency => If ON, Menu Transparency is visible in Features Menu else
not.
x Menu Timeout => If ON, Menu Timeout is visible in Features Menu else not.
x Backlight => If ON, Backlight is visible in Features Menu else not.
x Single Tuner =>
13.1.7. Teletext
x Teletext Language => Teletext Language may be controlled from this menu by
service user.
x Menu Teletext Language => If ON, Teletext Language item is visible in Features Menu,
and Teletext Language can be controlled from Features Menu by normal user, else Teletext
Language is invisible to normal user.
13.1.8. Source
x TV
x SC1
x SC2
x SC2 SVHS
SC3
x
x SC3 SVHS
x YPBPR
x FAV
x SVHS
x HDMI
x PC
This menu is related with the options of the chassis. These items may be ON or OFF. If ON, the source
is available in TV set, and the item is visible in source menu, else the source may be available but
invisible to user.
38
Page 43
42PD6600
A2 Plasma Panel
Power Supply MPF7423
VS30040700
XSUS PCB
FPF28RXSS0026
YSUS PCB
FPF28RXSS0027
MAIN PCB 17MB15
VS20257945
AUDIO PCB
18AMP05
VS20217003
FILTER PCB
VS20225622
Page 44
42PD6600
A2 Plasma Panel
Located behind the MAIN PCB
LOGIC PCB
FPF28RLGC004502
ABUS- L PCB
FPF28RABL0019
ABUS-R PCB
FPF28RABR0020
Page 45
42PD6600A
A3 Plasma Panel
YSUS PCB
TS06288
Power Supply MPF7423D
VS30043468
MAIN PCB 17MB15
VS20255768
XSUS PCB
TS06287
AUDIO PCB
18AMP05
VS20217003
XBUS
TS06292
FILTER PCB
VS20225622
Page 46
42PD6600A
A3 Plasma Panel
Located behind the MAIN PCB
LOGIC PCB
TS06293
ABUS- L PCB
TS06289
ABUS-R PCB
TS06291
Page 47
15. BLOCK DIAGRAM
Page 48
TUNER/IF/AUDIO - 1
Page 49
VIDEO SWITCH TEA6415C
SC1_V_IN
TUN1_CVBS
AV1_V_IN
VCC_8V
SC3_V_IN
PL201
SC2_V_IN
VCC_8V
SVHS_Y_IN
1
2
3
4
5
6
7
8
R203
75R
R204
75R
R201
75R
100u
16V
R202
75R
C274
N.C
220n
16V
C285
C292
R200
R205
R206
39p
50V
100R
SDA
C260
N.C
220n
16V
39p
50V
R207
100R
SCL
N.C
C259
39p
50V
75R
N.C
C280
39p
50V
75R
S200
C288
CONNECT
220n
C297
39p
50V
N.CN.C
16V
L200
C283
22u
50V
C291
220n
C268
39p
50V
16V
C261
BZT55C5V1
D215
A1K
A1K
2
A1K
D216
C303
47p
C287
47p
C265
220n
16V
C279
220n
16V
N.C
S201
220n
C273
C299
150p
50V
2
2
D217
R232
75R
L202
1 INPUT1
2 DATA
25V
3 INPUT2
4 CLOCK
25V
5 INPUT3
6 INPUT4
7 PROG
8 INPUT5
9 VCC
16V
10 INPUT6 11INPUT7
C263
39p
1n
L201
1n
C272
50V
EXTERNAL INPUT
STBY_5V
S630
CHROMA_SW
DISP_EN/PDWN
LED1
LED2
STBY_3V3
S637
A01
S631
gnd
A12
A23
4k7
R246
4k7
R248
4k7
R265
4k7
R277
P04
P15
P26
P37
VSS8P49
gnd
IC210
TEA6415C
SVHS_Y_IN
220n
C262
C271
IC213
PCF8574
CIN
AV_AUDIO_R_IN
AV_AUDIO_L_IN
VDD 16
SDA 15
SCL 14
INT 13
AV1_V_IN
P7 12
P6 11
P5 10
39p
C304
75R
R264
IDTV/MMC/DVD_CVBS
C282
20INPUT8
220n
16V
19GND2
10k
R220
R226
18OUTPUT6
17OUTPUT5
16OUTPUT4
15OUTPUT3
14OUTPUT2
13OUTPUT1
12GND1
100R
10k
R221
R227
100R
10k
R222
R228
100R
R230
100R
10k
R223
10k
R224
10k
R225
C275
220n
16V
C276
R1033
100R
R2001
100R
TUN2_CVBS
39p
R231
75R
N.C
MMC_CVBS
MMC/DVD
VIDEO INPUTS
PL1
C290
gnd
100n
16V
STBY_3V3
SDA3
330R
R255
330R
R256
STBY_3V3
SCL3
S223
S224
4k7
R257
4k7
R258
4k7
R259
VCC_8V
V8
Q200
BC848B
V8
Q203
BC848B
V8
Q201
BC848B
V8
Q202
BC848B
V8V8
Q1004
BC848B
Q2000
BC848B
S212
DVD_12V_SENSE
S213
MMC_CVBS
12345
STBY_5V
S222
4k7
R278
4R7
R229
MMC_B
10u
NVM_WP
C294
C298
R235
75R
1k
R239
1k
R241
R234
75R
1k
R236
R237
75R
1k
R242
IDTV/MMC/DVD_CVBS
MMC_R
MMC_G
6
LG_1/IRQPDP
R240
75R
R1046
75R
R1045
1k
R2002
75R
R2003
1k
SEL
VPC_OE
100n
16V
MAIN PICTURE
TO SVP
V8
CVBS_SVP
VxtoVPC
GOES TO VPC3230
FOR PIP PICTURE
SEL_V_OUT
GOES TO MCU FOR
TXT/CC/V-CHIP
DECODING
SC2_V_OUT
SELECTABLE VIDEO OUT
FOR SCART 2
SC1_V_OUT
SC3_V_OUT
CHROMA SWITCH
EXISTS IN WO/PIP OPTION
C245
R270
CIN
CHROMA_SW
100R
220n
16V
C2050
PL200
A
C301
330R
R249
BZT55C10
C2049
100n
16V
50V
D223
Q207
BC848C
1
D2101
BZT55C10
150p
C270
2
K
SC2_AUDIO_R_OUT
SC2_AUDIO_R_IN
SC2_AUDIO_L_OUT
A1K
PC_STBY
SC2_AUDIO_L_IN
PIN8_SC2
SC2_B/HD_PB1
TV_LINK
SC2_G/HD_Y1
SC2_R/HD_PR1
SVHSfromSC2_C
SC2_FB
SC2_V_OUT
SC2_V_IN
DISP_EN/PDWN
12345678910
5V
LG_1/IRQPDP
VCC_12V
PANEL_VCC
S109
S642
S643
1112
VCCA_3V3 VCCA_3V3
VCCA_3V3
S111
S112
S113
CPU_GOPDP_GO
VCC_12V
1314
1516
1718
4k7
4k7
R251
1920
2122
R250
SCL_PANEL
SDA_PANEL
S638
S639
S641
2324
2526
2728
2930
PANEL_VCC
S640
N.C
D2000
A1K
BZT55C10
SC3_V_IN
SC3_V_OUT
2
50V
150p
150p
C2038
C2039
PL103
25
S646
S647
TXOUT1-
TXOUT3-
TXOUT3+
TXCLKOUT+
TXOUT2-
TXOUT1+
TXOUT2+
TXCLKOUT-
TXOUT0-
TXOUT0+
PARITY
LVDS OUTPUT
50V
BZT55C10
A1K
D214
V8
S635
10k
R267
Q204
BC848C
47k
R268
SVHSfromSC2_C
R269
47k
100n
16V
DDC_CLK_PC
15
14
13
DDC_DATA_PC
12
11
10
9
8
7
6
5
4
3
2
1
DDC_5V
PGAGND
VGA_HSIN
75R
R208
75R
R209
75R
R210
18k
R266
C246
220n
16V
10k
R273
1k
R274
Q206
BC848C
2k
2k
R212
R211
2
2
K
K
D2501
D2502
BZT55C12
BZT55C12
A
1
A
1
R214
22R
VCC_5V
Q205
BC848C
S633
C_SELECTED
S634
R215
22R
IC211
1A1
SDA_PANEL SCL_PANEL
21Y
R213
22R
32A
74LVC14A
42Y
53A
63Y
I2C BUFFER FOR PANEL
IC215
1 NC1
SDA3
2 NC2
S645
ST24LC21
3 NC3 6SCL
4 VSS
14VCC
136A
126Y
115A
105Y
94A
VCCA_3V3
100n
C289
16V
VGA_VSIN
22R
R238
VGA_VSIN
DDC_CLK_PC
DDC_DATA_PC
8VCC
VCC_5V
7VCLK
5SDA
SCL3
S644
10k
R217
10k
R216
7 GND 84Y
PGAGND
23
24
22
4
2
3
1
150p
C252
2
K
150p
C250
D212
A
1
2
SC1_V_IN
C302
R260
75R
R261
75R
SC1_FB
SC1_V_OUT
1N4148
D200
1N4148
D201
100n
16V
IC212
8 VCC
7 VCLK
100R
R218
100R
R219
ST24LC21
5 SDA
SVHSfromSC2_C
PIN8_SC3
SC3_AUDIO_L_IN
D2004
2
BZT55C10
A
1
4n7
C2044
L2005
A
1
D2001
2
K
27
28
26
6
5
2
K
D210
A
1
D2002
BZT55C10
2
K
S636
35
33
31
29
30
8
9
7
2
K
D209
A
1
SC1_R/COMP1_CR_IN
34
32
14
12
10
13
11
2
K
D206
BZT55C10
A
1
S221
S220
A
1
D219
SC1_G/COMP1_Y_IN
2
K
SCSDA
SCSCL
SC3_AUDIO_L_OUT
BZT55C10
A1K
2
D2105
330R
R2024
C2040
1n
L2003
L2008
39
37
38
36
18
16
17
15
2
K
2
K
D204
D202
A
1
A
1
50V
4n7
1
A
C269
D220
K
2
BZT55C10
2
A1K
D224
PIN8_SC1
SC1_B/COMP1_CB_IN
SC3_AUDIO_R_OUT
2
A1K
330R
R2025
L2007
L2004
41
42
40
L213
20
21
19
L208
L210
1n
L205
C296
330R
R254
BZT55C10
2
D2500
150p
C278
SC1_AUDIO_L_IN
SC1_AUDIO_L_OUT
BZT55C10
D2104
50V
1n
C2042
A1K
PL205
A1K
SC3_AUDIO_R_IN
PL203
D2003
A1K
2
BZT55C10
4n7
C2045
L2006
A
1
D222
C258
4n7
50V
BZT55C10
2
L204
L206
1n
50V
330R
R252
D2102
2
BZT55C10
C286
150p
50V
SC1_AUDIO_R_OUT
K
C267
A1K
SC1_AUDIO_R_IN
1
2
3
4
L211
5
L212
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
50V
D221
A1K
BZT55C10
C284
4n7
L207
50V
L209
R253
330R
150p
C277
C264
1n
50V
L214
4n7
2
A1K
A1K
2
A1K
2
D207
2
D208
S204
S205
75R
R275
150p
2
C248
D218
2
2
K
N.C
D213
BZT55C10
A
1
C253
150p
1n
50V
2
L203
BZT55C10
1K2
A
D2103
2
C266
D203
D205
BZT55C5V1 D2100
A1K
C293
150p
75R
A1K
R276
A1K
D211
IC214
1Q1
100n
100n
C2051
C2052
2Q2
150k
R280
3Q3
10k
R281
4Q4
74HC595D
5Q5
6Q6
7Q7
8 GND 9Q7OUT
VGA_VSIN
VCC_5V
DDC_5V
1NC1
2NC2
3NC36 SCL
4VSS
16VCC
15Q0
100n
C281
R279
10k
14DSERIAL
STBY_5V
100n
C2053
13OE
12STOP
11SHCP
10MR
VCCA_3V3
R283
10k
R282
R284
VGA_HSIN
10k
Q208
BC848C
47k
PC STAND-BY
PORT EXPANDER
D-SUB 15 PC INPUT & DDC CIRDUIT
VGA_BIN
VGA_RIN
VGA_GIN
Page 50
RCA_Y
1 NC1
2 NC2
3 NC3
4 NC4
5 NC5
6 NC6
7 NC7
8 NC8
9 NC9
10 NC10
11 NC11
PL301
1
2
3
4
RCA_PB
C363
C364
220n
220n
R331
75R
C356
220p
WHITE_FAV
30032233Pb30032234
50V
C365
JK300
S303
42C6
23 FFOE
24 CLK20 41C7
S302
VCCD2_3V3
50V
68n
C343
46GNDC
47C3
18 YCOEQ
19 FFIE
S301
VPC_OE
VCCD2_3V3
L314
BLM21B201S
44C4
20 FFWE 45VSUPC
21 FFRSTW
43C5
22 FFRE
VCC_5V
C331
10u
C330
20.25MHz
X300
63XTAL2
2G1/Y1IN
50V
3p3
50V
61NC2
62XTAL1
3 R1/CR1IN
4 B2/CB2IN
I2S_DA_IN1
I2S_DA_OUT
I2S_CL
I2S_WS
L2009
SCL SDA
100R
R2026
R2027
44SCL
100R
43SDA
7
R1R2R3
10R
R2028
1823
41
42ADR_SEL
I2S_DEL_OUT1
6
39I2S_DEL_CL
40
I2S_DEL_IN1
BLM21B201S
C2046
5
10u
R4
50V
4
C2047
10n
50V
36DVSS1
37DVSUP1
38I2S_DEL_WS
C2048
100n
25V
35TEST
RESETQ_MSP
34RESETQ
VCC_5V
33NC25
L308
BLM21B201S
32NC24
31NC23
30NC22
IC2001
MAD4868A
29NC21
28NC20
VxtoVPC
SVHSfromSC2_C
CIN
27NC19
26NC18
25NC17
24NC16
23NC15
I2S_DEL_OUT214I2S_DEL_OUT315I2S_DEL_OUT4
12 NC12
13
S325
S326
SUBW
RCA_PR
220n
VCC_5V
16 DVSUP2
17 DVSS2
AUDIO_R_LINE_OUT
AUDIO_L_LINE_OUT
BAV99
D106
BAV99
D104
BAV99
D102
I2S_DEL_IN219I2S_DEL_IN320I2S_DEL_IN4
18
21 NC13
22 NC14
VCC_5V
L300
100u
C348
C350
16V
N.C
FB_VPC
RGB_B_VPC
RGB_G_VPC
RGB_R_VPC
75R
R304
75R
R305
75R
R306
16V
390p
C349
1n8
50V
50V
75R
75R
75R
C305
S316
50V
R301
330p
C311
75R
R312
50V
R302
330p
C312
75R
R313
50V
R303
330p
C313
75R
R314
220n
C361
75R
R307
75R
R300
C306
C316
47n
25V
N.C
N.C
N.C
STBY_5V
16V
220n
C318
50V
1n5
C319
50V
390p
C320
C317
10u
50V
25V
47n
65 GNDF
C323
66 VRT
67 I2CSEL
68 ISGND
69 VSUPF
70 VOUT
C321
71 CIN
1n
72 VINI
C322
1n
73 VIN2
680n
74 VIN3
75 VIN4
76 VSUPAI
77 GNDAI
78 VREF
10u
50V
79 FB1IN
80 AISGND
16V
220n
C327
16V
220n
C328
16V
220n
C329
L2010
BLM21B201S
3p3
50V
64ASGF2
1 B1/CB1IN
N.C
330p
C308
R332
75R
C357
50V
220p
123
123
A
A
WHITE_FAV
1P_RED_FAV
JK301
Y
Pr
JK302
R333
75R
C358
50V
220p
123
A
YPBPR_AUDIO_L_IN
YPBPR_AUDIO_R_IN
S330
S331
2
K
D225
BZT55C10
L316
A
1
BLM21A601S
BACK LEFT
JK303
L AUDIO FAV
L317
BLM21A601S
50V
470p
C359
C360
123
123
A
A
JK304
R AUDIO FAV
AUDIO_L_LINE_OUT
AUDIO_R_LINE_OUT
S323
S324
2
K
D226
BZT55C10
A
1
50V
470p
BACK RIGHT
MMC_B
MMC_G
MMC RGB INPUTS SCART RGB
MMC_R
R309
75R
R310
75R
R311
75R
50V
N.C
330p
C309
50V
N.C
330p
C310
50V
C324
220n
16V
C325
220n
16V
16V
C326
220n
25V
C332
2n2
60CLK5
5G2/Y2IN
C333
VCC_5V
L311
59VSTBY
6 R2/CR2IN
L312
DVS_2EX
BLM21B201S
10k
R315
58FPDAT
22R
57VS
R316
DHS_2EX
R2032
33R
R2031
33R
R317
22R
56MSY/HS
VCCD2_3V3
54AVO
55FSY/HC
L313
IC216
VPC323XD
7ASGF1
8 NC1
9 VSUPCAP
10 VSUPD
11 GNDD
50V
270p
C334
25V
560p
C335
16V
100n
C336
bu caplerin yerine tek 100nf takabilirsin.
BLM21B201S
VCCD2_3V3
50V
390p
C337
50V
1n5
C338
16V
220n
C339
BLM21B201S
25V
47n
C340
50V
1n5
C341
52VSUPSY
53INTLC
12 GNDCAP
13 SCL
R318
SCL3 100R
50C0
51GNDSY
14 SDA
15 RESQ
100R
100R
R319
RST#
SDA3
R320
C342
220n
16V
N.C
49C1
16 TEST
48C2
17 VGAV
S300
VCCD_3V3
IC316
RGB_SW3
SC1_R/COMP1_CR_IN
SC2_R/HD_PR1
RGB_R_VPC
SC1_G/COMP1_Y_IN
SC2_G/HD_Y1
RGB_G_VPC
R2030
1k
1A
2B
3C
4D
5E
6F
7G 10J
8H
PI5V330_SOIC
C362
16R
100n
15O
14N
13M
SC2_FB
12L
11K
9I
VCC_5V
SC1_FB
FB_VPC
SC1_B/COMP1_CB_IN
SC2_B/HD_PB1
RGB_B_VPC
RGB SWITCHING FOR VPC
R322
33R
18
100n
2
3
4
L2011
BLM21B201S
18
2
3
4
C346
BLM21B201S
R1
R2
R3
R4
R323
33R
R1
R2
R3
R4
L315
7
6
5
7
6
5
40Y0
39Y1
38Y2
37Y3
C344
36VSUPY
35GNDY
100n
16V
34Y4
33Y5
32Y6
31Y7
30GNDLLC
29VSUPLLC
28LLC1
27LLC2
R324
22R
R321
22R
16V
26VSUPPA
25GNDPA
50V
1n5
C345
47n
25V
SC1_R/COMP1_CR_IN
SC2_R/HD_PR1
SC1_G/COMP1_Y_IN
SC2_G/HD_Y1
RCA_PR
RGB_RIN
RCA_Y
RGB_GIN
C347
RGB_SW2
RGB_SW1
75R
R327
S336
R326
S337
75R
R328
DIN[0]
DIN[1]
DIN[2]
DIN[3]
VCCD2_3V3
DIN[4]
DIN[5]
DIN[6]
DIN[7]
VCCD2_3V3
R2029
SVP ENTEGRESINE
DIN[0-23]
CLK_2EX
10k
IC317
R325
1k
S310
S311
1k
1A
2B
3C
4D
5E
6F
7G 10J
8H
R_OUT
G_OUT
1A
2B
3C
S308
4D
5E
6F
S307
7G 10J
8H
PI5V330_SOIC
IC318
PI5V330_SOIC
16R
100n
C352
15O
14N
13M
16V
SC2_FB
S340
12L
11K
9I
16R
15O
S312
B_OUT
C353
100n
14N
13M
S314
12L
11K
S309
9I
S338
R329
75R
VCC_5V
SC1_FB
SC1_B/COMP1_CB_IN
SC2_B/HD_PB1
FBO
VCC_5V
FB
RCA_PB
RGB_BIN
RGB SWITCHING FOR SVP
Page 51
100n
C440
16V
C2206
C438
MLF1
2n7
50V
PAVDD2
100n
16V
C2207
C2208
C439
PLF2
2n7
50V
PDVDD
100n
100n
100n
100n
16V
16V
C2218
C2217
C2216
VGA_GIN
VGA_BIN
VGA_RIN
RGB_GIN
RGB_RIN
RGB_BIN
VCCA_3V3
10k
MPUCSON MPUGPIO4
SDA_EX
SCL_EX
R423
1k
R424
C410
C412
68p
16V
R425
R426
C455
16V
C2219
R406
75R
R407
75R
R408
75R
C_SELECTED
CVBS_SVP
S425
S426
S427
VCCA_3V3
10k
10k
R413
68R
R414
68R
68p
VL1_8PAVDD1
R435
22R
100n
100n
100n
100n
C444
16V
16V
C2203
C2204
100n
100n
16V
10u
100n
16V
C2210
26R_100MHZ_1.5A
L407
C459
Y_G2
PB_B2
PR_R2
C403
16V
C404
16V
C405
16V
16V
100n
100n
100n
100n
C2209
16V
16V
16V
10u
16V
16V
C2205
R436
22R
100n
C443
10u
16V
16V
C2211
VL1_8
MCA[0-19]
PC INPUT [VGA]
75R
C402
100n
16V
Y_G1
PR_R1
PB_B1
C401
C
100n
MAIN PICTURE
C400
100n
16V
R400
75R
CVBS3
CVBS_SVP
S430
R401
S431
R402
75R
C406
100n
16V
R403
75R
100n
C407
16V
R404
75R
100n
C408
16V
R405
75R
MAIN RGB INPUT
VDDL
100n
C431
16V
150R 600mA lik ferit
L400
100n
16V
16V
VCCA_3V3
SDA3
100n
100n
16V
C2213
C2212
SCL3
VDDH
C2220
C2254
100n
100n
16V
16V
C2221
100n
C421
100n
16V
16V
C2222
100n
16V
16V
C2214
C2215
100n
16V
C423
10u
16V
R2210
10k
R432
10k
R433
10k
MCA[14]
MCA[15]
MCA[0]
MCA[1]
MCA[2]
MCA[3]
MCA[4]
MCA[5]
MCA[6]
MCA[7]
CVBS2
26R_100MHZ_1.5A
L401
C433
10u
FB
CLK_2EX
DHS_2EX
ODD_PINK
DIN[7]
DIN[6]
R431
22R
R430
22R
R429
22R
S110
123456789
PL104
DIN[5]
DIN[7]
DIN[6]
DIN[5]
DIN[4]
DIN[4]
DIN[3]
DIN[2]
DIN[1]
DIN[3]
DIN[2]
DIN[1]
DIN[0]
101112
DIGITAL IDTV INPUTS [ITU 601]
S413
S411
193
MPUGPIO0
16V
100n
C413
INT#
50V
20p
C414
50V
20p
C415
C2403
S439
S438
100n
FB_CONTROL
C473
X400
16V
R428
Q402
S445
16V
1k
BC848B
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
10u
14.31818MHz
A_D0
A_D1
A_D2
A_D3
VDDC12
VSSC12
A_D4
A_D5
A_D6
A_D7
VDDH5
VSSH5
ADDR0
ADDR1
ADDR2
ADDR3
ADDR4
ADDR5
ADDR6
ADDR7
VDDC11
VSSC11
RD
WR
ALE
MPUCSON
INT
AVDD_ADC3
AVSS_ADC3
VREFN_3
VREFP_3
PR_R1
PR_R2
AVDD_ADC2
AVSS_ADC2
VREFN_2
VREFP_2
C
PB_B1
PB_B2
AVDD3_AVSP2
AVSS3_BG_ASS
CVBS_OUTP
CVBS_OUTN
AVDD_ADC1
AVSS_ADC1
VREFN_1
VREFP_1
CVBS1
CVBS2
CVBS3
AIN_N1
Y_G1
AIN_N2
Y_G2
AIN_N3
VSSC13
VDDC13
PDVDD
PDVSS
PAVDD
PAVSS
XTALI
C2404
MCAD[0-7]
STBY_3V3
PR_R1
PR_R2
C
PB_B1
PB_B2
CVBS2
CVBS3
Y_G1
Y_G2
C2400
S442
MCAD[0]
MCAD[1]
MCAD[2]
MCAD[3]
MCAD[4]
MCAD[5]
MCAD[6]
MCAD[7]
AVDD_ADC1
100n
C409
100n
VD1_8
16V
VD1_8
C2401
STBY_3V3
R439
VD1_8
100n
C411
AVDD_ADC3
AVDD_ADC2
AVDD3_AVSP2
100n
16V
1k
C472
Q401
BC848B
VREFN_3
VREFP_3
VREFN_2
VREFP_2
R427
VREFN_1
VREFP_1
PDVDD
PAVDD
C2402
R440
100n
1R
RD_EMU
WR_EMU
ALE_EMU
MPUCSON
75R
100n
16V
10p
S441
DIN[0]
VD1_8
SC2_FB_SVP
S437
190
191
192
NC
MPUGPIO2
MPUGPIO1
MLF12PAVDD1
XTALO
3
1
MLF1
PAVDD1
STBY_3V3
MPUGPIO4
186
187
188
189
VSSH4
VDDH4
MPUGPIO4
MPUGPIO3
PAVSS2
PLF25PAVDD2
PAVSS1
7
6
4
PLF2
PAVDD2
AVDD3_AVSP2
VD1_8
183
184
185
VSSC10
VDDC10
VDDC1
VSSC1
9
8
10
R418
100n
16V
C2223
C418
100n
16V
MD[30]
MD[31]
181
182
MD30
MD31
VSSC9
TESTMODE11AIN_VS
AIN_HS
12
R419
22R
22R
VGA_HSIN
VGA_VSIN
4k7
C420
VD1_8
100n
MD[29]
179
180
MD29
VDDM16
RST_H
SCL_EX
R420
C422
L417
VCC_5V
C2224
16V
MD[28]
178
MD28
100n
DQM[3]
177
DQM3
SDA_EX
16V
BLM21B201S
100n
176
17
VDDMQ_2V5
16V
100n
C424
DQS[3]
173
174
175
DQS3
VSSM16
VDDM15
VDDH1
FLD_IO
PWM16SDA15V5SF14SCL13RESET
19
18
VDDH
PARITY
16V
C2225
VD1_8
C425
100n
16V
MD[20]
MD[21]
MD[22]
MD[23]
MD[24]
MD[25]
MD[26]
MD[27]
160
161
162
163
164
165
166
167
168
169
170
171
172
MD20
MD21
MD22
MD23
MD24
MD25
MD26
MD27
VSSM15
VDDM14
VDDC9
VSSM14
VSSC8
VDDM13
IC224
SVP_EX_51
LVDSGND
TC1-30TC1+29TCLK-
TCLK+
TD1-26TD1+
PLL_GND
PLL_VCC
VSSH1
32
31
28
27
25
24
23DE22V21H20
TXOUT3+
TXOUT3-
TXCLKOUT+
TXCLKOUT-
TXOUT2+
TXOUT2-
LVDS OUT
S440
SC2_FB_SVP
10k
R2211
100n
C430
16V
C426
C427
TXCLKOUT+
TXCLKOUT+
100n
100n
100n
R2212
16V
TXCLKOUT-
10k
10u
16V
VCCA_3V3
TXCLKOUT-
150R 600mA lik ferit
DHS_2EX
DVS_2EX
S415
DE_2EX
DIGITAL SINC
100n
C2226
16V
DQM[2]
158
159
DQM2
VSSM13
TB1-36TA1+
TB1+33LVDSVCC
35
34
TXOUT1+
TXOUT1-
AVDD_ADC2
L402
C432
VDDMQ_2V5
DQS[2]
155
156
157
DQS2
VSSM12
VDDM12
TA1-38LVDSVDDP
37
R422
TXOUT0+
TXOUT0-
100n
100n
C434
C435
VD1_8
CAS#
BA0
R2215
145
146
BA0
VSSC7
CLKE
33R
144
CLKE
WE#
R1R2R3
R2213
1823
141
142WE143
VSSR
VDDC7
765
MVREF
139
140
MVREF
C428
100n
MD[19]
154
MD19
153
VD1_8
MD[17]
MD[18]
150
151
152
MD17
MD18
VSSM11
VDDM11
MD[16]
148
149
MD16
VDDC8
R2216
147
BA1
33R
BA1
GPO40VDDC241VSSC242DIN1943DIN1844DIN1745DIN1646DIN1547DIN1448DIN1349DIN1250VDDH251VSSH252DIN1153DIN1054DIN9
39
10k
DIN[19]
DIN[18]
DIN[17]
DIN[16]
DIN[15]
DIN[14]
DIN[13]
DIN[12]
DIN[9]
DIN[10]
DIN[11]
VCCA_3V3
C429
100n
16V
VD1_8
100n
16V
C2227
VCCA_3V3
C436
100n
16V
VDDH
100n
100n
16V
C2230
16V
C2229
C2228
RAS#
CS0#
R4
4
135
136
137
138
RAS
CAS
VDDR
VDDM10
DIN856CLK
DIN758DIN659DIN560DIN461DIN362DIN263DIN1
55
57
DIN[8]
DIN[7]
DIN[6]
33R
R2217
R2218
33R
CLK_2EX
100n
C465
16V
PAVDD
R2214
18
2
3
4
132
133
134
CS1
CS0_
VDDM9
DIN[5]
DIN[4]
DIN[3]
100n
16V
C2235
R1
7
R2
6
R3
5
R4
MCLK0
MCLK0#
129
130
131
MCK0
MCK0_
VSSM10
64
DIN[2]
DIN[1]
DIN[0]
10u
16V
100n
C2236
VDDMQ_2V5
VSSM9
VDDL
VSSL
MA0
MA1
VDDM8
MA2
MA3
VSSM8
MA4
VDDM7
MA5
MA6
VSSM7
MA7
MA8
VDDC6
MA9
MA10
VSSC6
MA11
MD15
VDDC5
MD14
VSSM6
MD13
VDDM6
MD12
VSSM5
DQS1
VDDM5
VSSM4
DQM1
MD11
VDDM4
MD10
MD9
VSSC5
MD8
MD7
VDDC4
MD6
VSSM3
MD5
VDDM3
MD4
VSSM2
DQS0
VDDM2
VSSM1
DQM0
MD3
VDDM1
MD2
MD1
VSSC4
MD0
DIN20
DIN21
DIN22
DIN23
VSSC3
VDDC3
VSSH3
VDDH3
DIN0
26R_100MHZ_1.5A
L409
C468
100n
ODD_PINK
C2237
C437
16V
IC107
74LX1G86STR
11A
21B
3GND
41Y
C470
100n
16V
VDDL
100n
VD1_8
C448
100n
16V
C449
100n
16V
C450
16V
C2232
100n
16V
C2240
26R_100MHZ_1.5A
C451
C469
16V
VREFP_1
100n
L408
C471
100n
16V
VD1_8
16V
100n
C456
100n
16V
100n
16V
16V
C2233
100n
16V
C2241
R434
1k
100n
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
100n
C2238
C446
100n
MD[15]
MD[14]
MD[13]
MD[12]
DQS[1]
DQM[1]
MD[11]
MD[10]
MD[9]
MD[8]
MD[7]
MD[6]
MD[5]
MD[4]
DQS[0]
DQM[0]
MD[3]
MD[2]
MD[1]
MD[0]
AVDD_ADC3
AVDD_ADC1
VA1_8
100n
C447
16V
DIN[20]
DIN[21]
DIN[22]
DIN[23]
VDDH
100n
C2231
C2239
100n
C466
10u
5VCC
DVS_2EX
VCCA_3V3
VDDMQ_2V5
MA[0]
MA[1]
MA[2]
MA[3]
MA[4]
MA[5]
MA[6]
MA[0-11]
MA[7]
MA[8]
MA[9]
MA[10]
MA[11]
VDDMQ_2V5
VD1_8
VDDMQ_2V5
100n
C452
VD1_8
VREFN_1
C457
100n
16V
100n
16V
VREFP_2
100n
C2234
C2242
16V
100n
C460
100n
16V
100n
16V
VL1_8
C462
16V
100n
C442
10u
16V
16V
100n
C454
10u
16V
16V
VREFN_2
100n
16V
2u2
L404
C445
26R_100MHZ_1.5A
L406
C458
MD[0]
MD[1]
MD[2]
MD[3]
MD[4]
MD[5]
MD[6]
MD[7]
MD[8]
MD[9]
MD[10]
MD[11]
MD[12]
MD[13]
MD[14]
MD[15]
MD[16]
MD[17]
MD[18]
MD[19]
MD[20]
MD[21]
MD[22]
MD[23]
MD[24]
MD[25]
MD[26]
MD[27]
MD[28]
MD[29]
MD[30]
MD[31]
DQM[0]
DQM[1]
DQM[2]
DQM[3]
DQS[0]
DQS[1]
DQS[2]
DQS[3]
DIN[0]
DIN[1]
DIN[2]
DIN[3]
DIN[4]
DIN[5]
DIN[6]
DIN[7]
DIN[8]
DIN[9]
DIN[10]
DIN[11]
DIN[12]
DIN[13]
DIN[14]
DIN[15]
DIN[16]
DIN[17]
DIN[18]
DIN[19]
DIN[20]
DIN[21]
DIN[22]
DIN[23]
C463
VREFP_3
100n
VA1_8
16V
VA1_8
DQM[0-3]DQS[0-3]
DIN[0-23]
VREFN_3
100n
C467
16V
Page 52
MD[0-31]
MD[16]
WE#
CAS#
RAS#
CS0#
MD[27]
MD[26]
MD[25]
MD[24]
MD[23]
MD[22]
MD[21]
MD[20]
MD[19]
MD[18]
MD[17]
DQS[0]
DQS[1]
DQS[2]
DQS[3]
R500
10R
18
R1
2
R2
3
R3
4
R4
R501
10R
18
R1
2
R2
3
R3
4
R4
R502
10R
18
R1
2
R2
3
R3
4
R4
R513
15R
R514
15R
R515
15R
R516
15R
R503
18
R1
2
R2
3
R3
4
R4
BA1
R520
7
6
5
7
6
5
7
6
5
7
6
5
33R
R519
33R
DDQS0
DDQS1
DDQS2
DDQS3
CLKE
BA0
R521
MCLK01#
R518
33R
MCLK01
MA[0-11]
R517
33R
33R
MA[11]
MA[10]
MA[9]
MA[8]
MA[7]
MA[6]
MA[5]
MA[4]
MA[3]
MA[2]
MA[1]
MA[0]
9
DQ28_A9
8
DQ29_A8
20
DQ30_B8
7
DQ31_A7
22
NC_B10
82
NC_G10
120
NC_K12
119
NC_K11
123
NC_L3
134
NC_M2
122
NC_L2
75
NC_G3
15
NC_B3
116
NC_K8
129
NC_L9
131
CK-_L11
130
CK_L10
143
CKE_M11
110
WE-_K2
109
CAS-_K1
121
RAS-_L1
133
CS-_M1
135
BA0_M3
124
BA1_L4
126
A11_L6
113
A10_K5
127
A9_L7
142
A8/AP_M10
141
A7_M9
140
A6_M8
128
A5_L8
139
A4_M7
138
A3_M6
125
A2_L5
137
A1_M5
136
A0_M4
59
48
36
35
24
DQ27_B12
DQ24_D12
DQ25_C12
DQ26_C11
MD[28]
4
R4
5
96
95
72
71
60
DQ12_F12
DQ13_F11
DQ14_E12
DQ15_E11
DQ11_H11
MD[31]
MD[30]
MD[29]
2
3
R2
R3
7
6
DQM[2]
DQM[3]
83
11
108
107
DQ8_J12
DQ9_J11
DM3_A11
DQ10_H12
DM1_G11
18
R1
DDQS2
12
DQS3_A12
VDDMQ_2V5_FLT
R508
10R
1u
C501
DDQS3
84
18
16
14
144
VDDQ_B4
VDDQ_B2
VREF_M12
DQS1_G12
C517
R510
1k
100n
23
21
19
VDDQ_B9
VDDQ_B7
VDDQ_B6
VDDQ_B11
EM6A9320
IC1
MVREF
100n
C518
R512
1k
C502
1u
50V
63
51
47
38
VDDQ_F3
VDDQ_E3
VDDQ_D2
VDDQ_D11
70
58
99
87
VDDQ_J3
VDDQ_H3
VDDQ_F10
VDDQ_E10
VDDMQ_2V5_FLT
30
31
94
VDDQ_H10
46
106
VDD_C6
VDD_C7
VDDQ_J10
VSSQ_G9
VCCA_2V5_FLT
VDD_D10
VDD_D3
VDD_K10
VDD_K7
VDD_K6
VDD_K3
VSS_H8
VSS_H7
VSS_H6
VSS_H5
VSS_G8
VSS_G7
VSS_G6
VSS_G5
VSS_F8
VSS_F7
VSS_F6
VSS_F5
VSS_E8
VSS_E7
VSS_E6
VSS_E5
VSS_D9
VSS_D7
VSS_D6
VSS_D4
VSS_J8
VSS_J7
VSS_J6
VSS_J5
VSS_K9
VSS_K4
VSQ_J9
VSSQ_H9
VSSQ_J4
VSSQ_H4
39
118
115
114
111
92
91
90
89
80
79
78
77
68
67
66
65
56
55
54
53
45
43
42
40
104
103
102
101
117
112
105
93
100
88
81
VDDMQ_2V5_FLT
C505
100u
16V
50V
4n7
C525
50V
4n7
C524
50V
4n7
C523
50V
4n7
C522
50V
4n7
C521
50V
4n7
C506
50V
4n7
C507
25V
10n
C508
25V
10n
C509
25V
10n
C510
25V
10n
C511
25V
10n
C512
25V
10n
VCCA_2V5_FLT
C516
100u
16V
16V
100n
C532
16V
100n
C531
16V
100n
C530
16V
100n
C529
16V
100n
C528
16V
100n
C527
16V
100n
C515
16V
100n
C504
16V
100n
C503
16V
100n
C2253
16V
100n
DQM[0-3] DQS[0-3]
DQM[0]
DQM[1]
DQM[2]
DQM[3]
R506
R1
10R
1823
MD[15]
MD[14]
C513
25V
10n
DM0_A274DM2_G2
DQS0_A173DQS2_G1
NC_L12
DQ2_A54DQ3_A413DQ4_B126DQ5_C2
DQ1_B56DQ0_A6
5
17
7
6
5
R2
R3
R4
MD[13]
4
MD[12]
R1
R507
10R
1823
MD[11]
7
MD[10]
R2
6
5
R3
R4
4
R509
MD[9]
MD[8]
R1
10R
1823
MD[7]
MD[6]
DQ6_C1
DQ7_D1
DQ16_E2
25
37
50
7
6
R2
R3
MD[5]
DQ17_E1
DQ18_F2
DQ19_F1
49
62
61
86
5
R4
R511
10R
4
MD[4]
MD[3]
DQ20_H2
DQ21_H1
DQ22_J1
DQ23_J2
2
85
97
98
DQM[1]
7
R1
R2
1823
MD[1]
MD[2]
DQM[0]
6
R3
VSSQ_A310VSSQ_A1027VSSQ_C328VSSQ_C429VSSQ_C532VSSQ_C833VSSQ_C934VSSQ_C1041VSSQ_D544VSSQ_D852VSSQ_E457VSSQ_E964VSSQ_F469VSSQ_F976VSSQ_G4
1
3
132
DDQS1
DDQS0
5
R4
4
MD[0]
MCLK0
MCLK0#
R2209
10R
R2208
10R
R504
R505
47R
47R
C500
10n
25V
MCLK01
MCLK01#
L501
C514
25V
10n
C519
25V
10n
C520
BLM21B201S
VDDMQ_2V5
C2252
16V
100n
C2251
16V
100n
C2250
16V
100n
C526
L500
BLM21B201S
VCCA_2V5
Page 53
IC217
PWM
44NC10
1 NC1
RD_EMU
WR_EMU
PSEN_UP
GAL_IAP
VCCA_2V5
R415
43NC9
2 NC2
1k2
R412
22R
MCA[17]
MCA[18]
MCA[19]
C615
STBY_3V3
MCA[19]
4k7
R640
RD_EMU
R4
4
66NC5
67A19
IC220
14 P0_5
15 P0_6
4k7
4k7
R696
R695
15k
CPU_GO1
RX1_INT
UP_RXD
UP_TXD
UP_IRQ
65RD
16 P0_7
3k9
R698
50V
100n
S610
R697
DVD_12V_SENSE
10u
VCCD3.3V_FLT
64WR
17 ENE
L602
BLM21B201S
180R
C614
47R
STBY_3V3
63NC4
18 STOP
S615
C616
47R
R649
R642
R638
VCC_8V
S629
S628
S627
MCA[14]
MCA[15]
STBY_3V3
C605
100n
MCA[18]
3A15
2A16
IC219
15 DQ2
16 VSS
MCAD[3]
MCAD[2]
25V
MCA[18]
S604
1A18
30A17
31W
32VCC
17 DQ3
18 DQ4
19 DQ5
20 DQ6
MCAD[6]
MCAD[5]
MCAD[4]
MCAD[6]
MCAD[5]
MCAD[4]
MCAD[3]
25V
100p
C602
MCAD[5]
MCAD[7]
MCAD[6]
MCAD[7]
MCAD[6]
35I/O7
10 I/O2
STBY_3V3
16V
C601
34VSS1
11 VCC
C600
16V
STBY_3V3
100n
33VCC1
12 VSS
100n
MCA[19]
MCA[18]
MCA[17]
MCA[16]
SRAM_OE
MCA[17]
40A17
5A2
MCA[16]
S623
36I/O8
37OE
38A15
39A16
6A3
7A4
8CS
9 I/O1
MCA[3]
MCA[4]
MCA[15]
MCAD[0]
MCAD[1]
MCA[18]
MCA[19]
41A18
42NC8
3A0
4A1
MCA[0]
MCA[1]
MCA[2]
MCAD[4]
MCA[4]
FL_A16
FL_A15
5A7
6A6
7A5
8A4
9A3
10 A2
11 A1
12 A0
13 DQ0
MCAD[5]
MCAD[4]
MCA[14]
MCA[14]
30A14
31I/O5
32I/O6
13 I/O3
14 I/O4
K6R4008V1C-I/C-P
MCAD[2]
15 WE
S624
SRAM_WE
MCAD[3]
MCA[12]
MCA[13]
MCA[12]
MCA[13]
28A12
29A13
16 A5
17 A6
MCA[5]
MCA[6]
MCA[10]
MCA[11]
MCA[11]
MCA[10]
24NC6
25NC7
26A10
27A11
18 A7
19 A8
20 A9
21 NC3
22 NC4 23NC5
MCAD[0]
MCA[7]
MCA[8]
MCA[9]
MCA[7]
MCA[6]
MCA[5]
MCA[4]
MCA[3]
MCA[2]
MCA[1]
MCA[0]
MCA[7]
MCA[6]
MCA[5]
MCA[3]
MCA[2]
MCA[1]
MCA[0]
MCAD[0]
MCA[12]
MCA[12]
4A12
M29W040B
CORRESPONDS TO
Winbound W27E040 EPROM &
ST M29F040 Flash
14 DQ1
MCA[0]
MCA[1]
MCA[2]
MCA[3]
MCA[4]
MCA[15]
MCAD[2]
MCAD[0]
MCAD[1]
MCA[16]
MCA[15]
MCA[14]
MCA[14]
MCA[15]
MCA[16]
1CLK
2I0
3I1
20VCC
4I2
5I3
6I4
S620
7I5
S621
8I6
S622
VCC_5V
4k7
R416
Q400
C416
10u
50V
S412
IC622
GAL16LV8
9I7
10 GND
11 OE
BRIGHTNESS CONTROL
R417
22R
BC327
100n
C419
16V
100u
C417
16V
12 Q0
STBY_3V3
19Q7
18Q6
17Q5
16Q4
15Q3
14Q2
13 Q1
FL_A15
FL_A14
BRT_CNTL
MCAD[3]
FL_WE
FL_OE
SRAM_WE
SRAM_OE
FL_A17
FL_A16
MCA[5]
MCA[6]
MCA[7]
MCA[8]
MCA[9]
IR
SW_ENABLE
BSN20
Q604
R6007
10k
100R
R6006
CIRCUIT OF SW UPDATE FROM SCART2
SCSCL
SDA3SCL3
47k
R6005
BSN20
Q605
R6010
10k
100R
R6011
STBY_5V
SCSDA
MCAD[2]
MCAD[1]
12345
PL600
STBY_5V
R604
4k7
Q6006
BC848B
22k
R6018
LED1
R6015
220R
S6300
S6310
BC848B
Q6007
22k
R6019
LED2
SCL3
BSN20
Q602
100R
STBY_3V3
S6311S6312
R6016
220R
STBY_5V
VCCA_3V3
R607
10k
R606
STBY_5V
SCL
MCAD[1]
SDA3
BSN20
Q603
R610
10k
100R
R611
SDA
LEVEL SHIFTER
MCA[16]
MCA[17]
MCA[18]
MCA[19]
ALE_EMU
PSEN_UP
FL_WE
FL_A17
FL_A14
29A14
28A13
27A8
26A9
25A11
24G
23A10
22E
21DQ7
MCAD[7]
3A2
4VSS5SDA
24LC32A
6SCL
SCL3
SDA3
PL607
12
34
56
78
910
11 12
13 14
15 16
MCA[13]
MCA[13]
MCA[8]
MCA[8]
MCA[9]
MCA[9]
MCA[11]
MCA[11]
FL_OE
MCA[10]
MCA[10]
MCAD[7]
MCA[10]
MCA[2]
MCA[1]
MCA[0]
1A0
2A1
IC218
7WP
8VCC
16V
100n
C604
100u
C603
16V
STBY_3V3
NVM_WP
RST#
WR_EMU
RD_EMU
SRAM_OE
SRAM_WE
MCA[13]
MCA[12]
MCA[14]
MCA[15]
MCA[13]
MCA[14]
MCA[12]
MCA[15]
765
R1R2R3
10R
1823
81 A8
82 A6
83 A9
84 A5
85 A11
86 A4
87 ALE
88 PSEN
89 A3
90 A10
91 VSS3
92 VDD3_3_3
93 A2
94 A1
95 FL_CE
96 D7
97 A0
98 D6
99 D0
100 D5
PDP_GO
CPU_GO1
R4
4
79A7
80FL_RST
1D1
2D4
4
R3
R4
R628
10R
MCAD[1]
MCAD[4]
MCAD[2]
MCAD[1]
MCAD[4]
STBY_3V3
4k7
R6036
R6038
Q6008
1k
BC848B
R629
R627
MCA[7]
10R
MCA[8]
MCA[6]
MCA[9]
MCA[4]
MCA[11]
MCA[5]
MCA[3]
100n
25V
5
6
7
10R
R625
R6037
1k
18
R1
7
2
R2
3
6
R3
5
4
R4
18
R1
2
7
R2
3
6
R3
4
5
R4
R626
10R
C606
R4
4
R3
3
R2
2
R1
18
R624
10R
18
R1
2
7
R2
3
6
R3
4
5
R4
STBY_3V3
R6035
4k7
Q6009
BC848B
MCA[7]
MCA[8]
MCA[6]
MCA[9]
MCA[4]
MCA[11]
MCA[5]
MCA[3]
PSEN_UP
ALE_EMU
VCCD3.3V_FLT
MCA[10]
MCA[2]
MCA[1]
MCA[0]
MCAD[7]
MCAD[7]
MCAD[6]
MCAD[6]
MCAD[0]
MCAD[0]
MCAD[5]
MCAD[5]
PDP_GO1
R2
765
MCAD[2]
STBY_3V3
78A13
3D2
MCAD[3]
STBY_2V5
R1
MCAD[3]
BLM21B201S
CPU_GO
77A12
4D3
1823
STBY_3V3
C610
100n
16V
VCCD3.3V_FLT
C609
100n
25V
75VDD3_3_2
76A14
5XROM
6 VDD2_5
25V
100n
C608
C607
22u
50V
L600
100n
C613
L601
25V
100n
C612
74VSS2
7 VSS
C611
22u
R688
R632
4k7
STBY_2V5
73VDD2_5_1
8 VDD3_3
4k7
STBY_3V3
R639
71A15
72FL_PGM
9 P0_0
10 P0_1
4k7
R689
RGB_SW1
RGB_SW2
WR_EMU
MCA[17]
MCA[16]
MCA[17]
MCA[16]
765
R1R2R3
10R
1823
70A17
11 P0_2
4k7
4k7
R690
R6013
STBY_2V5
47R
R6030
R6031
SW_ENABLE
MCA[18]
MCA[18]
MCA[19]
68A18
69A16
SDA5550M
12 P0_3
13 P0_4
4k7
R694
47R
RX1_RST#
MUTE_AMP
UART SOCKET FOR IDTV
PL604
LOC_KEY
PL606
1
2
2
1
3
SCLSDA
L609
BLM21B201S
RST_H
4k7
R648
R685
75R
R684
75R
62P1_7
19 OCF
470n
470p
C619
1n5
50V
100p
NC
20 EXTIF 61NC3
C618
R651
C617
SEL_V_OUT
BC858B
Q610
1k
60BLANK_COR
21 CVBS
58G
59B
22 VDDA2_5
23 VSSA
25V
100n
C621
C620
22u
50V
L603
STBY_2V5
STBY_2V5
L604
25V
R686
75R
100n
C623
56VDDA2_5_1
24 P2_0 57R
25 P2_1
25V
100n
C622
R653
3k9
15k
R654
PIN8_SC1
VCCD_3V3
C627
C624
33p
50V
50V
6MHz
X600
51NC1
52XTAL2
53XTAL1
54NC2
55VSSA1
26 P2_2
27 P2_3
28 NC
29 HS_SSC
30 VS
25V
100n
C626
3k9
R657
15k
R656
LOC_KEY
25V
100n
C625
3k9
R660
1k
R661
15k
R655
PIN8_SC2
STBY_2V5
MMC_IR GIRISI
PL605
1
BC848B
1
STBY_3V3
33p
50RST
49P4_3
48P4_2
47P1_6
46P1_5
45P1_4
44P1_3
43P1_2
42P1_1
41P1_0
40VDD3_3_1
25V
39VSS1
38P3_7
R6014
37P3_6
36P3_5
100n
35P3_4
34P3_3
C633
33P3_2
32P3_1
31P3_0
Q6010
BC848B
PIN8_SC3
S6313
C628
100n
25V
VCC_8V
R2306
Q2299
100R
IR
LM809
23
IC221
4k7
4k7
R679
VCCD3.3V_FLT
VCCA_2V5
R6039
100R
VCCD3.3V_FLT
R676
100k
R687
R682
4k7
4k7
R681
4k7
R680
R6017
S614
SC2_FB
SDA_TVLINK
STBY_3V3
R2301
STBY_5V
TV-LINK
RST#
PDP_GO1
INT#
GAL_IAP
UP_IRQ
BL_ON/OFF
SCL3
SDA3
PWM
4k7
STBY
STBY_3V3
UP_RXD
RGB_SW3
PROTECT
SDA_TVLINK
IR
UP_TXD
S6314
HDMI_CEC
S613
FB
2k7
R2300
STBY_3V3
47k
Q2300
R2303
10k
47k
R2302
BC848B
BC848B
Q2301
100R
R2304
TV_LINK
100n
C631
25V
RST#
R693
4k7
VCCD3.3V_FLT
100n
C630
R691
4k7
4k7
R692
4k7
4k7
R6040
PC_STBY
2
PL308
1
10k
R2305
2
3
4
Page 54
TUNER/IF/AUDIO - 8
Page 55
VCC_12V
VCCA_3V3
5V
L917
L906
L918
PANEL_VCC
1
PL902
PL903
1
2
3
4
PL904
2
3
4
5
6
7
BL_ON/OFF LG_1/IRQPDP
1
2
3
4
VCC_5V
MMC
SUPPLY
N.C
BL_ON/OFF
A_DIM_PWM
DIG_DIM_PWM
PROTECT
STBY
VCC_33V
VCC_12V
PL900
1
2
3
4
5
6
7
8
9
10
11
12
STBY_3V3
SEL
DIG_DIM_PWM
5V
PL901
L900
L901
L902
L903
L904
N.C
R900
470R
R901
470R
10
S903
1
2
3
4
5
6
7
8
9
S900
S901
S904
100u
16V
L905
L920
VCCA_3V3
C900
VCCD_3V3
BRT_CNTLA_DIM_PWM
VCC_12V
C901
D900
1N4007
D901
1N4007
D902
1N4007
D903
1N4007
VCC_12V
L907
47u
47u
C902
+12V
50V
100nC903
L908
22u
C904
100n
16V
100u
16V
L919
22u
LM317
IC900
ADJ
1
1VIN
16V
1000u
5k6
C905
L909
N.C
C908
C906
2OUT3IN
R902
1k
C909
R903
16V
1000u
IC223
LM2576
2OUTPUT
22uH_3.9A_SMD
D911
SS33
C912
C932
22u
STPS745
100n
47u
3GND
L911
L910
D904
50V
50V
100n
16V
STBY_5V
C910
100n
16V
100n
C933
L912
4 FEEDBACK
100u
C911
C934
C913
220u
16V
VCC_8V
16V
5ON/OFF
R904
330R
100u
100n
100n
16V
FAN1616AS-3.3
C916
C914
C935
100n
16V
PROTECT
100n
BC848B
VCC_5V
3 VIN
C915
100n
C931
16V
100n
16V
50V
SAP 30030067 ADJ TYPE
R905
160R
S902
IC902
Q900
CS52015-3
IC901
VOUT
GND
1
C917
22u
1
R907
10k
2
C918
SOT 223
23
R909
IC903
LD1117
BC858B
Q901
R908
10k
120R
120R
R911
1
220u
16V
R910
SOT 223
23
1_8VMAIN
1_8VMAIN
1_8VMAIN
1_8VMAIN
10k
C919
100u
16V
C920
1R
R913
C921
L913
R912
10k
47u
R914
50V
L914
22u
10k
L915
22u
L916
22u
D905
1N4007
D906
1N4007
1N4148
1N4148
1N4148
1N4148
C922
100n
16V
C923
100n
16V
C925
C924
C926
D907
D908
D909
D910
100n
100n
100n
BLM21B201S
BLM21B201S
16V
16V
16V
STBY_3V3
STBY_2V5
STBY_3V3
VCC_5V
VCCA_3V3
VCCD_3V3
VCC_8V
R915
470R
N.C
L921
L922
100u
16V
100u
16V
100u
STBY_5V
VDDMQ_2V5
STBY_2V5
C936
C927
C937
C928
C929
22u
VCCA_2V5
100n
16V
100n
16V
16V
C938
C930
100u
16V
100u
100n
R922
C944
C940
16V
3k3
C939
16V
100p
1N4148
100u
D912
L924
VL1_8
VD1_8
C941
IC904
1 SW.COLL.
2 EMITTER
C942
56p
22u
VCC_33V
VA1_8
10u
C946
22u
56p
MC34063A
3 CAP. 6VCC
4 GND
56k
R921
C945
C943
L923
10u
R920
6k8
R919
8DRI.COL.
7SENSE
5COMP.
2k2
R918
R916
100R
R917
100R
VCC_12V
Page 56
THE UPDATED PARTS LIST
FOR THIS MODEL IS
AVAILABLE ON ESTA
Page 57
Hitachi, Ltd. Tokyo, Japan
International Sales Division
THE HITACHI ATAGO BUILDING,
No. 15 –12 Nishi Shinbashi, 2 – Chome,
Minato – Ku, Tokyo 105-8430, Japan.
Tel: 03 35022111
HITACHI EUROPE LTD,
Whitebrook Park
Lower Cookham Road
Maidenhead
Berkshire
SL6 8YA
UNITED KINGDOM
Tel: 01628 643000
Fax: 01628 643400
Email: consumer-service@hitachi-eu.com
HITACHI EUROPE GmbH
Munich Office
Dornacher Strasse 3
D-85622 Feldkirchen bei München
GERMANY
Tel: +49-8 9-991 80-0
Fax: +49-89-991 80-224
Hotline: +49-180-551 25 51 (12ct/min)
Email: HSE-DUS.service@hitachi-eu.com
HITACHI EUROPE srl
Via Tommaso Gulli N.39, 20147
Milano, Italia
ITALY
Tel: +39 02 487861
Tel: +39 02 38073415 Servizio Clienti
Fax: +39 02 48786381/2
Email: customerservice.italy@hitachi-eu.com
HITACHI EUROPE S.A.
364 Kifissias Ave. & 1, Delfon Str.
152 33 Chalandri
Athens
GREECE
Tel: 1-6837200
Fax: 1-6835964
Email: service.hellas@hitachi-eu.com
HITACHI EUROPE S.A.
Gran Via Carlos III, 86, planta 5
Edificios Trade - Torre Este
08028 Barcelona
SPAIN
Tel: +34 93 409 2550
Fax: +34 93 491 3513
Email: atencion.cliente@hitachi-eu.com
HITACHI Europe AB
Box 77 S-164 94 Kista
SWEDEN
Tel: +46 (0) 8 562 711 00
Fax: +46 (0) 8 562 711 13
Email: csgswe@hitachi-eu.com
HITACHI EUROPE S.A.S
Lyon Office
B.P. 45, 69671 BRON CEDEX
FRANCE
Tel: +33 04 72 14 29 70
Fax: +33 04 72 14 29 99
Email: france.consommateur@hitachi-eu.com
HITACH EUROPE AB
Egebækgård
Egebækvej 98
DK-2850 Nærum
DENMARK
Tel: +45 43 43 6050
Fax: +45 43 60 51
Email: csgnor@hitachi-eu.com
Hitachi Europe Ltd
Bergensesteenweg 421
1600 Sint- Pieters-Leeuw
BELGIUM
Tel: +32 2 363 99 01
Fax: +32 2 363 99 00
Email: sofie.van.bom@hitachi-eu.com
www.hitachidigitalmedia.com
HITACHI EUROPE LTD (Norway) AB
STRANDVEIEN 18
1366 Lysaker
NORWAY
Tel: 67 5190 30
Fax: 67 5190 32
Email: csgnor@hitachi-eu.com
HITACHI EUROPE AB
Neopoli / Niemenkatu 73
FIN-15140 Lahti
FINLAND
Tel : +358 3 8858 271
Fax: +358 3 8858 272
Email: csgnor@hitachi-eu.com
HITACHI EUROPE LTD
Na Sychrove 975/8
101 27 Pr aha 10 – Bohdalec
CZECH REPUBLIC
Tel: +420 267 212 383
Fax: +420 267 212 385
Email: csgnor@hitachi-eu.com
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