HIT HN58X24512FPI Datasheet

HN58X24512I
Two-wire serial interface
512k EEPROM (64-kword × 8-bit)
ADE-203-1239 (Z)
Preliminary
Rev. 0.0
Description
HN58X24512I is the two-wire serial interface EEPROM (Electrically Erasable and Programmable ROM). It realizes high speed, low power consumption and a high level of reliability by employing advanced MNOS memory technology and CMOS process and low voltage circuitry technology. It also has a 128­byte page programming function to make it’s write operation faster.
Note: Hitachi’s serial EEPROM are authorized for using consumer applications such as cellular phone,
camcorders, audio equipment. Therefore, please contact Hitachi’s sales office before using industrial applications such as automotive systems, embedded controllers, and meters.
Features
Single supply: 1.8 V to 5.5 V
Two-wire serial interface (I2CTM serial bus*1)
Clock frequency: 1 MHz (2.5 V to 5.5 V)/400 kHz (1.8 V to 2.5 V)
Power dissipation:Standby: 3 µA (max)Active (Read): 2 mA (max)Active (Write): 5 mA (max)
Automatic page write: 128-byte/page
Write cycle time: 10 ms (2.5 V to 5.5 V)/15 ms (1.8 V to 2.5 V)
Endurance: 105 Cycles (Page write mode)
Data retention: 10 Years
Preliminary: The specification of this device are subject to change without notice. Please contact your nearest Hitachi’s Sales Dept. regarding specification.
HN58X24512I
Small size packages: SOP-8pin (200 mil-wide)
Shipping tape and reel: 2,500 IC/reel
Temperature range: –40 to +85°C
Note: 1. I2C is a trademark of Philips Corporation.
Ordering Information
Type No. Internal organization Operating voltage Frequency Package
HN58X24512FPI 512k bit
(65536× 8-bit)
Pin Arrangement
2.5 V to 5.5 V 1 MHz 200 mil 8-pin plastic SOP
1.8 V to 2.5 V 400 kHz
8-pin SOP
A0 A1
NC
V
SS
Pin Description
Pin name Function
A0, A1 Device address SCL Serial clock input SDA Serial data input/output WP Write protect V
CC
V
SS
NC No connection
Power supply Ground
1 2 3 4
(Top view)
8 7 6 5
V
CC
WP SCL SDA
2
Block Diagram
HN58X24512I
V
CC
V
SS
High voltage generator
Memory array
WP
Control
logic
X decoderY decoder
A0, A1
SCL
Address generator
Y-select & Sense amp.
SDA
Serial-parallel converter
Absolute Maximum Ratings
Parameter Symbol Value Unit
Supply voltage relative to V Input voltage relative to V
SS
SS
Operating temperature range*
1
V
CC
Vin –0.5*2 to +7.0* Topr –40 to +85 ˚C
Storage temperature range Tstg –65 to +125 ˚C Notes: 1. Including electrical characteristics and data retention.
2. Vin (min): –3.0 V for pulse width 50 ns.
3. Should not exceed V
+ 1.0 V.
CC
–0.6 to +7.0 V
3
V
DC Operating Conditions
Parameter Symbol Min Typ Max Unit
Supply voltage V
Input high voltage V Input low voltage V
CC
V
SS
IH
IL
Operating temperature Topr –40 85 ˚C Notes: 1. VIL (min): –1.0 V for pulse width 50 ns.
2. V
(max): VCC + 1.0 V for pulse width 50 ns.
IH
1.8 5.5 V 000V VCC × 0.7 VCC + 0.5*2V
1
–0.3*
—V
× 0.3 V
CC
3
HN58X24512I
DC Characteristics (Ta = –40 to +85˚C, VCC = 1.8 V to 5.5 V)
Parameter Symbol Min Typ Max Unit Test conditions
Input leakage current I
Output leakage current I Standby VCC current I Read VCC current I Write VCC current I Output low voltage V
LI
LO
SB
CC1
CC2
OL2
V
OL1
Capacitance (Ta = 25˚C, f = 1 MHz)
Parameter Symbol Min Typ Max Unit
Input capacitance (A0 to A1, SCL, WP) Cin* Output capacitance (SDA) C
Note: 1. This parameter is sampled and not 100% tested.
2.0 µA VCC = 5.5 V, Vin = 0 to 5.5 V
(SCL, SDA)
——2AVCC = 5.5 V, Vin = 0 to 5.5 V
(A0, A1, WP) — 2.0 µA VCC = 5.5 V, Vout = 0 to 5.5 V — 1.0 3.0 µA Vin = VSS or V
CC
2.0 mA VCC = 5.5 V, Read at 400 kHz — 5.0 mA VCC = 5.5 V, Write at 400 kHz — 0.4 V VCC = 4.5 to 5.5 V, IOL = 1.6 mA
V
= 2.5 to 4.5 V, IOL = 0.8 mA
CC
V
= 1.8 to 2.5 V, IOL = 0.4 mA
CC
0.2 V VCC = 1.8 to 2.5 V, IOL = 0.2 mA
1
6.0 pF Vin = 0 V
1
*
I/O
6.0 pF Vout = 0 V
Test conditions
4
HN58X24512I
AC Characteristics (Ta = –40 to +85˚C, VCC = 1.8 to 5.5 V)
Test Conditions
Input pules levels:VIL = 0.2 × V  VIH = 0.8 × V
Input rise and fall time: 20 ns
Input and output timing reference levels: 0.5 × V
Output load: TTL Gate + 100 pF
Parameter Symbol Min Max Min Max Unit Notes
Clock frequency f Clock pulse width low t Clock pulse width high t Noise suppression time t Access time t Bus free time for next mode t Start hold time t Start setup time t Data in hold time t Data in setup time t Input rise time t Input fall time t Stop setup time t Data out hold time t Write cycle time t
Notes: 1. This parameter is sampled and not 100% tested.
2. t
WC
CC
CC
CC
VCC = 1.8 to 5.5 V VCC = 2.5 to 5.5 V
SCL
LOW
HIGH
I
AA
BUF
HD.STA
SU.STA
HD.DAT
SU.DAT
R
F
SU.STO
DH
WC
400 1000 kHz 1200 600 ns 600 400 ns — 50 50 ns 1 100 900 100 550 ns 1200 500 ns 600 250 ns 600 250 ns 0—0—ns 100 100 ns — 300 300 ns 1 — 300 100 ns 1 600 250 ns 50 50 ns — 15 10 ms 2
is the time from a stop condition to the end of internally controlled write cycle.
5
HN58X24512I
Timing Waveforms
Bus Timing
SCL
t
SU.STA
1/f
t
HD.DAT
SCL
t
LOW
t
SU.DAT
t
F
t
HD.STA
t
HIGH
t
R
t
SU.STO
SDA (in)
SDA (out)
Write Cycle Timing
SCL
SDA
(Address (n))
t
AA
D0 in
Write data ACK
t
DH
Stop condition Start condition
t
WC
(Internally controlled)
t
BUF
6
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