HIT HM62W8512BLTTI-7, HM62W8512BLTTI-8 Datasheet
HM62W8512BI Series
4 M SRAM (512-kword × 8-bit)
ADE-203-1086A (Z)
Rev. 1.0
Jul. 13, 1999
Description
The Hitachi HM62W8512BI is a 4-Mbit static RAM organized 512-kword × 8-bit. HM62W8512BI Series
has realized higher density, higher performance and low power consumption by employing Hi-CMOS process
technology. The HM62W8512BI Series offers low power standby power dissipation; therefore, it is suitable
for battery backup systems. It is packaged in standard 32-pin TSOP II.
Features
• Single 3.3 V supply: 3.3 V ± 0.3V
• Access time: 70/85 ns (max)
• Power dissipation
Active: 16.5 mW/MHz (typ)
Standby: 3.3 µW (typ)
• Completely static memory. No clock or timing strobe required
• Equal access and cycle times
• Common data input and output: Three state output
• Directly LV-TTL compatible: All inputs and outputs
• Battery backup operation
• Operating temperature: –40 to +85˚C
Ordering Information
Type No. Access time Package
HM62W8512BLTTI-7
HM62W8512BLTTI-8
70 ns
85 ns
400-mil 32-pin plastic TSOP II (TTP-32D)
HM62W8512BI Series
Pin Arrangement
32-pin TSOPII (Normal Type TSOP)
A18
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Pin Description
Pin name Function
A0 to A18 Address input
I/O0 to I/O7 Data input/output
CS Chip select
OE Output enable
WE Write enable
V
CC
V
SS
Power supply
Ground
(Top view)
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
V
CC
A15
A17
WE
A13
A8
A9
A11
OE
A10
CS
I/O7
I/O6
I/O5
I/O4
I/O3
2
Block Diagram
A18
A16
A1
A0
A2
A12
A14
A3
A7
A6
Row
Decoder
HM62W8512BI Series
V
CC
V
SS
•
•
•
•
•
Memory Matrix
×
1,024 4,096
I/O0
I/O7
CS
WE
OE
•
•
Input
Data
Control
Timing Pulse Generator
Read/Write Control
Column I/O
Column Decoder
A17
A13
A15
A9
A8
•
•
•
•
A10A11
A4
A5
3
HM62W8512BI Series
Function Table
WE CS OE Mode VCC current Dout pin Ref. cycle
× H × Not selected I
H L H Output disable I
H L L Read I
L L H Write I
L L L Write I
, I
SB
SB1
CC
CC
CC
CC
Note: ×: H or L
Absolute Maximum Ratings
Parameter Symbol Value Unit
Power supply voltage V
Voltage on any pin relative to V
SS
Power dissipation P
CC
V
T
T
Operating temperature Topr –40 to +85 °C
Storage temperature Tstg –55 to +125 °C
Storage temperature under bias Tbias –40 to +85 °C
Notes: 1. –3.0 V for pulse half-width ≤ 30 ns
2. Maximum voltage is 4.6 V
–0.5 to +4.6 V
–0.5*1 to VCC + 0.5*
1.0 W
High-Z —
High-Z —
Dout Read cycle
Din Write cycle (1)
Din Write cycle (2)
2
V
Recommended DC Operating Conditions (Ta = –40 to +85°C)
Parameter Symbol Min Typ Max Unit
Supply voltage V
Input high voltage V
Input low voltage V
CC
V
SS
IH
IL
Note: 1. –3.0 V for pulse half-width ≤ 30 ns
4
3.0 3.3 3.6 V
000V
2.4 — VCC + 0.3 V
*1
–0.3
— 0.6 V
HM62W8512BI Series
DC Characteristics (Ta = –40 to +85°C, VCC = 3.3 V ± 0.3 V, VSS = 0 V)
Parameter Symbol Min Typ*1Max Unit Test conditions
Input leakage current |I
Output leakage current |ILO|— — 1 µA CS = VIH or OE = VIH or
Operating power
supply current: DC
Operating power supply current I
Operating power
supply current
Standby power supply
current: DC
Standby power supply
current (1): DC
Output low voltage V
Output high voltage V
Note: 1. Typical values are at VCC = 3.3 V, Ta = +25°C and specified loading, and not guaranteed.
2. This characteristics is guaranteed only for L-version.
|——1µA Vin = VSS to V
LI
WE = V
I
CC
— — 10 mA CS = VIL,
others = V
CC1
— — 45 mA Min cycle, duty = 100%
CS = V
I
= 0 mA
I/O
I
CC2
— 5 10 mA Cycle time = 1 µs,
duty = 100%
I
= 0 mA, CS ≤ 0.2 V
I/O
V
≥ VCC – 0.2 V,
IH
V
≤ 0.2 V
IL
I
SB
I
SB1
— 0.1 0.3 mA CS = V
—1*240*
2
µA Vin ≥ 0 V,
CS ≥ V
OL
— — 0.4 V IOL = 2.0 mA
— — 0.2 V IOL = 100 µA
OH
VCC – 0.2 — — V IOH = –100 µA
2.4 — — V IOH = –2.0 mA
CC
, V
= VSS to V
IL
I/O
, I
IH/VIL
, others = VIH/V
IL
IH
– 0.2 V
CC
= 0 mA
I/O
CC
IL
Capacitance (Ta = +25°C, f = 1 MHz)
Parameter Symbol Typ Max Unit Test conditions
Input capacitance*
1
Input/output capacitance*1C
Note: 1. This parameter is sampled and not 100% tested.
Cin — 8 pF Vin = 0 V
I/O
—10pFV
= 0 V
I/O
5
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