HIT HM62W8511HCJP-10, HM62W8511HCLJP-10 Datasheet
HM62W8511HC Series
4M High Speed SRAM (512-kword × 8-bit)
ADE-203-1201 (Z)
Preliminary
Rev. 0.0
Sep. 20, 2000
Description
The HM62W8511HC is a 4-Mbit high speed static RAM organized 512-kword × 8-bit. It has realized high
speed access time by employing CMOS process (6-transistor memory cell) and high speed circuit designing
technology. It is most appropriate for the application which requires high speed, high density memory and
wide bit width configuration, such as cache and buffer memory in system. The HM62W8511HC is packaged
in 400-mil 36-pin SOJ for high density surface mounting.
Features
• Single supply : 3.3 V ± 0.3 V
• Access time : 10 ns (max)
• Completely static memory
No clock or timing strobe required
• Equal access and cycle times
• Directly TTL compatible
All inputs and outputs
• Operating current : 115 mA (max)
• TTL standby current : 40 mA (max)
• CMOS standby current : 5 mA (max)
: 1 mA (max) (L-version)
• Data retension current : 0.6 mA (max) (L-version)
• Data retension voltage : 2 V (min) (L-version)
• Center VCC and VSS type pinout
Preliminary: The specification of this device are subject to change without notice. Please contact your nearest
Hitachi’s Sales Dept. regarding specification.
HM62W8511HC Series
Ordering Information
Type No. Access time Package
HM62W8511HCJP-10 10 ns 400-mil 36-pin plastic SOJ (CP-36D)
HM62W8511HCLJP-10 10 ns
2
Pin Arrangement
HM62W8511HC Series
36-pin SOJ
Pin Description
A0
A1
A2
A3
A4
CS
I/O1
I/O2
V
CC
V
SS
I/O3
I/O4
WE
A5
A6
A7
A8
A9
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
(Top View)
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
NC
A18
A17
A16
A15
OE
I/O8
I/O7
V
SS
V
CC
I/O6
I/O5
A14
A13
A12
A11
A10
NC
Pin name Function
A0 to A18 Address input
I/O1 to I/O8 Data input/output
CS Chip select
OE Output enable
WE Write enable
V
CC
V
SS
Power supply
Ground
NC No connection
3
HM62W8511HC Series
Block Diagram
(LSB)
A14
A13
A12
A5
A6
A7
A11
A10
A3
A1
(MSB)
Row
decoder
CS
1024 rows × 32 columns ×
16 blocks × 8 bit
(4,194,304 bits)
V
CC
V
SS
I/O1
.
.
.
I/O8
WE
CS
OE
CS
Input
data
control
Column I/O
Column decoder
A8 A9 A18 A16 A17 A0 A2 A4 A15
(LSB)
CS
(MSB)
4
HM62W8511HC Series
Operation Table
CS OE WE Mode VCC current I/O Ref. cycle
H ××Standby I
L H H Output disable I
L L H Read I
L H L Write I
L L L Write I
, I
SB
SB1
CC
CC
CC
CC
Note: ×: H or L
Absolute Maximum Ratings
Parameter Symbol Value Unit
Supply voltage relative to V
Voltage on any pin relative to V
SS
SS
Power dissipation P
Operating temperature Topr 0 to +70 °C
Storage temperature Tstg –55 to +125 °C
Storage temperature under bias Tbias –10 to +85 °C
Notes: 1. VT (min) = –2.0 V for pulse width (under shoot) ≤ 6 ns.
2. V
(max) = VCC+2.0 V for pulse width (over shoot) ≤ 6 ns.
T
V
CC
V
T
T
High-Z —
High-Z —
Dout Read cycle (1) to (3)
Din Write cycle (1)
Din Write cycle (2)
–0.5 to +4.6 V
–0.5*1 to VCC+0.5*
2
V
1.0 W
Recommended DC Operating Conditions (Ta = 0 to +70°C)
Parameter Symbol Min Typ Max Unit
3
Supply voltage V
Input voltage V
CC
VSS*
IH
V
IL
*
4
Notes: 1. VIL (min) = –2.0 V for pulse width (under shoot) ≤ 6 ns.
2. V
(max) = VCC+2.0 V for pulse width (over shoot) ≤ 6 ns.
IH
3. The supply voltage with all V
4. The supply voltage with all V
3.0 3.3 3.6 V
000V
2.0 — VCC + 0.5*
1
–0.5*
pins must be on the same level.
CC
pins must be on the same level.
SS
— 0.8 V
2
V
5
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