HIT HM62W16258BLTT-5, HM62W16258BLTT-5SL, HM62W16258BLTT-7, HM62W16258BLTT-7SL Datasheet

HM62W16258B Series
4 M SRAM (256-kword × 16-bit)
ADE-203-976B (Z)
Rev. 2.0
Oct. 14, 1999

Description

The Hitachi HM62W16258B Series is 4-Mbit static RAM organized 262,144-word × 16-bit. HM62W16258B Series has realized higher density, higher performance and low power consumption by employing Hi-CMOS process technology. It offers low power standby power dissipation; therefore, it is suitable for battery backup systems. It is packaged in standard 44-pin plastic TSOPII.

Features

Single 3.3 V supply: 3.3 V ± 0.3 V
Fast access time: 55 ns/70 ns (max)
Power dissipation:
Active: 9.9 mW (typ)Standby: 3.3 µW (typ)
Completely static memory.
No clock or timing strobe required
Equal access and cycle times
Common data input and output.
Three state output
Battery backup operation.
HM62W16258B Series

Ordering Information

Type No. Access time Package
HM62W16258BLTT-5 HM62W16258BLTT-7
HM62W16258BLTT-5SL HM62W16258BLTT-7SL
55 ns 70 ns
55 ns 70 ns
400-mil 44-pin plastic TSOPII (normal-bend type) (TTP-44DB)
2

Pin Arrangement

HM62W16258B Series
44-pin TSOP
A4 A3 A2 A1 A0 CS I/O0 I/O1 I/O2 I/O3 V
CC
V
SS
I/O4 I/O5 I/O6 I/O7 WE A17 A16 A15 A14 A13
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22
(Top view)
44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23
A5 A6 A7
OE UB LB
I/O15 I/O14 I/O13 I/O12 V
SS
V
CC
I/O11 I/O10 I/O9 I/O8 NC A8 A9 A10 A11 A12

Pin Description

Pin name Function
A0 to A17 Address input I/O0 to I/O15 Data input/output
CS Chip select WE Write enable OE Output enable LB Lower byte select UB Upper byte select
V
CC
V
SS
NC No connection
Power supply Ground
3
HM62W16258B Series

Block Diagram

LSB
MSB
A4
A3 A15 A14 A16
A1
A2 A17
A0 A13
I/O0
I/O15
Row decoder
Input data control
V
CC
V
SS
Memory matrix 2,048 x 2,048
Column I/O
Column decoder
CS
LB
UB
WE
OE
Control logic
LSB
A7
A6
A5
A8
A9
A10
A11
A12
MSB
4
HM62W16258B Series

Operation Table

CS WE OE UB LB I/O0 to I/O7 I/O8 to I/O15 Operation
H ××××High-Z High-Z Standby ×××H H High-Z High-Z Standby
L H L L L Dout Dout Read L H L H L Dout High-Z Lower byte read L H L L H High-Z Dout Upper byte read LL×L L Din Din write LL×H L Din High-Z Lower byte write LL×L H High-Z Din Upper byte write LHH××High-Z High-Z Output disable
Note: H: VIH, L: VIL, ×: VIH or V

Absolute Maximum Ratings

Parameter Symbol Value Unit
Power supply voltage relative to V Terminal voltage on any pin relative to V Power dissipation P Storage temperature range Tstg –55 to +125 °C Storage temperature range under bias Tbias –10 to +85 °C
Notes: 1. VT min: –3.0 V for pulse half-width 30 ns.
2. Maximum voltage is +4.6 V.
IL
SS
SS
V
CC
V
T
T
–0.5 to + 4.6 V –0.5*1 to VCC + 0.3*
2
V
1.0 W

DC Operating Conditions

Parameter Symbol Min Typ Max Unit Note
Supply voltage V
Input high voltage V Input low voltage V
CC
V
SS
IH
IL
Ambient temperature range Ta 0 70 °C Note: 1. VIL min: –3.0 V for pulse half-width 30 ns.
3.0 3.3 3.6 V 000V
2.0 VCC + 0.3 V –0.3 0.8 V 1
5
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