HIT HM6216255HJP-10, HM6216255HJP-12, HM6216255HJP-15, HM6216255HLJP-10, HM6216255HLJP-12 Datasheet

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HM6216255H Series
4M high Speed SRAM (256-kword × 16-bit)
ADE-203-763D (Z)
Rev. 1.0
Sep. 15, 1998

Description

The HM6216255H Series is a 4-Mbit high speed static RAM organized 256-k word × 16-bit. It has realized high speed access time by employing CMOS process (4-transistor + 2-poly resistor memory cell) and high speed circuit designing technology. It is most appropriate for the application which requires high speed, high density memory and wide bit width configuration, such as cache and buffer memory in system. It is packaged in 400-mil 44-pin plastic SOJ and 400-mil 44-pin plastic TSOPII.

Features

Single 5.0 Vsupply : 5.0 V ± 10 %
Access time: 10/12/15 ns (max)
Completely static memoryNo clock or timing strobe required
Equal access and cycle times
Directly TTL compatibleAll inputs and outputs
Operating current: 200/180/160 mA (max)
TTL standby current: 70/60/50 mA (max)
CMOS standby current: 5 mA (max)
: 1.2 mA (max) (L-version)
Data retansion current: 0.8 mA (max) (L-version)
Data retantion voltage: 2 V (min) (L-version)
Center VCC and VSS type pinout
HM6216255H Series

Ordering Information

Type No. Access time Package
HM6216255HJP-10 HM6216255HJP-12 HM6216255HJP-15
HM6216255HLJP-10 HM6216255HLJP-12 HM6216255HLJP-15
HM6216255HTT-10 HM6216255HTT-12 HM6216255HTT-15
HM6216255HLTT-10 HM6216255HLTT-12 HM6216255HLTT-15

Pin Arrangement

10 ns 12 ns 15 ns
10 ns 12 ns 15 ns
10 ns 12 ns 15 ns
10 ns 12 ns 15 ns
400-mil 44-pin plastic SOJ (CP-44D)
400-mil 44-pin plastic TSOPII (TTP-44DE)
HM6216255HJP/HLJP Series
A0 A1 A2 A3 A4
CS
I/O1 I/O2 I/O3 I/O4
V
CC
V
SS
I/O5 I/O6 I/O7 I/O8
WE
A5 A6 A7 A8 A9
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22
44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23
A17 A16 A15
OE UB LB
I/O16 I/O15 I/O14 I/O13 V
SS
V
CC
I/O12 I/O11 I/O10 I/O9 NC A14 A13 A12 A11 A10
(Top View)
HM6216255HTT/HLTT Series
1
I/O1 I/O2 I/O3 I/O4
V
V
I/O5 I/O6 I/O7 I/O8
WE
A0 A1 A2 A3 A4
CS
CC SS
A5 A6 A7 A8 A9
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22
44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23
(Top View)
A17 A16 A15
OE UB LB
I/O16 I/O15 I/O14 I/O13 V
SS
V
CC
I/O12 I/O11 I/O10 I/O9 NC A14 A13 A12 A11 A10
2
HM6216255H Series

Pin Description

Pin name Function Pin name Function
A0 to A17 Address input UB Upper byte select I/O1 to I/O16 Data input/output LB Lower byte select
CS Chip select V OE Output enable V
CC
SS
WE Write enable NC No connection

Block Diagram

(LSB)
A1
A17
(MSB)
A7 A11 A16
A2
A6
A5
Row
decoder
Memory matrix
256 rows × 8 columns ×
128 blocks × 16 bit
(4,194,304 bits)
Power supply Ground
generater
Internal voltage
V
CC
V
SS
I/O1
.
.
.
I/O8 I/O9
.
.
.
I/O16
WE CS
LB
UB
OE
CS
CS
Input
data
control
Column I/O
Column decoder
A10 A8 A9 A12 A13 A14 A0 A15 A3 A4
CS
3
HM6216255H Series

Operation Table

CS OE WE LB UB Mode VCC current I/O1–I/O8 I/O9–I/O16 Ref. cycle
H ××××Standby I LHH××Output disable I L L H L L Read I L L H L H Lower byte read I L L H H L Upper byte read I L LHHH— I L × L L L Write I L × L L H Lower byte write I L × L H L Upper byte write I L × L HH— I
, I
SB
CC
CC
CC
CC
CC
CC
CC
CC
CC
Note: ×: H or L

Absolute Maximum Ratings

SB1
High-Z High-Z — High-Z High-Z — Output Output Read cycle Output High-Z Read cycle High-Z Output Read cycle High-Z High-Z — Input Input Write cycle Input High-Z Write cycle High-Z Input Write cycle High-Z High-Z
Parameter Symbol Value Unit
Supply voltage relative to V Voltage on any pin relative to V
SS
SS
Power dissipation P
V
CC
V
T
T
–0.5 to +7.0 V –0.5*1 to VCC + 0.5*
1.0*3/1.3*
4
2
V
W Operating temperature Topr 0 to +70 °C Storage temperature Tstg –55 to +125 °C Storage temperature under bias Tbias –10 to +85 °C
Notes: 1. VT (min) = –2.0 V for pulse width (under shoot) 8 ns
2. V
(max) = VCC + 2.0 V for pulse width (over shoot) 8 ns
T
3. At still air condition
4. At air flow 1.0 m/s
4
HM6216255H Series

Recommended DC Operating Conditions (Ta = 0 to +70°C)

Parameter Symbol Min Typ Max Unit
2
Supply voltage V
Input voltage V
CC
VSS*
IH
V
IL
*
3
Notes: 1. VIL (min) = –2.0 V for pulse width (under shoot) 8 ns
2. V
(max) = VCC + 2.0 V for pulse width (over shoot) 8 ns
IH
3. The supply voltage with all V
4. The supply voltage with all V
pins must be on the same level.
CC
pins must be on the same level.
SS

DC Characteristics (Ta = 0 to +70°C, VCC = 5.0 V ± 10 %, VSS = 0 V)

4.5 5.0 5.5 V 000V
2.2 VCC + 0.5*2V
1
–0.5*
0.8 V
Parameter Symbol Min Typ*
Input leakage current |I Output leakage
current* Operating power
1
10 ns cycle I
|——2 µA Vin = VSS to V
LI
|ILO|——2 µA Vin = VSS to V
CC
200 mA CS = VIL, Iout = 0 mA
1
Max Unit Test conditions
supply current
Standby power supply
12 ns cycle I 15 ns cycle I 10 ns cycle I
CC
CC
SB
180 — 160 ——70mACS = VIH,
current
12 ns cycle I 15 ns cycle I
Output voltage V
SB
SB
I
SB1
OL
V
OH
——60 ——50 — 0.1 5 mA VCC CS VCC – 0.2 V,
—*
2
0.1*
2
1.2 *
2
0.4 V IOL = 8 mA
2.4 V IOH = –4 mA
Note: 1. Typical values are at VCC = 5.0 V, Ta = +25°C and not guaranteed.
2. This characteristics is guaranteed only for L-version.
CC
CC
Other inputs = V
Other inputs = V
IH/VIL
IH/VIL
(1) 0 V Vin 0.2 V or (2) V
Vin VCC – 0.2 V
CC
5
HM6216255H Series

Capacitance (Ta = +25°C, f = 1.0 MHz)

Parameter Symbol Min Typ Max Unit Test conditions
Input capacitance* Input/output capacitance*
1
1
Note: 1. This parameter is sampled and not 100% tested.
Cin 6 pF Vin = 0 V C
I/O
——8 pFV
= 0 V
I/O
6
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