Audio Signal Processor for Cassette Deck (Dolby B/C-type NR
with Recording System)
ADE-207-115C (Z)
4th Edition
June 1997
Description
HA12155NT/HA12157NT is silicon monolithic bipolar IC providing Dolby noise reduction system*,
electrical volume system, REC equalizer system and level meter system in one chip.
Functions
• REC equalizer× 2 channel
• Dolby B/C NR× 2 channel
• Electronic volume× 2 channel
• Level Meter× 2 channel
Features
• Inductor less REC equalizer is adjustable of its characteristics by external resistor
• Rec level is adjustable automatically with electrical vo lu me which is built-in
• 3 type of input selection is available (one is by way of electrical volume)
• Separate input selection SW and REC/PB SW
• Dolby noise reduction with dubbing cassette decks
(Unprocessed signal output available from recording out terminals during PB mode)
• Log-compressed level meter output is range from 0 V to 5 V
(Usable as music search switchable gain of 0 dB and 20 dB respectivily)
• Normal-speed/high-speed (Double), normal/metal/chrome fully electronic control switching built-in
HA12155NT/HA12157NT are designed to operate on either single supply or split supply.
The operating range of the supply voltage is shown in table 1.
Table 1Supply Voltage
Type No.Single supplySplit supply
HA12155NT9.5 V to 16 V±6 V to 8 V
HA12157NT12 V to 16 V±6 V to 8 V
The lower limit of supply voltage depends on the line output reference level.
Rev.4, Jun. 1997, page 13 of 57
HA12155NT/HA12157NT
The minimum value of the headroom margin is specified as 12 dB by Dolby Laboratories. HA12155 series
are provided with two line output level, which will permit an optimum headroom margin for power supply
conditions.
Reference Voltage
For the single supply operation these devices provide the reference voltage of half the supply voltage that is
the signal grounds. As the peculiarity of these devices, the capacitor for the ripple filter is very small about
1/100 compared with their usual value. The Reference voltage are provided for the left channel and the
right channel separately. The block diagram is shown as figure 1.
V
CC
+
–
8
+
1 F
µ
–
+
52
L channel
reference
R channel
reference
13
Figure 1 The Block Diagram of Reference Voltage Supply
Operating Mode Control
HA12155NT/HA12157NT provides fully electronic switching circuits. NR-ON/OFF, C/B, and MPX
ON/OFF switches are controlled by parallel data (DC voltage) and other switches are controlled by serial
data.
Rev.4, Jun. 1997, page 14 of 57
HA12155NT/HA12157NT
Table 2Threshold Voltage (VTH)
Pin No.LoHiUnit
1, 2, 3–0.2 to 1.03.5 to 5.3V
62, 63, 64–0.2 to 1.03.5 to 5.3V
Notes: 1. Voltages shown above are determined by internal circuits of LSI when take pin 55 (DGND pin) as
reference pin. On split supply use, same V
pin.
This means that it can be controlled directly by micro processor.
2. Each pins are on pulled down with 100 kΩ inter nal resi stor.
Therefore, it will be low-level when each pins ar open.
3. Note on serial data inputting
(a) The clock frequency on CLK must be less than 500 kHz.
(b) Over shoot level and under shoot level of input signal must be the value shown below.
(c) The serial input pins (pins 62, 63, and 64) are extremely sensitive to undershoot, overshoot,
ringing, and noise. This can result in malfunctions due to problems with the wiring pattern.
We recommend attaching capacitors in parallel with the serial input pins to ameliorate this
problem.
Figure 2-b shows an example of this circuit appropriate when the clock frequency is 500
kHz. The value of the capacitor should be set in accordance with the clock frequency
actually used.
4. NR Mode Switching
In actual use, pop noises may accompany NR on/off switching in C mode. To avoid these
noises, use the following sequences to turn NR on and off.
From C mode NR off to C mode NR on:
(C mode, NR off) → (B mode, NR off) → (B mode, NR on) → (C mode, NR on).
From C mode NR on to C mode NR off:
(C mode, NR on) → (B mode, NR on) → (B mode, NR off) → (C mode, NR off).
can be offered by connecting DGND pin to GND
TH
Table 3Switching Truth Table
Pin No.LoHi
1NR-OFFNR-ON
2B-NRC-NR
3MPX-ONMPX-OFF
Notes: 1. Low level will be offered when each pins are open.
2. Please refer to next term as for the serial data for formatting.
When connecting microcomputer or Logic-IC with HA12155NT/HA12157NT directly, there is
apprehension of rash-current under some transition timming of raising voltage or falling voltage at V
ON/OFF.
For this countermeasure, connect 10 kΩ to 20 kΩ resistor with each pins. It is shown in test circuit.
Rev.4, Jun. 1997, page 15 of 57
CC
HA12155NT/HA12157NT
under 5.3 V
0
within –0.2 V
Figure 2 Input Level
Serial Data Formatting
8 bit shift register is employed. CLK and DATA are stored during STB being high and data is ratched
when STB goes high to low. The clock frequency on CLK must be less than 500 kHz.
5 V
CLK
0 V
STB
5 V
0 V
5 V
0 V
01234567
latch of data
DATA
Figure 3 Serial Data Timming Chart
Rev.4, Jun. 1997, page 16 of 57
HA12155NT/HA12157NT
Table 4Serial Data Formatting
Bit
Control
No.
register
0TAPEHDAC0
SELECT 1L
1TAPEHDAC1*mute is implemented when all
SELECT 2Lbits are high.
2TAPEH High (double) speed selection DAC2
SPEEDL Normal speed selection
3METERH Meter sensitivity 20 dB upDAC3
SENSITIVITY L Meter sensitivity normal
4INPUTHDAC4
SELECT 1L
Volume register
TS1
TS2
H
L
IS2
H
HL
TAPE
TAPE
IS1
HL
PB
IV
II
I
TAPE
TAPE
VR
bit No.
I
I
LLLLLL
LLLLLH
543210
gain
increase
LLLLHL
LLLLHH
HHHHLH
HHHHHL
HHHHHH
decrese
mute
I
VR
RP
L
I
I
5INPUTHDAC 5
SELECT 2L
6REC/PBH PB mode selectionR/L SELECT H Rch register selection
L REC mode selectionL Lch register selection
7REGISTER
SELECT
H Control register selectionREGISTER
SELECT
L Volume register selection
Note: TAPE I: Normal tape, TAPE II: Chrome tape, TAPE IV: Metal tape
Rev.4, Jun. 1997, page 17 of 57
HA12155NT/HA12157NT
Input Block Diagram and Lev e l Diagram
RPI PBI
IA
OUT
–3 dB
MPX
Filter
NR
lN
PB - OUT
HA12155
580 mVrms
(–2.5 dBs)
VRI
47 mVrms
(–24.3 dBs)
VRI
33 mVrms
(–27.4 dBs)
43 mVrms
(–25.2 dBs)
Elect-
rical
VR
30 mVrms
(–28.2 dBs)
Elect-
rical
VR
RPI PBI
43 mVrms
(–25.2 dBs)
Input
Amp
b) REC mode
30 mVrms
(–28.2 dBs)
Input
Amp
IA
OUT
426 mVrms
(–5.2 dBs)
MPX ON
300 mVrms
(–8.2 dBs)
MA
HA12157
775 mVrms
(0 dBs)
MPX OFF
– 3 dB
The each level shown above is typical value when
offering Dolby level to test point pin (NR IN) with
the gain of electrical volume is under the condition
of max.
MPX
Filter
300 mVrms
(–8.2 dBs)
NR
lN
PB - OUT
HA12157
775 mVrms
(0 dBs)
MA
NR circuit
NR
circuit
HA12155
580 mVrms
(–2.5 dBs)
NR
circuit
Rev.4, Jun. 1997, page 18 of 57
The each level shown above is typical value when
a) PB mode
offering Dolby level to test point pin (IA OUT) with
the gain of electrical volume is under the condition
of max.
Figure 4 Input Block Diagram
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