A
4 4
MANUFACTURE
INTEL
INTEL
TI
TI
SHARP
AMD
ATMEL
SST
SST
SST
SST
ST RESET
ST
LA0
LD15
VCC
VCC33
3 3
2 2
1 1
IC10
LA16
LA15
LA14
LA13
LA12
LA11
LA10
LA9
10
11
-RST
12
13
14
15
LA19
16
LA18
17
LA8
18
LA7
19
LA6
20
LA5
21
LA4
22
LA3
23
LA2
24 25
-WRHL
-SWRLL
-LCS2
-LCS3
EM-MARIN
RESET IC
IC18
NC
GND
NC
RES
VDD
V6300,SOT-23 5L
Package: SOT-23 5L
The information has been checked and is believed to be reliable. However, no responsibility is assumed for inaccuracies. Circuit diagrams are provided as a means of illustrating typical applications; consequently complete information for construction purposes is not necessarily given. ESS reserves the right to make changes at any time in order to improve the design.
28F800B5
TMS28F400AXY
TMS28F800AXY
LHF80V11
AM29F800B
AT49F8192A(T)
SST39VF400
SST39VF800
ST39VF800Q
M29F800AT
M29F800AB
MX29F800T/B
R2270,0603
R228(DEL)0,0603 UM
R2290,0603
R2300,0603 UM
1
A15
2
A14
3
A13
4
A12
5
A11
6
A10
7
A9
8
A8
9
NC
NC
W
RP
VPP
DU/WP
NC
NC
A17
A7
A6
A5
A4
A3
A2
A1 A0
-HRST7
-HRD7
-HWR7
EAUX402
EARPHONE2
HIORDY7
-HIOCS167
-HCS17
-HCS37
HIRQ7
HA07
HA17
HA27
HD[0..15]7
VCC
1
2
3
4
5
PIN 9
PIN10
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC RESET
NC
SA[0..16]
SA[0..16]4
BYTE
R2250,0603
R226
0,0603 UM
48
A16
47
BYTE
46
GND
45
DQ15/A_1
44
DQ7
43
DQ14
42
DQ6
41
DQ13
40
DQ5
39
DQ12
38
DQ4
37
VCC
36
DQ11
35
DQ3
34
DQ10
33
DQ2
32
DQ9
31
DQ1
30
DQ8
29
TMS28F400Axy
DQ0
28
G
27
GND
26
E
R2310,0603 UM
R2320,0603
R223(DEL)0,0603 UM
R2220,0603
SD[0..7]
SD[0..7]4
-HRST
HD[0..15]
-RST
-REST
A
2
PIN 12
RP
RP
RP
RP
RP
RESET
RESET
NC
NC
NC
NC
RESET
LA17
LD7
LD14
LD6
LD13
LD5
LD12
LD4
LD11
LD3
LD10
LD2
LD9
LD1
LD8
LD0
-LOE
LA1
HD0
HD1
HD2
HD3
HD4
HD5
HD6
HD7
HD8
HD9
HD10
HD11
HD12
HD13
HD14
HD15
PIN14
PIN13
VPP
WP#
WP#
VPP
DU/WP
VPP
DU/WP
VPP
WP#NC
VPP
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
RN14 NC
SA0
1
SA1
3
SA2
5
SA3
7 8
SA4
SA5
SA6
SA7
RN16 NC
SA8
1
SA9
3
SA10
5
SA11
7 8
SA12
SA13
SA14
SA15
SA16
R135(DEL)
0,0603 UM(DEL)
SD0
SD1
SD2
SD3
SD4
SD5
SD6
SD7
RN21 33x4
1
3
5
7 8
RN23 33x4
1
3
5
7 8
R52 10K,0603
R53 10K,0603
R54 10K,0603
PIN15PART #
NC
NC
NC
NC
RY/BY#
RY/BY#
NC
NC
NC
NC
NC
RY/BY#
RY/BY#
RY/BY#MXIC
R18 100,0603
R136(DEL)
0,0603 UM(DEL)
LOE 4
RN18 NC
1
3
5
7 8
2
4
6
2
4
6
LA17
LA18
LA19
PIN47
PIN16
BYTE
NC28F400B5
A18
BYTE
BYTE
NC
BYTE
A18
BYTE
A18
BYTE
A18
BYTE
A18
NC
NC
A18
NC
VDDQSST39VF400Q
NC
VDDQ
A18
A18
BYTE
A18
BYTE
A18
BYTE
27/33M
-LCS3
2
4
6
RN15 NC
1
3
5
7 8
2
4
6
RN17 NC
1
3
5
7 8
2
4
6
RN19 NC
1
3
5
7 8
-HRD
-HWR
HIORDY
-HIOCS16
-HCS1
-HCS3
HIRQ
RN20 33x4
1
3
5
7 8
RN22 33x4
1
3
5
7 8
105
-RST
173
174
-LCS2
175
176
-WRLL
198
-WRHL
199
-LOE
170
LA0
204
LA1
205
LA2
206
LA3
207
LA4
2
LA5
4
LA6
6
LA7 VREF
LA8
LA9
LA10
LA11
LA12
2
LA13
4
LA14
6
LA15
LA16
LA17
LA18
LA19
LD0
178
LD1
179
LD2
180
LD3
181
LD4
182
2
LD5
185
4
LD6
186
6
LD7
187
LD8
188
LD9
189
LD10
190
LD11
191
LD12
194
LD13
195
LD14
196
LD15
197
145
150
149
143
142
146
151
152
153
144
HA0
154
HA1
155
HA2
158
122
2
123
4
124
6
125
126
127
128
131
2
132
4
133
6
134
135
136
137
140
141
AUX3
-WRLL -SWRLL
B
VCC
R11
4.7K,0603
R12
4.7K,0603 UM
CLK
24
RESET
LCS0
LCS1
LCS2
LCS3
LWRLL
LWRHL
LOE
LA0
LA1
LA2
LA3
2
LA4
3
LA5
4
LA6
5
LA7
6
LA8
7
LA9
10
LA10
11
LA11
12
LA12
13
LA13
14
LA14
15
LA15
16
LA16
19
LA17
20
LA18
21
LA19
22
LA20
23
LA21
LD0
LD1
LD2
LD3
LD4
LD5
LD6
LD7
LD8
LD9
LD10
LD11
LD12
LD13
LD14
LD15
HRST/EAUX3[5]
HRD/DCI_ACK/EAUX4[6]
HWR/DCI_CLK/EAUX4[5]
HRDQ/EAUX4[0]
HWRQ/DCI_REQ/EAUX4[1]
HIORDY/EAUX3[3]
HIOCS16/CAMPCLK/EAUX3[4]
HCS1FX/EAUX3[7]
HCS3FX/EAUX3[6]
HIRQ/DCI_ERR/EAUX4[7]
HA0/EAUX4[2]
HA1/EAUX4[3]
HA2/EAUX4[4]
HD0/DCI[0]/EAUX1[0]
HD1/DCI[1]/EAUX1[1]
HD2/DCI[2]/EAUX1[2]
HD3/DCI[3]/EAUX1[3]
HD4/DCI[4]/EAUX1[4]
HD5/DCI[5]/EAUX1[5]
HD6/DCI[6]/EAUX1[6]
HD7/DCI[7]/EAUX1[7]
HD8/DCI_FDS/EAUX2[0]
HD9/EAUX2[1]
HD10/EAUX2[2]
HD11/EAUX2[3]
HD12/EAUX2[4]
HD13/EAUX2[5]
HD14/EAUX2[6]
HD15/EAUX2[7]
214
IC19
NC7SZ125
B
CHIP
VCC33
VC33
VC33
VC33
ES6008
ES6018
ES6028
ES6038
VC33
FREQ SOURCE
DCLKINPUT OR CRYSTALOSC
DCLKINPUT OR CRYSTALOSC
DCLKINPUT OR CRYSTALOSC
DCLKINPUT AND CRYSTALOSC
MULTIPLL0(pin33)
4.250
reserved
bypass
3.75
4.5
reserved
3.50
VCC33
130
148
157
159
164
VC33
VC33
VC33
VC33
VC33
Pull high TDMDX
to select 8-bit
ROM boot, pull
low to select
16-bit ROM boot
2526282930
31
TDMFS
TDMDR
TDMCLK
TDMTSC
TDMDX/RSEL
Pull high ES60x8 pin 41 to use
DCLK for clock source, no need
for XIN/XOUT crystal circuitry
PLL3(pin41)
CLK SOURCE
DCLK INPUT1
CRSTAL OSC
0
PLL1(pin36)
PLL2(pin32)
0
0
0
0
1
1
0
01
1
11
1
1
VCC33P
VCC33E
111
AVCC(PLL)
AVCC(VDAC)
0
1 NA
0
0
1
104
FB2 FB
FB3 FB
1
18
596875929951104
VC33
VC33
VC33
VC33
VC33
ES60x8
VSS
VSS
VSS
NC/CAMVS
42
VCC
CAMYUV0
CAMYUV1
202
203
R214
4.7K,0603
AVSS(VDAC)
112
AVSS(PLL)
52
8
17
VSS
VSS
VSS
34
43
60
67
R221 0,0603
VSS
VSS
VSS
VSS
76
84
91
Frequency
114.75
27
101.251
121.5
NA
94.5
108
9
183
193
201
VC33
VC33
VC33
VSS
VSS
VSS
VSS
VSS
VSS
129
98
103
120
138
147
156
PRST#AUX3
R220 4.7K,0603 UM
R217 4.7K,0603 UM
C
R44
INSTALL
INSTALL
INSTALL
REMOVE
VCC
VCC
R1
OPEN
(4.7K)
R7
4.7K,0603
VCC25
35
83
121
13927172
44
VC25
VC25
VC25
VC25
VC25
VC25
VC25
PCLK2XSCN/CAMYUV4
PCLKQSCN/CAMYUV5/AUX3[2]
HSSCN/CAMYUV7/EAUX3[0]
VSSCN/CAMYUV6/EAUX3[1]
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
163
171
177
184
192
200
208
PRST# 4
VCC33
C
MULTI
DCLKINPUT
NA
X4
X4
NA
X4
NA 108.0MHz
X3.5
33.3MHz
VCC
R2
R3
4.7K,0603
4.7K,0603
R8
R9
NC
NC
(4.7K)
(4.7K)
IC9
ES60x8
39
MCLK
40
TBCK
32
TWS/SEL_PLL2
33
TSD0/SEL_PLL0
36
TSD1/SEL_PLL1
37
TSD2
38
TSD3
47
RBCK
46
RWS
45
RSD
YUV0/CAMYUV2
YUV1/VREF
YUV2/CDAC
YUV3/COMP
YUV4/RSET
YUV5/YDAC
YUV6/VDAC
YUV7CAMYUV3
DCS0
DCS1
DRAS0
DBANK0/DRAS1
DBANK1/DRAS2
DCAS
DSCK/DOE
DSCK
DMA0
DMA1
DMA2
DMA3
DMA4
DMA5
DMA6
DMA7
DMA8
DMA9
DMA10
DMA11
DB10
DB11
DB12
DB13
DB14
DB15
AUX0
AUX1
AUX2
AUX3
AUX4
AUX5
AUX6
AUX7
XOUT
NC/APLL
48
C16
OPEN,0603
SCAP2-06
DWE
DQM
41
116
117
119
118
106
107
108
109
110
113
114
115
100
97
72
73
74
69
71
70
101
102
53
54
55
56
57
58
61
62
63
64
65
66
77
DB0
78
DB1
79
DB2
80
DB3
81
DB4
82
DB5
85
DB6
86
DB7
87
DB8
88
DB9
89
90
93
94
95
96
160
161
162
165
166
167
168
169
49
XIN
50
SPDIF/SEL_PLL3
FREQ
108.0MHz
108.0MHz
116.7MHz
VCC
R4
4.7K,0603
SPDIF
DSCLK
DMA0
DMA1
DMA2
DMA3
DMA4
DMA5
DMA6
DMA7
DMA8
DMA9
DMA10
DMA11
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
DB8
DB9
DB10
DB11
DB12
DB13
DB14
DB15
R39 33,0603
R40 33,0603
R41 33,0603
R45 33,0603
R47 33,0603
XOUT
27pF,0603
CRYSTALOSC
VCCV
27MHZ
27MHZ
27MHZ
27MHZ
R6
R10
33,0603
NC
(4.7K)
R19 33,0603
R21 33,0603 UM
R22 33,0603 UM
R29 33,0603
R30 33,0603
VCC
R37
R38
1K,0603
1K,0603
AUX0
AUX1
AUX2
AUX3
AUX5 2
XIN
L5
R48 1M,0603
X1 27M
C17
3.3uH
R51 33,0603
C18
27pF,0603
Option to use 27MHz crystal at XIN/XOUT for clock
generation, need to pull low ES60x8 pin 41, no need
for DCLK portion OSC circuitry
FB1 FB
MCLK 2
C3
OPEN,0603
SCAP2-06
R15 OPEN,0603
R16 OPEN,0603
MICMUTE
EAUX30
EAUX31
R24 270,0603
RN1 33x4
1 2
3 4
5 6
7 8
RN2 10x4
7 8
5 6
3 4
1 2
RN3 10x4
1 2
3 4
5 6
7 8
RN4 10x4
1 2
3 4
5 6
7 8
SERIAL EEPROM
VCC
IC21
8
7
6
24C01A
C15
10pF,0603
27/33M
FB4 3.3UH
C250 1000PF
D
VCC
SPDIF1 3
MICMUTE 3
HSYN
VSYN
EAUX30 2
EAUX31 2
C12 0.1uF,0603
MA0
MA1
MA2
MA3
DB[0..15]
VCC
WC
SCL
GNDSDA
D
C4
OPEN,0603
SCAP2-06
TWS 2
TSD0 2
TSD1 2
TSD2 2
RBCK 2
RWS 2
VCC33E
R25 0,0603
R27 33,0603
R28 0,0603
R32 68,0603
MA[0..11]
15pF,0603
MA7
MA6
MA5
MA4
MA11
MA10
MA9
MA8
1
S0
2
S1
3
S2
45
R42 4.7K,0603
R46 33,0603
VFD+REMOTE INTERFACE
TBCK 2
C9
0.1uF,0603
C14
VCC
CVBS and
S-VIDEO
VDAC
CV
Y
YDAC
C
CDAC
UDAC
R5
75,0603
R14
75,0603
R17
75,0603
R23
75,0603
CON3
+5V
1
IR
2
GND
3
VFD-CLK
4
VFD-CS
5
VFD-DATA
6
HDR1x 6 (2.54mm)
64M SDRAM
32M SDRAM BA0=0
32M SDRAM BA0=1
32M SDRAM BA1=0
32M SDRAM BA1=1
CVBS and COLOR
DIFFERENCE
DCLK
CKE
-CS0
-RAS0
-CAS
-WE
BANK0
BANK1
R,G,B
CV
Y
PB
PR
L1 2.4UH
C1
470pF,0603
L2 2.4UH
C5
470pF,0603
L3 2.4UH
C7
470pF,0603
L4 2.4UH
C10
470pF,0603
IC7
MA0
23
A0
MA1
24
A1
MA2
25
A2
MA3
26
A3
MA4
29
A4
MA5
30
A5
MA6
31
A6
MA7
32
A7
MA8
33
A8
MA9
34
A9
MA10
22
A10
MA11
35
A11
38
CLK
37
CKE
19
CS
18
RAS
17
CAS
16
WE
DQMX
15
DQML
39
DQMH
20
BA0
21
BA1
36
NC
40
NC
4Mx16 SDRAM (9ns)
32/64MBIT SDRAM
R310
R312
R313
CLOSE
CLOSE
OPEN OPEN
CLOSE OPEN
OPEN
OPEN
OPEN
CLOSE
OPEN
OPEN
CLOSE
CLOSE
OPEN
OPEN
G
R
B
C2
470pF,0603
C6
470pF,0603
C8
470pF,0603
C11
470pF,0603
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
VCC
VCC
VCC
VCCQ
VCCQ
VCCQ
VCCQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
OPEN
OPEN
OPEN
OPEN
CLOSE
E
E
VIDEO OUT
VDAC
YDAC
CDAC
UDAC
VCCV
D1
1N4148,LL-34
D3
1N4148,LL-34
D5
1N4148,LL-34
D7
1N4148,LL-34
2
4
5
7
8
10
11
13
42
44
45
47
48
50
51
53
1
14
27
3
9
43
49
6
12
46
52
28
41
54
R308R311
OPEN
OPEN
OPEN
CLOSE
OPEN
VCC33
R306
CLOSE
OPEN
OPEN
CVBS 3
LUMA 3
CHROMA 3
U 3
VCCV
D2
1N4148,LL-34
D4
1N4148,LL-34
VCCVVCCV
D6
1N4148,LL-34
D8
1N4148,LL-34
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
DB8
DB9
DB10
DB11
DB12
DB13
DB14
DB15
R307
OPEN
CLOSE
OPEN
OPENOPEN
OPEN