Gigabyte Gigabyte_2/GN-WPKG rev.1.1 Schematic

1 頁, 1 Technical Information Release Notice
Technical Information Release Notice
Doc Type Schematic Date 2005/2/1 上午 11:05:37
Project Code S93006-0 Customer
Project Name GN-WPKG Revision Old 1.0 New 1.1
Model Name GC-WPKG IT Doc No DR052013
P/N N/A RD Doc No
PCB Rev. 1.1 Check Sum
R N M
P/N Description
Description Release GN-WPKG 1.1 Schematic
Remark Approved By andy.chen 2005/2/3 上午 10:59:23 Applicant vikin.chen
Research Management
yuling.cheng 2005/2/3 上午 11:15:36
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Validation Manager 890622(何士弘 ) Project Manager 90C045(陳銘麟)
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Effected Class
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2005/2/3http://gwfap/ef2kweb/CHT/Forms/RTC009/RTC009_P.asp
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1
PCI I/F and Power
D D
C C
B B
4-PCI.SCH
AD[0..31]
CCLK
CBE3B CBE2B CBE1B CBE0B
FRAMEB
IRDYB
TRDYB
DEVSELB
MRSTB
INTAB REQB
GNTB
STOPB SERRB PERRB
IDSEL
RADIO_PD#
PAR
AD[0..31] CCLK CBE3B
CBE2B CBE1B CBE0B
PAR FRAMEB IRDYB TRDYB DEVSELB
MRSTB INTAB
REQB GNTB STOPB SERRB PERRB
IDSEL RADIO_PD#
MAC RT2560
AD[0..31] CCLK CBE3B
CBE2B CBE1B CBE0B
PAR FRAMEB IRDYB TRDYB DEVSELB
MRSTB INTAB
REQB GNTB STOPB SERRB PERRB
IDSEL RADIO_PD#
3-RT2560-MPCI.SCH
TX_BB_Q+
TX_BB_Q-
TX_BB_I+
TX_BB_I-
RX_BB_Q+
RX_BB_Q­RX_BB_I+
RX_BB_I-
AGC
IREF
LNA0 LNA1
40MI
RFRX_PE RFTX_PE
RF_LE-G# SYNDATA
SYNCLK
LD_FO
TSSI
TR_SWN
TR_SW
PA_PE_G
TX_BB_Q+ TX_BB_Q­TX_BB_I+ TX_BB_I-
RX_BB_Q+ RX_BB_Q­RX_BB_I+ RX_BB_I-
AGC IREF
LNA0 LNA1
40MI
RFRX_PE RFTX_PE RF_LE-G#
SYNDATA SYNCLK
LD_FO
TSSI TR_SWN TR_SW PA_PE_G
Transceiver RT2525
TX_BB_Q+ TX_BB_Q­TX_BB_I+ TX_BB_I-
RX_BB_Q+ RX_BB_Q­RX_BB_I+ RX_BB_I-
AGC IREF
LNA0 LNA1 40MI
RFRX_PE RFTX_PE RF_LE-G#
SYNDATA SYNCLK
LD_FO
1-RT2525.SCH
PA RFIC and TX/RX
LNA1
TSSI TR_SWN TR_SW PA_PE_G
2-PA-RFIC.SCH
PA_RFIN
PA_RFIN
RFIN
RFIN
RFIN
PA_RFIN
GIGABYTE TECHNOLOGY, CORP.
A A
CONFIDENTIAL
GIGABYTE TECHNOLOGY CORPORATION
Title
GC-WPKG : PCI System - RT2560 + RT2525
Size Document Number Rev
B
PCI-RT2560-RT2525-RFIC-V12.SCH
5
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3
2
Date: Sheet
15Tuesday, February 01, 2005
1
of
1.1
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