Gigabyte GC-WMKG rev.1.1 Schematics

5

4

3

2

1

CARDBUS

D D

AD[0..31]

CCLK

CBE3B
CBE2B
CBE1B

CBE0B

FRAMEB

IRDYB

TRDYB

DEVSELB

MRSTB

INTAB

REQB

GNTB

STOPB

SERRB

C C

PERRB

CLKRUNB

IDSEL

RADIO_PD#

AD[0..31]
CCLK
CBE3B

CBE2B
CBE1B
CBE0B

PAR

PAR

FRAMEB
IRDYB AGC
TRDYB
DEVSELB

MRSTB
INTAB

REQB
GNTB
STOPB
SERRB
PERRB

CLKRUNB

IDSEL

RADIO_PD#

MAC RT2560

AD[0..31]

CCLK

CBE3B

CBE2B

CBE1B

CBE0B

PAR
FRAMEB

IRDYB
TRDYB
DEVSELB

MRSTB

INTAB
REQB

GNTB

STOPB

SERRB

PERRB

CLKRUNB

IDSEL
RADIO_PD#

TX_BB_Q+

TX_BB_Q-

TX_BB_I+

TX_BB_I-

RX_BB_Q+

RX_BB_Q­RX_BB_I+

RX_BB_I-

AGC

IREF

LNA0
LNA1

40MI

RFRX_PE
RFTX_PE

RF_LE-G#

SYNDATA

SYNCLK

LD_FO

TX_BB_Q+
TX_BB_Q­TX_BB_I+
TX_BB_I-

RX_BB_Q+1
RX_BB_Q-1
RX_BB_I+1
RX_BB_I-1

IREF

LNA0
LNA1

40MI

RFRX_PE
RFTX_PE
RF_LE-G#

SYNDATA
SYNCLK

LD_FO

(PE1)

(PE2)

Transceiver RT2525

TX_BB_Q+

TX_BB_Q­TX_BB_I+

TX_BB_I­RX_BB_Q+

RX_BB_Q­RX_BB_I+
RX_BB_I-

AGC

IREF

LNA0
LNA1
40MI

RFRX_PE
RFTX_PE

RF_LE-G#

SYNDATA

SYNCLK

LD_FO

RFIN

PA_RFIN

RFIN

PA_RFIN

1-RT2525.SCH

4-CARDBUS.SCH

B B

TSSI

ANTSEL_N
ANTSEL_P
TSSI
TR_SWN
TR_SW
PA_PE_G

ANTSEL_N
ANTSEL_P

TR_SWN

TR_SW

PA_PE_G

3-RT2560-CB

LNA1

PA RFIC and TX/RX

LNA1

ANTSEL_N

ANTSEL_P

TSSI
TR_SWN
TR_SW
PA_PE_G

2-PA-RFIC.SCH

PA_RFIN

RFIN

A A

Title

GC-WMKG

Size Document Number Rev

B

15Thursday, February 26, 2004

5

4

3

2

Date: Sheet

1

of

1.1