第 1 頁, 共 1 頁 Technical Information Release Notice
Technical Information Release Notice
Doc Type Schematic Date 2005/11/10 下午 10:12:43
Project Code S94034-0 Customer
Project Name GA-7A8DRL Revision Old N/A New 2.0
Model Name GA-7A8DRL IT Doc No DR05B057
P/N RD Doc No
PCB Rev. 2.0 Check Sum
GA-7A8DRL 2.0A
FINISHED GOOD
P/N Description
Description release GA-7A8DRL MB sch.
Remark
Approved By billy1.chen 2005/11/11 下午 04:40:12 Applicant Ryan.Chen
Research
Management
yuling.cheng
2005/11/11 下午
05:26:05
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Validation Manager Project Manager
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2005/11/11 http://gwfap/ef2kweb/CHT/Forms/RTC009/RTC009_P.asp
yuling.cheng
GIGABYTE GA-7A8DRL REFERENCE SCHEMATIC
REVISION:2.0
SHEET 1 COVER SHEET
SHEET 2 BLOCK DIAGRAM
SHEET 3 Power Consumption
SHEET 4 Opteron P0 LDT0
SHEET 5 Opteron P0 LDT1
SHEET 6 Opteron P0 LDT2
SHEET 7 Opteron P0 Misc
SHEET 8 Opteron P0 Power/Gnd
SHEET 9 Opteron P0 Misc Power 1
SHEET 10 Opteron P0 DDR Interface
SHEET 11 Opteron P0 DDR POWER
SHEET 12 Opteron P0 VTT / VDDIO Decoupling
SHEET 13 Opteron P0 DDR DIMM0
SHEET 14 Opteron P0 DDR DIMM1
SHEET 15 Opteron P0 DDR DIMM2
SHEET 16 Opteron P0 DDR DIMM3
SHEET 17 Opteron P0 DDR Data Termination
SHEET 18 Opteron P0 DDR ADDr/Cmd Ter mi nat ion
SHEET 19 Opteron P0 POWER Decoupling
SHEET 20 Opteron P1 LDT0
SHEET 21 Opteron P1 LDT1
SHEET 22 Opteron P1 LDT2
SHEET 23 Opteron P1 Misc
SHEET 58 FRONT PANEL
SHEET 59 P0 PWM ISL6559CR ( +12V Vin )
SHEET 60 P1 PWM ISL6559CR ( +12V Vin )
SHEET 61 Power Sequencing Circuit
SHEET 62 82545GM_CONTROLLER
SHEET 63 82545GM_ PWR
SHEET 64 82545GM_1.5_2.5_POWER
SHEET 65 Giga_LAN_RJ45
SHEET 66 PCIX-SODIMM
SHEET 67 ATP867-B 4 PORT IDE
SHEET 68 FAN1-2
SHEET 69 BLANK
SHEET 70 KENAI 32/82541GI
SHEET 71 ATI_RAGE_XL
SHEET 72 FRAME_BUFFER_SDRAM
SHEET 73 VGA_CON
SHEET 74 W83791D_HW_MONITOR
SHEET 75 GSMI
SHEET 76 EATX_form factors
SHEET 77 VLDT1.2&VDD1D8V POWER
SHEET 78 PCI-X/PCI MAP
SHEET 79 I2C Routing Map
SHEET 80 Power Routing Map
SHEET 24 P1 DDR POWER SHEET 81 History
SHEET 25 P1 Misc POWER
SHEET 26 Opteron P1 POWER/GND
SHEET 27 Opteron P1 VTT / VDDIO Decoupling
SHEET 28 Opteron P1 DDR Interface
SHEET 29 Opteron P1 DDR DIMM0
SHEET 30 Opteron P1 DDR DIMM1
SHEET 31 Opteron P1 DDR DIMM2
SHEET 32 Opteron P1 DDR DIMM3
SHEET 33 Opteron P1 DDR DDR Data Terminat io n
SHEET 34 Opteron P1 DDR ADDr/Cmd Ter mi nat ion
SHEET 35 Opteron P1 POWER Decoupling
SHEET 36 AMD-8131 Golem LDT
SHEET 37 G0 PCIX Mode And Freq
SHEET 38 AMD-8131 Golem Bridge A
SHEET 39 AMD-8131 Golem Bridge B
SHEET 40 AMD-8131 Golem Decoupling
SHEET 41 Golem PCI-X_B Slot1
SHEET 42 Golem PCI-X_B Slot2
JUMPER SETTING
CLR_CMOS
1-2
CLEAR CMOS
NORMAL 2-3
BIOS_WP
WRITE PROTECT
1-2
2-3
NORMAL
SHEET 43 Golem PCI-X_A Slot1
SHEET 44 Golem PCI-X_A Slot2
SHEET 45 AMD-8111 THOR HT & LPC & MII
SHEET 46 AMD-8111 THOR MISC INTE RF ACE
SHEET 47 AMD-8111 THOR POWER & GND
SHEET 48 AMD-8111 THOR CONFIGURATION
SHEET 49 AMD-8111 THOR PCI & EIDE
SHEET 50 PCI SLOT X2
SHEET 51 USB PORT
SHEET 52 ATA-133 EIDE Interface
SHEET 53 ITE LPC SIO
SHEET 54 LPT & COM
SHEET 55 PS2 DEVICE
SHEET 56 BIOS ROM
SHEET 57 CLOCK_GENERATOR
THOR GPIO
GPIO0/ACAV
**
GPIO1/AGPSTOP#
**
GPIO2/BATLOW#
**
GPIO3/C32KHZ
**
GPIO4
**
GPIO5/CLKRUN#
GPIO6/CPUSLEEP#
GPIO7/CPUSTOP#
**
GPIO8
**
GPIO9/FANCON1
**
GPIO10/FANRPM
GPIO11/INTIRQ8#
**
GPIO12/IRQ1
**
GPIO13/IRQ6
**
GPIO14
**
GPIO15/IRQ12
GPIO16
GPIO17
GPIO18/LID
**
GPIO19/PNPIRQ0
GPIO20/PNPIRQ1
GPIO21/PNPIRQ2
GPIO22/SMBALERT0#
**
GPIO23/SLPBTN#
**
GPIO24/SMBALERT1#
GPIO25/SUSPEND#
GPIO26
**
GPIO27
**
GPIO28
GPIO29
**
GPIO30
GPIO31
**
GPIO0 PULL DOWN
GPIO1
GPIO2
GPIO3
GPIO4
FUNCTION
ACAV
GPO1
LPC_PME#
SUSCLK
GPIO PORT
NOT USED
HM_SMI
BIOS_WP#
GPIO PORT
GPIO PORT
SLEEP LED N.C.
BIOS_TBL#
IRQ1
IRQ6
MEMRST TIMING
CLEAR PASSWORD
NMI SW
GPIO PORT
LID
MEMRST TIMING
-OVT
NOT USED
SM BUS ALERT
SLPBTN#
NOT USED
GPO25
DCABLEIDS#
DCABLEIDP#
GPIO PORT
GPIO PORT
GPIO PORT
GPIO PORT
FUNCTION
NOT USED
NOT USED
NOT USED
GIGABYTE THCHNOLOGIES , INC.
Title
Size Document Number Rev
Custom
Date: Sheet
PULL UP/DOWN
PULL UP 3VDUALL
N.C.
PULL UP TO 3VDUAL
N.C.
NC
PULL UP TO VCC3
PULL UP TO VCC3
PULL UP TO VCC3
N.C.
N.C.
PULL UP TO VCC3
PULL UP TO VCC3
PULL UP TO VCC3
PULL DOWN
PULL UP TO VCC3
PULL UP TO VCC3
N.C.
PULL UP 3VDUALL
PULL DOWN
PULL UP TO VCC3
PULL DOWN
PULL UP TO 3VDUAL
PULL UP TO 3VDUAL
PULL UP TO 3VDUAL
PULL UP TO 3VDUAL
PULL UP TO VCC3
PULL UP TO VCC3
N.C.
N.C.
N.C.
N.C.
PULL UP/DOWN LPC FLASH ROM GPIO
PULL DOWN NOT USED
PULL DOWN
PULL DOWN NOT USED
PULL DOWN
COVER SHEET
GA-7A8DRL
2.0
of
18 1 Thursday, November 10, 2005
Registered
DDR400 SDRAM X4
Sheets 29-32
Opteron 1
Sheets 20-35
Block Diagram
LINK 1 16X16
6.4GB/S
Opteron 0
Sheets 4-19
Registered
DDR400 SDRAM X4
Sheets 13-16
PCI-X
SODIMM
SHEET
66
GigaLAN
Intel
82545GM
Sheet
62-64
channel A
channel B
PCI-X
SLOT X2
SHEET
43-44
PCI-X
Slots x 2
Sheet 41-42
LINK 0 16X16
6.4GB/S
8131
Sheets 36-40
LPC ROM
Sheet 56
8111
Sheets 45-49
LPC
LPC Super
I/O
ITE8712F
Sheet 53
LINK 2 8X8
800MB/S
PCI 32b/33MHz
USB 1.0
PCI VGA
ATI RANGE_XL
VGA X1
SHEET 71-72
Rear USB 1.0 x2
Sheets 51
PCI Slots x 2
Sheets 50
ACARD
ATP867
P-IDE x4
SHEET 67 SHEET 70
EIDE (ATA/100) x2
Sheet 52
Front USB 1.0 x2
Sheets 51
Floppy Disk Drive
Sheet 53
PS2 DEVICE
Sheet 55
LPT X1 &
COM X2
Sheet 54
Intel 82541GI
Giga bit LAN
GIGABYTE THCHNOLOGIES , INC.
Title
Size Document Number Rev
Custom
Date: Sheet
D
BLOCK DIAGRAM
GA-7A8DRL
2.0
of
28 1 Thursday, November 10, 2005
AMD - 8131 PCI-X Tunnel
VDD12A : Provides power to A side of the Tunnel.
VDD12B : Provides power to B side of the Tunnel.
VDD18 : 1.8 Volt power plane for the core logic.
VDD18A : Analog 1.8 Volt power plane for the PLLs in the core logic.
VCC3 : 3.3 Volt power plane for PCI I/O.
3VSB : 3.3 Volt auxiliary power plane for PME signal.
VCC3 is required to always be higher than VDD18,VDDA18,VDD12A,VDD12B.
VDD18,VDD18A is required to always be higher VDD12A,VDD12B.
VTT
VDD_2D5V
VDDA_2D5V
(Opteron_PLL)
Vcore
Opteron Power Sequence
Power up
Power down
AMD - 8111 I/O HUB
VDD_IO : 3.3 V supply.
VDD_CORE : 1.8 V supply.
VDD_IOX : 3.3 V supply
VDD_COREX : 1.8 V supply
VDD_LDT : 1.2 V supply
VDD_REF : 5 V supply
VDD_RTC : 3.3 V supply
VDD_USB : 3.3 V supply
VDD_USBA : 1.8 V supply
VDD_IOAL : 3.3 V supply
VDD_COREAL : 1.8 V supply
VLDT
GIGABYTE THCHNOLOGIES , INC.
Title
Size Document Number Rev
Custom
Date: Sheet
Power Sequence
GA-7A8DRL
of
38 1 Thursday, November 10, 2005
2.0
5
D D
VLDT_1D2V
U1A
N7
VLDT_0(1)
R7
VLDT_0(2)
U7
VLDT_0(3)
W7
VLDT_0(4)
M8
VLDT_0(5)
P8
VLDT_0(6)
AA7
VLDT_0(7)
V8
VLDT_0(8)
Y8
P0_HTL0_CADIN_H15 36
P0_HTL0_CADIN_L15 36
P0_HTL0_CADIN_H14 36
P0_HTL0_CADIN_L14 36
P0_HTL0_CADIN_H13 36
P0_HTL0_CADIN_L13 36
P0_HTL0_CADIN_H12 36
P0_HTL0_CADIN_L12 36
P0_HTL0_CADIN_H11 36
C C
B B
P0_HTL0_CADIN_L11 36
P0_HTL0_CADIN_H10 36
P0_HTL0_CADIN_L10 36
P0_HTL0_CADIN_H9 36
P0_HTL0_CADIN_L9 36
P0_HTL0_CADIN_H8 36
P0_HTL0_CADIN_L8 36
P0_HTL0_CADIN_H7 36
P0_HTL0_CADIN_L7 36
P0_HTL0_CADIN_H6 36
P0_HTL0_CADIN_L6 36
P0_HTL0_CADIN_H5 36
P0_HTL0_CADIN_L5 36
P0_HTL0_CADIN_H4 36
P0_HTL0_CADIN_L4 36
P0_HTL0_CADIN_H3 36
P0_HTL0_CADIN_L3 36
P0_HTL0_CADIN_H2 36
P0_HTL0_CADIN_L2 36
P0_HTL0_CADIN_H1 36
P0_HTL0_CADIN_L1 36
P0_HTL0_CADIN_H0 36
P0_HTL0_CADIN_L0 36
P0_HTL0_CLKIN_H1 36
P0_HTL0_CLKIN_L1 36
P0_HTL0_CLKIN_H0 36
P0_HTL0_CLKIN_L0 36
P0_HTL0_CTRLIN_H 36
P0_HTL0_CTRLIN_L 36
P0_HTL0_CADIN_H15
P0_HTL0_CADIN_L15
P0_HTL0_CADIN_H14
P0_HTL0_CADIN_L14
P0_HTL0_CADIN_H13
P0_HTL0_CADIN_L13
P0_HTL0_CADIN_H12
P0_HTL0_CADIN_L12
P0_HTL0_CADIN_H11
P0_HTL0_CADIN_L11
P0_HTL0_CADIN_H10
P0_HTL0_CADIN_L10
P0_HTL0_CADIN_H9
P0_HTL0_CADIN_L9
P0_HTL0_CADIN_H8
P0_HTL0_CADIN_L8
P0_HTL0_CADIN_H7
P0_HTL0_CADIN_L7 P0_HTL0_CADOUT_H6
P0_HTL0_CADIN_H6
P0_HTL0_CADIN_L6
P0_HTL0_CADIN_H5
P0_HTL0_CADIN_L5
P0_HTL0_CADIN_H4
P0_HTL0_CADIN_L4
P0_HTL0_CADIN_H3
P0_HTL0_CADIN_L3
P0_HTL0_CADIN_H2
P0_HTL0_CADIN_L2
P0_HTL0_CADIN_H1
P0_HTL0_CADIN_L1
P0_HTL0_CADIN_H0
P0_HTL0_CADIN_L0
P0_HTL0_CLKIN_H1
P0_HTL0_CLKIN_L1 P0_HTL0_CLKOUT_L1
P0_HTL0_CLKIN_H0
P0_HTL0_CLKIN_L0
P0_HTL0_CTRLIN_H
P0_HTL0_CTRLIN_L
VLDT_0(9)
R5
L0_CADIN_H(15)
T5
L0_CADIN_L(15)
P3
L0_CADIN_H(14)
P4
L0_CADIN_L(14)
N5
L0_CADIN_H(13)
P5
L0_CADIN_L(13)
M3
L0_CADIN_H(12)
M4
L0_CADIN_L(12)
K3
L0_CADIN_H(11)
K4
L0_CADIN_L(11)
J5
L0_CADIN_H(10)
K5
L0_CADIN_L(10)
H3
L0_CADIN_H(9)
H4
L0_CADIN_L(9)
G5
L0_CADIN_H(8)
H5
L0_CADIN_L(8)
R3
L0_CADIN_H(7)
R2
L0_CADIN_L(7)
N1
L0_CADIN_H(6)
P1
L0_CADIN_L(6)
N3
L0_CADIN_H(5)
N2
L0_CADIN_L(5)
L1
L0_CADIN_H(4)
M1
L0_CADIN_L(4)
J1
L0_CADIN_H(3)
K1
L0_CADIN_L(3)
J3
L0_CADIN_H(2)
J2
L0_CADIN_L(2)
G1
L0_CADIN_H(1)
H1
L0_CADIN_L(1)
G3
L0_CADIN_H(0)
G2
L0_CADIN_L(0)
L5
L0_CLKIN_H(1)
M5
L0_CLKIN_L(1)
L3
L0_CLKIN_H(0)
L2
L0_CLKIN_L(0)
R1
L0_CTLIN_H(0)
T1
L0_CTLIN_L(0)
4
L0_CADOUT_H(15)
L0_CADOUT_L(15)
L0_CADOUT_H(14)
L0_CADOUT_L(14)
L0_CADOUT_H(13)
L0_CADOUT_L(13)
L0_CADOUT_H(12)
L0_CADOUT_L(12)
L0_CADOUT_H(11)
L0_CADOUT_L(11)
L0_CADOUT_H(10)
L0_CADOUT_L(10)
L0_CADOUT_H(9)
L0_CADOUT_L(9)
L0_CADOUT_H(8)
L0_CADOUT_L(8)
L0_CADOUT_H(7)
L0_CADOUT_L(7)
L0_CADOUT_H(6)
L0_CADOUT_L(6)
L0_CADOUT_H(5)
L0_CADOUT_L(5)
L0_CADOUT_H(4)
L0_CADOUT_L(4)
L0_CADOUT_H(3)
L0_CADOUT_L(3)
L0_CADOUT_H(2)
L0_CADOUT_L(2)
L0_CADOUT_H(1)
L0_CADOUT_L(1)
L0_CADOUT_H(0)
L0_CADOUT_L(0)
L0_CLKOUT_H(1)
L0_CLKOUT_L(1)
L0_CLKOUT_H(0)
L0_CLKOUT_L(0)
L0_CTLOUT_H(0)
L0_CTLOUT_L(0)
P0_HTL0_CADOUT_H15
V4
P0_HTL0_CADOUT_L15
V3
P0_HTL0_CADOUT_H14
Y5
P0_HTL0_CADOUT_L14
W5
P0_HTL0_CADOUT_H13
Y4
P0_HTL0_CADOUT_L13
Y3
P0_HTL0_CADOUT_H12
AB5
P0_HTL0_CADOUT_L12
AA5
P0_HTL0_CADOUT_H11
AD5
P0_HTL0_CADOUT_L11
AC5
P0_HTL0_CADOUT_H10
AD4
P0_HTL0_CADOUT_L10
AD3
P0_HTL0_CADOUT_H9
AF5
P0_HTL0_CADOUT_L9
AE5
P0_HTL0_CADOUT_H8
AF4
P0_HTL0_CADOUT_L8
AF3
P0_HTL0_CADOUT_H7
V1
P0_HTL0_CADOUT_L7
U1
W2
P0_HTL0_CADOUT_L6
W3
P0_HTL0_CADOUT_H5
Y1
P0_HTL0_CADOUT_L5
W1
P0_HTL0_CADOUT_H4
AA2
P0_HTL0_CADOUT_L4
AA3
P0_HTL0_CADOUT_H3
AC2
P0_HTL0_CADOUT_L3
AC3
P0_HTL0_CADOUT_H2
AD1
P0_HTL0_CADOUT_L2
AC1
P0_HTL0_CADOUT_H1
AE2
P0_HTL0_CADOUT_L1
AE3
P0_HTL0_CADOUT_H0
AF1
P0_HTL0_CADOUT_L0
AE1
P0_HTL0_CLKOUT_H1
AB4
AB3
P0_HTL0_CLKOUT_H0
AB1
P0_HTL0_CLKOUT_L0
AA1
P0_HTL0_CTRLOUT_H
U2
P0_HTL0_CTRLOUT_L
U3
P0_HTL0_CADOUT_H15 36
P0_HTL0_CADOUT_L15 36
P0_HTL0_CADOUT_H14 36
P0_HTL0_CADOUT_L14 36
P0_HTL0_CADOUT_H13 36
P0_HTL0_CADOUT_L13 36
P0_HTL0_CADOUT_H12 36
P0_HTL0_CADOUT_L12 36
P0_HTL0_CADOUT_H11 36
P0_HTL0_CADOUT_L11 36
P0_HTL0_CADOUT_H10 36
P0_HTL0_CADOUT_L10 36
P0_HTL0_CADOUT_H9 36
P0_HTL0_CADOUT_L9 36
P0_HTL0_CADOUT_H8 36
P0_HTL0_CADOUT_L8 36
P0_HTL0_CADOUT_H7 36
P0_HTL0_CADOUT_L7 36
P0_HTL0_CADOUT_H6 36
P0_HTL0_CADOUT_L6 36
P0_HTL0_CADOUT_H5 36
P0_HTL0_CADOUT_L5 36
P0_HTL0_CADOUT_H4 36
P0_HTL0_CADOUT_L4 36
P0_HTL0_CADOUT_H3 36
P0_HTL0_CADOUT_L3 36
P0_HTL0_CADOUT_H2 36
P0_HTL0_CADOUT_L2 36
P0_HTL0_CADOUT_H1 36
P0_HTL0_CADOUT_L1 36
P0_HTL0_CADOUT_H0 36
P0_HTL0_CADOUT_L0 36
P0_HTL0_CLKOUT_H1 36
P0_HTL0_CLKOUT_L1 36
P0_HTL0_CLKOUT_H0 36
P0_HTL0_CLKOUT_L0 36
P0_HTL0_CTRLOUT_H 36
P0_HTL0_CTRLOUT_L 36
3
2
1
Opteron
TO AMD 8131
A A
GIGABYTE THCHNOLOGIES , INC.
Title
Size Document Number Rev
Custom
5
4
3
2
Date: Sheet
Opteron P0 LDT Link 0
GA-7A8DRL
1
2.0
of
48 1 Thursday, November 10, 2005
5
D D
VLDT_1D2V
U1E
K10
VLDT_1(1)
J11
VLDT_1(2)
H10
VLDT_1(3)
H8
VLDT_1(4)
K14
VLDT_1(5)
J15
VLDT_1(6)
K16
VLDT_1(7)
J16
VLDT_1(8)
J9
P0_HTL1_CADIN_H15 21
P0_HTL1_CADIN_L15 21
P0_HTL1_CADIN_H14 21
P0_HTL1_CADIN_L14 21
P0_HTL1_CADIN_H13 21
P0_HTL1_CADIN_L13 21
C C
B B
P0_HTL1_CADIN_H12 21
P0_HTL1_CADIN_L12 21
P0_HTL1_CADIN_H11 21
P0_HTL1_CADIN_L11 21
P0_HTL1_CADIN_H10 21
P0_HTL1_CADIN_L10 21
P0_HTL1_CADIN_H9 21
P0_HTL1_CADIN_L9 21
P0_HTL1_CADIN_H8 21
P0_HTL1_CADIN_L8 21
P0_HTL1_CADIN_H7 21
P0_HTL1_CADIN_L7 21
P0_HTL1_CADIN_H6 21
P0_HTL1_CADIN_L6 21
P0_HTL1_CADIN_H5 21
P0_HTL1_CADIN_L5 21
P0_HTL1_CADIN_H4 21
P0_HTL1_CADIN_L4 21
P0_HTL1_CADIN_H3 21
P0_HTL1_CADIN_L3 21
P0_HTL1_CADIN_H2 21
P0_HTL1_CADIN_L2 21
P0_HTL1_CADIN_H1 21
P0_HTL1_CADIN_L1 21
P0_HTL1_CADIN_H0 21
P0_HTL1_CADIN_L0 21
P0_HTL1_CLKIN_H1 21
P0_HTL1_CLKIN_L1 21
P0_HTL1_CLKIN_H0 21
P0_HTL1_CLKIN_L0 21
P0_HTL1_CTRLIN_H 21
P0_HTL1_CTRLIN_L 21
P0_HTL1_CADIN_H15
P0_HTL1_CADIN_L15
P0_HTL1_CADIN_H14
P0_HTL1_CADIN_L14
P0_HTL1_CADIN_H13
P0_HTL1_CADIN_L13
P0_HTL1_CADIN_H12
P0_HTL1_CADIN_L12
P0_HTL1_CADIN_H11
P0_HTL1_CADIN_L11
P0_HTL1_CADIN_H10
P0_HTL1_CADIN_L10
P0_HTL1_CADIN_H9
P0_HTL1_CADIN_L9
P0_HTL1_CADIN_H8
P0_HTL1_CADIN_L8
P0_HTL1_CADIN_H7
P0_HTL1_CADIN_L7
P0_HTL1_CADIN_H6
P0_HTL1_CADIN_L6
P0_HTL1_CADIN_H5
P0_HTL1_CADIN_L5
P0_HTL1_CADIN_H4
P0_HTL1_CADIN_L4
P0_HTL1_CADIN_H3
P0_HTL1_CADIN_L3
P0_HTL1_CADIN_H2
P0_HTL1_CADIN_L2
P0_HTL1_CADIN_H1
P0_HTL1_CADIN_L1
P0_HTL1_CADIN_H0
P0_HTL1_CADIN_L0
P0_HTL1_CLKIN_H1
P0_HTL1_CLKIN_L1
P0_HTL1_CLKIN_H0
P0_HTL1_CLKIN_L0
P0_HTL1_CTRLIN_H
P0_HTL1_CTRLIN_L
TP1 TP2
TP3
E14
E13
C15
D15
E16
E15
C17
D17
C19
D19
E20
E19
C21
D21
E22
E21
C14
B14
A16
A15
C16
B16
A18
A17
A20
A19
C20
B20
A22
A21
C22
B22
E18
E17
C18
B18
A14
A13
C13
D13
VLDT_1(9)
L1_CADIN_H(15)
L1_CADIN_L(15)
L1_CADIN_H(14)
L1_CADIN_L(14)
L1_CADIN_H(13)
L1_CADIN_L(13)
L1_CADIN_H(12)
L1_CADIN_L(12)
L1_CADIN_H(11)
L1_CADIN_L(11)
L1_CADIN_H(10)
L1_CADIN_L(10)
L1_CADIN_H(9)
L1_CADIN_L(9)
L1_CADIN_H(8)
L1_CADIN_L(8)
L1_CADIN_H(7)
L1_CADIN_L(7)
L1_CADIN_H(6)
L1_CADIN_L(6)
L1_CADIN_H(5)
L1_CADIN_L(5)
L1_CADIN_H(4)
L1_CADIN_L(4)
L1_CADIN_H(3)
L1_CADIN_L(3)
L1_CADIN_H(2)
L1_CADIN_L(2)
L1_CADIN_H(1)
L1_CADIN_L(1)
L1_CADIN_H(0)
L1_CADIN_L(0)
L1_CLKIN_H(1)
L1_CLKIN_L(1)
L1_CLKIN_H(0)
L1_CLKIN_L(0)
L1_CTLIN_H(0)
L1_CTLIN_L(0)
L1_RSVD1
L1_RSVD2
Opteron
4
L1_CADOUT_H(15)
L1_CADOUT_L(15)
L1_CADOUT_H(14)
L1_CADOUT_L(14)
L1_CADOUT_H(13)
L1_CADOUT_L(13)
L1_CADOUT_H(12)
L1_CADOUT_L(12)
L1_CADOUT_H(11)
L1_CADOUT_L(11)
L1_CADOUT_H(10)
L1_CADOUT_L(10)
L1_CADOUT_H(9)
L1_CADOUT_L(9)
L1_CADOUT_H(8)
L1_CADOUT_L(8)
L1_CADOUT_H(7)
L1_CADOUT_L(7)
L1_CADOUT_H(6)
L1_CADOUT_L(6)
L1_CADOUT_H(5)
L1_CADOUT_L(5)
L1_CADOUT_H(4)
L1_CADOUT_L(4)
L1_CADOUT_H(3)
L1_CADOUT_L(3)
L1_CADOUT_H(2)
L1_CADOUT_L(2)
L1_CADOUT_H(1)
L1_CADOUT_L(1)
L1_CADOUT_H(0)
L1_CADOUT_L(0)
L1_CLKOUT_H(1)
L1_CLKOUT_L(1)
L1_CLKOUT_H(0)
L1_CLKOUT_L(0)
L1_CTLOUT_H(0)
L1_CTLOUT_L(0)
L1_RSVD3
L1_RSVD4
P0_HTL1_CADOUT_H15
D11
P0_HTL1_CADOUT_L15
C11
P0_HTL1_CADOUT_H14
E9
P0_HTL1_CADOUT_L14
E10
P0_HTL1_CADOUT_H13
D9
P0_HTL1_CADOUT_L13
C9
P0_HTL1_CADOUT_H12
E7
P0_HTL1_CADOUT_L12
E8
P0_HTL1_CADOUT_H11
E5
P0_HTL1_CADOUT_L11
E6
P0_HTL1_CADOUT_H10
D5
P0_HTL1_CADOUT_L10
C5
P0_HTL1_CADOUT_H9
E3
P0_HTL1_CADOUT_L9
E4
P0_HTL1_CADOUT_H8
D3
P0_HTL1_CADOUT_L8
C3
P0_HTL1_CADOUT_H7
A11
P0_HTL1_CADOUT_L7
A12
P0_HTL1_CADOUT_H6
B10
P0_HTL1_CADOUT_L6
C10
P0_HTL1_CADOUT_H5
A9
P0_HTL1_CADOUT_L5
A10
P0_HTL1_CADOUT_H4
B8
P0_HTL1_CADOUT_L4
C8
P0_HTL1_CADOUT_H3
B6
P0_HTL1_CADOUT_L3
C6
P0_HTL1_CADOUT_H2
A5
P0_HTL1_CADOUT_L2
A6
P0_HTL1_CADOUT_H1
B4
P0_HTL1_CADOUT_L1
C4
P0_HTL1_CADOUT_H0
A3
P0_HTL1_CADOUT_L0
A4
P0_HTL1_CLKOUT_H1
D7
P0_HTL1_CLKOUT_L1
C7
P0_HTL1_CLKOUT_H0
A7
P0_HTL1_CLKOUT_L0
A8
P0_HTL1_CTRLOUT_H
B12
P0_HTL1_CTRLOUT_L
C12
E11
E12
P0_HTL1_CADOUT_H15 21
P0_HTL1_CADOUT_L15 21
P0_HTL1_CADOUT_H14 21
P0_HTL1_CADOUT_L14 21
P0_HTL1_CADOUT_H13 21
P0_HTL1_CADOUT_L13 21
P0_HTL1_CADOUT_H12 21
P0_HTL1_CADOUT_L12 21
P0_HTL1_CADOUT_H11 21
P0_HTL1_CADOUT_L11 21
P0_HTL1_CADOUT_H10 21
P0_HTL1_CADOUT_L10 21
P0_HTL1_CADOUT_H9 21
P0_HTL1_CADOUT_L9 21
P0_HTL1_CADOUT_H8 21
P0_HTL1_CADOUT_L8 21
P0_HTL1_CADOUT_H7 21
P0_HTL1_CADOUT_L7 21
P0_HTL1_CADOUT_H6 21
P0_HTL1_CADOUT_L6 21
P0_HTL1_CADOUT_H5 21
P0_HTL1_CADOUT_L5 21
P0_HTL1_CADOUT_H4 21
P0_HTL1_CADOUT_L4 21
P0_HTL1_CADOUT_H3 21
P0_HTL1_CADOUT_L3 21
P0_HTL1_CADOUT_H2 21
P0_HTL1_CADOUT_L2 21
P0_HTL1_CADOUT_H1 21
P0_HTL1_CADOUT_L1 21
P0_HTL1_CADOUT_H0 21
P0_HTL1_CADOUT_L0 21
P0_HTL1_CLKOUT_H1 21
P0_HTL1_CLKOUT_L1 21
P0_HTL1_CLKOUT_H0 21
P0_HTL1_CLKOUT_L0 21
P0_HTL1_CTRLOUT_H 21
P0_HTL1_CTRLOUT_L 21
TP4
3
TO Opteron1
Layout pattern
Copper pour(+12V)
2
1
3
+12V
1 2
3
D
A A
5
1
GND
R1022
1K/6
Q136
2N7002/SOT23
G S
2
1 2
1 2
VCC
1 2
R1020
R1023
1.5K/6
R1024
4.7K/6
1.5K/6
+12V
GND
FANPWM1
2
1
2
1
1 2
C795
22U/1210/16V
Q134
3
2N2907A
Q135
3
2N2907A
FANPWM1 74
4
0/6/X
R1021
1 2
V12_CPU_FAN1
Routed trace
width > 40 mils
C16
0.1U/6/16V
GND
+12V
GND
VCC
1 2
D88
1N5817/X
213
CVS
CPU_FAN1
FAN1x3/W
VCC
R25
8.2K/6
C15
3300P/6/X7R/X
GND
FANIO1
3
FANIO1 74
21
GIGABYTE THCHNOLOGIES , INC.
Title
Size Document Number Rev
Custom
2
Date: Sheet
Opteron P0 LDT Link 1
GA-7A8DRL
1
2.0
of
58 1 Thursday, November 10, 2005
5
P0_VDD_2D5V
P0_VDD_2D5V
R94
C45
100/6/1
4 4
3 3
2 2
1 1
C46
0.1U/6
0.1U/6
V2.5_P0REF
3
C47
0.1U/6
2
GND
5
R97
100/6/1
GND GND
Close to CPU
VCC
8 4
U8A
+
V1.25_P0 P0_CPU_MEMVREF
1
-
LM2904
P0_MEMDATA[127..64] 17
P0_MEMDQS_UPR[17..0] 17
P0_MEMDQS_LWR[17..0] 17
R93
42.2/6/1
42.2/6/1
R95
GND
R96
0/6
P0_VTT_SENSE 11
4
C48
0.01U/6/X
P0_MEMDATA127
P0_MEMDATA126
P0_MEMDATA125
P0_MEMDATA124
P0_MEMDATA123
P0_MEMDATA122
P0_MEMDATA121
P0_MEMDATA120
P0_MEMDATA119
P0_MEMDATA118
P0_MEMDATA117
P0_MEMDATA116
P0_MEMDATA115
P0_MEMDATA114
P0_MEMDATA113
P0_MEMDATA112
P0_MEMDATA111
P0_MEMDATA110
P0_MEMDATA109
P0_MEMDATA108
P0_MEMDATA107
P0_MEMDATA106
P0_MEMDATA105
P0_MEMDATA104
P0_MEMDATA103
P0_MEMDATA102
P0_MEMDATA101
P0_MEMDATA100
P0_MEMDATA99
P0_MEMDATA98
P0_MEMDATA97
P0_MEMDATA96
P0_MEMDATA95
P0_MEMDATA94
P0_MEMDATA93
P0_MEMDATA92
P0_MEMDATA91
P0_MEMDATA90
P0_MEMDATA89
P0_MEMDATA88
P0_MEMDATA87
P0_MEMDATA86
P0_MEMDATA85
P0_MEMDATA84
P0_MEMDATA83
P0_MEMDATA82
P0_MEMDATA81
P0_MEMDATA80
P0_MEMDATA79
P0_MEMDATA78
P0_MEMDATA77
P0_MEMDATA76
P0_MEMDATA75
P0_MEMDATA74
P0_MEMDATA73
P0_MEMDATA72
P0_MEMDATA71
P0_MEMDATA70
P0_MEMDATA69
P0_MEMDATA68
P0_MEMDATA67
P0_MEMDATA66
P0_MEMDATA65
P0_MEMDATA64
P0_MEMDQS_UPR17
P0_MEMDQS_UPR16
P0_MEMDQS_UPR15
P0_MEMDQS_UPR14
P0_MEMDQS_UPR13
P0_MEMDQS_UPR12
P0_MEMDQS_UPR11
P0_MEMDQS_UPR10
P0_MEMDQS_UPR9
P0_MEMDQS_UPR8
P0_MEMDQS_UPR7
P0_MEMDQS_UPR6
P0_MEMDQS_UPR5
P0_MEMDQS_UPR4
P0_MEMDQS_UPR3
P0_MEMDQS_UPR2
P0_MEMDQS_UPR1
P0_MEMDQS_UPR0
P0_MEMDQS_LWR17
P0_MEMDQS_LWR16
P0_MEMDQS_LWR15
P0_MEMDQS_LWR14
P0_MEMDQS_LWR13
P0_MEMDQS_LWR12
P0_MEMDQS_LWR11
P0_MEMDQS_LWR10
P0_MEMDQS_LWR9
P0_MEMDQS_LWR8
P0_MEMDQS_LWR7
P0_MEMDQS_LWR6
P0_MEMDQS_LWR5
P0_MEMDQS_LWR4
P0_MEMDQS_LWR3
P0_MEMDQS_LWR2
P0_MEMDQS_LWR1
P0_MEMDQS_LWR0
4
P0_VTT_SENSE
>25 mils
>25 mils
C49
1000P/6/X
P0_VTT_DDR
AC19
AE19
AE18
AC18
AF19
AF17
AE16
AF22
AG24
AH25
AG26
AH27
AF23
AH24
AF25
AJ26
AG27
AF26
AF28
AE29
AJ29
AH29
AE27
AD26
AD27
AC26
AA26
AA28
AD28
AC27
AB29
AA27
AG25
AF27
AB27
AF24
AG28
AC28
AJ25
AJ30
AD29
AA31
AL25
AL29
AE31
J19
H19
F20
G19
F22
Y27
Y28
V28
U26
Y26
W27
V27
U27
P28
N29
M26
L28
P27
P26
M27
L27
K29
K27
H28
G29
L26
J28
H27
H26
F27
F26
D29
D27
G27
F28
E27
C27
C26
E25
D24
F23
E26
F25
E24
G23
R27
W29
N27
J27
E29
F24
R28
V26
M28
J26
E28
D25
U31
M30
H30
C30
B25
T31
Y29
M29
H29
C29
C25
VTT6
VTT7
VTT4
VTT3
VTT2
VTT1
VTT8
VTT9
VTT_SENSE
MEMZN
MEMZP
MEMVREF0
MEMVREF1
MEMDATA(127)
MEMDATA(126)
MEMDATA(125)
MEMDATA(124)
MEMDATA(123)
MEMDATA(122)
MEMDATA(121)
MEMDATA(120)
MEMDATA(119)
MEMDATA(118)
MEMDATA(117)
MEMDATA(116)
MEMDATA(115)
MEMDATA(114)
MEMDATA(113)
MEMDATA(112)
MEMDATA(111)
MEMDATA(110)
MEMDATA(109)
MEMDATA(108)
MEMDATA(107)
MEMDATA(106)
MEMDATA(105)
MEMDATA(104)
MEMDATA(103)
MEMDATA(102)
MEMDATA(101)
MEMDATA(100)
MEMDATA(99)
MEMDATA(98)
MEMDATA(97)
MEMDATA(96)
MEMDATA(95)
MEMDATA(94)
MEMDATA(93)
MEMDATA(92)
MEMDATA(91)
MEMDATA(90)
MEMDATA(89)
MEMDATA(88)
MEMDATA(87)
MEMDATA(86)
MEMDATA(85)
MEMDATA(84)
MEMDATA(83)
MEMDATA(82)
MEMDATA(81)
MEMDATA(80)
MEMDATA(79)
MEMDATA(78)
MEMDATA(77)
MEMDATA(76)
MEMDATA(75)
MEMDATA(74)
MEMDATA(73)
MEMDATA(72)
MEMDATA(71)
MEMDATA(70)
MEMDATA(69)
MEMDATA(68)
MEMDATA(67)
MEMDATA(66)
MEMDATA(65)
MEMDATA(64)
MEMDQS(35)
MEMDQS(34)
MEMDQS(33)
MEMDQS(32)
MEMDQS(31)
MEMDQS(30)
MEMDQS(29)
MEMDQS(28)
MEMDQS(27)
MEMDQS(26)
MEMDQS(25)
MEMDQS(24)
MEMDQS(23)
MEMDQS(22)
MEMDQS(21)
MEMDQS(20)
MEMDQS(19)
MEMDQS(18)
MEMDQS(17)
MEMDQS(16)
MEMDQS(15)
MEMDQS(14)
MEMDQS(13)
MEMDQS(12)
MEMDQS(11)
MEMDQS(10)
MEMDQS(9)
MEMDQS(8)
MEMDQS(7)
MEMDQS(6)
MEMDQS(5)
MEMDQS(4)
MEMDQS(3)
MEMDQS(2)
MEMDQS(1)
MEMDQS(0)
Opteron
U1B
MEMCLK_UP_H(3)
MEMCLK_UP_L(3)
MEMCLK_UP_H(2)
MEMCLK_UP_L(2)
MEMCLK_UP_H(1)
MEMCLK_UP_L(1)
MEMCLK_UP_H(0)
MEMCLK_UP_L(0)
MEMCLK_LO_H(3)
MEMCLK_LO_L(3)
MEMCLK_LO_H(2)
MEMCLK_LO_L(2)
MEMCLK_LO_H(1)
MEMCLK_LO_L(1)
MEMCLK_LO_H(0)
MEMCLK_LO_L(0)
MEMCHECK(15)
MEMCHECK(14)
MEMCHECK(13)
MEMCHECK(12)
MEMCHECK(11)
MEMCHECK(10)
MEMCKE_UP
MEMCKE_LO
RSVD_MA(15)
RSVD_MA(14)
MEMADD(13)
MEMADD(12)
MEMADD(11)
MEMADD(10)
MEMADD(9)
MEMADD(8)
MEMADD(7)
MEMADD(6)
MEMADD(5)
MEMADD(4)
MEMADD(3)
MEMADD(2)
MEMADD(1)
MEMADD(0)
MEMDATA(63)
MEMDATA(62)
MEMDATA(61)
MEMDATA(60)
MEMDATA(59)
MEMDATA(58)
MEMDATA(57)
MEMDATA(56)
MEMDATA(55)
MEMDATA(54)
MEMDATA(53)
MEMDATA(52)
MEMDATA(51)
MEMDATA(50)
MEMDATA(49)
MEMDATA(48)
MEMDATA(47)
MEMDATA(46)
MEMDATA(45)
MEMDATA(44)
MEMDATA(43)
MEMDATA(42)
MEMDATA(41)
MEMDATA(40)
MEMDATA(39)
MEMDATA(38)
MEMDATA(37)
MEMDATA(36)
MEMDATA(35)
MEMDATA(34)
MEMDATA(33)
MEMDATA(32)
MEMDATA(31)
MEMDATA(30)
MEMDATA(29)
MEMDATA(28)
MEMDATA(27)
MEMDATA(26)
MEMDATA(25)
MEMDATA(24)
MEMDATA(23)
MEMDATA(22)
MEMDATA(21)
MEMDATA(20)
MEMDATA(19)
MEMDATA(18)
MEMDATA(17)
MEMDATA(16)
MEMDATA(15)
MEMDATA(14)
MEMDATA(13)
MEMDATA(12)
MEMDATA(11)
MEMDATA(10)
MEMDATA(9)
MEMDATA(8)
MEMDATA(7)
MEMDATA(6)
MEMDATA(5)
MEMDATA(4)
MEMDATA(3)
MEMDATA(2)
MEMDATA(1)
MEMDATA(0)
MEMRESET_L
MEMBANK(1)
MEMBANK(0)
MEMRAS_L
MEMCAS_L
MEMWE_L
MEMCHECK(9)
MEMCHECK(8)
MEMCHECK(7)
MEMCHECK(6)
MEMCHECK(5)
MEMCHECK(4)
MEMCHECK(3)
MEMCHECK(2)
MEMCHECK(1)
MEMCHECK(0)
MEMCS_L(7)
MEMCS_L(6)
MEMCS_L(5)
MEMCS_L(4)
MEMCS_L(3)
MEMCS_L(2)
MEMCS_L(1)
MEMCS_L(0)
G20
G21
AE21
AE20
L24
L25
R23
T23
H23
J23
AD21
AD20
Y23
AA23
U25
U24
H24
H25
V23
M23
AE23
J24
J25
V24
K23
L23
K25
M25
M24
N25
N23
P23
T25
V25
AJ24
AK25
AK27
AJ27
AL24
AK24
AL26
AL27
AJ28
AK30
AJ31
AG29
AL28
AK28
AH31
AG30
AG31
AF30
AD31
AC30
AF29
AF31
AD30
AC29
AB31
AA29
Y31
W31
AC31
AA30
Y30
V29
P31
M31
L30
L29
P29
N31
L31
K31
J30
J29
G31
F29
J31
H31
F31
F30
D31
C31
B30
C28
E31
E30
A29
B28
B27
A26
C24
A24
A28
A27
A25
B24
G25
W25
W23
Y25
AA25
Y24
U28
T29
P24
P25
T27
R26
R25
R24
V30
U29
R30
P30
V31
U30
R29
R31
AD23
AE25
AD24
AD25
AC24
AC25
AB25
AA24
3
3
P0_MEMCLK_UPR_H3
P0_MEMCLK_UPR_L3
P0_MEMCLK_UPR_H2
P0_MEMCLK_UPR_L2
P0_MEMCLK_UPR_H1
P0_MEMCLK_UPR_L1
P0_MEMCLK_UPR_H0
P0_MEMCLK_UPR_L0
P0_MEMCLK_LWR_H3
P0_MEMCLK_LWR_L3
P0_MEMCLK_LWR_H2
P0_MEMCLK_LWR_L2
P0_MEMCLK_LWR_H1
P0_MEMCLK_LWR_L1
P0_MEMCLK_LWR_H0
P0_MEMCLK_LWR_L0
P0_MEMCKE_UPR
P0_MEMCKE_LWR
TP32
TP33
P0_MEMADD13
P0_MEMADD12
P0_MEMADD11
P0_MEMADD10
P0_MEMADD9
P0_MEMADD8
P0_MEMADD7
P0_MEMADD6
P0_MEMADD5
P0_MEMADD4
P0_MEMADD3
P0_MEMADD2
P0_MEMADD1
P0_MEMADD0
P0_MEMDATA63
P0_MEMDATA62
P0_MEMDATA61
P0_MEMDATA60
P0_MEMDATA59
P0_MEMDATA58
P0_MEMDATA57
P0_MEMDATA56
P0_MEMDATA55
P0_MEMDATA54
P0_MEMDATA53
P0_MEMDATA52
P0_MEMDATA51
P0_MEMDATA50
P0_MEMDATA49
P0_MEMDATA48
P0_MEMDATA47
P0_MEMDATA46
P0_MEMDATA45
P0_MEMDATA44
P0_MEMDATA43
P0_MEMDATA42
P0_MEMDATA41
P0_MEMDATA40
P0_MEMDATA39
P0_MEMDATA38
P0_MEMDATA37
P0_MEMDATA36
P0_MEMDATA35
P0_MEMDATA34
P0_MEMDATA33
P0_MEMDATA32
P0_MEMDATA31
P0_MEMDATA30
P0_MEMDATA29
P0_MEMDATA28
P0_MEMDATA27
P0_MEMDATA26
P0_MEMDATA25
P0_MEMDATA24
P0_MEMDATA23
P0_MEMDATA22
P0_MEMDATA21
P0_MEMDATA20
P0_MEMDATA19
P0_MEMDATA18
P0_MEMDATA17
P0_MEMDATA16
P0_MEMDATA15
P0_MEMDATA14
P0_MEMDATA13
P0_MEMDATA12
P0_MEMDATA11
P0_MEMDATA10
P0_MEMDATA9
P0_MEMDATA8
P0_MEMDATA7
P0_MEMDATA6
P0_MEMDATA5
P0_MEMDATA4
P0_MEMDATA3
P0_MEMDATA2
P0_MEMDATA1
P0_MEMDATA0
P0_MEMRESET_L
P0_MEMBANK1
P0_MEMBANK0
P0_MEMRAS_L
P0_MEMCAS_L
P0_MEMWE_L
P0_MEMCHECK_UPR7
P0_MEMCHECK_UPR6
P0_MEMCHECK_UPR5
P0_MEMCHECK_UPR4
P0_MEMCHECK_UPR3
P0_MEMCHECK_UPR2
P0_MEMCHECK_UPR1
P0_MEMCHECK_UPR0
P0_MEMCHECK_LWR7
P0_MEMCHECK_LWR6
P0_MEMCHECK_LWR5
P0_MEMCHECK_LWR4
P0_MEMCHECK_LWR3
P0_MEMCHECK_LWR2
P0_MEMCHECK_LWR1
P0_MEMCHECK_LWR0
P0_MEMCS_L7
P0_MEMCS_L6
P0_MEMCS_L5
P0_MEMCS_L4
P0_MEMCS_L3
P0_MEMCS_L2
P0_MEMCS_L1
P0_MEMCS_L0
TP125
1
TP126
1
TP127
1
TP128
1
P0_MEMCLK_UPR_H1 16,18
P0_MEMCLK_UPR_L1 16,18
P0_MEMCLK_UPR_H0 14,18
P0_MEMCLK_UPR_L0 14,18
TP129
1
TP130
1
TP131
1
TP132
1
P0_MEMCLK_LWR_H1 15,18
P0_MEMCLK_LWR_L1 15,18
P0_MEMCLK_LWR_H0 13,18
P0_MEMCLK_LWR_L0 13,18
P0_MEMCKE_UPR 18
P0_MEMCKE_LWR 18
P0_MEMADD[13..0] 18
P0_MEMDATA[63..0] 17
P0_MEMBANK1 18
P0_MEMBANK0 18
P0_MEMRAS_L 18
P0_MEMCAS_L 18
P0_MEMWE_L 18
P0_MEMCHECK_UPR[7..0] 17
P0_MEMCHECK_LWR[7..0] 17
P0_MEMCS_L[7..0] 18
2
P0_VDD_2D5V
R217
4.7K/6
GPIO1_MEMRST_2
3
Q66
D
GS
2N7002
2
1
GPIO2_MEMRST 46 GPIO1_MEMRST 46
GND GND
SN74LVC2G08-2.5/DCT/IC8MSOP
GND
GND
U81
1
1A
2
1B
3
2Y
4 5
GND 2A
1
1A
2
1B
3
2Y
4 5
GND 2A
P0_MEMRESET_L
GPIO2_MEMRST_2
P1_MEMRST_AND
SN74LVC2G32-2.5/DCT/IC8MSOP
P0_MEMRST_AND
GPIO1_MEMRST_2
P1_MEMRESET_GPIO 29,30,31,32
WORKAROUND:DELAY MEMRESET TIMING BY
GPIO
AMD DOC. ORDER#27510
2
P0_VDD_2D5V
R216
4.7K/6
GPIO2_MEMRST_2
3
Q106
D
GS
2N7002
2
1
P0_VDD_2D5V
8
VCC
P0_MEMRST_AND
7
1Y
GPIO2_MEMRST_2
6
2B
C362
0.1U/6
GND
P0_VDD_2D5V
U80
8
VCC
7
1Y
GPIO1_MEMRST_2
6
2B
P1_MEMRST_AND
C361
0.1U/6
GND
GIGABYTE THCHNOLOGIES , INC.
Title
Opteron P0 DDR Interface
Size Document Number Rev
C
Date: Sheet
1
P1_MEMRESET_L 28
P0_MEMRESET_GPIO 13,14,15,16
GA-7A8DRL
1
2.0
of
10 81 Thursday, November 10, 2005
+12V
1 2
R1333
2.2/8
C1381
1 2
4.7U/12
GND
14 4
VCC
2
EN
SS
RT
FB
1 2
R1334
30K/6/1
3
D
1
13
OCSET
VCC COMP
PVCC
UGATE
PHASE
GND
7
GND
P0_VDD_2D5V_SS
Q162
2N7002
SOT23
VCC
8 4
5
+
6
-
P0_VDD_2D5V_SS
C1384 0.01U/6
1 2
VCC_DUAL
R1296
1K/6
P0_VDD2D5V_VTT_EN_L
Q163
P0_VDD2D5V_VTT_EN 61
R1297
10K/6
R1584
5.1K/6
GND
MMBT2222A/SOT23
132
GND
P0_VDD_2D5V
R121
100/6/1
C72
0.1U/6
R123
100/6/1
GND
C1391
0.1U/6
GND
C1383 33P/6
1 2
1 2
C71
0.1U/6
C73
0.1U/6
6
3
1
5
R1336 20K/6/1
GS
VP0_REF
U127
BOOT
LGATE
PGND
ISL6522CB
U8B
LM2904
C70
0.1U/6
7
2
10
9
8
12
11
C1392 1000P/6
R1351 2K/6
GND
C74
0.01U/6
+12V
R1716
2.2/8
1 2
1N5817/S
D66
C1382
0.1U/6
1 2
R1335 1/8/B
Q173
NEC2SK3639/TO252
R1338 0/8/B
GND
P0_DIMM_MEMVREF
C75
1000P/6
GND
NEC2SK3638/TO252
Q170
1 2
1 2
G
S D
GND
P0_VTT_SENSE 10
P0_DIMM_MEMVREF 13,14,15,16
+12V
L29
1UH/D/Vertical
VCC25_IN
G
S D
Q188
NEC2SK3639/TO252
1N5817/S
D84
R1711 0/8/B
1 2
GND
P0_VTT_SENSE
20 mils
P0_DIMM_MEMVREF
GND
1000U/6.3V/8X11.5/KZG
P0_DIMM_MEMVREF 13,14,15,16
GND
EC16
390uF/6.3V/PS-CON/8*12.5 12m_Ohm
560uF/4V/PSCON/8*11.5
330U/16V/10*10.5/FPCAP
S D
GND
P0_VTT_DDR
+
GND
1 2
C1379
GND
R1717
2.2/8
C1679
1000P/6
GND
sense from CAP Gnd pin
C63
0.1U/6
GND
1 2
C62
0.1U/6
1 2
C1378
0.1U/6/16V
G
R114
100/6
R116
100/6/X
1 2
C1380
GND
330U/16V/10*10.5/FPCAP
EC21
L3
3.3UH/3A/SMALL
VCCQ
GND
GND
L30
2.8UH/D/Vertical/MPP
EC23
+
GND
560uF/4V/8*11.5/FPCAP
C64
0.1U/6
GND
P0_VDD2D5V_VTT_EN_L
1000P/6
4700mA @105_Deg / 100Khz
5230mA @105_Deg / 100Khz 10m_Ohm
EC25
EC24
+
+
GND
GND
560uF/4V/8*11.5/FPCAP
P0_VDD_2D5V
C65
0.1U/6
C69
GND
560uF/4V/8*11.5/FPCAP
560uF/4V/8*11.5/FPCAP
U10
1
VCC1
2
VDD1
3
VL1
4
PGND1
5
AGND1
6
SD
7
2/VCC
8 9
G-sense AGND3
CM8500AGIT
+
GND GND
17
GND
PGND2
AGND4
EC146
+
GND GND
560uF/4V/8*11.5/FPCAP
16
VCC2
15
VDD2
14
VL2
13
12
11
FB
10
VCCQ
GND
2.6V/10A
P0_VDD_2D5V
EC147
R138
0/6
+
1 2
R1337
2.7K/6/1
560uF/4V/8*11.5/FPCAP
1 2
R1339
1.2K/6/1
GND
NEAR ISL6522
P0_VDD_2D5V
C67
C66
0.1U/6
P0_VDD_2D5V
0.1U/6
C6
GND
1000P/6
Title
Size Document Number Rev
Custom
Date: Sheet
+
0.1U/6
GND
R119
10K/6
R120
470K/6
C68
GIGABYTE THCHNOLOGIES , INC.
Opteron P0 DDR Power
0/6/X
R208
VCC3
EC19
100uF/25V/6*11
R1346
2K/6
P0_VDDIOFB_H 8
R144
0/8
R117
5R1/8
VCCQ
1 2
1 2
C1
C3
10U/12
10U/12
GND
GA-7A8DRL
P0_VDDIO_SENSE 8
P0_VDD_2D5V
+
GND
R142
0/8/X
1000U/6.3V/8X11.5/KZG
EC15
of
11 81 Thursday, November 10, 2005
2.0
5
P0_VTT_DDR
D D
C C
C436 0.1U/6
C438 0.1U/6
C437 0.1U/6
C439 0.1U/6
C441 0.1U/6
C440 0.1U/6
C442 0.1U/6
C444 0.1U/6
C443 0.1U/6
C450 0.1U/6
C446 0.1U/6
C445 0.1U/6
C447 0.1U/6
C449 0.1U/6
C448 0.1U/6
C453 0.1U/6
C451 0.1U/6
C80 1U/6
C84 1U/6
C1361 10U/12
GND
4
P0_VTT_DDR
C618 0.1U/6
C523 0.1U/6
C521 0.1U/6
C520 0.1U/6/B
C42 0.1U/6/B
C334 0.1U/6/B
C457 0.1U/6
C458 0.1U/6
C459 0.1U/6
C460 0.1U/6
C461 0.1U/6
C462 0.1U/6
C463 0.1U/6
C464 0.1U/6
C465 0.1U/6
C466 0.1U/6
C467 0.1U/6
C541 0.1U/6
C579 0.1U/6
C655 0.1U/6/B
C656 0.1U/6/B
C657 0.1U/6/B
C1362 10U/12
C81 1U/6
C85 1U/6
3
2
P0_VTT_DDR
C660 0.1U/6/B
C658 0.1U/6/B
C659 0.1U/6/B
C668 0.1U/6/B
C667 0.1U/6/B
C664 0.1U/6/B
C669 0.1U/6/B
C661 0.1U/6/B
C670 0.1U/6/B
C662 0.1U/6/B
C671 0.1U/6/B
C665 0.1U/6/B
C666 0.1U/6/B
C663 0.1U/6/B
C672 0.1U/6/B
C673 0.1U/6/B
C674 0.1U/6/B
C676 0.1U/6
C675 0.1U/6/B
C82 1U/6
C86 1U/6
C1363 10U/12
GND GND GND
P0_VTT_DDR
C688 0.1U/6/B
C687 0.1U/6/B
C686 0.1U/6/B
C685 0.1U/6/B
C690 0.1U/6/B
C454 0.1U/6/B
C452 0.1U/6/B
C455 0.1U/6/B
C456 0.1U/6/B
C677 0.1U/6/B
C678 0.1U/6/B
C679 0.1U/6/B
C680 0.1U/6/B
C684 0.1U/6/B
C683 0.1U/6/B
C681 0.1U/6/B
C682 0.1U/6/B
C689 0.1U/6/B
C1364 10U/12
C83 1U/6
C87 1U/6
1
P0_VTT_DDR P0_VDD_2D5V
P0_VTT_DDR P0_VDD_2D5V
P0_VTT_DDR
C225 0.01U/6
C222 0.01U/6
C223 0.01U/6
B B
C224 0.01U/6
C76 0.015uF/6/B
C77 0.015uF/6/B
C78 0.015uF/6
C79 0.015uF/6
C227 0.01U/6
C639 0.01U/6
GND
C877 0.01U/6
C878 0.01U/6
C945 0.01U/6/B
C889 0.01U/6/B
C883 0.01U/6/B
C888 0.01U/6/B
C882 0.01U/6/B
C884 0.01U/6/B
C886 0.01U/6/B
C959 0.01U/6/B
C887 0.01U/6/B
C958 0.01U/6/B
C957 0.01U/6/B
C885 0.01U/6/B
A A
GIGABYTE THCHNOLOGIES , INC.
Title
Opteron P0 VTT/VDDIO Decoupling
Size Document Number Rev
A4
5
4
3
Date: Sheet
2
GA-7A8DRL
of
12 81 Thursday, November 10, 2005
1
2.0
5
4
3
2
1
DIMM0
P0_VDD_2D5V
D D
738467085
108
120
148
1688222
30
54627796104
VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDDQ0
VDDQ1
VDDQ2
VDDQ3
163
CS3#
71
P0_SR_MEMCS_L1 14,18
P0_SR_MEMDQS_LWR[8..0] 15,17
C C
P0_SR_MEMBANK1 14,15,16,18
P0_SR_MEMBANK0 14,15,16,18
P0_SR_MEMADD[13..0] 14,15,16,18
P0_SR_MEMCHECK_LWR[7..0] 15,17
B B
P0_MEMCLK_LWR_H0 10,18
P0_MEMCLK_LWR_L0 10,18
P0_MEMRESET_GPIO 10,14,15,16
P0_SR_MEMCKE_LWR 14,15,16,18
P0_SR_MEMCKE_UPR 14,15,16,18
P0_SR_MEMCAS_L 14,15,16,18
P0_SR_MEMRAS_L 14,15,16,18
P0_SR_MEMDQS_LWR[17..9] 15,17
P0_SR_MEMCS_L0 14,18
RCC_SDA 14,15,16,29,30,31,32,57,75
RCC_SCL 14,15,16,29,30,31,32,57,75
P0_SR_MEMCS_L1
P0_SR_MEMCS_L0
P0_SR_MEMDQS_LWR8
P0_SR_MEMDQS_LWR7
P0_SR_MEMDQS_LWR6
P0_SR_MEMDQS_LWR5
P0_SR_MEMDQS_LWR4
P0_SR_MEMDQS_LWR3
P0_SR_MEMDQS_LWR2
P0_SR_MEMDQS_LWR1
P0_SR_MEMDQS_LWR0
RCC_SDA
RCC_SCL
P0_SR_MEMBANK1
P0_SR_MEMBANK0
P0_SR_MEMADD13
P0_SR_MEMADD12
P0_SR_MEMADD11
P0_SR_MEMADD10
P0_SR_MEMADD9
P0_SR_MEMADD8
P0_SR_MEMADD7
P0_SR_MEMADD6
P0_SR_MEMADD5
P0_SR_MEMADD4
P0_SR_MEMADD3
P0_SR_MEMADD2
P0_SR_MEMADD1
P0_SR_MEMADD0
P0_SR_MEMCHECK_LWR7
P0_SR_MEMCHECK_LWR6
P0_SR_MEMCHECK_LWR5
P0_SR_MEMCHECK_LWR4
P0_SR_MEMCHECK_LWR3
P0_SR_MEMCHECK_LWR2
P0_SR_MEMCHECK_LWR1
P0_SR_MEMCHECK_LWR0
P0_MEMCLK_LWR_H0
P0_MEMCLK_LWR_L0
P0_MEMRESET_GPIO
P0_SR_MEMDQS_LWR17
P0_SR_MEMDQS_LWR16
P0_SR_MEMDQS_LWR15
P0_SR_MEMDQS_LWR14
P0_SR_MEMDQS_LWR13
P0_SR_MEMDQS_LWR12
P0_SR_MEMDQS_LWR11
P0_SR_MEMDQS_LWR10
P0_SR_MEMDQS_LWR9
GND
P0_SR_MEMCKE_LWR
P0_SR_MEMCKE_UPR
P0_SR_MEMCAS_L
P0_SR_MEMRAS_L
158
157
47
86
78
67
56
36
25
14
5
103
183
182
181
91
92
113
52
59
167
115
118
141
27
122
29
125
32
37
130
41
43
48
144
142
135
134
51
49
45
44
16
17
137
138
76
75
173
10
21
111
65
154
140
177
169
159
149
129
119
107
97
CS2#
CS1#
CS0#
DQS8
DQS7
DQS6
DQS5
DQS4
DQS3
DQS2
DQS1
DQS0
FETEN
SA2
SA1
SA0
SDA
SCL
BA2
BA1
BA0
A13
A12
A11
A10_AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
CB7
CB6
CB5
CB4
CB3
CB2
CB1
CB0
CK0
CK0#
CK1
CK1#
CK2
CK2#
NC5
NC1_RESET#
CKE0
CKE1
CAS#
RAS#
DM8
DM7
DM6
DM5
DM4
DM3
DM2
DM1
DM0
GND
GND
10011116
GND
GND
GND
GND
GND
GND
GND
124
132
139
145
152
160
143
156
164
172
180
136
VDDQ9
GND
VDDQ10
VDDQ11
GND
GND
VDDQ12
VDDQ13
GND
GND
15
VDDQ14
GND
112
128
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
GND
GND
GND
GND
GND
17618263344250586674818993
VDDQ15
GND
GND
VDDID
184
VDDSPD
DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
DQ33
DQ32
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
WP
WE#
VREF
NC4
NC2
NC3
P0DIMM0
DDR-DIMM184/ORINGE
P0_SR_MEMDATA63
179
P0_SR_MEMDATA62
178
P0_SR_MEMDATA61
175
P0_SR_MEMDATA60
174
P0_SR_MEMDATA59
88
P0_SR_MEMDATA58
87
P0_SR_MEMDATA57
84
P0_SR_MEMDATA56
83
P0_SR_MEMDATA55
171
P0_SR_MEMDATA54
170
P0_SR_MEMDATA53
166
P0_SR_MEMDATA52
165
P0_SR_MEMDATA51
80
P0_SR_MEMDATA50
79
P0_SR_MEMDATA49
73
P0_SR_MEMDATA48
72
P0_SR_MEMDATA47
162
P0_SR_MEMDATA46
161
P0_SR_MEMDATA45
155
P0_SR_MEMDATA44
153
P0_SR_MEMDATA43
69
P0_SR_MEMDATA42
68
P0_SR_MEMDATA41
64
P0_SR_MEMDATA40
61
P0_SR_MEMDATA39
151
P0_SR_MEMDATA38
150
P0_SR_MEMDATA37
147
P0_SR_MEMDATA36
146
P0_SR_MEMDATA35
60
P0_SR_MEMDATA34
57
P0_SR_MEMDATA33
55
P0_SR_MEMDATA32
53
P0_SR_MEMDATA31
133
P0_SR_MEMDATA30
131
P0_SR_MEMDATA29
127
P0_SR_MEMDATA28
126
P0_SR_MEMDATA27
40
P0_SR_MEMDATA26
39
P0_SR_MEMDATA25
35
P0_SR_MEMDATA24
33
P0_SR_MEMDATA23
123
P0_SR_MEMDATA22
121
P0_SR_MEMDATA21
117
P0_SR_MEMDATA20
114
P0_SR_MEMDATA19
31
P0_SR_MEMDATA18
28
P0_SR_MEMDATA17
24
P0_SR_MEMDATA16
23
P0_SR_MEMDATA15
110
P0_SR_MEMDATA14
109
P0_SR_MEMDATA13
106
P0_SR_MEMDATA12
105
P0_SR_MEMDATA11
20
P0_SR_MEMDATA10
19
P0_SR_MEMDATA9
13
P0_SR_MEMDATA8
12
P0_SR_MEMDATA7
99
P0_SR_MEMDATA6
98
P0_SR_MEMDATA5
95
P0_SR_MEMDATA4
94
P0_SR_MEMDATA3
8
P0_SR_MEMDATA2
6
P0_SR_MEMDATA1
4
P0_SR_MEMDATA0
2
90
P0_SR_MEMWE_L
63
P0_DIMM_MEMVREF
1
102
9
101
P0_SR_MEMWE_L 14,15,16,18
P0_SR_MEMDATA[63..0] 15,17
94
93
P0_VDD_2D5V
C88
0.1U/6
P0_DIMM_MEMVREF 11,14,15,16
C89
0.1U/6
GND
2 1
A A
smbus addr = 0 0 0
5
4
GND
GIGABYTE THCHNOLOGIES , INC.
Title
Size Document Number Rev
3
2
Date: Sheet
Opteron P0 DIMM 0
Custom
GA-7A8DRL
1
2.0
of
13 81 Thursday, November 10, 2005
5
DIMM1
P0_VDD_2D5V
4
3
2
1
VDDID
184
VDDSPD
DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
DQ33
DQ32
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
WP
WE#
VREF
NC4
NC2
NC3
P0DIMM1
DDR-DIMM184/PURPLE
P0_SR_MEMDATA127
179
P0_SR_MEMDATA126
178
P0_SR_MEMDATA125
175
P0_SR_MEMDATA124
174
P0_SR_MEMDATA123
88
P0_SR_MEMDATA122
87
P0_SR_MEMDATA121
84
P0_SR_MEMDATA120
83
P0_SR_MEMDATA119
171
P0_SR_MEMDATA118
170
P0_SR_MEMDATA117
166
P0_SR_MEMDATA116
165
P0_SR_MEMDATA115
80
P0_SR_MEMDATA114
79
P0_SR_MEMDATA113
73
P0_SR_MEMDATA112
72
P0_SR_MEMDATA111
162
P0_SR_MEMDATA110
161
P0_SR_MEMDATA109
155
P0_SR_MEMDATA108
153
P0_SR_MEMDATA107
69
P0_SR_MEMDATA106
68
P0_SR_MEMDATA105
64
P0_SR_MEMDATA104
61
P0_SR_MEMDATA103
151
P0_SR_MEMDATA102
150
P0_SR_MEMDATA101
147
P0_SR_MEMDATA100
146
P0_SR_MEMDATA99
60
P0_SR_MEMDATA98
57
P0_SR_MEMDATA97
55
P0_SR_MEMDATA96
53
P0_SR_MEMDATA95
133
P0_SR_MEMDATA94
131
P0_SR_MEMDATA93
127
P0_SR_MEMDATA92
126
P0_SR_MEMDATA91
40
P0_SR_MEMDATA90
39
P0_SR_MEMDATA89
35
P0_SR_MEMDATA88
33
P0_SR_MEMDATA87
123
P0_SR_MEMDATA86
121
P0_SR_MEMDATA85
117
P0_SR_MEMDATA84
114
P0_SR_MEMDATA83
31
P0_SR_MEMDATA82
28
P0_SR_MEMDATA81
24
P0_SR_MEMDATA80
23
P0_SR_MEMDATA79
110
P0_SR_MEMDATA78
109
P0_SR_MEMDATA77
106
P0_SR_MEMDATA76
105
P0_SR_MEMDATA75
20
P0_SR_MEMDATA74
19
P0_SR_MEMDATA73
13
P0_SR_MEMDATA72
12
P0_SR_MEMDATA71
99
P0_SR_MEMDATA70
98
P0_SR_MEMDATA69
95
P0_SR_MEMDATA68
94
P0_SR_MEMDATA67
8
P0_SR_MEMDATA66
6
P0_SR_MEMDATA65
4
P0_SR_MEMDATA64
2
90
P0_SR_MEMWE_L
63
P0_DIMM_MEMVREF
1
102
9
101
P0_SR_MEMDATA[127..64] 16,17
P0_SR_MEMWE_L 13,15,16,18
94
93
P0_VDD_2D5V
GND
2
1
C90
0.1U/6
P0_DIMM_MEMVREF 11,13,15,16
C91
0.1U/6
738467085
108
120
148
1688222
30
54627796104
VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDDQ0
VDDQ1
GND
GND
VDDQ2
GND
GND
GND
GND
GND
124
132
139
145
152
160
D D
P0_SR_MEMCS_L1 13,18
P0_SR_MEMDQS_UPR[8..0] 16,17
C C
P0_SR_MEMCHECK_UPR[7..0] 16,17
P0_MEMCLK_UPR_H0 10,18
P0_MEMCLK_UPR_L0 10,18
B B
P0_SR_MEMDQS_UPR[17..9] 16,17
P0_SR_MEMCS_L0 13,18
RCC_SDA 13,15,16,29,30,31,32,57,75
RCC_SCL 13,15,16,29,30,31,32,57,75
P0_SR_MEMBANK1 13,15,16,18
P0_SR_MEMBANK0 13,15,16,18
P0_SR_MEMADD[13..0] 13,15,16,18
P0_MEMRESET_GPIO 10,13,15,16
P0_SR_MEMCKE_LWR 13,15,16,18
P0_SR_MEMCKE_UPR 13,15,16,18
P0_SR_MEMCAS_L 13,15,16,18
P0_SR_MEMRAS_L 13,15,16,18
P0_SR_MEMCS_L1
P0_SR_MEMCS_L0
P0_SR_MEMDQS_UPR8
P0_SR_MEMDQS_UPR7
P0_SR_MEMDQS_UPR6
P0_SR_MEMDQS_UPR5
P0_SR_MEMDQS_UPR4
P0_SR_MEMDQS_UPR3
P0_SR_MEMDQS_UPR2
P0_SR_MEMDQS_UPR1
P0_SR_MEMDQS_UPR0
P0_VDD_2D5V
RCC_SDA
RCC_SCL
P0_SR_MEMBANK1
P0_SR_MEMBANK0
P0_SR_MEMCHECK_UPR7
P0_SR_MEMCHECK_UPR6
P0_SR_MEMCHECK_UPR5
P0_SR_MEMCHECK_UPR4
P0_SR_MEMCHECK_UPR3
P0_SR_MEMCHECK_UPR2
P0_SR_MEMCHECK_UPR1
P0_SR_MEMCHECK_UPR0
P0_MEMCLK_UPR_H0
P0_MEMCLK_UPR_L0
P0_SR_MEMDQS_UPR17
P0_SR_MEMDQS_UPR16
P0_SR_MEMDQS_UPR15
P0_SR_MEMDQS_UPR14
P0_SR_MEMDQS_UPR13
P0_SR_MEMDQS_UPR12
P0_SR_MEMDQS_UPR11
P0_SR_MEMDQS_UPR10
P0_SR_MEMDQS_UPR9
GND
P0_SR_MEMADD13
P0_SR_MEMADD12
P0_SR_MEMADD11
P0_SR_MEMADD10
P0_SR_MEMADD9
P0_SR_MEMADD8
P0_SR_MEMADD7
P0_SR_MEMADD6
P0_SR_MEMADD5
P0_SR_MEMADD4
P0_SR_MEMADD3
P0_SR_MEMADD2
P0_SR_MEMADD1
P0_SR_MEMADD0
P0_MEMRESET_GPIO
P0_SR_MEMCKE_LWR
P0_SR_MEMCKE_UPR
P0_SR_MEMCAS_L
P0_SR_MEMRAS_L
163
71
158
157
47
86
78
67
56
36
25
14
5
103
183
182
181
91
92
113
52
59
167
115
118
141
27
122
29
125
32
37
130
41
43
48
144
142
135
134
51
49
45
44
16
17
137
138
76
75
173
10
21
111
65
154
140
177
169
159
149
129
119
107
97
CS3#
CS2#
CS1#
CS0#
DQS8
DQS7
DQS6
DQS5
DQS4
DQS3
DQS2
DQS1
DQS0
FETEN
SA2
SA1
SA0
SDA
SCL
BA2
BA1
BA0
A13
A12
A11
A10_AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
CB7
CB6
CB5
CB4
CB3
CB2
CB1
CB0
CK0
CK0#
CK1
CK1#
CK2
CK2#
NC5
NC1_RESET#
CKE0
CKE1
CAS#
RAS#
DM8
DM7
DM6
DM5
DM4
DM3
DM2
DM1
DM0
GND
10011116
143
156
164
172
128
VDDQ8
GND
136
VDDQ9
GND
VDDQ10
VDDQ11
GND
GND
180
VDDQ12
VDDQ13
GND
GND
112
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
GND
GND
GND
GND
GND
17618263344250586674818993
15
VDDQ14
VDDQ15
GND
GND
GND
GND
smbus addr = 0 0 1
A A
GIGABYTE THCHNOLOGIES , INC.
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
Opteron P0 DIMM 1
Custom
GA-7A8DRL
1
2.0
of
14 81 Thursday, November 10, 2005
5
4
DIMM2
P0_VDD_2D5V
3
2
1
VDDID
GND
P0DIMM2
184
DDR-DIMM184/ORINGE
VDDSPD
179
DQ63
178
DQ62
175
DQ61
174
DQ60
88
DQ59
87
DQ58
84
DQ57
83
DQ56
171
DQ55
170
DQ54
166
DQ53
165
DQ52
80
DQ51
79
DQ50
73
DQ49
72
DQ48
162
DQ47
161
DQ46
155
DQ45
153
DQ44
69
DQ43
68
DQ42
64
DQ41
61
DQ40
151
DQ39
150
DQ38
147
DQ37
146
DQ36
60
DQ35
57
DQ34
55
DQ33
53
DQ32
133
DQ31
131
DQ30
127
DQ29
126
DQ28
40
DQ27
39
DQ26
35
DQ25
33
DQ24
123
DQ23
121
DQ22
117
DQ21
114
DQ20
31
DQ19
28
DQ18
24
DQ17
23
DQ16
110
DQ15
109
DQ14
106
DQ13
105
DQ12
20
DQ11
19
DQ10
13
DQ9
12
DQ8
99
DQ7
98
DQ6
95
DQ5
94
DQ4
8
DQ3
6
DQ2
4
DQ1
2
DQ0
90
WP
63
WE#
1
VREF
102
NC4
9
NC2
101
NC3
P0_SR_MEMDATA63
P0_SR_MEMDATA62
P0_SR_MEMDATA61
P0_SR_MEMDATA60
P0_SR_MEMDATA59
P0_SR_MEMDATA58
P0_SR_MEMDATA57
P0_SR_MEMDATA56
P0_SR_MEMDATA55
P0_SR_MEMDATA54
P0_SR_MEMDATA53
P0_SR_MEMDATA52
P0_SR_MEMDATA51
P0_SR_MEMDATA50
P0_SR_MEMDATA49
P0_SR_MEMDATA48
P0_SR_MEMDATA47
P0_SR_MEMDATA46
P0_SR_MEMDATA45
P0_SR_MEMDATA44
P0_SR_MEMDATA43
P0_SR_MEMDATA42
P0_SR_MEMDATA41
P0_SR_MEMDATA40
P0_SR_MEMDATA39
P0_SR_MEMDATA38
P0_SR_MEMDATA37
P0_SR_MEMDATA36
P0_SR_MEMDATA35
P0_SR_MEMDATA34
P0_SR_MEMDATA33
P0_SR_MEMDATA32
P0_SR_MEMDATA31
P0_SR_MEMDATA30
P0_SR_MEMDATA29
P0_SR_MEMDATA28
P0_SR_MEMDATA27
P0_SR_MEMDATA26
P0_SR_MEMDATA25
P0_SR_MEMDATA24
P0_SR_MEMDATA23
P0_SR_MEMDATA22
P0_SR_MEMDATA21
P0_SR_MEMDATA20
P0_SR_MEMDATA19
P0_SR_MEMDATA18
P0_SR_MEMDATA17
P0_SR_MEMDATA16
P0_SR_MEMDATA15
P0_SR_MEMDATA14
P0_SR_MEMDATA13
P0_SR_MEMDATA12
P0_SR_MEMDATA11
P0_SR_MEMDATA10
P0_SR_MEMDATA9
P0_SR_MEMDATA8
P0_SR_MEMDATA7
P0_SR_MEMDATA6
P0_SR_MEMDATA5
P0_SR_MEMDATA4
P0_SR_MEMDATA3
P0_SR_MEMDATA2
P0_SR_MEMDATA1
P0_SR_MEMDATA0
P0_SR_MEMWE_L
P0_DIMM_MEMVREF
P0_SR_MEMWE_L 13,14,16,18
P0_SR_MEMDATA[63..0] 13,17
94
93
2
1
P0_VDD_2D5V
GND
C92
0.1U/6
P0_DIMM_MEMVREF 11,13,14,16
C93
0.1U/6
738467085
108
120
148
1688222
30
54627796104
VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDDQ0
VDDQ1
VDDQ2
GND
VDDQ3
GND
GND
GND
GND
GND
GND
124
132
139
145
152
160
D D
P0_SR_MEMCS_L3 16,18
P0_SR_MEMCS_L2 16,18
P0_SR_MEMDQS_LWR[8..0] 13,17
RCC_SDA 13,14,16,29,30,31,32,57,75
RCC_SCL 13,14,16,29,30,31,32,57,75
P0_SR_MEMBANK1 13,14,16,18
P0_SR_MEMBANK0 13,14,16,18
C C
B B
P0_SR_MEMADD[13..0] 13,14,16,18
P0_SR_MEMCHECK_LWR[7..0] 13,17
P0_MEMCLK_LWR_H1 10,18
P0_MEMCLK_LWR_L1 10,18
P0_MEMRESET_GPIO 10,13,14,16
P0_SR_MEMCKE_LWR 13,14,16,18
P0_SR_MEMCKE_UPR 13,14,16,18
P0_SR_MEMCAS_L 13,14,16,18
P0_SR_MEMDQS_LWR[17..9] 13,17
P0_SR_MEMRAS_L 13,14,16,18
P0_SR_MEMCS_L3
P0_SR_MEMCS_L2
P0_SR_MEMDQS_LWR8
P0_SR_MEMDQS_LWR7
P0_SR_MEMDQS_LWR6
P0_SR_MEMDQS_LWR5
P0_SR_MEMDQS_LWR4
P0_SR_MEMDQS_LWR3
P0_SR_MEMDQS_LWR2
P0_SR_MEMDQS_LWR1
P0_SR_MEMDQS_LWR0
GND
RCC_SDA
RCC_SCL
P0_SR_MEMBANK1
P0_SR_MEMBANK0
P0_SR_MEMADD13
P0_SR_MEMADD12
P0_SR_MEMADD11
P0_SR_MEMADD10
P0_SR_MEMADD9
P0_SR_MEMADD8
P0_SR_MEMADD7
P0_SR_MEMADD6
P0_SR_MEMADD5
P0_SR_MEMADD4
P0_SR_MEMADD3
P0_SR_MEMADD2
P0_SR_MEMADD1
P0_SR_MEMADD0
P0_SR_MEMCHECK_LWR7
P0_SR_MEMCHECK_LWR6
P0_SR_MEMCHECK_LWR5
P0_SR_MEMCHECK_LWR4
P0_SR_MEMCHECK_LWR3
P0_SR_MEMCHECK_LWR2
P0_SR_MEMCHECK_LWR1
P0_SR_MEMCHECK_LWR0
P0_MEMCLK_LWR_H1
P0_MEMCLK_LWR_L1
P0_MEMRESET_GPIO
P0_SR_MEMCKE_LWR
P0_SR_MEMCKE_UPR
P0_SR_MEMCAS_L
P0_SR_MEMRAS_L
P0_SR_MEMDQS_LWR17
P0_SR_MEMDQS_LWR16
P0_SR_MEMDQS_LWR15
P0_SR_MEMDQS_LWR14
P0_SR_MEMDQS_LWR13
P0_SR_MEMDQS_LWR12
P0_SR_MEMDQS_LWR11
P0_SR_MEMDQS_LWR10
P0_SR_MEMDQS_LWR9
P0_VDD_2D5V
163
71
158
157
47
86
78
67
56
36
25
14
5
103
183
182
181
91
92
113
52
59
167
115
118
141
27
122
29
125
32
37
130
41
43
48
144
142
135
134
51
49
45
44
16
17
137
138
76
75
173
10
21
111
65
154
140
177
169
159
149
129
119
107
97
CS3#
CS2#
CS1#
CS0#
DQS8
DQS7
DQS6
DQS5
DQS4
DQS3
DQS2
DQS1
DQS0
FETEN
SA2
SA1
SA0
SDA
SCL
BA2
BA1
BA0
A13
A12
A11
A10_AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
CB7
CB6
CB5
CB4
CB3
CB2
CB1
CB0
CK0
CK0#
CK1
CK1#
CK2
CK2#
NC5
NC1_RESET#
CKE0
CKE1
CAS#
RAS#
DM8
DM7
DM6
DM5
DM4
DM3
DM2
DM1
DM0
GND
GND
10011116
143
156
164
172
180
136
VDDQ9
GND
VDDQ10
VDDQ11
GND
GND
VDDQ12
VDDQ13
GND
GND
15
VDDQ14
GND
112
128
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
GND
GND
GND
GND
GND
17618263344250586674818993
VDDQ15
GND
GND
A A
5
4
smbus addr = 0 1 0
3
GIGABYTE THCHNOLOGIES , INC.
Title
Size Document Number Rev
2
Date: Sheet
Opteron P0 DIMM 2
Custom
GA-7A8DRL
1
2.0
of
15 81 Thursday, November 10, 2005
5
DIMM3
P0_VDD_2D5V
4
3
2
1
VDDID
GND
P0DIMM3
184
DDR-DIMM184/PURPLE
VDDSPD
179
DQ63
178
DQ62
175
DQ61
174
DQ60
88
DQ59
87
DQ58
84
DQ57
83
DQ56
171
DQ55
170
DQ54
166
DQ53
165
DQ52
80
DQ51
79
DQ50
73
DQ49
72
DQ48
162
DQ47
161
DQ46
155
DQ45
153
DQ44
69
DQ43
68
DQ42
64
DQ41
61
DQ40
151
DQ39
150
DQ38
147
DQ37
146
DQ36
60
DQ35
57
DQ34
55
DQ33
53
DQ32
133
DQ31
131
DQ30
127
DQ29
126
DQ28
40
DQ27
39
DQ26
35
DQ25
33
DQ24
123
DQ23
121
DQ22
117
DQ21
114
DQ20
31
DQ19
28
DQ18
24
DQ17
23
DQ16
110
DQ15
109
DQ14
106
DQ13
105
DQ12
20
DQ11
19
DQ10
13
DQ9
12
DQ8
99
DQ7
98
DQ6
95
DQ5
94
DQ4
8
DQ3
6
DQ2
4
DQ1
2
DQ0
90
WP
63
WE#
1
VREF
102
NC4
9
NC2
101
NC3
P0_SR_MEMDATA127
P0_SR_MEMDATA126
P0_SR_MEMDATA125
P0_SR_MEMDATA124
P0_SR_MEMDATA123
P0_SR_MEMDATA122
P0_SR_MEMDATA121
P0_SR_MEMDATA120
P0_SR_MEMDATA119
P0_SR_MEMDATA118
P0_SR_MEMDATA117
P0_SR_MEMDATA116
P0_SR_MEMDATA115
P0_SR_MEMDATA114
P0_SR_MEMDATA113
P0_SR_MEMDATA112
P0_SR_MEMDATA111
P0_SR_MEMDATA110
P0_SR_MEMDATA109
P0_SR_MEMDATA108
P0_SR_MEMDATA107
P0_SR_MEMDATA106
P0_SR_MEMDATA105
P0_SR_MEMDATA104
P0_SR_MEMDATA103
P0_SR_MEMDATA102
P0_SR_MEMDATA101
P0_SR_MEMDATA100
P0_SR_MEMDATA99
P0_SR_MEMDATA98
P0_SR_MEMDATA97
P0_SR_MEMDATA96
P0_SR_MEMDATA95
P0_SR_MEMDATA94
P0_SR_MEMDATA93
P0_SR_MEMDATA92
P0_SR_MEMDATA91
P0_SR_MEMDATA90
P0_SR_MEMDATA89
P0_SR_MEMDATA88
P0_SR_MEMDATA87
P0_SR_MEMDATA86
P0_SR_MEMDATA85
P0_SR_MEMDATA84
P0_SR_MEMDATA83
P0_SR_MEMDATA82
P0_SR_MEMDATA81
P0_SR_MEMDATA80
P0_SR_MEMDATA79
P0_SR_MEMDATA78
P0_SR_MEMDATA77
P0_SR_MEMDATA76
P0_SR_MEMDATA75
P0_SR_MEMDATA74
P0_SR_MEMDATA73
P0_SR_MEMDATA72
P0_SR_MEMDATA71
P0_SR_MEMDATA70
P0_SR_MEMDATA69
P0_SR_MEMDATA68
P0_SR_MEMDATA67
P0_SR_MEMDATA66
P0_SR_MEMDATA65
P0_SR_MEMDATA64
P0_SR_MEMWE_L
P0_DIMM_MEMVREF
P0_SR_MEMDATA[127..64] 14,17
P0_SR_MEMWE_L 13,14,15,18
94
93
12
P0_VDD_2D5V
C94
0.1U/6
C95
0.1U/6
GND
P0_DIMM_MEMVREF 11,13,14,15
738467085
108
120
148
1688222
30
54627796104
VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDDQ0
VDDQ1
VDDQ2
GND
VDDQ3
GND
GND
GND
GND
GND
GND
124
132
139
145
152
160
D D
P0_SR_MEMCS_L3 15,18
P0_SR_MEMCS_L2 15,18
P0_SR_MEMDQS_UPR[8..0] 14,17
RCC_SDA 13,14,15,29,30,31,32,57,75
RCC_SCL 13,14,15,29,30,31,32,57,75
P0_SR_MEMBANK1 13,14,15,18
P0_SR_MEMBANK0 13,14,15,18
C C
B B
P0_SR_MEMADD[13..0] 13,14,15,18
P0_SR_MEMCHECK_UPR[7..0] 14,17
P0_MEMCLK_UPR_H1 10,18
P0_MEMCLK_UPR_L1 10,18
P0_MEMRESET_GPIO 10,13,14,15
P0_SR_MEMCKE_LWR 13,14,15,18
P0_SR_MEMCKE_UPR 13,14,15,18
P0_SR_MEMCAS_L 13,14,15,18
P0_SR_MEMRAS_L 13,14,15,18
P0_SR_MEMDQS_UPR[17..9] 14,17
P0_SR_MEMCS_L3
P0_SR_MEMCS_L2
P0_SR_MEMDQS_UPR8
P0_SR_MEMDQS_UPR7
P0_SR_MEMDQS_UPR6
P0_SR_MEMDQS_UPR5
P0_SR_MEMDQS_UPR4
P0_SR_MEMDQS_UPR3
P0_SR_MEMDQS_UPR2
P0_SR_MEMDQS_UPR1
P0_SR_MEMDQS_UPR0
P0_VDD_2D5V
RCC_SDA
GND
RCC_SCL
P0_SR_MEMBANK1
P0_SR_MEMBANK0
P0_SR_MEMADD13
P0_SR_MEMADD12
P0_SR_MEMADD11
P0_SR_MEMADD10
P0_SR_MEMADD9
P0_SR_MEMADD8
P0_SR_MEMADD7
P0_SR_MEMADD6
P0_SR_MEMADD5
P0_SR_MEMADD4
P0_SR_MEMADD3
P0_SR_MEMADD2
P0_SR_MEMADD1
P0_SR_MEMADD0
P0_SR_MEMCHECK_UPR7
P0_SR_MEMCHECK_UPR6
P0_SR_MEMCHECK_UPR5
P0_SR_MEMCHECK_UPR4
P0_SR_MEMCHECK_UPR3
P0_SR_MEMCHECK_UPR2
P0_SR_MEMCHECK_UPR1
P0_SR_MEMCHECK_UPR0
P0_MEMCLK_UPR_H1
P0_MEMCLK_UPR_L1
P0_MEMRESET_GPIO
P0_SR_MEMCKE_LWR
P0_SR_MEMCKE_UPR
P0_SR_MEMCAS_L
P0_SR_MEMRAS_L
P0_SR_MEMDQS_UPR17
P0_SR_MEMDQS_UPR16
P0_SR_MEMDQS_UPR15
P0_SR_MEMDQS_UPR14
P0_SR_MEMDQS_UPR13
P0_SR_MEMDQS_UPR12
P0_SR_MEMDQS_UPR11
P0_SR_MEMDQS_UPR10
P0_SR_MEMDQS_UPR9
163
71
158
157
47
86
78
67
56
36
25
14
5
103
183
182
181
91
92
113
52
59
167
115
118
141
27
122
29
125
32
37
130
41
43
48
144
142
135
134
51
49
45
44
16
17
137
138
76
75
173
10
21
111
65
154
140
177
169
159
149
129
119
107
97
CS3#
CS2#
CS1#
CS0#
DQS8
DQS7
DQS6
DQS5
DQS4
DQS3
DQS2
DQS1
DQS0
FETEN
SA2
SA1
SA0
SDA
SCL
BA2
BA1
BA0
A13
A12
A11
A10_AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
CB7
CB6
CB5
CB4
CB3
CB2
CB1
CB0
CK0
CK0#
CK1
CK1#
CK2
CK2#
NC5
NC1_RESET#
CKE0
CKE1
CAS#
RAS#
DM8
DM7
DM6
DM5
DM4
DM3
DM2
DM1
DM0
GND
GND
10011116
143
156
164
172
180
136
VDDQ9
GND
VDDQ10
VDDQ11
GND
GND
VDDQ12
VDDQ13
GND
GND
15
VDDQ14
GND
112
128
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
GND
GND
GND
GND
GND
17618263344250586674818993
VDDQ15
GND
GND
smbus addr = 0 1 1
A A
GIGABYTE THCHNOLOGIES , INC.
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
Opteron P0 DIMM 3
Custom
GA-7A8DRL
1
2.0
of
16 81 Thursday, November 10, 2005
5
4
3
2
1
P0_VTT_DDR
1
3
RP2 8P4R/4/47/B
5
7
1
3
RP4 8P4R/4/47/B
5
D D
C C
B B
A A
7
1
3
RP6 8P4R/4/47/B
5
7
1
3
RP8 8P4R/4/47/B
5
7
1
3
RP10 8P4R/4/47/B
5
7
1
3
RP12 8P4R/4/47/B
5
7
1
3
RP14 8P4R/4/47/B
5
7
1
3
RP16 8P4R/4/47/B
5
7
1
3
RP18 8P4R/4/47/B
5
7
1
3
RP20 8P4R/4/47
5
7
1
3
RP23 8P4R/4/47
5
7
1
3
RP27 8P4R/4/47
5
7
1
3
RP31 8P4R/4/47
5
7
1
3
RP35 8P4R/4/47
5
7
1
3
RP39 8P4R/4/47
5
7
1
3
RP46 8P4R/4/47
5
7
1
3
RP53 8P4R/4/47
5
7
1
3
RP57 8P4R/4/47
5
7
1
3
RP64 8P4R/4/47
5
7
1
3
RP68 8P4R/4/47
5
7
1
3
RP72 8P4R/4/47
5
7
1
3
RP76 8P4R/4/47
5
7
1
3
RP82 8P4R/4/47
5
7
1
3
RP85 8P4R/4/47
5
7
1
3
5
RP87 8P4R/4/47
7
1
3
5
RP90 8P4R/4/47
7
1
3
5
RP92 8P4R/4/47
7
1
3
5
RP94 8P4R/4/47
7
P0_SR_MEMDQS_UPR3
2
P0_SR_MEMDQS_UPR12
4
P0_SR_MEMDATA94
6
P0_SR_MEMDATA90
8
P0_SR_MEMDATA88
2
P0_SR_MEMDATA92
4
P0_SR_MEMDATA93
6
P0_SR_MEMDATA89
8
P0_SR_MEMDATA83
2
P0_SR_MEMDATA87
4
6
8
P0_SR_MEMDATA84
2
P0_SR_MEMDATA80
4
P0_SR_MEMDATA81
6
P0_SR_MEMDATA85
8
P0_SR_MEMDATA78
2
P0_SR_MEMDATA79
4
P0_SR_MEMDATA74
6
P0_SR_MEMDATA75
8
P0_SR_MEMDATA76
2
P0_SR_MEMDATA77
4
P0_SR_MEMDQS_UPR1
6
P0_SR_MEMDQS_UPR10
8
P0_SR_MEMDATA71
2
P0_SR_MEMDATA67
4
P0_SR_MEMDATA72
6
P0_SR_MEMDATA73 P0_MEMDATA72
8
P0_SR_MEMDQS_UPR0
2
P0_SR_MEMDQS_UPR9
4
P0_SR_MEMDATA66
6
P0_SR_MEMDATA70
8
P0_SR_MEMDATA64
2
P0_SR_MEMDATA68
4
P0_SR_MEMDATA69
6
P0_SR_MEMDATA65
8
P0_SR_MEMDATA59
2
P0_SR_MEMDATA58
4
P0_SR_MEMDATA63
6
P0_SR_MEMDATA62
8
P0_SR_MEMDQS_LWR7
2
P0_SR_MEMDQS_LWR16
4
P0_SR_MEMDATA57
6
P0_SR_MEMDATA56
8
P0_SR_MEMDATA55
2
4
P0_SR_MEMDQS_LWR6
6
P0_SR_MEMDQS_LWR15
8
P0_SR_MEMDATA61
2
P0_SR_MEMDATA60
4
P0_SR_MEMDATA51
6
P0_SR_MEMDATA50
8
P0_SR_MEMDATA53
2
P0_SR_MEMDATA52
4
P0_SR_MEMDATA49
6
P0_SR_MEMDATA48
8
P0_SR_MEMDATA47
2
P0_SR_MEMDATA43
4
P0_SR_MEMDATA46
6
P0_SR_MEMDATA42
8
P0_SR_MEMDATA40
2
P0_SR_MEMDATA44
4
P0_SR_MEMDATA35
6
P0_SR_MEMDATA39
8
P0_SR_MEMDATA38
2
P0_SR_MEMDATA34
4
P0_SR_MEMDQS_LWR13
6
P0_SR_MEMDQS_LWR4
8
P0_SR_MEMDATA37
2
P0_SR_MEMDATA33
4
P0_SR_MEMDATA36
6
P0_SR_MEMDATA32
8
P0_SR_MEMDATA31
2
P0_SR_MEMDATA27
4
P0_SR_MEMDATA26
6
P0_SR_MEMDATA30
8
P0_SR_MEMDQS_LWR12
2
P0_SR_MEMDQS_LWR3
4
P0_SR_MEMDATA25
6
P0_SR_MEMDATA29
8
P0_SR_MEMDATA28
2
P0_SR_MEMDATA24
4
P0_SR_MEMDATA19
6
P0_SR_MEMDATA23
8
2
P0_SR_MEMDATA18
4
P0_SR_MEMDQS_LWR11
6
P0_SR_MEMDQS_LWR2
8
P0_SR_MEMDATA21
2
P0_SR_MEMDATA17
4
P0_SR_MEMDATA16
6
P0_SR_MEMDATA20
8
P0_SR_MEMDATA9
2
P0_SR_MEMDATA8
4
P0_SR_MEMDATA3
6
P0_SR_MEMDATA7
8
P0_SR_MEMDATA11
2
P0_SR_MEMDATA10
4
P0_SR_MEMDATA15
6
P0_SR_MEMDATA14
8
P0_SR_MEMDQS_LWR10
2
P0_SR_MEMDQS_LWR1
4
P0_SR_MEMDATA13
6
P0_SR_MEMDATA12
8
P0_SR_MEMDATA2
2
P0_SR_MEMDATA6
4
P0_SR_MEMDQS_LWR9
6
P0_SR_MEMDQS_LWR0
8
P0_SR_MEMDATA1
2
P0_SR_MEMDATA5
4
P0_SR_MEMDATA4
6
P0_SR_MEMDATA0
8
5
P0_MEMDATA90
P0_MEMDATA94
P0_MEMDQS_UPR12
P0_MEMDQS_UPR3
P0_MEMDATA89
P0_MEMDATA93
P0_MEMDATA92
P0_MEMDATA88
P0_MEMDATA87
P0_MEMDATA83
P0_MEMDATA86
P0_MEMDATA82
P0_MEMDQS_UPR11 P0_SR_MEMDQS_UPR11
P0_MEMDQS_UPR2
P0_MEMDATA85
P0_MEMDATA81
P0_MEMDATA78
P0_MEMDQS_UPR10
P0_MEMDQS_UPR1 P0_SR_MEMDQS_UPR1
P0_MEMDATA80
P0_MEMDATA84
P0_MEMDATA75
P0_MEMDATA74
P0_MEMDATA77 P0_SR_MEMDATA77
P0_MEMDATA76
P0_MEMDATA73
P0_MEMDATA67
P0_MEMDATA71
P0_MEMDATA70
P0_MEMDATA66
P0_MEMDQS_UPR9 P0_SR_MEMDQS_UPR9
P0_MEMDQS_UPR0 P0_SR_MEMDQS_UPR0
P0_MEMDATA65
P0_MEMDATA69 P0_MEMCHECK_UPR3
P0_MEMDATA68
P0_MEMDATA64
P0_SR_MEMDATA63 P0_MEMDATA63
P0_SR_MEMDATA62 P0_MEMDATA62
P0_SR_MEMDQS_LWR7
P0_SR_MEMDQS_LWR16
P0_SR_MEMDATA59
P0_SR_MEMDATA58 P0_MEMDATA58
P0_SR_MEMDATA57
P0_SR_MEMDATA56
P0_SR_MEMDATA61
P0_SR_MEMDATA60
P0_SR_MEMDATA51
P0_SR_MEMDATA50
P0_SR_MEMDATA55
P0_SR_MEMDATA54 P0_MEMDATA54
P0_SR_MEMDQS_LWR6
P0_SR_MEMDQS_LWR15
P0_SR_MEMDATA53
P0_SR_MEMDATA52 P0_MEMDATA52 P0_MEMDQS_UPR16
P0_SR_MEMDATA49 P0_MEMDATA49
P0_SR_MEMDATA48
P0_SR_MEMDATA47
P0_SR_MEMDATA43
P0_SR_MEMDATA46
P0_SR_MEMDATA42
P0_SR_MEMDQS_LWR5
P0_SR_MEMDQS_LWR14
P0_SR_MEMDATA41
P0_SR_MEMDATA45
P0_SR_MEMDATA44 P0_MEMDATA44
P0_SR_MEMDATA35
P0_SR_MEMDATA39
P0_SR_MEMDATA38
P0_SR_MEMDATA34 P0_MEMDATA34
P0_SR_MEMDQS_LWR13 P0_MEMDQS_LWR13
P0_SR_MEMDQS_LWR4 P0_MEMDQS_LWR4
P0_SR_MEMDATA37
P0_SR_MEMDATA33 P0_MEMDQS_UPR5
P0_SR_MEMDATA36
P0_SR_MEMDATA32
P0_SR_MEMCHECK_LWR5
P0_SR_MEMCHECK_LWR4
P0_SR_MEMDATA31
P0_SR_MEMDATA27
P0_SR_MEMDATA26
P0_SR_MEMDATA30
P0_SR_MEMDQS_LWR12
P0_SR_MEMDQS_LWR3
P0_SR_MEMDATA25
P0_SR_MEMDATA29
P0_SR_MEMDATA24
P0_SR_MEMDATA19
P0_SR_MEMDATA23
P0_SR_MEMDATA22
P0_SR_MEMDATA18
P0_SR_MEMDQS_LWR11
P0_SR_MEMDQS_LWR2
P0_SR_MEMDATA21
P0_SR_MEMDATA17
P0_SR_MEMDATA15
P0_SR_MEMDATA14
P0_SR_MEMDQS_LWR10
P0_SR_MEMDQS_LWR1
P0_SR_MEMDATA16
P0_SR_MEMDATA20
P0_SR_MEMDATA11
P0_SR_MEMDATA10
P0_SR_MEMDATA13
P0_SR_MEMDATA12
P0_SR_MEMDATA9
P0_SR_MEMDATA8
P0_SR_MEMDATA3
P0_SR_MEMDATA7
P0_SR_MEMDATA2
P0_SR_MEMDATA6
P0_SR_MEMDQS_LWR9
P0_SR_MEMDQS_LWR0
P0_SR_MEMDATA1
P0_SR_MEMDATA5
P0_SR_MEMDATA4
P0_SR_MEMDATA0
1
3
5
RP3 8P4R/10/B
7
1
3
5
RP5 8P4R/10/B
7
1
3
5
RP7 8P4R/10/B
7
1
3
5
RP9 8P4R/10/B
7
1
3
5
RP11 8P4R/10/B
7
1
3
5
RP13 8P4R/10/B
7
1
3
5
RP15 8P4R/10/B
7
1
3
5
RP17 8P4R/10/B
7
1
3
5
RP19 8P4R/10/B
7
1
3
5
RP21 8P4R/10/B
7
1
3
5
RP24 8P4R-10
7
1
3
5
RP28 8P4R-10
7
1
3
5
RP32 8P4R-10
7
1
3
5
RP36 8P4R-10
7
1
3
5
RP40 8P4R-10
7
1
3
5
RP43 8P4R-10
7
1
3
5
RP47 8P4R-10
7
1
3
5
RP50 8P4R-10
7
1
3
5
RP54 8P4R-10
7
1
3
5
RP58 8P4R-10
7
1
3
5
RP61 8P4R-10
7
1
3
5
RP65 8P4R-10
7
1
3
5
RP69 8P4R-10
7
1
3
5
RP73 8P4R-10
7
1
3
5
RP77 8P4R-10
7
1
3
5
RP80 8P4R-10
7
1
3
5
RP83 8P4R-10
7
1
3
5
RP86 8P4R-10
7
1
3
5
RP88 8P4R-10
7
1
3
5
RP91 8P4R-10
7
1
3
5
RP93 8P4R-10
7
1
3
5
RP95 8P4R-10
7
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
P0_SR_MEMDATA90
P0_SR_MEMDATA94
P0_SR_MEMDQS_UPR12
P0_SR_MEMDQS_UPR3
P0_SR_MEMDATA89
P0_SR_MEMDATA93
P0_SR_MEMDATA92
P0_SR_MEMDATA88
P0_SR_MEMDATA87
P0_SR_MEMDATA83
P0_SR_MEMDATA86
P0_SR_MEMDATA82
P0_SR_MEMDQS_UPR2
P0_SR_MEMDATA85
P0_SR_MEMDATA81
P0_SR_MEMDATA79 P0_MEMDATA79
P0_SR_MEMDATA78
P0_SR_MEMDQS_UPR10
P0_SR_MEMDATA80
P0_SR_MEMDATA84
P0_SR_MEMDATA75
P0_SR_MEMDATA74
P0_SR_MEMDATA76
P0_SR_MEMDATA73
P0_SR_MEMDATA72
P0_SR_MEMDATA67
P0_SR_MEMDATA71
P0_SR_MEMDATA70
P0_SR_MEMDATA66
P0_SR_MEMDATA65
P0_SR_MEMDATA69
P0_SR_MEMDATA68
P0_SR_MEMDATA64
P0_MEMDQS_LWR7
P0_MEMDQS_LWR16
P0_MEMDATA59
P0_MEMDATA57
P0_MEMDATA56
P0_MEMDATA61
P0_MEMDATA60
P0_MEMDATA51
P0_MEMDATA50
P0_MEMDATA55
P0_MEMDQS_LWR6
P0_MEMDQS_LWR15
P0_MEMDATA53
P0_MEMDATA48
P0_MEMDATA47
P0_MEMDATA43
P0_MEMDATA46
P0_MEMDATA42
P0_MEMDQS_LWR5
P0_MEMDQS_LWR14
P0_MEMDATA41
P0_MEMDATA45
P0_MEMDATA40 P0_SR_MEMDATA40
P0_MEMDATA35
P0_MEMDATA39
P0_MEMDATA38
P0_MEMDATA37
P0_MEMDATA33
P0_MEMDATA36
P0_MEMDATA32
P0_MEMCHECK_LWR5
P0_MEMCHECK_LWR4
P0_MEMDATA31
P0_MEMDATA27
P0_MEMDATA26
P0_MEMDATA30
P0_MEMDQS_LWR12
P0_MEMDQS_LWR3
P0_MEMDATA25
P0_MEMDATA29
P0_MEMDATA28 P0_SR_MEMDATA28
P0_MEMDATA24
P0_MEMDATA19
P0_MEMDATA23
P0_MEMDATA22
P0_MEMDATA18
P0_MEMDQS_LWR11
P0_MEMDQS_LWR2
P0_MEMDATA21
P0_MEMDATA17
P0_MEMDATA15
P0_MEMDATA14
P0_MEMDQS_LWR10
P0_MEMDQS_LWR1
P0_MEMDATA16
P0_MEMDATA20
P0_MEMDATA11
P0_MEMDATA10
P0_MEMDATA13
P0_MEMDATA12
P0_MEMDATA9
P0_MEMDATA8
P0_MEMDATA3
P0_MEMDATA7
P0_MEMDATA2
P0_MEMDATA6
P0_MEMDQS_LWR9
P0_MEMDQS_LWR0
P0_MEMDATA1
P0_MEMDATA5
P0_MEMDATA4
P0_MEMDATA0
4
P0_MEMDATA[127..0]
P0_SR_MEMDATA[127..0]
P0_SR_MEMDQS_LWR[17..0]
P0_SR_MEMDQS_UPR[17..0]
P0_SR_MEMCHECK_UPR[7..0]
P0_SR_MEMCHECK_LWR[7..0]
P0_MEMDQS_LWR[17..0]
P0_MEMDQS_UPR[17..0]
P0_MEMCHECK_UPR[7..0]
P0_MEMCHECK_LWR[7..0]
P0_VTT_DDR
RP26 8P4R/4/47/B
RP30 8P4R/4/47/B
RP34 8P4R/4/47/B
RP38 8P4R/4/47/B
RP42 8P4R/4/47/B
RP45 8P4R/4/47/B
RP49 8P4R/4/47
RP52 8P4R/4/47
RP56 8P4R/4/47
RP60 8P4R/4/47
RP62 8P4R/4/47/B
RP66 8P4R/4/47/B
RP70 8P4R/4/47/B
RP74 8P4R/4/47/B
RP78 8P4R/4/47/B
RP81 8P4R/4/47/B
RP84 8P4R/4/47/B
RP89 8P4R/4/47/B
P0_MEMDATA[127..0] 10
P0_SR_MEMDATA[127..0] 13,14,15,16
P0_SR_MEMDQS_LWR[17..0] 13,15
P0_SR_MEMDQS_UPR[17..0] 14,16
P0_SR_MEMCHECK_UPR[7..0] 14,16
P0_SR_MEMCHECK_LWR[7..0] 13,15
P0_MEMDQS_LWR[17..0] 10
P0_MEMDQS_UPR[17..0] 10
P0_MEMCHECK_UPR[7..0] 10
P0_MEMCHECK_LWR[7..0] 10
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
P0_SR_MEMDQS_UPR4
P0_SR_MEMDQS_UPR13
P0_SR_MEMDATA98
P0_SR_MEMDATA102
P0_SR_MEMDATA96 P0_SR_MEMDATA54
P0_SR_MEMDATA100
P0_SR_MEMDATA97
P0_SR_MEMDATA101
P0_SR_MEMDATA91
P0_SR_MEMDATA95
P0_SR_MEMCHECK_UPR4
P0_SR_MEMCHECK_UPR5
P0_SR_MEMCHECK_UPR2
P0_SR_MEMCHECK_UPR6
P0_SR_MEMCHECK_UPR3
P0_SR_MEMCHECK_UPR7
P0_SR_MEMDQS_UPR2
P0_SR_MEMDQS_UPR11
P0_SR_MEMDATA82
P0_SR_MEMDATA86
P0_SR_MEMCHECK_UPR0
P0_SR_MEMCHECK_UPR1
P0_SR_MEMDQS_UPR8
P0_SR_MEMDQS_UPR17
P0_SR_MEMCHECK_LWR7
P0_SR_MEMCHECK_LWR3
P0_SR_MEMCHECK_LWR6
P0_SR_MEMCHECK_LWR2
P0_SR_MEMDQS_LWR8
P0_SR_MEMDQS_LWR5
P0_SR_MEMDQS_LWR14
P0_SR_MEMDATA41
P0_SR_MEMDATA45
P0_SR_MEMCHECK_LWR1
P0_SR_MEMCHECK_LWR0
P0_SR_MEMCHECK_LWR5
P0_SR_MEMCHECK_LWR4
P0_SR_MEMDATA126
P0_SR_MEMDATA127
P0_SR_MEMDATA122
P0_SR_MEMDATA123
P0_SR_MEMDATA120
P0_SR_MEMDATA121
P0_SR_MEMDQS_UPR16
P0_SR_MEMDQS_UPR7
P0_SR_MEMDQS_UPR15
P0_SR_MEMDQS_UPR6
P0_SR_MEMDATA118
P0_SR_MEMDATA119
P0_SR_MEMDATA114
P0_SR_MEMDATA115
P0_SR_MEMDATA124
P0_SR_MEMDATA125
P0_SR_MEMDATA112
P0_SR_MEMDATA113
P0_SR_MEMDATA116
P0_SR_MEMDATA117
P0_SR_MEMDATA106
P0_SR_MEMDATA107
P0_SR_MEMDATA110
P0_SR_MEMDATA111
P0_SR_MEMDATA109
P0_SR_MEMDATA105
P0_SR_MEMDQS_UPR5
P0_SR_MEMDQS_UPR14
P0_SR_MEMDATA99
P0_SR_MEMDATA103
P0_SR_MEMDATA104
P0_SR_MEMDATA108
3
P0_MEMCHECK_UPR7
P0_MEMCHECK_UPR6
P0_MEMCHECK_UPR2
P0_SR_MEMCHECK_LWR7
P0_SR_MEMCHECK_LWR3
P0_SR_MEMCHECK_LWR6
P0_SR_MEMCHECK_LWR2
P0_MEMDQS_UPR17
P0_MEMDQS_UPR8
P0_MEMCHECK_UPR1
P0_MEMCHECK_UPR0
P0_SR_MEMDQS_LWR17
P0_SR_MEMDQS_LWR8
P0_SR_MEMCHECK_LWR1
P0_SR_MEMCHECK_LWR0
P0_MEMDATA123
P0_MEMDATA122
P0_MEMDATA127
P0_MEMDATA126
P0_MEMDQS_UPR7 P0_SR_MEMDQS_UPR7
P0_MEMDATA121
P0_MEMDATA120
P0_MEMDATA125
P0_MEMDATA124
P0_MEMDATA115
P0_MEMDATA114 P0_SR_MEMDATA11 4
P0_MEMDATA119
P0_MEMDATA118
P0_MEMDQS_UPR6
P0_MEMDQS_UPR15
P0_MEMDATA117
P0_MEMDATA116
P0_MEMDATA113
P0_MEMDATA112 P0_SR_MEMDATA11 2
P0_MEMDATA111
P0_MEMDATA110
P0_MEMDATA107
P0_MEMDATA106
P0_MEMDQS_UPR14
P0_MEMDATA105
P0_MEMDATA109
P0_MEMDATA108
P0_MEMDATA104
P0_MEMDATA103
P0_MEMDATA99
P0_MEMDATA102 P0_SR_MEMDATA10 2
P0_MEMDATA98
P0_MEMDQS_UPR13
P0_MEMDQS_UPR4
P0_MEMDATA101
P0_MEMDATA97
P0_MEMDATA100
P0_MEMDATA96
P0_MEMCHECK_UPR5
P0_MEMCHECK_UPR4
P0_MEMDATA95
P0_MEMDATA91
1
3
5
RP22 8P4R/10/B
7
1
3
5
RP25 8P4R-10
7
1
3
5
RP29 8P4R/10/B
7
1
3
5
RP33 8P4R-10
7
1
3
5
RP37 8P4R/10/B
7
1
3
5
RP41 8P4R/10/B
7
1
3
5
RP44 8P4R/10/B
7
1
3
5
RP48 8P4R/10/B
7
1
3
5
RP51 8P4R/10/B
7
1
3
5
RP55 8P4R/10/B
7
1
3
5
RP59 8P4R/10/B
7
1
3
5
RP63 8P4R/10/B
7
1
3
5
RP67 8P4R/10/B
7
1
3
5
RP71 8P4R/10/B
7
1
3
5
RP75 8P4R/10/B
7
1
3
5
RP79 8P4R/10/B
7
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
P0_SR_MEMCHECK_UPR7
P0_SR_MEMCHECK_UPR3
P0_SR_MEMCHECK_UPR6
P0_SR_MEMCHECK_UPR2
P0_MEMCHECK_LWR7
P0_MEMCHECK_LWR3
P0_MEMCHECK_LWR6
P0_MEMCHECK_LWR2
P0_SR_MEMDQS_UPR17
P0_SR_MEMDQS_UPR8
P0_SR_MEMCHECK_UPR1
P0_SR_MEMCHECK_UPR0
P0_MEMDQS_LWR17
P0_MEMDQS_LWR8
P0_MEMCHECK_LWR1
P0_MEMCHECK_LWR0
P0_SR_MEMDATA123
P0_SR_MEMDATA122
P0_SR_MEMDATA127
P0_SR_MEMDATA126
P0_SR_MEMDQS_UPR16
P0_SR_MEMDATA121
P0_SR_MEMDATA120
P0_SR_MEMDATA125
P0_SR_MEMDATA124
P0_SR_MEMDATA115
P0_SR_MEMDATA119
P0_SR_MEMDATA118
P0_SR_MEMDQS_UPR6
P0_SR_MEMDQS_UPR15
P0_SR_MEMDATA117
P0_SR_MEMDATA116 P0_SR_MEMDQS_LWR17
P0_SR_MEMDATA113
P0_SR_MEMDATA111
P0_SR_MEMDATA110
P0_SR_MEMDATA107
P0_SR_MEMDATA106
P0_SR_MEMDQS_UPR14
P0_SR_MEMDQS_UPR5
P0_SR_MEMDATA105
P0_SR_MEMDATA109
P0_SR_MEMDATA108
P0_SR_MEMDATA104
P0_SR_MEMDATA103
P0_SR_MEMDATA99
P0_SR_MEMDATA98
P0_SR_MEMDQS_UPR13
P0_SR_MEMDQS_UPR4
P0_SR_MEMDATA101
P0_SR_MEMDATA97
P0_SR_MEMDATA100 P0_SR_MEMDATA22
P0_SR_MEMDATA96
P0_SR_MEMCHECK_UPR5
P0_SR_MEMCHECK_UPR4
P0_SR_MEMDATA95
P0_SR_MEMDATA91
GIGABYTE THCHNOLOGIES , INC.
Title
Opteron P0 DDR Dtat Terminators
Size Document Number Rev
C
Date: Sheet
GA-7A8DRL
1
of
17 81 Thursday, November 10, 2005
2.0
5
4
3
2
1
D D
P0_VTT_DDR
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
8P4R/4/47
2
4
6
8
2
4
6
8
8P4R/4/47
2
4
6
8
P0_SR_MEMBANK0
P0_SR_MEMBANK1
P0_SR_MEMADD10
P0_SR_MEMADD0
P0_SR_MEMADD1
P0_SR_MEMADD11
P0_SR_MEMADD12
P0_SR_MEMCKE_LWR
P0_SR_MEMCKE_UPR
P0_SR_MEMADD5
P0_SR_MEMADD8
P0_SR_MEMADD7
P0_SR_MEMADD9
P0_SR_MEMADD2
P0_SR_MEMADD3
P0_SR_MEMADD4
P0_SR_MEMADD6
P0_SR_MEMADD13
P0_SR_MEMCS_L7
P0_SR_MEMCS_L5
P0_SR_MEMCS_L6
P0_SR_MEMCS_L0
P0_SR_MEMCS_L3
P0_SR_MEMCS_L1
P0_SR_MEMCS_L4
P0_SR_MEMCAS_L
P0_SR_MEMCS_L2
P0_SR_MEMWE_L
P0_SR_MEMRAS_L
P0_SR_MEMBANK0 13,14,15,16
P0_SR_MEMBANK1 13,14,15,16
P0_SR_MEMCKE_LWR 13,14,15,16
P0_SR_MEMCKE_UPR 13,14,15,16
P0_SR_MEMBANK0
P0_SR_MEMBANK1
P0_SR_MEMADD0
P0_SR_MEMADD10
P0_SR_MEMADD1
P0_SR_MEMADD11
P0_SR_MEMADD12
P0_SR_MEMCKE_LWR
P0_SR_MEMCKE_UPR
P0_SR_MEMADD8
P0_SR_MEMADD5
P0_SR_MEMADD9
P0_SR_MEMADD7
P0_SR_MEMADD2
P0_SR_MEMADD3
P0_SR_MEMADD4
P0_SR_MEMADD6
P0_MEMCS_L0
P0_MEMCS_L1
P0_MEMCS_L3 P0_SR_MEMCS_L3
P0_MEMCS_L4
R938 10/4
1
3
5
RP294
7
1
3
5
RP296 8P4R/10/4
7
1
3
5
RP298 8P4R/10/4
7
1
3
5
RP300 8P4R/10/4
7
1
3
5
RP303 8P4R/10/4
7
1
3
5
RP305 8P4R/10/4
7
1
3
5
RP307 8P4R/10/4
7
2
4
8P4R/10/4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
P0_MEMBANK0
P0_MEMBANK1
P0_MEMADD0
P0_MEMADD10
P0_MEMADD1
P0_MEMADD11
P0_MEMADD12
P0_MEMCKE_LWR
P0_MEMCKE_UPR
P0_MEMADD8
P0_MEMADD5
P0_MEMADD9
P0_MEMADD7
P0_MEMADD2
P0_MEMADD3
P0_MEMADD4
P0_MEMADD6
P0_SR_MEMCS_L6 P0_MEMCS_L6
P0_SR_MEMCS_L5 P0_MEMCS_L5
P0_SR_MEMCS_L7 P0_MEMCS_L7
P0_SR_MEMADD13 P0_MEMADD13
P0_SR_MEMCS_L0
P0_SR_MEMCS_L1
P0_SR_MEMCS_L4
P0_SR_MEMWE_L P0_MEMWE_L
P0_SR_MEMRAS_L P0_MEMRAS_L
P0_SR_MEMCAS_L P0_MEMCAS_L
P0_SR_MEMCS_L2 P0_MEMCS_L2
P0_MEMBANK0 10
P0_MEMBANK1 10
P0_SR_MEMCS_L0 13,14
P0_SR_MEMCS_L1 13,14
P0_SR_MEMCS_L3 15,16
P0_SR_MEMWE_L 13,14,15,16 P0_MEMWE_L 10
P0_SR_MEMRAS_L 13,14,15,16 P0_MEMRAS_L 10
P0_SR_MEMCAS_L 13,14,15,16 P0_MEMCAS_L 10
P0_SR_MEMCS_L2 15,16
R939 47/6
1
3
5
RP295 8P4R/4/47
7
1
3
5
RP297 8P4R/4/47
7
1
3
5
RP299 8P4R/4/47
7
1
C C
B B
3
5
RP301 8P4R/4/47
7
P0_VTT_DDR
1
3
5
RP302
7
1
3
5
RP304
7
P0_VTT_DDR
1
3
5
RP306 8P4R/4/47
7
P0_MEMCS_L[7..0] 10
P0_SR_MEMADD[13..0] 13,14,15,16
P0_MEMADD[13..0] 10
P0_MEMCKE_LWR 10
P0_MEMCKE_UPR 10
P0_MEMCLK_LWR_H1
P0_MEMCLK_LWR_L1
P0_MEMCLK_LWR_H0
P0_MEMCLK_LWR_L0
P0_MEMCLK_UPR_H1
P0_MEMCLK_UPR_L1
P0_MEMCLK_UPR_H0
P0_MEMCLK_UPR_L0
P0_MEMCLK_LWR_H[1..0] 10,13,15
P0_MEMCLK_LWR_L[1..0] 10,13,15
R940
120/6/1
R941
120/6/1
P0_MEMCLK_UPR_H[1..0] 10,14,16
P0_MEMCLK_UPR_L[1..0] 10,14,16
R942
120/6/1
R943
120/6/1
Close to last DIMM within 900 mils
Close to processor 0.5"~1"
Close to 1st DIMM 0.5"~1"
A A
GIGABYTE THCHNOLOGIES , INC.
Title
Opteron P0 DDR ADD/Cmd Terminators
Size Document Number Rev
Custom
5
4
3
2
Date: Sheet
GA-7A8DRL
1
18 81 Thursday, November 10, 2005
2.0
of
5
4
3
2
1
VLDT_1D2V VLDT_1D2V VLDT_1D2V
C96 0.22U/6
C99 0.22U/6
C102 0.22U/6
C105 0.22U/6
C108 1000P/6
C109 1000P/6
D D
C C
C113 1000P/6
C187 4.7U/12
C188 10U/12
C766 10U/12
P0_VDD_CORE
C193 10U/12
C196 10U/12
C198 10U/12
C197 10U/12
C199 10U/12
C200 10U/12
C201 10U/12
C202 10U/12
C203 10U/12
C204 10U/12
C97 0.22U/6
C100 0.22U/6
C103 0.22U/6
C106 0.22U/6
C110 1000P/6
C114 1000P/6
C117 1000P/6 C125 0.22U/6
C189 4.7U/12
C190 10U/12
C767 10U/12
GND
GND
C98 0.22U/6
C101 0.22U/6
C104 0.22U/6
C107 0.22U/6
C111 1000P/6
C115 1000P/6
C118 1000P/6
C191 4.7U/12
C192 10U/12
C768 10U/12
GND GND
Place around Opteron keep-out
P0_VTT_DDR
C1491 10U/12
C1492 10U/12
C1493 10U/12
C1494 10U/12
C1495 0.1U/6
C1496 0.1U/6
B B
C1497 0.1U/6
C1498 0.1U/6
GND
P0_VDD_2D5V
P0_VDD_2D5V
C165 0.22U/6
C167 0.22U/6
C205 4.7U/12
C216 4.7U/12
C218 4.7U/12
C337 4.7U/12
C341 4.7U/12
C131
0.1U/6
C132
0.1U/6
C133
0.1U/6
C134
0.1U/6
C135
0.1U/6
C136
0.1U/6
C137
0.1U/6
C138
0.1U/6
C139
0.1U/6
C140
0.1U/6
C144
0.1U/6
C149
0.1U/6
C151
0.1U/6
GND
P0_VDD_2D5V
C172 0.22U/6/B
C174 0.22U/6/B
C175 0.22U/6/B
C176 0.22U/6/B
C177 0.22U/6/B
C178 0.22U/6/B
C179 0.22U/6/B
C181 0.22U/6
C183 0.22U/6/B
C184 0.22U/6/B
C185 0.22U/6/B
C186 0.22U/6/B
C168 0.22U/6
C170 0.22U/6
C171 0.22U/6
C173 0.22U/6
C180 0.22U/6
C182 0.22U/6
GND
P0_VTT_DDR
+
EC20 1000U/6.3V/8X11.5/KZG
+
EC22 1000U/6.3V/8X11.5/KZG
C61 4.7U/12
C126 0.22U/6
C127 0.22U/6
C128 0.22U/6
C129 0.22U/6
C130 0.22U/6
GND
Place pairs evenly along VTT strips
running along both sides of Men bus
VLDT_1D2V VLDT_1D2V VLDT_1D2V
C146 0.22U/6/X7R/B
P0_VDD_CORE
C145 0.22U/6/X7R/B
C150 0.22U/6/X7R/B
C152 0.22U/6/X7R/B
C154 0.22U/6/X7R/B
C156 0.22U/6/X7R/B
C158 0.22U/6/X7R/B
C159 0.22U/6/X7R/B
C160 0.22U/6/X7R/B
C161 0.22U/6/X7R/B
C162 0.22U/6/X7R/B
C163 0.22U/6/X7R/B
C164 0.22U/6/X7R/B
C1683 0.22U/6/X7R/B
GND
Place on 2
edge VTT
Power
island
Others Place around
VTT Power island
C142 0.22U/6/X7R/B C141 0.22U/6/X7R/B
C147 0.22U/6/X7R/B
GND GND GND
VDDIO
All other avail.spots for VDD_CORE caps
P0_VTT_DDR
C166 0.22U/6
C43 4.7U/12
C169 0.22U/6
C44 4.7U/12
C143 0.22U/6/X7R/B
C148 0.22U/6/X7R/B
Window Cap Placement
LINK3
LINK0
LINK1
GND
GND
A A
5
4
Place CAP. Between every DIMM
3
GIGABYTE THCHNOLOGIES , INC.
Title
Opteron P0 Decoupling Caps
Size Document Number Rev
Custom
2
Date: Sheet
GA-7A8DRL
1
19 81 Thursday, November 10, 2005
2.0
of
5
4
3
2
1
VLDT_1D2V
Layout pattern
Copper pour(+12V)
D D
N7
VLDT_0(1)
R7
VLDT_0(2)
U7
VLDT_0(3)
W7
VLDT_0(4)
M8
VLDT_0(5)
P8
VLDT_0(6)
AA7
VLDT_0(7)
V8
VLDT_0(8)
Y8
VLDT_0(9)
R5
L0_CADIN_H(15)
T5
L0_CADIN_L(15)
P3
L0_CADIN_H(14)
P4
L0_CADIN_L(14)
N5
L0_CADIN_H(13)
P5
L0_CADIN_L(13)
M3
L0_CADIN_H(12)
M4
C C
B B
L0_CADIN_L(12)
K3
L0_CADIN_H(11)
K4
L0_CADIN_L(11)
J5
L0_CADIN_H(10)
K5
L0_CADIN_L(10)
H3
L0_CADIN_H(9)
H4
L0_CADIN_L(9)
G5
L0_CADIN_H(8)
H5
L0_CADIN_L(8)
R3
L0_CADIN_H(7)
R2
L0_CADIN_L(7)
N1
L0_CADIN_H(6)
P1
L0_CADIN_L(6)
N3
L0_CADIN_H(5)
N2
L0_CADIN_L(5)
L1
L0_CADIN_H(4)
M1
L0_CADIN_L(4)
J1
L0_CADIN_H(3)
K1
L0_CADIN_L(3)
J3
L0_CADIN_H(2)
J2
L0_CADIN_L(2)
G1
L0_CADIN_H(1)
H1
L0_CADIN_L(1)
G3
L0_CADIN_H(0)
G2
L0_CADIN_L(0)
L5
L0_CLKIN_H(1)
M5
L0_CLKIN_L(1)
L3
L0_CLKIN_H(0)
L2
L0_CLKIN_L(0)
U11A
L0_CADOUT_H(15)
L0_CADOUT_L(15)
L0_CADOUT_H(14)
L0_CADOUT_L(14)
L0_CADOUT_H(13)
L0_CADOUT_L(13)
L0_CADOUT_H(12)
L0_CADOUT_L(12)
L0_CADOUT_H(11)
L0_CADOUT_L(11)
L0_CADOUT_H(10)
L0_CADOUT_L(10)
L0_CADOUT_H(9)
L0_CADOUT_L(9)
L0_CADOUT_H(8)
L0_CADOUT_L(8)
L0_CADOUT_H(7)
L0_CADOUT_L(7)
L0_CADOUT_H(6)
L0_CADOUT_L(6)
L0_CADOUT_H(5)
L0_CADOUT_L(5)
L0_CADOUT_H(4)
L0_CADOUT_L(4)
L0_CADOUT_H(3)
L0_CADOUT_L(3)
L0_CADOUT_H(2)
L0_CADOUT_L(2)
L0_CADOUT_H(1)
L0_CADOUT_L(1)
L0_CADOUT_H(0)
L0_CADOUT_L(0)
L0_CLKOUT_H(1)
L0_CLKOUT_L(1)
L0_CLKOUT_H(0)
L0_CLKOUT_L(0)
V4
V3
Y5
W5
Y4
Y3
AB5
AA5
AD5
AC5
AD4
AD3
AF5
AE5
AF4
AF3
V1
U1
W2
W3
Y1
W1
AA2
AA3
AC2
AC3
AD1
AC1
AE2
AE3
AF1
AE1
AB4
AB3
AB1
AA1
GND
+12V
1 2
3
D
1
R1017
1K/6
Q133
2N7002/SOT23
G S
2
FANPWM2
1 2
1 2
1.5K/6
VCC
1 2
R1019
4.7K/6
R1015
+12V
R1018
FANPWM2 74
1.5K/6
1 2
GND
Q131
2
1
2N2907A
Q132
2
1
2N2907A
C796
22U/1210/16V
GND GND
3
V12_CPU_FAN2
3
Routed trace
width > 40
mils
C1180
0.1U/6/16V
0/6/X
R1016
+12V
1 2
1N5817/X
213
CVS
CPU_FAN2
FAN1x3/W
D89
VCC
GND
1 2
R1011
8.2K/6
FANIO2
C1179
3300P/6/X7R/X
3
21
VCC
FANIO2 74
R1
L0_CTLIN_H(0)
T1
L0_CTLIN_L(0)
Opteron
A A
L0_CTLOUT_H(0)
L0_CTLOUT_L(0)
U2
U3
GIGABYTE THCHNOLOGIES , INC.
Title
Opteron P1 LDT Link 0
Size Document Number Rev
A4
5
4
3
Date: Sheet
2
GA-7A8DRL
of
20 81 Thursday, November 10, 2005
1
2.0
5
P1_VDD_2D5V
L19
W21
AA21
J21
M22
P22
T22
V22
Y22
AB22
AJ23
AA19
C23
E23
K26
T26
AE28
G26
N26
VDDIO13
VDDIO14
VDDIO15
VDDIO16
VDDIO17
W26
VDDIO18
VDDIO19
D D
VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO6
VDDIO7
VDDIO8
VDDIO9
VDDIO10
VDDIO11
VDDIO12
F17
VSS6
P19
VSS7
N30
VSS8
F1
VSS9
F2
VCC3
R200
4.7K/6
P1_PRESENT- 61,75
C C
Lo : P0 present
Hi : P0 absent
B B
AB13
AC22
AD13
AA10
AC10
AK10
VSS10
K2
VSS11
P2
VSS12
T13
VSS92
V2
VSS13
AB2
VSS14
AF2
VSS15
AK2
VSS16
B3
VSS17
AH3
VSS18
G4
VSS19
L4
VSS20
R4
VSS21
V13
VSS93
W4
VSS22
AC4
VSS23
F5
VSS24
D6
VSS25
H6
VSS26
M7
VSS27
AB7
VSS28
Y6
VSS29
AD6
VSS30
J17
VSS94
AK6
VSS31
B7
VSS32
F14
VSS33
P7
VSS34
V7
VSS35
Y7
VSS36
M6
VSS37
Y13
VSS95
N8
VSS38
R8
VSS39
U8
VSS40
W8
VSS41
AA8
VSS42
AF8
VSS43
F8
VSS44
G17
VSS45
K9
VSS46
VSS96
M9
VSS47
P9
VSS48
T9
VSS49
VSS50
Y9
VSS51
AB9
VSS52
AD9
VSS53
D10
VSS54
J10
VSS55
VSS97
L10
VSS56
N10
VSS57
R10
VSS58
U10
VSS59
T6
VSS60
VSS61
VSS62
VSS63
B11
VSS64
L14
VSS98
H15
VSS65
J8
VSS66
K11
VSS67
4
P1_VDDIOFB_H 24
TP63
TP64 TP65
AE26
AG23
K20
D28
K28
T28
AB28
AH28
AH26
G28
N28
W28
AB26
AB20
L21
N21
R21
U21
H22
D26
K22
A23
U23
AL23
AC21
AD22
AB23
AC23
AF20
VDDIO20
VDDIO21
VDDIO22
VDDIO23
VDDIO24
VDDIO25
VDDIO26
VDDIO27
VDDIO28
VDDIO29
VDDIO30
VDDIO31
VDDIO32
VDDIO33
VDDIO34
VDDIO35
VDDIO36
VDDIO37
VDDIO38
VDDIO40
VDDIO41
VDDIO42
VDDIO43
VDDIO44
VDDIO45
VDDIO47
VDDIO48
VDDIOFB_L
VDDIOFB_H
VDDIO_SENSE
TP61
TP62
V6
3
P1_VDDIO_SENSE 24
AD12H2AA4
T18
V18
VDD1
VDD2
VDD3
VDD4
VDD117
VDD118
Y18
VDD5
K12
VDD119
F19
N19
VDD7
R19
VDD8
VDD9
U19
W19
VDD10
D20
VDD11
VDD12
AE4
VDD13
M20
VDD14
P20
VDD15
T20
VDD16
V20
VDD17
Y20
VDD18
AK20
VDD19
B21
AH21
AK4B5AH5K6P6T8AB6
VDD20
VDD21
VDD22
VDD23
VDD24
VDD25
VDD26
VDD27
AF6M2F6D8G7
VDD28
VDD29
VDD30
VDD31
P1_VDD_CORE
AB8
AK8B9K18L9N9R9T2U9W9
VDD32
VDD33
VDD34
VDD35
VDD36
VDD37
VDD38
VDD39
2
VDD40
VDD41
VDD42
AA9
VDD43
VDD44
AB18
VDD45
AH9
W13
VDD46
VDD47
M10
VDD48
P10
VDD49
T10
VDD50
V10Y2Y10
VDD51
VDD52
VDD53
AB12
VDD54
AF10
VDD55
F11
VDD56
L11
VDD57
N11
R11
VDD58
VDD59
U11
VDD60
W11
VDD61
AA11
VDD62
AD2
VDD63
1
Opteron
U11D
VDD64
VDD65
VDD66
VDD67
VDD68
VDD69
VDD70
VDD71
VDD72
VDD73
VDD74
VDD75
VDD76
VDD77
VDD78
VDD79
VDD80
VDD81
VDD82
VDD83
VDD84
VDD85
VDD86
VDD87
VDD88
VDD89
VDD90
VDD91
VDD92
VDD93
VDD94
VDD95
VDD96
VDD97
VDD98
VDD99
VDD100
VDD101
VDD102
VDD103
VDD104
VDD105
VDD106
VDD107
VDD108
VDD109
VDD110
VDD111
VDD112
VDD113
VDD114
VDD115
VDD116
D12
M12
P12
T12
V12
Y12
AC13
AK12
B13
L13
D4
N13
R13
U13
AA13
AH13
J13
M14
P14
T14
J4
V14
Y14
AD14
AF14
F15
L15
N15
R15
U15
W15
N4
AA15
D16
F18
M16
P16
T16
V16
Y16
AD16
AK16
U4
B17
L17
N17
R17
U17
W17
AA17
AH17
M18
P18
VSS68
VSS69
VSS70
VSS71
VSS99
VSS72
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS101
VSS90
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS100
VSS81
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS182
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS183
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS184
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS185
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS186
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS187
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS188
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS189
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS190
VSS181
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS1
VSS2
VSS3
VSS4
VSS203
VSS202
VSS91
VSS5
VSS200
VSS201
M11
P11
T11
V11
N14
Y11
AA12
N16
AF12
F13
G15
F10
AD15
K13
U14
M13
AB11
AD11
AH11
G13
J12
N12
R12
U12
R14
W12
W14
AA14
AC14
AH15
AK14
B15
K15
M15
B23
P15
T15
V15
Y15
AB15
D14
J14
H17
G24
L16
R16
U16
W18
AA16
AC17
AF16
F16
K17
N24
M17
P17
T17
V17
Y17
AB17
AD17
D18
J18
W24
L18
N18
R18
U18
W10
AA18
AE17
AK18
B19
G30
K19
M19
T19
V19
Y19
AB19
AH19
J20
L20
W30
N20
R20
U20
W20
AA20
AC20
AF21
K21
M21
AB24
P21
T21
V21
Y21
AB21
D22
G22
L22
N22
B26
R22
U22
W22
AA22
AE22
AK22
J22
AE24
AK26
B29
AK23
K24
T24
AE30
AK29
D30
K30
T30
AB30
AH30
AH7V9L12
AC12
AG2E2P13
W16
D23
AH23
A A
GND
5
4
3
2
GIGABYTE THCHNOLOGIES , INC.
Title
Size Document Number Rev
Custom
Date: Sheet
Opteron P1 Power/Gnd
GA-7A8DRL
1
of
26 81 Thursday, November 10, 2005
2.0
5
4
3
2
1
P1_VTT_DDR
P1_VTT_DDR
4 4
C692 0.1U/6
C693 0.1U/6
C691 0.1U/6
C694 0.1U/6
C695 0.1U/6
C706 0.1U/6
C696 0.1U/6
C697 0.1U/6
C698 0.1U/6
C699 0.1U/6
C700 0.1U/6
C701 0.1U/6
C702 0.1U/6
C703 0.1U/6
C705 0.1U/6
C704 0.1U/6
C1038 1U/6
3 3
C1365 10U/12
P1_VTT_DDR
C711 0.1U/6
C713 0.1U/6
C707 0.1U/6
C714 0.1U/6
C712 0.1U/6
C710 0.1U/6
C708 0.1U/6
C717 0.1U/6
C718 0.1U/6
C723 0.1U/6
C716 0.1U/6
C722 0.1U/6
C719 0.1U/6
C715 0.1U/6
C720 0.1U/6 C764 0.1U/6/B
C709 0.1U/6
C1035 1U/6
C1039 1U/6
C1366 10U/12
GND GND
P1_VTT_DDR
P1_VTT_DDR
C973 0.01U/6/B
C960 0.01U/6/B
C961 0.01U/6/B
C972 0.01U/6/B
2 2
C963 0.01U/6/B
C964 0.01U/6/B
C962 0.01U/6/B
C965 0.01U/6/B
C967 0.01U/6/B
C966 0.01U/6/B
C969 0.01U/6/B
P1_VDD_2D5V
C978 0.01U/6
C974 0.01U/6
C977 0.01U/6
C979 0.01U/6
C975 0.01U/6
C976 0.01U/6
C981 0.01U/6
C980 0.01U/6
C983 0.01U/6
C984 0.01U/6
C982 0.01U/6
C985 0.01U/6/B
C784 0.1U/6/B
C783 0.1U/6/B
C782 0.1U/6
C781 0.1U/6
C621 0.1U/6
C742 0.1U/6/B
C743 0.1U/6/B
C745 0.1U/6/B
C730 0.1U/6/B
C744 0.1U/6/B
C741 0.1U/6/B
C739 0.1U/6/B
C746 0.1U/6/B
C729 0.1U/6/B
C727 0.1U/6/B
C731 0.1U/6/B
C732 0.1U/6/B
C747 0.1U/6/B
C740 0.1U/6/B
C748 0.1U/6/B
C749 0.1U/6/B
C1036 1U/6/B C1034 1U/6
C1040 1U/6
C1368 10U/12
P1_VDD_2D5V
GND GND
P1_VTT_DDR
C787 0.1U/6
C786 0.1U/6
C785 0.1U/6
C750 0.1U/6/B
C755 0.1U/6/B
C751 0.1U/6/B
C756 0.1U/6/B
C754 0.1U/6/B
C757 0.1U/6/B
C761 0.1U/6/B
C760 0.1U/6/B
C752 0.1U/6/B
C753 0.1U/6/B
C758 0.1U/6/B
C762 0.1U/6/B
C763 0.1U/6/B
C759 0.1U/6/B
C765 0.1U/6/B
C1037 1U/6
C1041 1U/6
C1367 10U/12
P1_VTT_DDR
C1030 0.015uF/6
C1031 0.015uF/6
C1032 0.015uF/6/B
C1033 0.015uF/6/B
GND
C968 0.01U/6/B
1 1
GIGABYTE THCHNOLOGIES , INC.
Title
Opteron P1 VTT/VDDIO Decoupling
Size Document Number Rev
A4
5
4
3
Date: Sheet
2
GA-7A8DRL
of
27 81 Thursday, November 10, 2005
1
2.0
5
4
3
2
1
P1_VTT_DDR
AC19
P1_VDD_2D5V
R232
D D
Close to CPU
P1_VDD_2D5V
C235
R234
0.1U/6
100/6/1
C236
0.1U/6
C C
B B
A A
V2.5_P1REF
C237
R236
100/6/1
0.1U/6
GND
5
VCC
C542
0.1U/6
8 4
U18A
3
+
2
-
GND
LM2904
V1.25_P1
1
P1_MEMDQS_UPR[17..0] 33
P1_MEMDQS_LWR[17..0] 33
42.2/6/1
P1_VTT_SENSE 24
R233
42.2/6/1
GND
GND
R235
0/6
P1_MEMDATA[127..64] 33
P1_CPU_MEMVREF
C238
0.01U/6/X
GND
P1_MEMDATA[127..64]
4
C239
1000P/6/X
P1_MEMDATA127
P1_MEMDATA126
P1_MEMDATA125
P1_MEMDATA124
P1_MEMDATA123
P1_MEMDATA122
P1_MEMDATA121
P1_MEMDATA120
P1_MEMDATA119
P1_MEMDATA118
P1_MEMDATA117
P1_MEMDATA116
P1_MEMDATA115
P1_MEMDATA114
P1_MEMDATA113
P1_MEMDATA112
P1_MEMDATA111
P1_MEMDATA110
P1_MEMDATA109
P1_MEMDATA108
P1_MEMDATA107
P1_MEMDATA106
P1_MEMDATA105
P1_MEMDATA104
P1_MEMDATA103
P1_MEMDATA102
P1_MEMDATA101
P1_MEMDATA100
P1_MEMDATA99
P1_MEMDATA98
P1_MEMDATA97
P1_MEMDATA96
P1_MEMDATA95
P1_MEMDATA94
P1_MEMDATA93
P1_MEMDATA92
P1_MEMDATA91
P1_MEMDATA90
P1_MEMDATA89
P1_MEMDATA88
P1_MEMDATA87
P1_MEMDATA86
P1_MEMDATA85
P1_MEMDATA84
P1_MEMDATA83
P1_MEMDATA82
P1_MEMDATA81
P1_MEMDATA80
P1_MEMDATA79
P1_MEMDATA78
P1_MEMDATA77
P1_MEMDATA76
P1_MEMDATA75
P1_MEMDATA74
P1_MEMDATA73
P1_MEMDATA72
P1_MEMDATA71
P1_MEMDATA70
P1_MEMDATA69
P1_MEMDATA68
P1_MEMDATA67
P1_MEMDATA66
P1_MEMDATA65
P1_MEMDATA64
P1_MEMDQS_UPR17
P1_MEMDQS_UPR16
P1_MEMDQS_UPR15
P1_MEMDQS_UPR14
P1_MEMDQS_UPR13
P1_MEMDQS_UPR12
P1_MEMDQS_UPR11
P1_MEMDQS_UPR10
P1_MEMDQS_UPR9
P1_MEMDQS_UPR8
P1_MEMDQS_UPR7
P1_MEMDQS_UPR6
P1_MEMDQS_UPR5
P1_MEMDQS_UPR4
P1_MEMDQS_UPR3
P1_MEMDQS_UPR2
P1_MEMDQS_UPR1
P1_MEMDQS_UPR0
P1_MEMDQS_LWR17
P1_MEMDQS_LWR16
P1_MEMDQS_LWR15
P1_MEMDQS_LWR14
P1_MEMDQS_LWR13
P1_MEMDQS_LWR12
P1_MEMDQS_LWR11
P1_MEMDQS_LWR10
P1_MEMDQS_LWR9
P1_MEMDQS_LWR8
P1_MEMDQS_LWR7
P1_MEMDQS_LWR6
P1_MEMDQS_LWR5
P1_MEMDQS_LWR4
P1_MEMDQS_LWR3
P1_MEMDQS_LWR2
P1_MEMDQS_LWR1
P1_MEMDQS_LWR0
AE19
J19
TP66
H19
F20
G19
AE18
AC18
TP67
AF19
AF17
AE16
TP68
F22
AF22
AG24
AH25
AG26
AH27
AF23
AH24
AF25
AJ26
AG27
AF26
AF28
AE29
AJ29
AH29
AE27
AD26
AD27
AC26
AA26
AA28
AD28
AC27
AB29
AA27
Y27
Y28
V28
U26
Y26
W27
V27
U27
P28
N29
M26
L28
P27
P26
M27
L27
K29
K27
H28
G29
L26
J28
H27
H26
F27
F26
D29
D27
G27
F28
E27
C27
C26
E25
D24
F23
E26
F25
E24
G23
R27
AG25
AF27
AB27
W29
N27
J27
E29
F24
R28
AF24
AG28
AC28
V26
M28
J26
E28
D25
U31
AJ25
AJ30
AD29
AA31
M30
H30
C30
B25
T31
AL25
AL29
AE31
Y29
M29
H29
C29
C25
VTT6
VTT7
VTT4
VTT3
VTT2
VTT1
VTT8
VTT9
VTT_SENSE
MEMZN
MEMZP
MEMVREF0
MEMVREF1
MEMDATA(127)
MEMDATA(126)
MEMDATA(125)
MEMDATA(124)
MEMDATA(123)
MEMDATA(122)
MEMDATA(121)
MEMDATA(120)
MEMDATA(119)
MEMDATA(118)
MEMDATA(117)
MEMDATA(116)
MEMDATA(115)
MEMDATA(114)
MEMDATA(113)
MEMDATA(112)
MEMDATA(111)
MEMDATA(110)
MEMDATA(109)
MEMDATA(108)
MEMDATA(107)
MEMDATA(106)
MEMDATA(105)
MEMDATA(104)
MEMDATA(103)
MEMDATA(102)
MEMDATA(101)
MEMDATA(100)
MEMDATA(99)
MEMDATA(98)
MEMDATA(97)
MEMDATA(96)
MEMDATA(95)
MEMDATA(94)
MEMDATA(93)
MEMDATA(92)
MEMDATA(91)
MEMDATA(90)
MEMDATA(89)
MEMDATA(88)
MEMDATA(87)
MEMDATA(86)
MEMDATA(85)
MEMDATA(84)
MEMDATA(83)
MEMDATA(82)
MEMDATA(81)
MEMDATA(80)
MEMDATA(79)
MEMDATA(78)
MEMDATA(77)
MEMDATA(76)
MEMDATA(75)
MEMDATA(74)
MEMDATA(73)
MEMDATA(72)
MEMDATA(71)
MEMDATA(70)
MEMDATA(69)
MEMDATA(68)
MEMDATA(67)
MEMDATA(66)
MEMDATA(65)
MEMDATA(64)
MEMDQS(35)
MEMDQS(34)
MEMDQS(33)
MEMDQS(32)
MEMDQS(31)
MEMDQS(30)
MEMDQS(29)
MEMDQS(28)
MEMDQS(27)
MEMDQS(26)
MEMDQS(25)
MEMDQS(24)
MEMDQS(23)
MEMDQS(22)
MEMDQS(21)
MEMDQS(20)
MEMDQS(19)
MEMDQS(18)
MEMDQS(17)
MEMDQS(16)
MEMDQS(15)
MEMDQS(14)
MEMDQS(13)
MEMDQS(12)
MEMDQS(11)
MEMDQS(10)
MEMDQS(9)
MEMDQS(8)
MEMDQS(7)
MEMDQS(6)
MEMDQS(5)
MEMDQS(4)
MEMDQS(3)
MEMDQS(2)
MEMDQS(1)
MEMDQS(0)
Opteron
U11B
MEMCLK_UP_H(3)
MEMCLK_UP_L(3)
MEMCLK_UP_H(2)
MEMCLK_UP_L(2)
MEMCLK_UP_H(1)
MEMCLK_UP_L(1)
MEMCLK_UP_H(0)
MEMCLK_UP_L(0)
MEMCLK_LO_H(3)
MEMCLK_LO_L(3)
MEMCLK_LO_H(2)
MEMCLK_LO_L(2)
MEMCLK_LO_H(1)
MEMCLK_LO_L(1)
MEMCLK_LO_H(0)
MEMCLK_LO_L(0)
MEMCHECK(15)
MEMCHECK(14)
MEMCHECK(13)
MEMCHECK(12)
MEMCHECK(11)
MEMCHECK(10)
MEMCKE_UP
MEMCKE_LO
RSVD_MA(15)
RSVD_MA(14)
MEMADD(13)
MEMADD(12)
MEMADD(11)
MEMADD(10)
MEMADD(9)
MEMADD(8)
MEMADD(7)
MEMADD(6)
MEMADD(5)
MEMADD(4)
MEMADD(3)
MEMADD(2)
MEMADD(1)
MEMADD(0)
MEMDATA(63)
MEMDATA(62)
MEMDATA(61)
MEMDATA(60)
MEMDATA(59)
MEMDATA(58)
MEMDATA(57)
MEMDATA(56)
MEMDATA(55)
MEMDATA(54)
MEMDATA(53)
MEMDATA(52)
MEMDATA(51)
MEMDATA(50)
MEMDATA(49)
MEMDATA(48)
MEMDATA(47)
MEMDATA(46)
MEMDATA(45)
MEMDATA(44)
MEMDATA(43)
MEMDATA(42)
MEMDATA(41)
MEMDATA(40)
MEMDATA(39)
MEMDATA(38)
MEMDATA(37)
MEMDATA(36)
MEMDATA(35)
MEMDATA(34)
MEMDATA(33)
MEMDATA(32)
MEMDATA(31)
MEMDATA(30)
MEMDATA(29)
MEMDATA(28)
MEMDATA(27)
MEMDATA(26)
MEMDATA(25)
MEMDATA(24)
MEMDATA(23)
MEMDATA(22)
MEMDATA(21)
MEMDATA(20)
MEMDATA(19)
MEMDATA(18)
MEMDATA(17)
MEMDATA(16)
MEMDATA(15)
MEMDATA(14)
MEMDATA(13)
MEMDATA(12)
MEMDATA(11)
MEMDATA(10)
MEMDATA(9)
MEMDATA(8)
MEMDATA(7)
MEMDATA(6)
MEMDATA(5)
MEMDATA(4)
MEMDATA(3)
MEMDATA(2)
MEMDATA(1)
MEMDATA(0)
MEMRESET_L
MEMBANK(1)
MEMBANK(0)
MEMRAS_L
MEMCAS_L
MEMWE_L
MEMCHECK(9)
MEMCHECK(8)
MEMCHECK(7)
MEMCHECK(6)
MEMCHECK(5)
MEMCHECK(4)
MEMCHECK(3)
MEMCHECK(2)
MEMCHECK(1)
MEMCHECK(0)
MEMCS_L(7)
MEMCS_L(6)
MEMCS_L(5)
MEMCS_L(4)
MEMCS_L(3)
MEMCS_L(2)
MEMCS_L(1)
MEMCS_L(0)
P1_MEMCLK_UPR_H3
G20
P1_MEMCLK_UPR_L3
G21
P1_MEMCLK_UPR_H2
AE21
P1_MEMCLK_UPR_L2
AE20
P1_MEMCLK_UPR_H1
L24
P1_MEMCLK_UPR_L1
L25
P1_MEMCLK_UPR_H0
R23
P1_MEMCLK_UPR_L0
T23
P1_MEMCLK_LWR_H3
H23
P1_MEMCLK_LWR_L3
J23
P1_MEMCLK_LWR_H2
AD21
P1_MEMCLK_LWR_L2
AD20
P1_MEMCLK_LWR_H1
Y23
P1_MEMCLK_LWR_L1
AA23
P1_MEMCLK_LWR_H0
U25
P1_MEMCLK_LWR_L0
U24
P1_MEMCKE_UPR
H24
P1_MEMCKE_LWR
H25
V23
M23
P1_MEMADD13
AE23
P1_MEMADD12
J24
P1_MEMADD11
J25
P1_MEMADD10
V24
P1_MEMADD9
K23
P1_MEMADD8
L23
P1_MEMADD7
K25
P1_MEMADD6
M25
P1_MEMADD5
M24
P1_MEMADD4
N25
P1_MEMADD3
N23
P1_MEMADD2
P23
P1_MEMADD1
T25
P1_MEMADD0
V25
P1_MEMDATA63
AJ24
P1_MEMDATA62
AK25
P1_MEMDATA61
AK27
P1_MEMDATA60
AJ27
P1_MEMDATA59
AL24
P1_MEMDATA58
AK24
P1_MEMDATA57
AL26
P1_MEMDATA56
AL27
P1_MEMDATA55
AJ28
P1_MEMDATA54
AK30
P1_MEMDATA53
AJ31
P1_MEMDATA52
AG29
P1_MEMDATA51
AL28
P1_MEMDATA50
AK28
P1_MEMDATA49
AH31
P1_MEMDATA48
AG30
P1_MEMDATA47
AG31
P1_MEMDATA46
AF30
P1_MEMDATA45
AD31
P1_MEMDATA44
AC30
P1_MEMDATA43
AF29
P1_MEMDATA42
AF31
P1_MEMDATA41
AD30
P1_MEMDATA40
AC29
P1_MEMDATA39
AB31
P1_MEMDATA38
AA29
P1_MEMDATA37
Y31
P1_MEMDATA36
W31
P1_MEMDATA35
AC31
P1_MEMDATA34
AA30
P1_MEMDATA33
Y30
P1_MEMDATA32
V29
P1_MEMDATA31
P31
P1_MEMDATA30
M31
P1_MEMDATA29
L30
P1_MEMDATA28
L29
P1_MEMDATA27
P29
P1_MEMDATA26
N31
P1_MEMDATA25
L31
P1_MEMDATA24
K31
P1_MEMDATA23
J30
P1_MEMDATA22
J29
P1_MEMDATA21
G31
P1_MEMDATA20
F29
P1_MEMDATA19
J31
P1_MEMDATA18
H31
P1_MEMDATA17
F31
P1_MEMDATA16
F30
P1_MEMDATA15
D31
P1_MEMDATA14
C31
P1_MEMDATA13
B30
P1_MEMDATA12
C28
P1_MEMDATA11
E31
P1_MEMDATA10
E30
P1_MEMDATA9
A29
P1_MEMDATA8
B28
P1_MEMDATA7
B27
P1_MEMDATA6
A26
P1_MEMDATA5
C24
P1_MEMDATA4
A24
P1_MEMDATA3
A28
P1_MEMDATA2
A27
P1_MEMDATA1
A25
P1_MEMDATA0
B24
P1_MEMRESET_L
G25
P1_MEMBANK1
W25
P1_MEMBANK0
W23
P1_MEMRAS_L
Y25
P1_MEMCAS_L
AA25
P1_MEMWE_L
Y24
P1_MEMCHECK_UPR7
U28
P1_MEMCHECK_UPR6
T29
P1_MEMCHECK_UPR5
P24
P1_MEMCHECK_UPR4
P25
P1_MEMCHECK_UPR3
T27
P1_MEMCHECK_UPR2
R26
P1_MEMCHECK_UPR1
R25
P1_MEMCHECK_UPR0
R24
P1_MEMCHECK_LWR7
V30
P1_MEMCHECK_LWR6
U29
P1_MEMCHECK_LWR5
R30
P1_MEMCHECK_LWR4
P30
P1_MEMCHECK_LWR3
V31
P1_MEMCHECK_LWR2
U30
P1_MEMCHECK_LWR1
R29
P1_MEMCHECK_LWR0
R31
P1_MEMCS_L7
AD23
P1_MEMCS_L6
AE25
P1_MEMCS_L5
AD24
P1_MEMCS_L4
AD25
P1_MEMCS_L3
AC24
P1_MEMCS_L2
AC25
P1_MEMCS_L1
AB25
P1_MEMCS_L0
AA24
3
TP69
TP70
TP71
1
TP72
1
TP299
1
TP300
1
P1_MEMCLK_UPR_H1 32,34
P1_MEMCLK_UPR_L1 32,34
P1_MEMCLK_UPR_H0 30,34
P1_MEMCLK_UPR_L0 30,34
1
TP301
1
TP302
1
TP303
1
TP304
P1_MEMCLK_LWR_H1 31,34
P1_MEMCLK_LWR_L1 31,34
P1_MEMCLK_LWR_H0 29,34
P1_MEMCLK_LWR_L0 29,34
P1_MEMCKE_UPR 34
P1_MEMCKE_LWR 34
P1_MEMDATA[63..0]
P1_MEMRESET_L 10
P1_MEMBANK1 34
P1_MEMBANK0 34
P1_MEMRAS_L 34
P1_MEMCAS_L 34
P1_MEMWE_L 34
P1_MEMADD[13..0] 34
P1_MEMDATA[63..0] 33
P1_MEMCHECK_UPR[7..0] 33
P1_MEMCHECK_LWR[7..0] 33
P1_MEMCS_L[7..0] 34
GIGABYTE THCHNOLOGIES , INC.
Title
Size Document Number Rev
2
Date: Sheet
C
Opteron P1 DDR I/F
GA-7A8DRL
1
2.0
of
28 81 Thursday, November 10, 2005
5
4
3
2
1
DIMM0
163
71
158
157
47
86
78
67
56
36
25
14
5
103
183
182
181
91
92
113
52
59
167
115
118
141
27
122
29
125
32
37
130
41
43
48
144
142
135
134
51
49
45
44
16
17
137
138
76
75
173
10
21
111
65
154
140
177
169
159
149
129
119
107
97
P1_VDD_2D5V
738467085
VDD0
CS3#
CS2#
CS1#
CS0#
DQS8
DQS7
DQS6
DQS5
DQS4
DQS3
DQS2
DQS1
DQS0
FETEN
SA2
SA1
SA0
SDA
SCL
BA2
BA1
BA0
A13
A12
A11
A10_AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
CB7
CB6
CB5
CB4
CB3
CB2
CB1
CB0
CK0
CK0#
CK1
CK1#
CK2
CK2#
NC5
NC1_RESET#
CKE0
CKE1
CAS#
RAS#
DM8
DM7
DM6
DM5
DM4
DM3
DM2
DM1
DM0
VDD1
VDD2
VDD3
VDD4
GND
10011116
108
120
VDD5
GND
VDD6
GND
148
VDD7
GND
124
1688222
VDD8
GND
132
139
30
54627796104
VDDQ0
VDDQ1
VDDQ2
GND
GND
GND
145
152
VDDQ3
GND
160
143
156
164
172
180
136
VDDQ9
GND
VDDQ10
VDDQ11
GND
GND
VDDQ12
VDDQ13
GND
GND
15
VDDQ14
GND
112
128
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
GND
GND
GND
GND
GND
17618263344250586674818993
VDDQ15
GND
GND
VDDID
184
VDDSPD
DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
DQ33
DQ32
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
WE#
VREF
NC4
NC2
NC3
P1DIMM0
DDR-DIMM184/ORINGE
179
178
175
174
88
87
84
83
171
170
166
165
80
79
73
72
162
161
155
153
69
68
64
61
151
150
147
146
60
57
55
53
133
131
127
126
40
39
35
33
123
121
117
114
31
28
24
23
110
109
106
105
20
19
13
12
99
98
95
94
8
6
4
2
90
WP
63
1
102
9
101
P1_SR_MEMDATA63
P1_SR_MEMDATA62
P1_SR_MEMDATA61
P1_SR_MEMDATA60
P1_SR_MEMDATA59
P1_SR_MEMDATA58
P1_SR_MEMDATA57
P1_SR_MEMDATA56
P1_SR_MEMDATA55
P1_SR_MEMDATA54
P1_SR_MEMDATA53
P1_SR_MEMDATA52
P1_SR_MEMDATA50
P1_SR_MEMDATA49
P1_SR_MEMDATA48
P1_SR_MEMDATA47
P1_SR_MEMDATA46
P1_SR_MEMDATA45
P1_SR_MEMDATA44
P1_SR_MEMDATA43
P1_SR_MEMDATA42
P1_SR_MEMDATA41
P1_SR_MEMDATA40
P1_SR_MEMDATA39
P1_SR_MEMDATA38
P1_SR_MEMDATA37
P1_SR_MEMDATA36
P1_SR_MEMDATA35
P1_SR_MEMDATA34
P1_SR_MEMDATA33
P1_SR_MEMDATA32
P1_SR_MEMDATA31
P1_SR_MEMDATA30
P1_SR_MEMDATA29
P1_SR_MEMDATA28
P1_SR_MEMDATA27
P1_SR_MEMDATA26
P1_SR_MEMDATA25
P1_SR_MEMDATA24
P1_SR_MEMDATA23
P1_SR_MEMDATA22
P1_SR_MEMDATA21
P1_SR_MEMDATA20
P1_SR_MEMDATA19
P1_SR_MEMDATA18
P1_SR_MEMDATA17
P1_SR_MEMDATA16
P1_SR_MEMDATA15
P1_SR_MEMDATA14
P1_SR_MEMDATA13
P1_SR_MEMDATA12
P1_SR_MEMDATA11
P1_SR_MEMDATA10
P1_SR_MEMDATA9
P1_SR_MEMDATA8
P1_SR_MEMDATA7
P1_SR_MEMDATA6
P1_SR_MEMDATA5
P1_SR_MEMDATA4
P1_SR_MEMDATA3
P1_SR_MEMDATA2
P1_SR_MEMDATA1
P1_SR_MEMDATA0
P1_SR_MEMWE_L
P1_DIMM_MEMVREF
P1_SR_MEMDATA[63..0] 31,33
P1_SR_MEMWE_L 30,31,32,34
94 93
12
P1_VDD_2D5V
C919
0.1U/6
P1_DIMM_MEMVREF 25,30,31,32
C920
0.1U/6
GND
4 4
P1_SR_MEMCS_L1 30,34
P1_SR_MEMCS_L0 30,34
P1_SR_MEMDQS_LWR[8..0] 31,33
3 3
RCC_SDA 13,14,15,16,30,31,32,57,75
RCC_SCL 13,14,15,16,30,31,32,57,75
P1_SR_MEMBANK1 30,31,32,34
P1_SR_MEMBANK0 30,31,32,34
P1_SR_MEMADD[13..0] 30,31,32,34
P1_SR_MEMCHECK_LWR[7..0] 31,33
2 2
P1_MEMCLK_LWR_H0 28,34
P1_MEMCLK_LWR_L0 28,34
P1_MEMRESET_GPIO 10,30,31,32
P1_SR_MEMCKE_LWR 30,31,32,34
P1_SR_MEMCKE_UPR 30,31,32,34
P1_SR_MEMCAS_L 30,31,32,34
P1_SR_MEMRAS_L 30,31,32,34
P1_SR_MEMDQS_LWR[17..9] 31,33
1 1
P1_SR_MEMCS_L1
P1_SR_MEMCS_L0
P1_SR_MEMDQS_LWR8
P1_SR_MEMDQS_LWR7
P1_SR_MEMDQS_LWR6
P1_SR_MEMDQS_LWR5
P1_SR_MEMDQS_LWR4
P1_SR_MEMDQS_LWR3
P1_SR_MEMDQS_LWR2
P1_SR_MEMDQS_LWR1 P1_SR_MEMDATA51
P1_SR_MEMDQS_LWR0
P1_VDD_2D5V
GND
RCC_SDA
RCC_SCL
P1_SR_MEMBANK1
P1_SR_MEMBANK0
P1_SR_MEMADD13
P1_SR_MEMADD12
P1_SR_MEMADD11
P1_SR_MEMADD10
P1_SR_MEMADD9
P1_SR_MEMADD8
P1_SR_MEMADD7
P1_SR_MEMADD6
P1_SR_MEMADD5
P1_SR_MEMADD4
P1_SR_MEMADD3
P1_SR_MEMADD2
P1_SR_MEMADD1
P1_SR_MEMADD0
P1_SR_MEMCHECK_LWR7
P1_SR_MEMCHECK_LWR6
P1_SR_MEMCHECK_LWR5
P1_SR_MEMCHECK_LWR4
P1_SR_MEMCHECK_LWR3
P1_SR_MEMCHECK_LWR2
P1_SR_MEMCHECK_LWR1
P1_SR_MEMCHECK_LWR0
P1_MEMCLK_LWR_H0
P1_MEMCLK_LWR_L0
P1_MEMRESET_GPIO
P1_SR_MEMCKE_LWR
P1_SR_MEMCKE_UPR
P1_SR_MEMCAS_L
P1_SR_MEMRAS_L
P1_SR_MEMDQS_LWR17
P1_SR_MEMDQS_LWR16
P1_SR_MEMDQS_LWR15
P1_SR_MEMDQS_LWR14
P1_SR_MEMDQS_LWR13
P1_SR_MEMDQS_LWR12
P1_SR_MEMDQS_LWR11
P1_SR_MEMDQS_LWR10
P1_SR_MEMDQS_LWR9
GND
smbus addr
=100
5
4
3
2
GIGABYTE THCHNOLOGIES , INC.
Title
Size Document Number Rev
Custom
Date: Sheet
Opteron P1 DIMM 0
GA-7A8DRL
1
of
29 81 Thursday, November 10, 2005
2.0
5
4
3
2
1
108
VDD4
VDD5
GND
GND
10011116
120
148
VDD6
GND
124
1688222
VDD7
GND
132
VDD8
GND
DIMM1
30
VDDQ0
GND
139
145
VDDQ1
GND
54627796104
VDDQ2
GND
152
160
143
112
128
136
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
GND
GND
GND
GND
GND
GND
GND
17618263344250586674818993
156
164
VDDQ10
VDDQ11
GND
GND
172
180
VDDQ12
VDDQ13
GND
GND
15
VDDQ14
VDDQ15
GND
GND
GND
VDDID
184
VDDSPD
DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
DQ33
DQ32
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
WE#
VREF
NC4
NC2
NC3
P1DIMM1
DDR-DIMM184/PURPLE
179
178
175
174
88
87
84
83
171
170
166
165
80
79
73
72
162
161
155
153
69
68
64
61
151
150
147
146
60
57
55
53
133
131
127
126
40
39
35
33
123
121
117
114
31
28
24
23
110
109
106
105
20
19
13
12
99
98
95
94
8
6
4
2
90
WP
63
1
102
9
101
P1_SR_MEMDATA127
P1_SR_MEMDATA126
P1_SR_MEMDATA125
P1_SR_MEMDATA124
P1_SR_MEMDATA123
P1_SR_MEMDATA122
P1_SR_MEMDATA121
P1_SR_MEMDATA120
P1_SR_MEMDATA119
P1_SR_MEMDATA118
P1_SR_MEMDATA117
P1_SR_MEMDATA116
P1_SR_MEMDATA115
P1_SR_MEMDATA114
P1_SR_MEMDATA113
P1_SR_MEMDATA112
P1_SR_MEMDATA111
P1_SR_MEMDATA110
P1_SR_MEMDATA109
P1_SR_MEMDATA108
P1_SR_MEMDATA107
P1_SR_MEMDATA106
P1_SR_MEMDATA105
P1_SR_MEMDATA104
P1_SR_MEMDATA103
P1_SR_MEMDATA102
P1_SR_MEMDATA101
P1_SR_MEMDATA100
P1_SR_MEMDATA99
P1_SR_MEMDATA98
P1_SR_MEMDATA97
P1_SR_MEMDATA96
P1_SR_MEMDATA95
P1_SR_MEMDATA94
P1_SR_MEMDATA93
P1_SR_MEMDATA92
P1_SR_MEMDATA91
P1_SR_MEMDATA90
P1_SR_MEMDATA89
P1_SR_MEMDATA88
P1_SR_MEMDATA87
P1_SR_MEMDATA86
P1_SR_MEMDATA85
P1_SR_MEMDATA83
P1_SR_MEMDATA82
P1_SR_MEMDATA81
P1_SR_MEMDATA80
P1_SR_MEMDATA79
P1_SR_MEMDATA78
P1_SR_MEMDATA77
P1_SR_MEMDATA76
P1_SR_MEMDATA75
P1_SR_MEMDATA74
P1_SR_MEMDATA73
P1_SR_MEMDATA72
P1_SR_MEMDATA71
P1_SR_MEMDATA70
P1_SR_MEMDATA69
P1_SR_MEMDATA68
P1_SR_MEMDATA67
P1_SR_MEMDATA66
P1_SR_MEMDATA65
P1_SR_MEMDATA64
P1_SR_MEMWE_L
P1_DIMM_MEMVREF
P1_SR_MEMDATA[127..64] 32,33
P1_SR_MEMWE_L 29,31,32,34
94
93
12
P1_VDD_2D5V
C921
0.1U/6
C922
0.1U/6
GND
P1_DIMM_MEMVREF 25,29,31,32
P1_VDD_2D5V
4 4
P1_SR_MEMCS_L1 29,34
P1_SR_MEMCS_L0 29,34
P1_SR_MEMDQS_UPR[8..0] 32,33
3 3
P1_SR_MEMCHECK_UPR[7..0] 32,33
2 2
P1_SR_MEMDQS_UPR[17..9] 32,33
RCC_SDA 13,14,15,16,29,31,32,57,75
RCC_SCL 13,14,15,16,29,31,32,57,75
P1_SR_MEMBANK1 29,31,32,34
P1_SR_MEMBANK0 29,31,32,34
P1_SR_MEMADD[13..0] 29,31,32,34
P1_MEMCLK_UPR_H0 28,34
P1_MEMCLK_UPR_L0 28,34
P1_MEMRESET_GPIO 10,29,31,32
P1_SR_MEMCKE_LWR 29,31,32,34
P1_SR_MEMCKE_UPR 29,31,32,34
P1_SR_MEMCAS_L 29,31,32,34
P1_SR_MEMRAS_L 29,31,32,34
P1_SR_MEMCS_L1
P1_SR_MEMCS_L0
P1_SR_MEMDQS_UPR8
P1_SR_MEMDQS_UPR7
P1_SR_MEMDQS_UPR6
P1_SR_MEMDQS_UPR5
P1_SR_MEMDQS_UPR4
P1_SR_MEMDQS_UPR3
P1_SR_MEMDQS_UPR2
P1_SR_MEMDQS_UPR1
P1_SR_MEMDQS_UPR0
P1_VDD_2D5V
RCC_SDA
RCC_SCL
P1_SR_MEMBANK1
P1_SR_MEMBANK0
P1_SR_MEMADD13
P1_SR_MEMADD12
P1_SR_MEMADD11
P1_SR_MEMADD10
P1_SR_MEMADD9
P1_SR_MEMADD8
P1_SR_MEMADD7
P1_SR_MEMADD6
P1_SR_MEMADD5
P1_SR_MEMADD4
P1_SR_MEMADD3
P1_SR_MEMADD2
P1_SR_MEMADD1
P1_SR_MEMADD0
P1_SR_MEMCHECK_UPR7 P1_SR_MEMDATA84
P1_SR_MEMCHECK_UPR6
P1_SR_MEMCHECK_UPR5
P1_SR_MEMCHECK_UPR4
P1_SR_MEMCHECK_UPR3
P1_SR_MEMCHECK_UPR2
P1_SR_MEMCHECK_UPR1
P1_SR_MEMCHECK_UPR0
P1_MEMCLK_UPR_H0
P1_MEMCLK_UPR_L0
P1_MEMRESET_GPIO
P1_SR_MEMCKE_LWR
P1_SR_MEMCKE_UPR
P1_SR_MEMCAS_L
P1_SR_MEMRAS_L
P1_SR_MEMDQS_UPR17
P1_SR_MEMDQS_UPR16
P1_SR_MEMDQS_UPR15
P1_SR_MEMDQS_UPR14
P1_SR_MEMDQS_UPR13
P1_SR_MEMDQS_UPR12
P1_SR_MEMDQS_UPR11
P1_SR_MEMDQS_UPR10
P1_SR_MEMDQS_UPR9
GND
163
71
158
157
47
86
78
67
56
36
25
14
5
103
183
182
181
91
92
113
52
59
167
115
118
141
27
122
29
125
32
37
130
41
43
48
144
142
135
134
51
49
45
44
16
17
137
138
76
75
173
10
21
111
65
154
140
177
169
159
149
129
119
107
97
738467085
VDD0
VDD1
CS3#
CS2#
CS1#
CS0#
DQS8
DQS7
DQS6
DQS5
DQS4
DQS3
DQS2
DQS1
DQS0
FETEN
SA2
SA1
SA0
SDA
SCL
BA2
BA1
BA0
A13
A12
A11
A10_AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
CB7
CB6
CB5
CB4
CB3
CB2
CB1
CB0
CK0
CK0#
CK1
CK1#
CK2
CK2#
NC5
NC1_RESET#
CKE0
CKE1
CAS#
RAS#
DM8
DM7
DM6
DM5
DM4
DM3
DM2
DM1
DM0
VDD2
VDD3
1 1
smbus addr
=101
5
4
GND
GIGABYTE THCHNOLOGIES , INC.
Title
Size Document Number Rev
3
2
Date: Sheet
Opteron P1 DIMM 1
Custom
GA-7A8DRL
1
2.0
of
30 81 Thursday, November 10, 2005
5
4
3
2
1
DIMM2
163
71
158
157
47
86
78
67
56
36
25
14
5
103
183
182
181
91
92
113
52
59
167
115
118
141
27
122
29
125
32
37
130
41
43
48
144
142
135
134
51
49
45
44
16
17
137
138
76
75
173
10
21
111
65
154
140
177
169
159
149
129
119
107
97
P1_VDD_2D5V
738467085
VDD0
VDD1
CS3#
CS2#
CS1#
CS0#
DQS8
DQS7
DQS6
DQS5
DQS4
DQS3
DQS2
DQS1
DQS0
FETEN
SA2
SA1
SA0
SDA
SCL
BA2
BA1
BA0
A13
A12
A11
A10_AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
CB7
CB6
CB5
CB4
CB3
CB2
CB1
CB0
CK0
CK0#
CK1
CK1#
CK2
CK2#
NC5
NC1_RESET#
CKE0
CKE1
CAS#
RAS#
DM8
DM7
DM6
DM5
DM4
DM3
DM2
DM1
DM0
VDD2
VDD3
10011116
108
VDD4
GND
VDD5
GND
120
148
VDD6
GND
124
1688222
VDD7
GND
132
VDD8
GND
139
VDDQ0
GND
30
54627796104
VDDQ1
VDDQ2
VDDQ3
GND
GND
GND
145
152
160
143
156
164
172
180
136
VDDQ9
GND
VDDQ10
VDDQ11
GND
GND
VDDQ12
VDDQ13
GND
GND
15
VDDQ14
VDDQ15
GND
GND
GND
112
128
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
GND
GND
GND
GND
GND
17618263344250586674818993
VDDID
GND
P1DIMM2
184
DDR-DIMM184/ORINGE
VDDSPD
179
DQ63
178
DQ62
175
DQ61
174
DQ60
88
DQ59
87
DQ58
84
DQ57
83
DQ56
171
DQ55
170
DQ54
166
DQ53
165
DQ52
80
DQ51
79
DQ50
73
DQ49
72
DQ48
162
DQ47
161
DQ46
155
DQ45
153
DQ44
69
DQ43
68
DQ42
64
DQ41
61
DQ40
151
DQ39
150
DQ38
147
DQ37
146
DQ36
60
DQ35
57
DQ34
55
DQ33
53
DQ32
133
DQ31
131
DQ30
127
DQ29
126
DQ28
40
DQ27
39
DQ26
35
DQ25
33
DQ24
123
DQ23
121
DQ22
117
DQ21
114
DQ20
31
DQ19
28
DQ18
24
DQ17
23
DQ16
110
DQ15
109
DQ14
106
DQ13
105
DQ12
20
DQ11
19
DQ10
13
DQ9
12
DQ8
99
DQ7
98
DQ6
95
DQ5
94
DQ4
8
DQ3
6
DQ2
4
DQ1
2
DQ0
90
WP
63
WE#
1
VREF
102
NC4
9
NC2
101
NC3
P1_SR_MEMDATA63
P1_SR_MEMDATA62
P1_SR_MEMDATA61
P1_SR_MEMDATA60
P1_SR_MEMDATA59
P1_SR_MEMDATA57
P1_SR_MEMDATA56
P1_SR_MEMDATA55
P1_SR_MEMDATA54
P1_SR_MEMDATA53
P1_SR_MEMDATA52
P1_SR_MEMDATA51
P1_SR_MEMDATA50
P1_SR_MEMDATA49
P1_SR_MEMDATA48
P1_SR_MEMDATA47
P1_SR_MEMDATA46
P1_SR_MEMDATA45
P1_SR_MEMDATA44
P1_SR_MEMDATA43
P1_SR_MEMDATA42
P1_SR_MEMDATA41
P1_SR_MEMDATA40
P1_SR_MEMDATA39
P1_SR_MEMDATA38
P1_SR_MEMDATA37
P1_SR_MEMDATA36
P1_SR_MEMDATA35
P1_SR_MEMDATA34
P1_SR_MEMDATA33
P1_SR_MEMDATA32
P1_SR_MEMDATA31
P1_SR_MEMDATA30
P1_SR_MEMDATA29
P1_SR_MEMDATA28
P1_SR_MEMDATA27
P1_SR_MEMDATA26
P1_SR_MEMDATA25
P1_SR_MEMDATA24
P1_SR_MEMDATA23
P1_SR_MEMDATA22
P1_SR_MEMDATA21
P1_SR_MEMDATA20
P1_SR_MEMDATA19
P1_SR_MEMDATA18
P1_SR_MEMDATA17
P1_SR_MEMDATA16
P1_SR_MEMDATA15
P1_SR_MEMDATA14
P1_SR_MEMDATA13
P1_SR_MEMDATA12
P1_SR_MEMDATA11
P1_SR_MEMDATA10
P1_SR_MEMDATA9
P1_SR_MEMDATA8
P1_SR_MEMDATA7
P1_SR_MEMDATA6
P1_SR_MEMDATA5
P1_SR_MEMDATA4
P1_SR_MEMDATA3
P1_SR_MEMDATA2
P1_SR_MEMDATA1
P1_SR_MEMDATA0
P1_SR_MEMWE_L
P1_DIMM_MEMVREF
P1_SR_MEMDATA[63..0] 29,33
P1_SR_MEMWE_L 29,30,32,34
94
93
2
1
P1_VDD_2D5V
C923
0.1U/6
C924
0.1U/6
GND
P1_DIMM_MEMVREF 25,29,30,32
4 4
P1_SR_MEMCS_L3 32,34
P1_SR_MEMDQS_LWR[8..0] 29,33
3 3
P1_SR_MEMCHECK_LWR[7..0] 29,33
2 2
P1_MEMCLK_LWR_H1 28,34
P1_MEMCLK_LWR_L1 28,34
P1_MEMRESET_GPIO 10,29,30,32
P1_SR_MEMCKE_LWR 29,30,32,34
P1_SR_MEMCKE_UPR 29,30,32,34
P1_SR_MEMCAS_L 29,30,32,34
P1_SR_MEMRAS_L 29,30,32,34
P1_SR_MEMDQS_LWR[17..9] 29,33
1 1
P1_SR_MEMCS_L2 32,34
RCC_SDA 13,14,15,16,29,30,32,57,75
RCC_SCL 13,14,15,16,29,30,32,57,75
P1_SR_MEMBANK1 29,30,32,34
P1_SR_MEMADD[13..0] 29,30,32,34
P1_SR_MEMBANK0 29,30,32,34
P1_SR_MEMCS_L3
P1_SR_MEMCS_L2
P1_SR_MEMDQS_LWR8 P1_SR_MEMDATA58
P1_SR_MEMDQS_LWR7
P1_SR_MEMDQS_LWR6
P1_SR_MEMDQS_LWR5
P1_SR_MEMDQS_LWR4
P1_SR_MEMDQS_LWR3
P1_SR_MEMDQS_LWR2
P1_SR_MEMDQS_LWR1
P1_SR_MEMDQS_LWR0
P1_VDD_2D5V
RCC_SDA
GND
RCC_SCL
P1_SR_MEMBANK1
P1_SR_MEMBANK0
P1_SR_MEMADD13
P1_SR_MEMADD12
P1_SR_MEMADD11
P1_SR_MEMADD10
P1_SR_MEMADD9
P1_SR_MEMADD8
P1_SR_MEMADD7
P1_SR_MEMADD6
P1_SR_MEMADD5
P1_SR_MEMADD4
P1_SR_MEMADD3
P1_SR_MEMADD2
P1_SR_MEMADD1
P1_SR_MEMADD0
P1_SR_MEMCHECK_LWR7
P1_SR_MEMCHECK_LWR6
P1_SR_MEMCHECK_LWR5
P1_SR_MEMCHECK_LWR4
P1_SR_MEMCHECK_LWR3
P1_SR_MEMCHECK_LWR2
P1_SR_MEMCHECK_LWR1
P1_SR_MEMCHECK_LWR0
P1_MEMCLK_LWR_H1
P1_MEMCLK_LWR_L1
P1_MEMRESET_GPIO
P1_SR_MEMCKE_LWR
P1_SR_MEMCKE_UPR
P1_SR_MEMCAS_L
P1_SR_MEMRAS_L
P1_SR_MEMDQS_LWR17
P1_SR_MEMDQS_LWR16
P1_SR_MEMDQS_LWR15
P1_SR_MEMDQS_LWR14
P1_SR_MEMDQS_LWR13
P1_SR_MEMDQS_LWR12
P1_SR_MEMDQS_LWR11
P1_SR_MEMDQS_LWR10
P1_SR_MEMDQS_LWR9
GIGABYTE THCHNOLOGIES , INC.
Title
smbus addr
5
=110
4
3
2
Size Document Number Rev
Date: Sheet
Opteron P1 DIMM 2
Custom
GA-7A8DRL
1
2.0
of
31 81 Thursday, November 10, 2005
5
4
3
2
1
163
71
158
157
47
86
78
67
56
36
25
14
5
103
183
182
181
91
92
113
52
59
167
115
118
141
27
122
29
125
32
37
130
41
43
48
144
142
135
134
51
49
45
44
16
17
137
138
76
75
173
10
21
111
65
154
140
177
169
159
149
129
119
107
97
P1_VDD_2D5V
738467085
VDD0
VDD1
CS3#
CS2#
CS1#
CS0#
DQS8
DQS7
DQS6
DQS5
DQS4
DQS3
DQS2
DQS1
DQS0
FETEN
SA2
SA1
SA0
SDA
SCL
BA2
BA1
BA0
A13
A12
A11
A10_AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
CB7
CB6
CB5
CB4
CB3
CB2
CB1
CB0
CK0
CK0#
CK1
CK1#
CK2
CK2#
NC5
NC1_RESET#
CKE0
CKE1
CAS#
RAS#
DM8
DM7
DM6
DM5
DM4
DM3
DM2
DM1
DM0
VDD2
VDD3
VDD4
GND
10011116
108
120
VDD5
GND
148
VDD6
GND
124
1688222
30
54627796104
VDD7
VDD8
VDDQ0
VDDQ1
VDDQ2
VDDQ3
GND
GND
GND
GND
GND
GND
132
139
145
152
160
17618263344250586674818993
VDDQ4
VDDQ5
GND
GND
112
VDDQ6
VDDQ7
GND
GND
128
136
VDDQ8
GND
143
VDDQ9
VDDQ10
GND
GND
156
164
VDDQ11
VDDQ12
GND
GND
172
180
VDDQ13
VDDQ14
GND
GND
15
VDDQ15
GND
GND
VDDID
184
VDDSPD
DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
DQ33
DQ32
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
WE#
VREF
NC4
NC2
NC3
P1DIMM3
DDR-DIMM184/PURPLE
179
178
175
174
88
87
84
83
171
170
166
165
80
79
73
72
162
161
155
153
69
68
64
61
151
150
147
146
60
57
55
53
133
131
127
126
40
39
35
33
123
121
117
114
31
28
24
23
110
109
106
105
20
19
13
12
99
98
95
94
8
6
4
2
90
WP
63
1
102
9
101
P1_SR_MEMDATA127
P1_SR_MEMDATA126
P1_SR_MEMDATA125
P1_SR_MEMDATA124
P1_SR_MEMDATA123
P1_SR_MEMDATA122
P1_SR_MEMDATA121
P1_SR_MEMDATA120
P1_SR_MEMDATA119
P1_SR_MEMDATA118
P1_SR_MEMDATA117
P1_SR_MEMDATA116
P1_SR_MEMDATA115
P1_SR_MEMDATA114
P1_SR_MEMDATA113
P1_SR_MEMDATA112
P1_SR_MEMDATA111
P1_SR_MEMDATA110
P1_SR_MEMDATA109
P1_SR_MEMDATA108
P1_SR_MEMDATA107
P1_SR_MEMDATA106
P1_SR_MEMDATA105
P1_SR_MEMDATA104
P1_SR_MEMDATA103
P1_SR_MEMDATA102
P1_SR_MEMDATA101
P1_SR_MEMDATA100
P1_SR_MEMDATA99
P1_SR_MEMDATA98
P1_SR_MEMDATA97
P1_SR_MEMDATA96
P1_SR_MEMDATA95
P1_SR_MEMDATA94
P1_SR_MEMDATA93
P1_SR_MEMDATA92
P1_SR_MEMDATA91
P1_SR_MEMDATA90
P1_SR_MEMDATA89
P1_SR_MEMDATA88
P1_SR_MEMDATA87
P1_SR_MEMDATA86
P1_SR_MEMDATA85
P1_SR_MEMDATA84
P1_SR_MEMDATA83
P1_SR_MEMDATA82
P1_SR_MEMDATA81
P1_SR_MEMDATA80
P1_SR_MEMDATA79
P1_SR_MEMDATA78
P1_SR_MEMDATA77
P1_SR_MEMDATA76
P1_SR_MEMDATA75
P1_SR_MEMDATA74
P1_SR_MEMDATA73
P1_SR_MEMDATA72
P1_SR_MEMDATA71
P1_SR_MEMDATA70
P1_SR_MEMDATA69
P1_SR_MEMDATA68
P1_SR_MEMDATA67
P1_SR_MEMDATA66
P1_SR_MEMDATA65
P1_SR_MEMDATA64
P1_SR_MEMWE_L
P1_DIMM_MEMVREF
P1_SR_MEMDATA[127..64] 30,33
9394
P1_SR_MEMWE_L 29,30,31,34
2
1
P1_VDD_2D5V
C925
0.1U/6
C926
0.1U/6
GND
P1_DIMM_MEMVREF 25,29,30,31
DIMM3
4 4
P1_SR_MEMCS_L3 31,34
P1_SR_MEMCS_L2 31,34
P1_SR_MEMDQS_UPR[8..0] 30,33
RCC_SDA 13,14,15,16,29,30,31,57,75
RCC_SCL 13,14,15,16,29,30,31,57,75
P1_SR_MEMBANK1 29,30,31,34
3 3
2 2
P1_SR_MEMADD[13..0] 29,30,31,34
P1_SR_MEMCHECK_UPR[7..0] 30,33
P1_MEMCLK_UPR_H1 28,34
P1_MEMCLK_UPR_L1 28,34
P1_MEMRESET_GPIO 10,29,30,31
P1_SR_MEMCKE_LWR 29,30,31,34
P1_SR_MEMCKE_UPR 29,30,31,34
P1_SR_MEMCAS_L 29,30,31,34
P1_SR_MEMRAS_L 29,30,31,34
P1_SR_MEMDQS_UPR[17..9] 30,33
P1_SR_MEMBANK0 29,30,31,34
P1_SR_MEMCS_L3
P1_SR_MEMCS_L2
P1_SR_MEMDQS_UPR8
P1_SR_MEMDQS_UPR7
P1_SR_MEMDQS_UPR6
P1_SR_MEMDQS_UPR5
P1_SR_MEMDQS_UPR4
P1_SR_MEMDQS_UPR3
P1_SR_MEMDQS_UPR2
P1_SR_MEMDQS_UPR1
P1_SR_MEMDQS_UPR0
P1_VDD_2D5V
RCC_SDA
RCC_SCL
P1_SR_MEMBANK1
P1_SR_MEMBANK0
P1_SR_MEMADD13
P1_SR_MEMADD12
P1_SR_MEMADD11
P1_SR_MEMADD10
P1_SR_MEMADD9
P1_SR_MEMADD8
P1_SR_MEMADD7
P1_SR_MEMADD6
P1_SR_MEMADD5
P1_SR_MEMADD4
P1_SR_MEMADD3
P1_SR_MEMADD2
P1_SR_MEMADD1
P1_SR_MEMADD0
P1_SR_MEMCHECK_UPR7
P1_SR_MEMCHECK_UPR6
P1_SR_MEMCHECK_UPR5
P1_SR_MEMCHECK_UPR4
P1_SR_MEMCHECK_UPR3
P1_SR_MEMCHECK_UPR2
P1_SR_MEMCHECK_UPR1
P1_SR_MEMCHECK_UPR0
P1_MEMCLK_UPR_H1
P1_MEMCLK_UPR_L1
P1_MEMRESET_GPIO
P1_SR_MEMCKE_LWR
P1_SR_MEMCKE_UPR
P1_SR_MEMCAS_L
P1_SR_MEMRAS_L
P1_SR_MEMDQS_UPR17
P1_SR_MEMDQS_UPR16
P1_SR_MEMDQS_UPR15
P1_SR_MEMDQS_UPR14
P1_SR_MEMDQS_UPR13
P1_SR_MEMDQS_UPR12
P1_SR_MEMDQS_UPR11
P1_SR_MEMDQS_UPR10
P1_SR_MEMDQS_UPR9
GND
GND
1 1
smbus addr
GIGABYTE THCHNOLOGIES , INC.
=111
5
4
3
2
Title
Size Document Number Rev
Date: Sheet
Opteron P1 DIMM 3
Custom
GA-7A8DRL
1
of
32 81 Thursday, November 10, 2005
2.0
5
VLDT_1D2V VLDT_1D2V
H10
H18
J11
J17
K10
K18
D D
L1_CADIN_H7
L1_CADIN_L7
L1_CADIN_H6
L1_CADIN_L6
L1_CADIN_H5
L1_CADIN_L5
L1_CADIN_H4
L1_CADIN_L4
L1_CADIN_H3
L1_CADIN_L3
L1_CADIN_H2
L1_CADIN_L2
L1_CADIN_H1
L1_CADIN_L1
L1_CADIN_H0
L1_CADIN_L0
L1_CLKIN_H
L1_CLKIN_L
L1_CTLIN_H
C C
B B
A A
P0_HTL0_CADOUT_H15 4
P0_HTL0_CADOUT_L15 4
P0_HTL0_CADOUT_H14 4
P0_HTL0_CADOUT_L14 4
P0_HTL0_CADOUT_H13 4
P0_HTL0_CADOUT_L13 4
P0_HTL0_CADOUT_H12 4
P0_HTL0_CADOUT_L12 4
P0_HTL0_CADOUT_H11 4
P0_HTL0_CADOUT_L11 4
P0_HTL0_CADOUT_H10 4
P0_HTL0_CADOUT_L10 4
P0_HTL0_CADOUT_H9 4
P0_HTL0_CADOUT_L9 4
P0_HTL0_CADOUT_H8 4
P0_HTL0_CADOUT_L8 4
P0_HTL0_CLKOUT_H1 4
P0_HTL0_CLKOUT_L1 4
P0_HTL0_CADOUT_H7 4
P0_HTL0_CADOUT_L7 4
P0_HTL0_CADOUT_H6 4
P0_HTL0_CADOUT_L6 4
P0_HTL0_CADOUT_H5 4
P0_HTL0_CADOUT_L5 4
P0_HTL0_CADOUT_H4 4
P0_HTL0_CADOUT_L4 4
P0_HTL0_CADOUT_H3 4
P0_HTL0_CADOUT_L3 4
P0_HTL0_CADOUT_H2 4
P0_HTL0_CADOUT_L2 4
P0_HTL0_CADOUT_H1 4
P0_HTL0_CADOUT_L1 4
P0_HTL0_CADOUT_H0 4
P0_HTL0_CADOUT_L0 4
P0_HTL0_CLKOUT_H0 4
P0_HTL0_CLKOUT_L0 4
P0_HTL0_CTRLOUT_H 4
P0_HTL0_CTRLOUT_L 4
5
L1_CTLIN_L
P0_HTL0_CADOUT_H15
P0_HTL0_CADOUT_L15
P0_HTL0_CADOUT_H14
P0_HTL0_CADOUT_L14
P0_HTL0_CADOUT_H13
P0_HTL0_CADOUT_L13
P0_HTL0_CADOUT_H12
P0_HTL0_CADOUT_L12
P0_HTL0_CADOUT_H11
P0_HTL0_CADOUT_L11
P0_HTL0_CADOUT_H10
P0_HTL0_CADOUT_L10
P0_HTL0_CADOUT_H9
P0_HTL0_CADOUT_L9
P0_HTL0_CADOUT_H8
P0_HTL0_CADOUT_L8
P0_HTL0_CLKOUT_H1
P0_HTL0_CLKOUT_L1
P0_HTL0_CADOUT_H7
P0_HTL0_CADOUT_L7
P0_HTL0_CADOUT_H6
P0_HTL0_CADOUT_L6
P0_HTL0_CADOUT_H5
P0_HTL0_CADOUT_L5
P0_HTL0_CADOUT_H4
P0_HTL0_CADOUT_L4
P0_HTL0_CADOUT_H3
P0_HTL0_CADOUT_L3
P0_HTL0_CADOUT_H2
P0_HTL0_CADOUT_L2
P0_HTL0_CADOUT_H1
P0_HTL0_CADOUT_L1
P0_HTL0_CADOUT_H0
P0_HTL0_CADOUT_L0
P0_HTL0_CLKOUT_H0
P0_HTL0_CLKOUT_L0
P0_HTL0_CTRLOUT_H
P0_HTL0_CTRLOUT_L
L11
L17
T27
T28
V29
U29
V27
V28
Y29
W29
AB29
AA29
AB27
AB28
AD29
AC29
AD27
AD28
Y27
Y28
T29
R29
E17
E16
C18
D18
E19
E18
C20
D20
C22
D22
E23
E22
C24
D24
E25
E24
E21
E20
C17
B17
A19
A18
C19
B19
A21
A20
A23
A22
C23
B23
A25
A24
C25
B25
C21
B21
A17
A16
4
VDD12A_0
VDD12A_1
VDD12A_2
VDD12A_3
VDD12A_4
VDD12A_5
VDD12A_6
VDD12A_7
L1_CADIN_H7
L1_CADIN_L7
L1_CADIN_H6
L1_CADIN_L6
L1_CADIN_H5
L1_CADIN_L5
L1_CADIN_H4
L1_CADIN_L4
L1_CADIN_H3
L1_CADIN_L3
L1_CADIN_H2
L1_CADIN_L2
L1_CADIN_H1
L1_CADIN_L1
L1_CADIN_H0
L1_CADIN_L0
L1_CLKIN_H0
L1_CLKIN_L0
L1_CTLIN_H0
L1_CTLIN_L0
L0_CADIN_H15
L0_CADIN_L15
L0_CADIN_H14
L0_CADIN_L14
L0_CADIN_H13
L0_CADIN_L13
L0_CADIN_H12
L0_CADIN_L12
L0_CADIN_H11
L0_CADIN_L11
L0_CADIN_H10
L0_CADIN_L10
L0_CADIN_H9
L0_CADIN_L9
L0_CADIN_H8
L0_CADIN_L8
L0_CLKIN_H1
L0_CLKIN_L1
L0_CADIN_H7
L0_CADIN_L7
L0_CADIN_H6
L0_CADIN_L6
L0_CADIN_H5
L0_CADIN_L5
L0_CADIN_H4
L0_CADIN_L4
L0_CADIN_H3
L0_CADIN_L3
L0_CADIN_H2
L0_CADIN_L2
L0_CADIN_H1
L0_CADIN_L1
L0_CADIN_H0
L0_CADIN_L0
L0_CLKIN_H0
L0_CLKIN_L0
L0_CTLIN_H0
L0_CTLIN_L0
HYPER TRANSPORT LINK 0/1
4
U19A
VDD12B_0
VDD12B_1
VDD12B_2
VDD12B_3
VDD12B_4
VDD12B_5
VDD12B_6
VDD12B_7
L1_CADOUT_H7
L1_CADOUT_L7
L1_CADOUT_H6
L1_CADOUT_L6
L1_CADOUT_H5
L1_CADOUT_L5
L1_CADOUT_H4
L1_CADOUT_L4
L1_CADOUT_H3
L1_CADOUT_L3
L1_CADOUT_H2
L1_CADOUT_L2
L1_CADOUT_H1
L1_CADOUT_L1
L1_CADOUT_H0
L1_CADOUT_L0
L1_CLKOUT_H0
L1_CLKOUT_L0
L1_CTLOUT_H0
L1_CTLOUT_L0
L0_CADOUT_H15
L0_CADOUT_L15
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H8
L0_CADOUT_L8
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H0
L0_CADOUT_L0
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CTLOUT_H0
L0_CTLOUT_L0
LDTCOMP3
LDTCOMP2
LDTCOMP1
LDTCOMP0
L19
L21
M18
M20
V18
V20
W19
W21
N29
P29
M28
M27
L29
M29
K28
K27
H28
H27
G29
H29
F28
F27
E29
F29
J29
K29
P28
P27
D14
C14
E12
E13
D12
C12
E10
E11
E8
E9
D8
C8
E6
E7
D6
C6
D10
C10
A14
A15
B13
C13
A12
A13
B11
C11
B9
C9
A8
A9
B7
C7
A6
A7
A10
A11
B15
C15
C3
B2
A3
B4
AMD-8131
LINK A.B share VLDT
add isolation moat between
A.B
L1_CADOUT_H7
L1_CADOUT_L7
L1_CADOUT_H6
L1_CADOUT_L6
L1_CADOUT_H5
L1_CADOUT_L5
L1_CADOUT_H4
L1_CADOUT_L4
L1_CADOUT_H3
L1_CADOUT_L3
L1_CADOUT_H2
L1_CADOUT_L2
L1_CADOUT_H1
L1_CADOUT_L1
L1_CADOUT_H0
L1_CADOUT_L0
L1_CLKOUT_H
L1_CLKOUT_L
L1_CTLOUT_H
L1_CTLOUT_L
P0_HTL0_CADIN_H15
P0_HTL0_CADIN_L15
P0_HTL0_CADIN_H14
P0_HTL0_CADIN_L14
P0_HTL0_CADIN_H13
P0_HTL0_CADIN_L13
P0_HTL0_CADIN_H12
P0_HTL0_CADIN_L12
P0_HTL0_CADIN_H11
P0_HTL0_CADIN_L11
P0_HTL0_CADIN_H10
P0_HTL0_CADIN_L10
P0_HTL0_CADIN_H9
P0_HTL0_CADIN_L9
P0_HTL0_CADIN_H8
P0_HTL0_CADIN_L8
P0_HTL0_CLKIN_H1
P0_HTL0_CLKIN_L1
P0_HTL0_CADIN_H7
P0_HTL0_CADIN_L7
P0_HTL0_CADIN_H6
P0_HTL0_CADIN_L6
P0_HTL0_CADIN_H5
P0_HTL0_CADIN_L5
P0_HTL0_CADIN_H4
P0_HTL0_CADIN_L4
P0_HTL0_CADIN_H3
P0_HTL0_CADIN_L3
P0_HTL0_CADIN_H2
P0_HTL0_CADIN_L2
P0_HTL0_CADIN_H1
P0_HTL0_CADIN_L1
P0_HTL0_CADIN_H0
P0_HTL0_CADIN_L0
P0_HTL0_CLKIN_H0
P0_HTL0_CLKIN_L0
P0_HTL0_CTRLIN_H
P0_HTL0_CTRLIN_L
V_LDTCMP3
V_LDTCMP2
V_LDTCMP1
V_LDTCMP0
R238
49.9/6/1
C307
1000P/6/X
GND GND
3
VLDT_1D2V
C308
1000P/6/X
3
P0_HTL0_CADIN_H15 4
P0_HTL0_CADIN_L15 4
P0_HTL0_CADIN_H14 4
P0_HTL0_CADIN_L14 4
P0_HTL0_CADIN_H13 4
P0_HTL0_CADIN_L13 4
P0_HTL0_CADIN_H12 4
P0_HTL0_CADIN_L12 4
P0_HTL0_CADIN_H11 4
P0_HTL0_CADIN_L11 4
P0_HTL0_CADIN_H10 4
P0_HTL0_CADIN_L10 4
P0_HTL0_CADIN_H9 4
P0_HTL0_CADIN_L9 4
P0_HTL0_CADIN_H8 4
P0_HTL0_CADIN_L8 4
P0_HTL0_CLKIN_H1 4
P0_HTL0_CLKIN_L1 4
P0_HTL0_CADIN_H7 4
P0_HTL0_CADIN_L7 4
P0_HTL0_CADIN_H6 4
P0_HTL0_CADIN_L6 4
P0_HTL0_CADIN_H5 4
P0_HTL0_CADIN_L5 4
P0_HTL0_CADIN_H4 4
P0_HTL0_CADIN_L4 4
P0_HTL0_CADIN_H3 4
P0_HTL0_CADIN_L3 4
P0_HTL0_CADIN_H2 4
P0_HTL0_CADIN_L2 4
P0_HTL0_CADIN_H1 4
P0_HTL0_CADIN_L1 4
P0_HTL0_CADIN_H0 4
P0_HTL0_CADIN_L0 4
P0_HTL0_CLKIN_H0 4
P0_HTL0_CLKIN_L0 4
P0_HTL0_CTRLIN_H 4
P0_HTL0_CTRLIN_L 4
15 mils
R239
49.9/6/1
GND
Place close to G0
R237
100/6/1
C305
1000P/6/X
GND GND
L1_CADOUT_H7
L1_CADOUT_L7
L1_CTLOUT_H
L1_CTLOUT_L
L1_CLKOUT_H
L1_CLKOUT_L
L1_CADOUT_H4
L1_CADOUT_L4
L1_CADOUT_H2
L1_CADOUT_L2
L1_CADOUT_H3
L1_CADOUT_L3
L1_CADOUT_H0
L1_CADOUT_L0
L1_CADOUT_H1
L1_CADOUT_L1
L1_CADOUT_H5
L1_CADOUT_L5
L1_CADOUT_H6
L1_CADOUT_L6
VLDT_1D2V
RP160
8P4R/51/1
RP159
8P4R/51/1
RP157
8P4R/51/1
RP133
8P4R/51/1
RP174
8P4R/51/1
C306 1000P/6/X
2
GND
2
1
GND
VLDT_1D2V
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
L1_CADIN_H7
1
2
L1_CADIN_L7
3
4
L1_CTLIN_H
5
6
L1_CTLIN_L
7
8
L1_CADIN_H5
1
2
L1_CADIN_L5
3
4
L1_CADIN_H6
5
6
L1_CADIN_L6
7
8
L1_CADIN_H2
1
2
L1_CADIN_L2
3
4
L1_CADIN_H3
5
6
L1_CADIN_L3
7
8
L1_CADIN_H0
1
2
L1_CADIN_L0
3
4
L1_CADIN_H1
5
6
L1_CADIN_L1
7
8
L1_CLKIN_H
1
2
L1_CLKIN_L
3
4
L1_CADIN_H4
5
6
L1_CADIN_L4
7
8
RP175
2
8P4R/51/1/X
4
6
8
RP177
2
8P4R/51/1/X
4
6
8
RP176
2
8P4R/51/1/X
4
6
8
RP181
2
8P4R/51/1/X
4
6
8
RP182
2
8P4R/51/1/X
4
6
8
GIGABYTE THCHNOLOGIES , INC.
Title
Size Document Number Rev
B
Date: Sheet
AMD-8131 Golem LDT
VLDT_1D2V
C345 10U/12
C353 0.22U/6/B
C354 0.22U/6/B
C357 0.22U/6/B
C360 0.01U/6/B
C359 0.01U/6
C363 0.1U/6
C365 0.001uF/6/B
C364 0.001uF/6/B
C366 1U/6
C367 1U/6
VLDT_1D2V
EC73
C368 4.7U/12
C369 4.7U/12
C371 4.7U/12
C372 4.7U/12
Near the regulator
GA-7A8DRL
1
GND
1000U/6.3V/8X11.5/KZG/X
+
GND
36 81 Thursday, November 10, 2005
of
2.0
5
4
3
2
1
GOLEM PCIX MODE AND FREQUENCY SETTINGS
GOLEM0
D D
LDT LINK 1
G0
LDT LINK
C C
0
PCIX BRIDGE B
PCIX BRIDGE A
A94
B94
GNT_L(4:3)
11b
01b
01b
01b
01b
00b
NOTES:
1. A '0' in the table indicates a 10k to 100k ohm resistor to ground is placed on the signal
2. A '1' in the table indicates a 10k to 100k ohm resistor to VDD33 is placed on the signal
3. An 'X' in the table indicates that the state of the signal does not matter to the IC
4. 'Grounded' indicates the signal is tied to ground direct ly
5. 'Middle Voltage' indicates the signal is tied to a 5.1k ohm pullup to VDD33 and between 1 to 4 parallel 10k ohm pulldown resistors to ground.
6. 'Pullup' indicates that the signal is tied to a 5.1k ohm pullup resistor to VDD33 and no pulldown resisto rs.
PCIXCAP
Grounded
Grounded
Grounded
Middle Voltage
Pullup
Pullup
M66EN MAX PCI(X) SLOTS
0
0
1
X (1=PU)
X (1=PU)
X (1=PU)
MODE
PCI
PCI
PCI
PCIX
PCIX
PCIX
FREQUENCY
33.33 MHz
33.33 MHz
66.67 MHz
66.67 MHz
100.00 MHz
133.33 MHz
5
4
4
4
2
1
GOLEM SIGNAL NOMENCLATURE
B B
G0_B_SLOTA
66/100 MHZ
G0_A_SLOTA
66/100 MHZ
A63
A62
B63
B62
3.3V 64 BIT PCIX SLOT
PIN ASSIGNMENTS
GENERIC PREFIX :
G0_x_..........
Gx_A_..........
Gx_B_..........
Gx_x_HOT
Gx_x_..........
G0 = signal is connected with Golem 0
A = signal is connected with Golem PCIX bridge A
B = signal is connected with Golem PCIX bridge B
A = signal is connected with Hot Plug circuitry
A14
A11
A A
PHYSICAL SLOT 4
PHYSICAL SLOT 3
5
PHYSICAL SLOT 2
PHYSICAL SLOT 1
4
B14
B11
A1
B1
EDGE OF MOTHERBOARD
A2
A1
I/O PANEL DIRECTION
3
B2
B1
Note: Stretto utilizes one Golem (G0), Golem PCI-X bridge B, and one 133MHz slot A
GIGABYTE THCHNOLOGIES , INC.
Title
Golem PCI-X mode and Bus Frequency
Size Document Number Rev
C
2
Date: Sheet
GA-7A8DRL
1
2.0
of
37 81 Thursday, November 10, 2005
5
G0 Bridge A -default non-hotplug,but hot plug capable with pop options
VCC3
D D
G0_A_REQ_L2 66
G0_A_REQ_L1 43
G0_A_REQ_L0 44
CLOSE TO IC
G0_A_FBCLK
R255
0/6
C309
15P/6
C C
G0_A_PCIXCAP
B B
A A
GND
G0_B_PCIX_RESET_L 39
C310
0.1U/6
R257
5.1K/6
VCC3
VCC3
R256
0/6/X
R259
5.1K/6
GND
VCC3
R260
R40
5.1K/6
5.1K/6
R263
5.1K/6
GND
GND
PLACE CLOSE
TO Golem0
G0_A_PCIX_RESET_L
5
(see table)
BRIDGE A
Selects non hot plug
PCI(X) Mode and Freq.
JP1
1
2
3
H1X3/1-2[B]
GND GND
SR_G0_A_M66EN
U115
2
1A1
4
1A2
6
1A3
8
1A4
11
2A1
13
2A2
15
2A3
17
2A4
1
1G
19
2G
74LCX244PWP/TSSOP20
GND
VDD
1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
18
16
14
12
9
7
5
3
20
10
R243 5.1K/6
R240 5.1K/6
R244 5.1K/6
R241 5.1K/6
R242 5.1K/6
SR_G0_A_FRAME_L
SR_G0_A_DEVSEL_L
SR_G0_A_STOP_L
SR_G0_A_TRDY_L
SR_G0_A_IRDY_L
SR_G0_A_PAR
SR_G0_A_PAR64
SR_G0_A_M66EN
SR_G0_A_SERR_L
SR_G0_A_PERR_L
SR_G0_A_PCIXCAP
G0_A_COMPAT
G0_A_SR_PME_L
VCC3
GND
GND
SR_G0_A_REQ64_L
SR_G0_A_CBE_L7
SR_G0_A_CBE_L6
SR_G0_A_CBE_L5
SR_G0_A_CBE_L4
SR_G0_A_CBE_L3
SR_G0_A_CBE_L2
SR_G0_A_CBE_L1
SR_G0_A_CBE_L0
SR_G0_A_INTD_L
SR_G0_A_INTC_L
SR_G0_A_INTB_L
SR_G0_A_INTA_L
R261
5.1K/6
C311
0.1U/6
R74 22/6
R34 22/6
R33 22/6
R32 22/6
R86 22/6
R87 22/6
R88 22/6
VCC3
C7
0.1U/6
G0_A_HPSOLC
G0_A_REQ_L3
G0_A_REQ_L2
G0_A_REQ_L1
G0_A_REQ_L0
G0_A_RST_SOLT1_L 43
G0_A_RST_SOLT2_L 44
G0_A_RST_ZCR_L 66
G0_B_RST_SLOT1_L 42
G0_B_RST_SLOT2_L 41
G0_B_RST_LAN_L 62
4
Slects initial Golem HT frequency(200MHz)
U19B
L26
A_REQ4_L
R26
A_REQ3_L
T25
A_REQ2_L
V24
A_REQ1_L
AC24
A_REQ0_L
AJ18
A_REQ64_L
AD17
A_CBE_L7
AE17
A_CBE_L6
AF17
A_CBE_L5
AG17
A_CBE_L4
AJ26
A_CBE_L3
AJ24
A_CBE_L2
AG22
A_CBE_L1
AH20
A_CBE_L0
M25
A_PLLCLKI
AD23
A_FRAME_L
AG23
A_DEVSEL_L
AJ23
A_STOP_L
AF23
A_TRDY_L
AE23
A_IRDY_L
AF22
A_PAR
AH17
A_PAR64
AE20
A_M66EN
AE22
A_SERR_L
AD22
A_PERR_L
AH23
A_PCIXCAP
K24
A_COMPAT
AD7
A_PME_L
AB25
A_PIRQD_L
AA24
A_PIRQC_L
V25
A_PIRQB_L
U24
A_PIRQA_L
PCIX - A
4
A_GNT4_L
A_GNT3_L
A_GNT2_L
A_GNT1_L
A_GNT0_L
A_ACK64_L
A_PCLK4
A_PCLK3
A_PCLK2
A_PCLK1
A_PCLK0
A_PRESET_L
A_PLLCLKO
A_AD0
A_AD1
A_AD2
A_AD3
A_AD4
A_AD5
A_AD6
A_AD7
A_AD8
A_AD9
A_AD10
A_AD11
A_AD12
A_AD13
A_AD14
A_AD15
A_AD16
A_AD17
A_AD18
A_AD19
A_AD20
A_AD21
A_AD22
A_AD23
A_AD24
A_AD25
A_AD26
A_AD27
A_AD28
A_AD29
A_AD30
A_AD31
A_AD32
A_AD33
A_AD34
A_AD35
A_AD36
A_AD37
A_AD38
A_AD39
A_AD40
A_AD41
A_AD42
A_AD43
A_AD44
A_AD45
A_AD46
A_AD47
A_AD48
A_AD49
A_AD50
A_AD51
A_AD52
A_AD53
A_AD54
A_AD55
A_AD56
A_AD57
A_AD58
A_AD59
A_AD60
A_AD61
A_AD62
A_AD63
N24
P25
R25
U25
AC25
SR_G0_A_ACK64_L
AG18
G0_A_HPSID
N25
G0_A_SR_PCLK3
P24
G0_A_SR_PCLK2
R24
G0_A_SR_PCLK1
T24
G0_A_SR_PCLK0
AB24
G0_A_PCIX_RESET_L
AC26
G0_A_FBCLK_SR
M24
AE18
AJ19
AH19
AG19
AF19
AE19
AD19
AJ20
AG20
AF20
AD20
AJ21
AG21
AE21
AJ22
AH22
AG24
AE24
AJ25
AH25
AG25
AF25
AE25
AD25
AH26
AG26
AF26
AJ27
AG27
AH28
AG28
AF28
AJ10
AD11
AE11
AF11
AG11
AH11
AJ11
AE12
AG12
AJ12
AD13
AE13
AF13
AG13
AH13
AJ13
AD14
AE14
AF14
AG14
AH14
AJ14
AE15
AG15
AJ15
AJ16
AH16
AG16
AF16
AE16
AD16
AJ17
VCC3
R245 100K/6
R246 100K/6
SR_G0_A_AD0
SR_G0_A_AD1
SR_G0_A_AD2
SR_G0_A_AD3
SR_G0_A_AD4
SR_G0_A_AD5
SR_G0_A_AD6
SR_G0_A_AD7
SR_G0_A_AD8
SR_G0_A_AD9
SR_G0_A_AD10
SR_G0_A_AD11
SR_G0_A_AD12
SR_G0_A_AD13
SR_G0_A_AD14
SR_G0_A_AD15
SR_G0_A_AD16
SR_G0_A_AD17
SR_G0_A_AD18
SR_G0_A_AD19
SR_G0_A_AD20
SR_G0_A_AD21
SR_G0_A_AD22
SR_G0_A_AD23
SR_G0_A_AD24
SR_G0_A_AD25
SR_G0_A_AD26
SR_G0_A_AD27
SR_G0_A_AD28
SR_G0_A_AD29
SR_G0_A_AD30
SR_G0_A_AD31
SR_G0_A_AD32
SR_G0_A_AD33
SR_G0_A_AD34
SR_G0_A_AD35
SR_G0_A_AD36
SR_G0_A_AD37
SR_G0_A_AD38
SR_G0_A_AD39
SR_G0_A_AD40
SR_G0_A_AD41
SR_G0_A_AD42
SR_G0_A_AD43
SR_G0_A_AD44
SR_G0_A_AD45
SR_G0_A_AD46
SR_G0_A_AD47
SR_G0_A_AD48
SR_G0_A_AD49
SR_G0_A_AD50
SR_G0_A_AD51
SR_G0_A_AD52
SR_G0_A_AD53
SR_G0_A_AD54
SR_G0_A_AD55
SR_G0_A_AD56
SR_G0_A_AD57
SR_G0_A_AD58
SR_G0_A_AD59
SR_G0_A_AD60
SR_G0_A_AD61
SR_G0_A_AD62
SR_G0_A_AD63
3
depop for
Golem B
R247 100K/6/X
G0_A_HPSORLC
G0_A_GNT_L3
G0_A_GNT_L2
G0_A_GNT_L1
G0_A_GNT_L0
TP157
TP123
R900 33/6
R207 33/6
R253 33/6
R254 22/6
Match the flight times of the
FBCLK and the PCLK to the Slot
G0_A_FBCLK + G0_A_FBCLK_SR = G0_A_PCLK(0) + 2.5"
3
G0_A_GNT_L2 66
G0_A_GNT_L1 43
G0_A_GNT_L0 44
ZCR_CLK 66
G0_A_PCLK1 43
G0_A_PCLK0 44
G0_A_FBCLK
2
(see table)
BRIDGE A
Selects non hot plug
PCI(X) Mode and Freq.
VCC3
GND
RP316 8P4R-10
G0_A_REQ64_L SR_G0_A_REQ64_L
G0_A_DEVSEL_L SR_G0_A_DEVSEL_L
G0_A_SERR_L SR_G0_A_SERR_L
RP315 8P4R-10
G0_A_AD46
G0_A_AD57
G0_A_AD53 SR_G0_A_AD53
G0_A_AD52
G0_A_AD59 SR_G0_A_AD59
G0_A_AD0
G0_A_AD34
G0_A_AD35
G0_A_AD32
G0_A_AD33
G0_A_PAR64
G0_A_AD38
G0_A_AD40 SR_G0_A_AD40
G0_A_AD49 SR_G0_A_AD49
G0_A_AD48
G0_A_PCIXCAP
G0_A_M66EN
G0_A_PAR64
G0_A_ACK64_L
G0_A_REQ64_L
G0_A_AD[0..63]
G0_A_CBE_L[0..7]
G0_A_DEVSEL_L
G0_A_SERR_L
G0_A_PERR_L
G0_A_FRAME_L
G0_A_IRDY_L
G0_A_TRDY_L
G0_A_STOP_L
G0_A_PAR
G0_A_INTD_L
G0_A_INTC_L
G0_A_INTB_L
G0_A_INTA_L
Default setting:
PCIX/66 MHz
R249
8.2K/6/X
R251
8.2K/6
1
2
SR_G0_A_STOP_L G0_A_STOP_L
3
4
5
6
7
8
SR_G0_A_CBE_L1 G0_A_CBE_L1
1
2
SR_G0_A_PAR G0_A_PAR
3
4
SR_G0_A_AD11 G0_A_AD11
5
6
SR_G0_A_AD14 G0_A_AD14
7
8
RP115 8P4R-10
RP116 8P4R-10
RP117 8P4R-10
RP118 8P4R-10
RP119 8P4R-10
RP120 8P4R-10
RP121 8P4R-10
RP122 8P4R-10
RP123 8P4R-10
SR_G0_A_AD46
1
2
SR_G0_A_AD42 G0_A_AD42
3
4
SR_G0_A_AD45 G0_A_AD45
5
6
SR_G0_A_AD43 G0_A_AD43
7
8
SR_G0_A_AD62 G0_A_AD62
1
2
SR_G0_A_AD58 G0_A_AD58
3
4
SR_G0_A_AD54 G0_A_AD54
5
6
SR_G0_A_AD61 G0_A_AD61
7
8
SR_G0_A_AD57
1
2
SR_G0_A_AD55 G0_A_AD55
3
4
5
6
SR_G0_A_AD52
7
8
SR_G0_A_AD63 G0_A_AD63
1
2
SR_G0_A_AD56 G0_A_AD56
3
4
5
6
SR_G0_A_AD50 G0_A_AD50
7
8
SR_G0_A_CBE_L5 G0_A_CBE_L5
1
2
SR_G0_A_AD0
3
4
SR_G0_A_CBE_L4 G0_A_CBE_L4
5
6
SR_G0_A_CBE_L7 G0_A_CBE_L7
7
8
SR_G0_A_AD34
1
2
SR_G0_A_AD36 G0_A_AD36
3
4
SR_G0_A_AD35
5
6
SR_G0_A_AD32
7
8
SR_G0_A_AD39 G0_A_AD39
1
2
SR_G0_A_AD37 G0_A_AD37
3
4
SR_G0_A_AD33
5
6
SR_G0_A_PAR64
7
8
SR_G0_A_AD44 G0_A_AD44
1
2
SR_G0_A_AD38
3
4
5
6
SR_G0_A_AD41 G0_A_AD41
7
8
1
2
SR_G0_A_AD51 G0_A_AD51
3
4
SR_G0_A_AD47 G0_A_AD47
5
6
SR_G0_A_AD48
7
8
G0_A_PCIXCAP 43,44
G0_A_M66EN 43,44,66
G0_A_PAR64 43,44,66
G0_A_ACK64_L 43,44,66
G0_A_REQ64_L 43,44,66
G0_A_AD[0..63] 43,44,66
G0_A_CBE_L[0..7] 43,44,66
G0_A_DEVSEL_L 43,44,66
G0_A_SERR_L 43,44,66
G0_A_PERR_L 43,44,66
G0_A_FRAME_L 43,44,66
G0_A_IRDY_L 43,44,66
G0_A_TRDY_L 43,44,66
G0_A_STOP_L 43,44,66
G0_A_PAR 43,44,66
G0_A_INTD_L 43,44
G0_A_INTC_L 43,44
G0_A_INTB_L 43,44
G0_A_INTA_L 43,44
2
1
VCC3
R248
8.2K/6
G0_A_GNT_L3
R250
8.2K/6
DEFAULT:1-2
SHORT
PLACE CLOSE
TO Golem0
G0_A_PCIXCAP SR_G0_A_PCIXCAP
R17
G0_A_M66EN SR_G0_A_M66EN
R16
RP314 8P4R-10
G0_A_AD20 SR_G0_A_AD20
RP313 8P4R-10
G0_A_INTD_L
G0_A_INTC_L
G0_A_INTB_L
G0_A_INTA_L
RP312 8P4R-10
G0_A_AD31
G0_A_AD28
RP311 8P4R-10
G0_A_AD27
RP310 8P4R-10
G0_A_ACK64_L
RP309 8P4R-10
G0_A_AD19 SR_G0_A_AD19
RP308 8P4R-10
G0_A_IRDY_L SR_G0_A_IRDY_L
RP185 8P4R-10
G0_A_AD9
RP184 8P4R-10
G0_A_AD10
RP183 8P4R-10
RP158 8P4R-10
G0_A_AD15 SR_G0_A_AD15
G0_A_CBE_L0
Title
Size Document Number Rev
Custom
Date: Sheet
JP4
1
2
3
H1X3/1-2[B]
GND
10/6
10/6
SR_G0_A_CBE_L3 G0_A_CBE_L3
1
2
SR_G0_A_AD24 G0_A_AD24
3
4
SR_G0_A_AD21 G0_A_AD21
5
6
7
8
SR_G0_A_INTD_L
1
2
SR_G0_A_INTC_L
3
4
SR_G0_A_INTB_L
5
6
SR_G0_A_INTA_L
7
8
SR_G0_A_AD31
1
2
SR_G0_A_AD29 G0_A_AD29
3
4
SR_G0_A_AD26 G0_A_AD26
5
6
SR_G0_A_AD28
7
8
SR_G0_A_AD27
1
2
SR_G0_A_AD30 G0_A_AD30
3
4
5
6
SR_G0_A_AD22 G0_A_AD22
7
8
SR_G0_A_AD17 G0_A_AD17
1
2
SR_G0_A_FRAME_L G0_A_FRAME_L
3
4
SR_G0_A_ACK64_L
5
6
SR_G0_A_PERR_L G0_A_PERR_L
7
8
SR_G0_A_AD25 G0_A_AD25
1
2
SR_G0_A_AD23 G0_A_AD23
3
4
SR_G0_A_AD18 G0_A_AD18
5
6
7
8
SR_G0_A_AD16 G0_A_AD16
1
2
SR_G0_A_CBE_L2 G0_A_CBE_L2
3
4
5
6
SR_G0_A_TRDY_L G0_A_TRDY_L
7
8
SR_G0_A_AD8 G0_A_AD8
1
2
SR_G0_A_AD6 G0_A_AD6
3
4
SR_G0_A_AD9
5
6
SR_G0_A_AD7 G0_A_AD7
7
8
SR_G0_A_AD5 G0_A_AD5
1
2
SR_G0_A_AD1 G0_A_AD1
3
4
SR_G0_A_AD10
5
6
SR_G0_A_AD4 G0_A_AD4
7
8
SR_G0_A_AD2 G0_A_AD2
1
2
SR_G0_A_AD3 G0_A_AD3
3
4
SR_G0_A_CBE_L6 G0_A_CBE_L6
5
6
SR_G0_A_AD60 G0_A_AD60
7
8
1
2
SR_G0_A_AD12 G0_A_AD12
3
4
SR_G0_A_AD13 G0_A_AD13
5
6
SR_G0_A_CBE_L0
7
8
GIGABYTE THCHNOLOGIES , INC.
AMD-8131 Golem PCI-X Bridge A
GA-7A8DRL
1
38 81 Thursday, November 10, 2005
2.0
of
5
VCC3
G0_B_HPSOLC
R267 5.1K/6
R269 5.1K/6
R266 5.1K/6
R270 5.1K/6
R268 5.1K/6
TP73
TP74
TP75
TP76
TP77
TP78
TP79
TP80
TP81
TP82
TP83
TP84
TP85
TP86
TP87
TP88
TP89
TP90
TP91
TP92
TP93
TP94
TP95
TP96
TP97
TP98
TP99
TP100
TP101
TP102
VDD_2D5V
0.1U/6
GND
86.6/6/1
R296
LDT_STOP2_L
GND
C315
TP117
R306 5.1K/6
G0_B_REQ_L3
G0_B_REQ_L2
G0_B_REQ_L1
G0_B_REQ_L0
SR_G0_B_CBE_L0
SR_G0_B_CBE_L1
SR_G0_B_CBE_L2
SR_G0_B_CBE_L3
SR_G0_B_CBE_L4
SR_G0_B_CBE_L5
SR_G0_B_CBE_L6
SR_G0_B_CBE_L7
SR_G0_B_FRAME_L
SR_G0_B_DEVSEL_L
SR_G0_B_STOP_L
SR_G0_B_TRDY_L
SR_G0_B_IRDY_L
SR_G0_B_PAR
SR_G0_B_PAR64
SR_G0_B_M66EN
SR_G0_B_SERR_L
SR_G0_B_PERR_L
SR_G0_B_PCIXCAP
SR_G0_B_INTD_L
SR_G0_B_INTC_L
SR_G0_B_INTB_L
SR_G0_B_INTA_L
TP103
TP104
TP105
TP106
TP107
TP108
TP109
TP110
TP111
TP112
TP113
TP114
TP115
TP116
D D
VCC3
R281
5.1K/6
0/6
R285
C312
C C
Hot Plug Single Slot
12P/6
GND
BRIDGE A
G0_B_FBCLK
G0_B_REQ_L2 41
G0_B_REQ_L1 42
G0_B_REQ_L0 62
PIRQA- 48,50,70,71
PIRQB- 48,50
PIRQC- 48,50,67
PIRQD- 48,50
RP104
8P4R-4.7K/X
VCC3
246
135
8
7
Pullup = HP si n gl e sl o t no t supported
VCC3
R288
G0_B_HPSIC
Pulldown =
B B
A A
8.2K/6
R290
8.2K/6/X
GND
HP single slot supported
(Isolation FETs for
Hot Plug NOT used)
VCC3
Place these PU's
Close to Golem
GND
LDT_STOP2_L 61
ALL_PG_G0 61
G0_REFCLK 57
RESET_G0- 61
5
VDD_2D5V
C317
0.1U/6
R297
86.6/6/1
86.6/6/1/X
R302
R303 0/6
R307
100K/6/X
C316
0.1U/6
R299
0/6/X
GND
VDD_2D5V
GND
C320
5pF/6/X
G0_B_HPSIC
G0_B_HPSIL_L
G0_B_HPSOC
G0_B_HPSOD
GND
R311
4.7K/6
4
AE8
B_REQ4_L
AF7
B_REQ3_L
AF6
B_REQ2_L
AF1
B_REQ1_L
AC4
B_REQ0_L
P6
B_REQ64_L
R5
B_CBE_L0
U6
B_CBE_L1
Y1
B_CBE_L2
AA4
B_CBE_L3
M1
B_CBE_L4
N5
B_CBE_L5
N3
B_CBE_L6
N1
B_CBE_L7
W5
B_FRAME_L
V6
B_DEVSEL_L
V4
B_STOP_L
W1
B_TRDY_L
W3
B_IRDY_L
V1
B_PAR
M2
B_PAR64
T3
B_M66EN
V2
B_SERR_L
V3
B_PERR_L
V5
B_PCIXCAP
AD6
B_PME_L
AE6
B_PLLCLKI
AD2
B_PIRQD_L
AD3
B_PIRQC_L
AD4
B_PIRQB_L
AE1
B_PIRQA_L
F25
NIOAIRQ_A_L
G24
NIOAIRQ_B_L
G26
NIOAIRQ_C_L
G25
NIOAIRQ_D_L
D4
FREE1
AJ5
FREE2
AG9
FREE3
AJ8
FREE4
F5
FREE5
AD5
FREE6
AJ9
FREE7
AD10
FREE8
AJ3
FREE9
D2
FREE10
D1
FREE12
E3
FREE13
E4
FREE14
AD9
FREE15
AG1
FREE16
AE5
FREE17
E1
FREE18
E2
FREE19
AG2
FREE20
AJ4
FREE21
AE9
FREE22
E14
RSVD0
E15
RSVD1
D16
RSVD2
C16
RSVD3
J27
RSVD4
K25
RSVD5
L24
RSVD6
L25
RSVD7
L27
RSVD8
N26
RSVD9
N27
RSVD10
R27
RSVD11
U26
RSVD12
U27
RSVD13
W24
RSVD14
W25
RSVD15
W26
RSVD16
W27
RSVD17
Y25
RSVD18
AA25
RSVD19
AA26
RSVD20
AA27
RSVD21
AC27
RSVD22
AJ6
HPSIC
J26
HPSIL_L
AJ7
HPSOC
J25
HPSOD
C27
LDTSTOP_L
A27
CMPOVR
C28
PWROK
C29
REFCLK
B28
RESET_L
D27
TEST
PCIX-B; MISC; No Connects
Place close to Golem
4
U19C
B_GNT4_L
B_GNT3_L
B_GNT2_L
B_GNT1_L
B_GNT0_L
B_ACK64_L
B_PCLK4
B_PCLK3
B_PCLK2
B_PCLK1
B_PCLK0
B_PRESET_L
B_PLLCLKO
B_AD0
B_AD1
B_AD2
B_AD3
B_AD4
B_AD5
B_AD6
B_AD7
B_AD8
B_AD9
B_AD10
B_AD11
B_AD12
B_AD13
B_AD14
B_AD15
B_AD16
B_AD17
B_AD18
B_AD19
B_AD20
B_AD21
B_AD22
B_AD23
B_AD24
B_AD25
B_AD26
B_AD27
B_AD28
B_AD29
B_AD30
B_AD31
B_AD32
B_AD33
B_AD34
B_AD35
B_AD36
B_AD37
B_AD38
B_AD39
B_AD40
B_AD41
B_AD42
B_AD43
B_AD44
B_AD45
B_AD46
B_AD47
B_AD48
B_AD49
B_AD50
B_AD51
B_AD52
B_AD53
B_AD54
B_AD55
B_AD56
B_AD57
B_AD58
B_AD59
B_AD60
B_AD61
B_AD62
B_AD63
P_CAL
P_CAL_L
STRAPL3
STRAPL2
VCC3
3
depop for B0
R265 100K/6
R264 100K/6
AG8
AG7
AG6
AF3
AC5
SR_G0_B_ACK64_L SR_G0_B_REQ64_L
P5
G0_B_SR_PCLK4
AF9
G0_B_SR_PCLK3
AH7
G0_B_SR_PCLK2
AH6
G0_B_SR_PCLK1
AF4
G0_B_SR_PCLK0 G0_B_PCLK0
AC6
G0_B_PCIX_RESET_L
AD1
G0_B_FBCLK_SR
AE7
SR_G0_B_AD0
P4
SR_G0_B_AD1
P3
SR_G0_B_AD2
P2
SR_G0_B_AD3
P1
SR_G0_B_AD4
R1
SR_G0_B_AD5
R2
SR_G0_B_AD6
R3
SR_G0_B_AD7
R4
SR_G0_B_AD8
R6
SR_G0_B_AD9
T1
SR_G0_B_AD10
T5
SR_G0_B_AD11
U1
SR_G0_B_AD12
U2
SR_G0_B_AD13
U3
SR_G0_B_AD14
U4
SR_G0_B_AD15
U5
SR_G0_B_AD16
Y2
SR_G0_B_AD17
Y3
SR_G0_B_AD18
Y4
SR_G0_B_AD19
Y5
SR_G0_B_AD20
Y6
SR_G0_B_AD21
AA1
SR_G0_B_AD22
AA2
SR_G0_B_AD23
AA3
SR_G0_B_AD24
AA5
SR_G0_B_AD25
AA6
SR_G0_B_AD26
AB1
SR_G0_B_AD27
AB3
SR_G0_B_AD28
AB5
SR_G0_B_AD29
AC1
SR_G0_B_AD30
AC2
SR_G0_B_AD31
AC3
SR_G0_B_AD32
F4
SR_G0_B_AD33
F3
SR_G0_B_AD34
F2
SR_G0_B_AD35
F1
SR_G0_B_AD36
G5
SR_G0_B_AD37
G3
SR_G0_B_AD38
G1
SR_G0_B_AD39
H6
SR_G0_B_AD40
H5
SR_G0_B_AD41
H4
SR_G0_B_AD42
H3
SR_G0_B_AD43
H2
SR_G0_B_AD44
H1
SR_G0_B_AD45
J6
SR_G0_B_AD46
J5
SR_G0_B_AD47
J4
SR_G0_B_AD48
J3
SR_G0_B_AD49
J2
SR_G0_B_AD50
J1
SR_G0_B_AD51
K5
SR_G0_B_AD52
K3
SR_G0_B_AD53
K1
SR_G0_B_AD54
L6
SR_G0_B_AD55
L5
SR_G0_B_AD56
L4
SR_G0_B_AD57
L3
SR_G0_B_AD58
L2
SR_G0_B_AD59
L1
SR_G0_B_AD60
M6
SR_G0_B_AD61
M5
SR_G0_B_AD62
M4
SR_G0_B_AD63
M3
AE3
AF2
H25
B27
G0_B_HPSORLC
G0_B_GNT_L3
G0_B_GNT_L2
G0_B_GNT_L1
G0_B_GNT_L0
Place close to Golem
G0_P_CAL
G0_P_CAL_L
PCI-X IO Driver
Compensation Pins
R309 5.1K/6
R308 5.1K/6
GND
R140 33/6
R139 33/6
R859 33/6
R131 33/6
R279 33/6
R284 22/6
Match the flight times of the
FBCLK and the PCLK to the Slot
G0_B_FBCLK + G0_B_FBCLK_SR = G0_B_PCLK(0) + 2.5"
G0_B_AD[63..0]
G0_B_CBE_L[7..0]
3
Default setting:
PCIX/66 MHz
G0_B_GNT_L3 41 G0_B_REQ_L3 41
G0_B_GNT_L1 42
G0_B_GNT_L0 62
G0_B_PCLK_RISER2
G0_B_PCLK_RISER1
G0_B_PCLKLAN
G0_B_PCLK1
G0_B_PCIX_RESET_L 38
V0.2 Hotplug
mode strapping
wrong/ R287
From 100K to
4.7K
Selects non hot plug
PCI(X) Mode and Freq.
G0_B_FBCLK
BRIDGE B
HOT PLUG MODE
(see table)
BRIDGE B
VCC3
R292
5.1K/6
G0_B_PCIXCAP
C314
0.1U/6
GND GND
VCC3
R300
20/6/1
R305
24.9/6/1/X
GND GND
G0_B_FRAME_L
G0_B_TRDY_L
G0_B_IRDY_L
G0_B_DEVSEL_L
G0_B_STOP_L
G0_B_PERR_L
G0_B_SERR_L
G0_B_PAR
G0_B_M66EN
G0_B_PCIXCAP
G0_B_PAR64
G0_B_ACK64_L
G0_B_REQ64_L
G0_B_INTD_L
G0_B_INTC_L
G0_B_INTB_L
G0_B_INTA_L
(see table)
BRIDGE B
Selects non hot plug
PCI(X) Mode and Freq.
G0_B_PCLK_RISER2 41
G0_B_PCLK_RISER1 41
G0_B_PCLKLAN 62
G0_B_PCLK1 41
G0_B_PCLK0 42
Pullup to 3.3V = hot plug enabled
G0_B_HPSIL_L
Pulldown = hot plug mode is not enabled
R42
JP2
5.1K/6
1
2
3
H1X3/1-2[B]
R295
5.1K/6
VCC3
R301
24.9/6/1/X
R304
24.9/6/1
C318
1000P/6/X
G0_B_AD[63..0] 41,42,62
G0_B_CBE_L[7..0] 41,42,62
G0_B_FRAME_L 41,42,62
G0_B_TRDY_L 41,42,62
G0_B_IRDY_L 41,42,62
G0_B_DEVSEL_L 41,42,62
G0_B_STOP_L 41,42,62
G0_B_PERR_L 41,42,62
G0_B_SERR_L 41,42,62
G0_B_PAR 41,42,62
G0_B_M66EN 41,42,62
G0_B_PCIXCAP 41,42
G0_B_PAR64 41,42,62
G0_B_ACK64_L 41,42,62
G0_B_REQ64_L 41,42,62
G0_B_INTD_L 41,42
G0_B_INTC_L 41,42
G0_B_INTB_L 41,42,62
G0_B_INTA_L 41,42,62
VCC3
R271 8.2K/6/X
R274
GND
VCC3
R286
8.2K/6/X
R287
8.2K/6
GND
SR_G0_B_M66EN
C319
1000P/6/X
8.2K/6
VCC3
GND
R293
5.1K/6
C313
0.1U/6
Pulldown =
(Isolation FETs for
Hot Plug NOT used)
2
Hot Plug Single Slot
bridge B only
Pullup = HP si n gl e sl o t no t supported
VCC3
R273
100K/6
G0_B_GNT_L2 41
R276
100K/6/X
GND
HP single slot supported
BRIDGE A
HOT PLUG MODE setting
Pullup to 3.3V = hot plug enabled
VCC3
G0_B_HPSOD
GND
Pulldown = hot plug mode is not enabled
G0_B_FRAME_L
G0_B_TRDY_L
G0_B_IRDY_L
G0_B_DEVSEL_L
G0_B_STOP_L
G0_B_PERR_L
G0_B_SERR_L
G0_B_PAR
2
VCC3
R272
8.2K/6
JP7
G0_B_GNT_L3
DEFAULT:1-2
SHORT
R289
8.2K/6/X
R291
8.2K/6
RP328 8P4R-10
1
3
5
7
RP329 8P4R-10
1
3
5
7
RP106 8P4R-10
G0_B_AD63
1
G0_B_AD62
3
G0_B_AD61
5
G0_B_AD60
7
RP107 8P4R-10
G0_B_AD59
1
G0_B_AD58
3
G0_B_AD57
5
G0_B_AD56
7
RP108 8P4R-10
G0_B_AD55
1
G0_B_AD54
3
G0_B_AD53
5
G0_B_AD52
7
RP109 8P4R-10
G0_B_AD51
1
G0_B_AD50
3
G0_B_AD49
5
G0_B_AD48
7
RP110 8P4R-10
G0_B_AD47
1
G0_B_AD46
3
G0_B_AD45
5
G0_B_AD44
7
RP111 8P4R-10
G0_B_AD42
1
G0_B_AD43
3
G0_B_AD41
5
G0_B_AD40
7
RP112 8P4R-10
G0_B_AD39
1
G0_B_AD38
3
G0_B_AD37
5
G0_B_AD36
7
RP113 8P4R-10
G0_B_AD34
1
G0_B_AD35
3
G0_B_AD33
5
G0_B_AD32
7
RP114 8P4R-10
G0_B_CBE_L7
1
G0_B_CBE_L6
3
G0_B_CBE_L5 SR_G0_B_CBE_L5
5
G0_B_CBE_L4
7
1
2
3
H1X3/1-2[B]
R275
8.2K/6
GND
SR_G0_B_FRAME_L
2
SR_G0_B_TRDY_L
4
SR_G0_B_IRDY_L
6
SR_G0_B_DEVSEL_L
8
SR_G0_B_STOP_L
2
SR_G0_B_PERR_L
4
SR_G0_B_SERR_L
6
SR_G0_B_PAR
8
SR_G0_B_AD63
2
SR_G0_B_AD62
4
SR_G0_B_AD61
6
SR_G0_B_AD60
8
SR_G0_B_AD59
2
SR_G0_B_AD58
4
SR_G0_B_AD57
6
SR_G0_B_AD56
8
SR_G0_B_AD55
2
SR_G0_B_AD54
4
SR_G0_B_AD53
6
SR_G0_B_AD52
8
SR_G0_B_AD51
2
SR_G0_B_AD50
4
SR_G0_B_AD49
6
SR_G0_B_AD48
8
SR_G0_B_AD47
2
SR_G0_B_AD46
4
SR_G0_B_AD45
6
SR_G0_B_AD44
8
SR_G0_B_AD42
2
SR_G0_B_AD43
4
SR_G0_B_AD41
6
SR_G0_B_AD40
8
SR_G0_B_AD39
2
SR_G0_B_AD38
4
SR_G0_B_AD37
6
SR_G0_B_AD36
8
SR_G0_B_AD34
2
SR_G0_B_AD35
4
SR_G0_B_AD33
6
SR_G0_B_AD32
8
SR_G0_B_CBE_L7
2
SR_G0_B_CBE_L6
4
6
SR_G0_B_CBE_L4
8
GIGABYTE THCHNOLOGIES , INC.
Title
Size Document Number Rev
C
Date: Sheet
1
R19 10/6
R20 10/6
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
SR_G0_B_M66EN
SR_G0_B_PCIXCAP
SR_G0_B_PAR64
2
SR_G0_B_ACK64_L
4
SR_G0_B_REQ64_L
6
8
SR_G0_B_INTD_L
2
SR_G0_B_INTC_L
4
SR_G0_B_INTB_L
6
SR_G0_B_INTA_L
8
SR_G0_B_AD31
2
SR_G0_B_AD30
4
SR_G0_B_AD29
6
SR_G0_B_AD28
8
SR_G0_B_AD27
2
SR_G0_B_AD26
4
SR_G0_B_AD25
6
SR_G0_B_AD24
8
SR_G0_B_AD23
2
SR_G0_B_AD22
4
SR_G0_B_AD21
6
SR_G0_B_AD20
8
SR_G0_B_AD19
2
SR_G0_B_AD18
4
SR_G0_B_AD17
6
SR_G0_B_AD16
8
SR_G0_B_AD15
2
SR_G0_B_AD14
4
SR_G0_B_AD13
6
SR_G0_B_AD12
8
SR_G0_B_AD11
2
SR_G0_B_AD10
4
SR_G0_B_AD9
6
SR_G0_B_AD8
8
SR_G0_B_AD7
2
SR_G0_B_AD6
4
SR_G0_B_AD5
6
SR_G0_B_AD4
8
2
SR_G0_B_AD2
4
SR_G0_B_AD1
6
SR_G0_B_AD0
8
SR_G0_B_CBE_L3
2
SR_G0_B_CBE_L2
4
SR_G0_B_CBE_L1
6
SR_G0_B_CBE_L0
8
G0_B_M66EN
G0_B_PCIXCAP
RP327 8P4R-10
G0_B_PAR64
G0_B_ACK64_L
G0_B_REQ64_L
RP322 8P4R-10
G0_B_INTD_L
G0_B_INTC_L
G0_B_INTB_L
G0_B_INTA_L
RP326 8P4R-10
G0_B_AD31
G0_B_AD30
G0_B_AD29
G0_B_AD28
RP324 8P4R-10
G0_B_AD27
G0_B_AD26
G0_B_AD25
G0_B_AD24
RP325 8P4R-10
G0_B_AD23
G0_B_AD22
G0_B_AD21
G0_B_AD20
RP323 8P4R-10
G0_B_AD19
G0_B_AD18
G0_B_AD17
G0_B_AD16
RP320 8P4R-10
G0_B_AD15
G0_B_AD14
G0_B_AD13
G0_B_AD12
RP321 8P4R-10
G0_B_AD11
G0_B_AD10
G0_B_AD9
G0_B_AD8
RP319 8P4R-10
G0_B_AD7
G0_B_AD6
G0_B_AD5
G0_B_AD4
RP318 8P4R-10
G0_B_AD3 SR_G0_B_AD3
G0_B_AD2
G0_B_AD1
G0_B_AD0
RP317 8P4R-10
G0_B_CBE_L3
G0_B_CBE_L2
G0_B_CBE_L1
G0_B_CBE_L0
AMD-8131 Golem Bridge B
GA-7A8DRL
1
39 81 Thursday, November 10, 2005
2.0
of
VSS1
A26A4A5
L15
L23
VDD18_51
VDD18_52
VSS2
VSS3
5
C422 10U/12
C321 0.22U/6/B
C324 0.22U/6/B
C327 0.22U/6
C329 0.22U/6
C333 0.01U/6/B
C336 0.01U/6/B
C340 0.01U/6
C344 0.01U/6
L28
M12
M14
M16
VDD18_53
VDD18_54
VDD18_55
VDD18_56
VSS4
VSS5
VSS6
VSS7
AA10
AA12
AA14
AA16
M22
AA18
VDD18_57
VSS8
M26
AA20
VDD18_58
VSS9
N13
AA22
VDD18_59
VSS10
N15
VDD18_60
VSS11
AA28
N17
AA8
N19
VDD18_61
VSS12
AB11
N21
VDD18_62
VSS13
AB13
N23
VDD18_63
VSS14
AB15
P12
VDD18_64
VSS15
AB17
P14
VDD18_65
VSS16
AB19
P16
VDD18_66
VSS17
AB2
P18
VDD18_67
VDD18_68
VSS18
VSS19
AB21
P20
AB23
P22
VDD18_69
VSS20
AB26
R13
VDD18_70
VSS21
AB7
VLDT_1D2V
R15
R17
R19
VDD18_71
VDD18_72
VDD18_73
VSS22
VSS23
VSS24
AB9
AC10
AC12
C423 10U/12
C323 0.22U/6/B
C326 0.22U/6/B
C335 1000P/6/B
C338 1000P/6/B
C342 1000P/6/B
C346 1000P/6/B
R21
R23
R28
VDD18_74
VDD18_75
VDD18_76
VDD18_77
VSS25
VSS26
VSS27
VSS28
AC14
AC16
AC18
T12
AC20
T14
VDD18_78
VSS29
AC22
T16
VDD18_79
VSS30
AC8
T18
VDD18_80
VSS31
AD15
T20
VDD18_81
VSS32
AD21
GND GND GND
T22
VDD18_82
VSS33
AD8
T26
VDD18_83
VSS34
AE10
VDD18_84
VSS35
U13
VDD18_85
VSS36
AE2
U15
AE26
U17
VDD18_86
VSS37
AE27
U19
VDD18_87
VSS38
AE28
VDD_1D8V VCC3
C419 10U/12
C420 4.7U/12
C421 4.7U/12
C328 0.22U/6/B
C330 0.22U/6/B
C331 0.22U/6/B
C332 0.22U/6/B
C339 0.01U/6/B
C343 0.01U/6/B
D D
AA23
AC28
AD26
C C
B B
U19D
VDD18_1
VDD18_2
VDD18_3
B12
VDD18_4
B16
VDD18_5
B20
VDD18_6
B24
VDD18_7
B8
VDD18_8
D11
VDD18_9
D15
VDD18_10
D19
VDD18_11
D23
VDD18_12
D7
VDD18_13
F10
VDD18_14
F12
VDD18_15
F14
VDD18_16
F16
VDD18_17
F18
VDD18_18
F20
VDD18_19
F22
VDD18_20
F24
VDD18_21
F8
VDD18_22
G11
VDD18_23
G13
VDD18_24
G15
VDD18_25
G17
VDD18_26
G19
VDD18_27
G21
VDD18_28
G23
VDD18_29
G28
VDD18_30
G7
VDD18_31
G9
VDD18_32
H12
VDD18_33
H14
VDD18_34
H16
VDD18_35
H20
VDD18_36
H22
VDD18_37
H26
VDD18_38
H8
VDD18_39
J13
VDD18_40
J15
VDD18_41
J19
VDD18_42
J21
VDD18_43
J23
VDD18_44
K12
VDD18_45
K14
VDD18_46
K16
VDD18_47
K20
VDD18_48
K22
VDD18_49
L13
VDD18_50
VDD18_88
VSS39
U21
VDD18_89
VSS40
AE29
VDD_1D8V
U23
V12
VDD18_90
VSS41
AF10
AG10
V14
VDD18_91
VSS42
AH10
V16
VDD18_92
VSS43
AH12
V22
VDD18_93
VSS44
AH15
W23
VDD18_94
VSS45
AH18
4
W28
VDD18_95
VSS46
AH2
Y24
VDD18_96
VSS47
AH21
Y26
VDD18_97
VSS48
AH24
VDD18_98
VSS49
AH27
VSS50
AH5
AA11
VSS51
AH8
AA13
VDD33_1
VSS52
AH9
VCC3
AA15
VDD33_2
VSS53
B10
VDD33_3
VSS54
AA17
AA19
AA21
AA7
AA9
VDD33_4
VDD33_5
VDD33_6
VDD33_7
VDD33_8
VSS55
VSS56
VSS57
VSS58
VSS59
B14
B18
B22
B26B3B5B6C1C2C26C4C5
AB10
VDD33_9
VSS60
AB12
AB14
VDD33_10
VSS61
AB16
VDD33_11
VSS62
AB18
VDD33_12
VSS63
AB20
VDD33_13
VSS64
AB22
VDD33_14
VSS65
AB4
VDD33_15
VSS66
D13
AB6
VDD33_16
VSS67
D17
AB8
VDD33_17
VSS68
D21
AC11
VDD33_18
VSS69
D25
AC13
VDD33_19
VSS70
D26
VDD33_20
VSS71
AC15
AC17
AC19
VDD33_21
VDD33_22
VDD33_23
VSS72
VSS73
VSS74
D28
D29D3D5D9E26
AC21
AC23
VDD33_24
VSS75
AC7
VDD33_25
VSS76
AC9
VDD33_26
VSS77
E27
AD12
VDD33_27
VSS78
E28E5F11
AD18
VDD33_28
VSS79
AD24
VDD33_29
VSS80
AE4
VDD33_30
VSS81
F13
AF12
VDD33_31
VSS82
F15
AF15
VDD33_32
VSS83
F17
AF18
VDD33_33
VSS84
F19
AF21
VDD33_34
VSS85
F21
VDD33_35
VSS86
3
AF24
AF27
VDD33_36
VDD33_37
VSS87
VSS88
F23
F26F6F7F9G10
AF5
AF8
VDD33_38
VSS89
VDD_1D8V
EC76 1000U/6.3V/8X11.5/KZG
C428 4.7U/12
C426 4.7U/12
C427 4.7U/12
AG3G4J7J9K4K6K8L7L9
VDD33_39
VDD33_40
VDD33_41
VDD33_42
VDD33_43
VDD33_44
VDD33_45
VDD33_46
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
G12
G14
G16
G18G2G20
+
GND
M10M8N11N4N7N9P10P8R11R7R9
VDD33_47
VDD33_48
VDD33_49
VDD33_50
VDD33_51
VDD33_52
VDD33_53
VDD33_54
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
G22
G27G6G8
H11
H13
H15
VDD33_55
VSS106
H17
VDD33_56
VSS107
H19
H21
VDD33_57
VDD33_58
VSS108
VSS109
H23H7H9
VCC3
T10T4T6T8U11U7U9
VDD33_59
VDD33_60
VSS110
VSS111
+
EC80 1000U/6.3V/8X11.5/KZG
C425 4.7U/12
C424 4.7U/12
VDD33_63
VDD33_64
VSS114
VSS115
J16
VDD33_65
VSS116
J18
VDD33_66
VSS117
J20
V10V8W11
VDD33_67
VSS118
J22
J24
VDD33_68
VDD33_69
VSS119
VSS120
J28J8K11
W13
VDD33_70
VSS121
GND
W15
VDD33_71
VSS122
W17W4W7W9Y10
VDD33_72
VSS123
K13
Near package
VDD33_61
VDD33_62
VSS112
VSS113
J10
J12
J14
2
C429
VSS151
VSS152
N14
VSS153
N16
VSS154
N18N2N20
VSS155
VSS156
TP118
AG4
VDDFB_H
VSS157
N22
VDD_1D8V
0/6/X
TP119
AG5
VDDFB_L
VSS158
VSS159
N28N6N8
R313
TP120
AH3
VDD3FB_H
VSS160
VCC3_DUAL
TP121
AH4
VDD3FB_L
VSS161
VSS162
P11
P13
P15
GND
H24
VDD33AUX
VSS163
VDDA_1D8V
0/6
GND
VDDA18_1
VSS141
VSS142
M13
VSS143
M15
30mA
VDDA_G0
C349
3300pF/6
VSS144
VSS145
M17
M19
VSS146
M21
VSS147
M23M7M9
R312
C350
0.22U/6
VSS148
VSS149
V_PLL_1D8V
FB3
FB600/8
4.7U/12
VSS150
N10
N12
500-750 mils long, 50 mils wide
500 mils long, 50mils wide BETWEEN PAIRS
C348
0.1U/6
GND
AG29
Y22
VDD33_82
VSS133
L10
Y8
VDD33_83
VSS134
L12
VSS135
L14
VSS136
L16
VSS137
L18
VSS138
L20
VSS139
L22L8M11
AF29
VDDA18_0
VSS140
VDD33_73
VSS124
K15
VDD33_74
VSS125
K17
VDD33_75
VDD33_76
VSS126
VSS127
K19K2K21
Y12
VDD33_77
VSS128
Y14
VDD33_78
VSS129
K23
Y16
Y18
VDD33_79
VSS130
K26K7K9
Y20
VDD33_80
VDD33_81
VSS131
VSS132
1
PLACE UNDER
PACKAGE
50 MIL SPACING
C347
0.1U/6/B
VSS226
VSS225
VSS224
VSS223
VSS222
VSS221
VSS220
VSS219
VSS218
VSS217
VSS216
VSS215
VSS214
VSS213
VSS212
VSS211
VSS210
VSS209
VSS208
VSS207
VSS206
VSS205
VSS204
VSS203
VSS202
VSS201
VSS200
VSS199
VSS198
VSS197
VSS196
VSS195
VSS194
VSS193
VSS192
VSS191
VSS190
VSS189
VSS188
VSS187
VSS186
VSS185
VSS184
VSS183
VSS182
VSS181
VSS180
VSS179
VSS178
VSS177
VSS176
VSS175
VSS174
VSS173
VSS172
VSS171
VSS170
VSS169
VSS168
VSS167
VSS166
VSS165
VSS164
POWER/GROUND
AMD-8131
Y9
Y7
Y23
Y21
Y19
Y17
Y15
Y13
Y11
W8
W6
W22
W20
W2
W18
W16
W14
W12
W10
V9
V7
V26
V23
V21
V19
V17
V15
V13
V11
U8
U28
U22
U20
U18
U16
U14
U12
U10
T9
T7
T23
T21
T2
T19
T17
T15
T13
T11
R8
R22
R20
R18
R16
R14
R12
R10
P9
P7
P26
P23
P21
P19
P17
GND
ALL COMPONENTS PLACED AS CLOSE AS POSSIBLE TO G0 VDDA BEAD
+12V
C549
2.2uF/8
VDDA_1D8V
C382
39pF/6
C383
C543
1000P/6
10U/12
GIGABYTE THCHNOLOGIES , INC.
Title
Size Document Number Rev
Date: Sheet
AMD-8131 Golem Decoupling
C
GA-7A8DRL
1
2.0
of
40 81 Thursday, November 10, 2005
C381
0.01U/6
GND
R314
10K/6
R315
Q44
2
VDD_1D8V
C351 0.22U/6
C355 0.22U/6/B
C379 1000P/6
C384 1000P/6/B
A A
VCC3
C352 0.22U/6/B
C356 0.22U/6/B
C358 0.22U/6/B
C380 1000P/6/B
C385 1000P/6/B
C387 1000P/6/B
GND
5
U999
1 2
12
GOLEM_HEATSINK
GND
VDDA_1D8V_EN 61
2N7002
NEW VDDA CKT
4
Q45
3
D
GS
2
1
R318
10K/6
GND
1K/6
VCC3
3
1
SOT23
VDD_POUR_G0_VDDA
3
2N3906/SOT23
Can supply up to ~100mA
RP105
1
2
3
4
5
6
7
8
8P4R-82
Q46
SC431L/1.25V/SOT23
Vo=Vref(1+R316/R317)
=1.24(1+249/562)
=1.8
CAR
R316
249/6/1
V_1.8VAREF
R317
562/6/1
2
5
4
3
2
1
VCC3
VCC
G0_B_AD62
G0_B_AD60
G0_B_AD58
G0_B_AD56
G0_B_AD54
G0_B_AD52
G0_B_AD50
G0_B_AD48
G0_B_AD46
G0_B_AD44
G0_B_AD42
G0_B_AD40
G0_B_AD38
G0_B_AD36
G0_B_AD34
G0_B_AD32
GND
R1026
5.1K/6
G0_B_INTB_L
G0_B_INTD_L
VCC3AUX_PCIX1
G0_B_RST_SLOT2_L
G0_B_GNT_L2
G0_B_AD30
G0_B_AD28
G0_B_AD26
G0_B_AD24
G0_B_SR_AD21
G0_B_AD22
G0_B_AD20
G0_B_AD18
G0_B_AD16
G0_B_FRAME_L
G0_B_TRDY_L
G0_B_STOP_L
PCI_SCL
PCI_SDA
G0_B_PAR
G0_B_AD15
G0_B_AD13
G0_B_AD11
G0_B_AD9
G0_B_CBE_L0
G0_B_AD6
G0_B_AD4
G0_B_AD2
G0_B_AD0
G0_B_REQ64_L
VCC3
+12V
R1027
5.1K/6
G0_B_INTB_L 39,42,62
G0_B_INTD_L 39,42
G0_B_PCLK_RISER2 39
G0_B_GNT_L3 39
G0_B_RST_SLOT2_L 38
G0_B_GNT_L2 39
0/6
R722
R1030
G0_B_AD21
100/6
G0_B_FRAME_L 39,42,62
G0_B_TRDY_L 39,42,62
G0_B_STOP_L 39,42,62
G0_B_PAR 39,42,62
G0_B_CBE_L0 39,42,62
G0_B_REQ64_L 39,42,62
G0_B_CBE_L7 39,42,62
G0_B_CBE_L5 39,42,62
G0_B_PAR64 39,42,62
COPEN- 53
R866
5.1K/6
R723 0/8
PME_L
PME_L 42,43,44,46,50,58,62,70,75
PCI_SCL 42,43,44,50,75
PCI_SDA 42,43,44,50,75
2
VCC3_DUAL
GIGABYTE THCHNOLOGIES , INC.
Title
Size Document Number Rev
Custom
Date: Sheet
Golem PCI-X_B_Slot 1
GA-7A8DRL
1
of
41 81 Thursday, November 10, 2005
2.0
VCC3
G0_B_AD[63..0] 39,42,62
4 4
GND
G0_B_INTC_L 39,42
G0_B_INTA_L 39,42,62
G0_B_REQ_L3 39
G0_B_PCLK_RISER1 39
G0_B_PCLK1 39
G0_B_REQ_L2 39
3 3
G0_B_PCIXCAP 39,42
C1186
0.01U/6
GND
G0_B_M66EN 39,42,62
2 2
1 1
-12V
R1028
5.1K/6
R1029 0/6
G0_B_CBE_L3 39,42,62
G0_B_CBE_L2 39,42,62
G0_B_IRDY_L 39,42,62
G0_B_DEVSEL_L 39,42,62
G0_B_LOCK_L 42,62
G0_B_PERR_L 39,42,62
G0_B_SERR_L 39,42,62
G0_B_CBE_L1 39,42,62
Place close to slot
C1187
0.01U/6
GND
G0_B_ACK64_L 39,42,62
G0_B_CBE_L6 39,42,62
G0_B_CBE_L4 39,42,62
R724
5.1K/6
G0_B_INTC_L
G0_B_INTA_L
C1184
0.01U/6
G0_B_PCIX_PCLK1
R725
5.1K/6
C1185
0.01U/6
G0_B_REQ_L2
G0_B_AD31
G0_B_AD29
G0_B_AD27
G0_B_AD25
G0_B_CBE_L3
G0_B_AD23
G0_B_AD21
G0_B_AD19
G0_B_AD17
G0_B_CBE_L2
G0_B_IRDY_L
G0_B_DEVSEL_L
G0_B_LOCK_L
G0_B_PERR_L
G0_B_SERR_L
G0_B_CBE_L1
G0_B_AD14
G0_B_AD12
G0_B_AD10
G0_B_M66EN
G0_B_AD8
G0_B_AD7
G0_B_AD5
G0_B_AD3
G0_B_AD1
G0_B_ACK64_L
G0_B_CBE_L6
G0_B_CBE_L4
G0_B_AD63
G0_B_AD61
G0_B_AD59
G0_B_AD57
G0_B_AD55
G0_B_AD53
G0_B_AD51
G0_B_AD49
G0_B_AD47
G0_B_AD45
G0_B_AD43
G0_B_AD41
G0_B_AD39
G0_B_AD37
G0_B_AD35
G0_B_AD33
VCC
VCC3
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
B67
B68
B69
B70
B71
B72
B73
B74
B75
B76
B77
B78
B79
B80
B81
B82
B83
B84
B85
B86
B87
B88
B89
B90
B91
B92
B93
B94
PCI-X_1
-12V
TCK
GND
TDO
+5V
+5V
P64INTB
P64INTD
PRSNT1RSV
PRSNT2-
RSV
GND
CLK
GND
REQ+VIO
AD(31)
AD(29)
GND
AD(27)
AD(25)
+3.3V
C/BE-(3)
AD(23)
GND
AD(21)
AD(19)
+3.3V
AD(17)
C/BE-(2)
GND
IRDY+3.3V
DEVSELGND
LOCKPERR+3.3V
SERR+3.3V
C/BE-(1)
AD(14)
GND
AD(12)
AD(10)
GND/M66EN
GND
GND
AD(8)
AD(7)
+3.3V
AD(5)
AD(3)
GND
AD(1)
+VIO
ACK64+5V
+5V
RSV
GND
C/BE-(6)
C/BE-(4)
GND
AD(63)
AD(61)
+VIO
AD(59)
AD(57)
GND
AD(55)
AD(53)
GND
AD(51)
AD(49)
+VIO
AD(47)
AD(45)
GND
AD(43)
AD(41)
GND
AD(39)
AD(37)
+VIO
AD(35)
AD(33)
GND
RSV
RSV
GND
KEY
A1
TRST-
A2
+12V
A3
TMS
A4
TDI
A5
+5V
A6
P64INTA
A7
P64INTC
A8
+5V
A9
RSV
A10
+VIO
A11
RSV
A14
+3.3VAUX
A15
RESET-
A16
+VIO
A17
GNT-
GND
PME#
AD(30)
+3.3V
AD(28)
AD(26)
GND
AD(24)
IDSEL
+3.3V
AD(22)
AD(20)
GND
AD(18)
AD(16)
+3.3V
FRAME-
GND
TRDY-
GND
STOP-
+3.3V
SDONE
SBO-
GND
AD(15)
+3.3V
AD(13)
AD(11)
GND
AD(09)
GND
GND
C/BE-(0)
+3.3V
AD(06)
AD(04)
GND
AD(02)
AD(00)
+VIO
REQ64-
GND
C/BE-(7)
C/BE-(5)
+VIO
PAR64
AD(62)
GND
AD(60)
AD(58)
GND
AD(56)
AD(54)
+VIO
AD(52)
AD(50)
GND
AD(48)
AD(46)
GND
AD(44)
AD(42)
+VIO
AD(40)
AD(38)
GND
AD(36)
AD(34)
GND
AD(32)
GND
PAR
RSV
RSV
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
+5V
A62
+5V
A63
A64
A65
A66
A67
A68
A69
A70
A71
A72
A73
A74
A75
A76
A77
A78
A79
A80
A81
A82
A83
A84
A85
A86
A87
A88
A89
A90
A91
A92
A93
A94
PCI64CON
PCI64CON_3.3V
GND GND
5
4
3
Thor Miscellaneous Interfaces
USBOC- 51
NOTE: For USB 1.1, NOPOP FB and
use 10K resistor in place of 0.01uF cap.
R467
8.2K/6
VCC3_DUAL
GND
PSOUT_L 53
PWRBTN 53,58,75
D1
D3
RB751V-40
FB5 FB30/8
FB6 FB30/8
C485 15pF/NPO/6
GND
GND
C486 15pF/NPO/6
S3_PLL_LF
C489
1200pF/6
S3_PLL_LF_VSS
R1701
R1408 0/6
RB751V-40
1 2
1 2
VDD_1D8V_DUAL
LAYOUT: Place S3_PLL_LF
circuit less than 1 in. from Thor.
SR_S3_PLL_LF
C488
0.022U/6
P1_THERMTRIP_L 23,75
P0_THERMTRIP_L 7,75
R745
USB_18VDD_IOH
C375
C374
4.7U/12
0.1U/6
GND
C483
1U/6
GND
X1
32.768K/15P/20ppm/D/WIRE
0/6/B/X
THERMTRIP_IOH_L
VDD_2D5V
R477
1K/6/X
THERMTRIP_CPU_L
0/6
C373
0.01U/6
GND GND
USB_VDD_IOH
GND
VDD_RTC
R471 1M/6
VCC3
R1585 10K/6/B
R1586 10K/6/B
VCC3
R474
1K/6
SOT23
132
VCC3
R744
1K/6
USBOC_SR
USBCLK 57
USB1_USBP2 51
USB1_USBN2 51
USB1_USBP1 51
USB1_USBN1 51
USB1_USBP0 51
USB1_USBN0 51
LAYOUT: One 0.01uF
cap goes on bottom.
USB0_USBP2 51
USB0_USBN2 51
USB0_USBP1 51
USB0_USBN1 51
USB0_USBP0 51
USB0_USBN0 51
R452 3.09K/6/1
TP190
TP191
VSB_RTC_IN
VSB_RTC_OUT
LPCPME_L 45,53
-IPMI_SMI 75
GPIO10 58
RI- 58
IRQ15 52
IRQ14 52
GPIO15 56
GPO11 56
A20GATE 53
KBRST- 53
SLPBTN_L 58
ALL_PG_SB 58
PME_L 41,42,43,44,50,58,62,70,75
-OVT 74
SMB_ALERT_SB 75
FET_SMBUSC_0 75
FET_SMBUSD_0 75
近
CPU SIDE
Q62
MMBT2222A/SOT23
R478
1K/6
BIT_ACCLK
AC_SDIN0
ACSDI1
ACRTST_IN1
ACRTST_IN0
USBCLK
USB1_USBP2
USB1_USBN2
USB1_USBP1
USB1_USBN1
USB1_USBP0
USB1_USBN0
USBOC_SR
USB0_USBP2
USB0_USBN2
USB0_USBP1
USB0_USBN1
USB0_USBP0
USB0_USBN0
USBOC_SR
USB_VREF
1
USB_REXT
USB_IBIAS
1
LPCPME_L
ACAV
CLKRUN_L
-IPMI_SMI
THERMTRIP_IOH_L
THRMOGPIO10
CASEOPEN_L
LID
RI-
IRQ15
IRQ14
GPIO15
GPO11
A20GATE
KBRSTSLPBTN_L
PSOUT_L_T26
ALL_PG_SB
PME_L
PNPIRQ2
-OVT
GPIO19
PRDY
S3_PLL_LF
SMB_ALERT_1
SMB_ALERT_SB
FET_SMBUSC_1
FET_SMBUSC_0
FET_SMBUSD_1
FET_SMBUSD_0
TEST_L
VDD_2D5V
AB16
AF24
AD23
AD20
AB21
AF14
G23
G26
G24
W26
G22
AD17
AF18
AF16
W25
AC14
AF15
AE15
F26
F25
E25
E24
D26
D25
H23
K22
L22
J25
J26
K24
K25
L25
L26
H26
H24
J23
N25
N23
U25
R26
N24
U23
C8
A14
E22
A22
B24
C21
A25
C22
T26
R24
P26
Y25
E21
N26
P25
U26
T25
V26
P22
U22
N22
F22
ACCLK
ACSDI0
ACSDI1
IPB_IN1
IPB_IN0
USBCLK
USB1_USBP2
USB1_USBN2
USB1_USBP1
USB1_USBN1
USB1_USBP0
USB1_USBN0
USBOC1_L
USB_18VDD0
USB_18VDD1
USB0_USBP2
USB0_USBN2
USB0_USBP1
USB0_USBN1
USB0_USBP0
USB0_USBN0
USBOC0_L
USB_VDD0
USB_VDD1
USB_VREF
USB_REXT
USB_IBIAS
RTCX_IN
RTCX_OUT
BATLOW_L
ACAV
CLKRUN_L
EXTSMI_L
THERMTRIP_L
THERM_L
FANRPM
INTRUDER_L
LID
RI_L
IRQ15
IRQ14
IRQ12
IRQ6
IRQ1
INTIRQ8_L
KA20G
KBRC_L
SLPBTN_L
PWRBTN_L
PWROK
PME_L
PNPIRQ2
PNPIRQ1
PNPIRQ0
PRDY
S3_PLL_LF
S3_PLL_LF_VSS
SMBALERT1_L
SMBALERT0_L
SMBUSC_1
SMBUSC_0
SMBUSD_1
SMBUSD_0
TEST_L
AC97
IPB INTERFACE
USB
SYS MANG/MISC
MISC FUNCTIONAL BLOCKS
U21C
IPB_OUT1
IPB_OUT0
IPB_RST_L
IPB_RDFRAME
IPB_TDFRAME
IPB_RDCLK
IPB_TDCLK
CPUSLEEP_L
CPUSTOP_L
DCSTOP_L
AGPSTOP_L
FANCON1
FANCON0
PCISTOP_L
SUSPEND_L
PWRON_L
ACRST_L
ACSDO
ACSYNC
GPIO31
GPIO30
GPIO29
GPIO28
GPIO27
GPIO26
GPIO17
GPIO16
GPIO14
GPIO8
GPIO4
C32KHZ
SERIRQ
RESET_L
RPWRON
NC10
NC13
NC14
NC15
NC19
NC22
NC23
NC26
NC28
NC32
NC33
NC1
NC2
NC3
NC4
NC5
NC6
NC8
NC9
ACRST_L
AF23
AF19
AF20
ACRTST_OUT1
AB19
ACRTST_OUT0
AC20
ACRTST_RST_L
AE23
ACRTST_RDFRAME
AD21
ACRTST_TDFRAME
AF21
ACRTST_RDCLK
AB17
ACRTST_TDCLK
AC18
GPIO31
F23
GPIO30
AC17
GPIO29
E20
GPIO28
AF22
PCABLE_DET-
AD18
SCABLE_DET-
B26
GPIO17
AE21
GPIO16
AD19
GPIO14
P23
GPO8
C24
GPIO4
AD22
C32KHZ
W24
-HM_SMI
AE17
GPO7
AF17
DCSTOP_L
T23
GPO1
AE18
GPIO9
AD16
FANCON0_IOH
AC15
SERIRQ
C23
RESET_L
Y26
PCISTOP_L
AE14
SUSPEND_L
V24
PWRON_IOH_L
U24
RPWRON
T24
NC1_IOH
H1
NC2_IOH
J1
NC3_IOH
M1
NC4_IOH
N1
NC5_IOH
K2
NC6_IOH
P2
NC8_IOH S3_PLL_LF_VSS
K3
NC9_IOH
P3
NC10_IOH
U4
NC13_IOH
E3
NC14_IOH
AB20
NC15_IOH
T22
NC19_IOH
U3
NC22_IOH
F5
NC23_IOH
G5
NC26_IOH
E6
NC28_IOH
A1
NC32_IOH
A2
NC20_IOH
H22
R81
0/6/X
R453 0/6
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
TP133
TP134
TP135
TP185
1
TP186
1
TP187
1
TP188
1
TP189
1
PCABLE_DET- 52
SCABLE_DET- 52
NMI_SW- 58
WDTGPIO
SUSCLK 61
-HM_SMI 74,75
GPO7 56
TP192
GPO1 58
TP193
SERIRQ 53,75
RESET_L 61
TP194
GPO25 58
RPWRON 61
TP195
TP196
TP197
TP198
TP199
TP200
TP201
TP202
TP203
TP204
TP205
TP206
TP207
TP208
TP209
TP210
TP211
TP212
TP213
VCC3
C778 0.1U/6
GND
VCC_DUAL
MEMRST default Low until BIOS
set GPIOI or GPIO II high
GPIO I:Normal Power plane for Opteron Rev. B
GPIO II:Dual Power plane for Opteron Rev. C
GPIO19
GPIO_PORT1
1
R214
Q39
2N7002
3 4
5 6
7 8
H2X5/BOXED/X
2
10 9
SENSOR_SCL 53,58,74,75
SENSOR_SDA 53,58,74,75
VCC_DUAL
R464
1K/6
132
GPIO1_MEMRST 10
GPIO30
GPIO28
GPIO9 GPIO17
GND
R472
8.2K/6/X
R470 4.7K/6/X
R1407 0/6
VCC3_DUAL
4.7K/6
3
D
GS
2
1
GND
NOTE: Capacitor to GND on THERMTRIP_IOH_L is to prevent THERMTRIP_IOH_L sensitivity.
THERMTRIP_IOH_L
C490 0.1U/6
GND
GPO8
GPIO31
GPIO29
WDTGPIO
WDTGPIO 53
R148 0/6/X
R149 0/6/X
SMBUS1
1
2
3
4
H1X4/-PIN2
PWRON_IOH 53
Q61
MMBT2222A/SOT23/X
SOT23
GND
PWRON_ATX_L 45,53,61,76
VCC3_DUAL
R215
4.7K/6
3
Q40
D
2N7002
GS
2
GPIO14
1
GND
VCC3
R443
4.7K/6
SMBUSC_0
SMBUSD_0
R439
0/6/X
GND
R445
4.7K/6
VCC
VCC3_DUAL
GND
GPIO2_MEMRST 10
R444
4.7K/6
R440
0/6/X
SMBUSD_1
SMBUSC_1
R455
4.7K/6
VCC3
R480 8.2K/6
R509 8.2K/6
R459 8.2K/6
R462 8.2K/6
RP128
RP129 8P4R-8.2K
R23 8.2K/6
R475 8.2K/6
R481 8.2K/6/B
VCC3_DUAL
R447
R448
4.7K/6
4.7K/6
3
D
Q57
2N7002
G S
+12V
2
1
3
D
Q58
2N7002
G S
+12V
2
1
3
D
1
3
D
Q60
2N7002
G S
+12V
2
1
8P4R-8.2K
1
3
5
7
1
3
5
7
Title
Size Document Number Rev
Date: Sheet
SMB_ALERT_1
2
4
SMB_ALERT_SB
6
8
2
4
6
8
GIGABYTE THCHNOLOGIES , INC.
Custom
VCC3_DUAL
R451
R450
4.7K/6
4.7K/6
Q59
2N7002
G S
+12V
2
THRMOTEST_L
GPIO15
SUSPEND_L
RPWRON
RIMII_CRS
SLPBTN_L
-IPMI_SMI
ACAV
LID
PSOUT_L
-HM_SMI
CLKRUN_L
GPIO30
-OVT
GPIO14
GPIO30
GPIO28
GPIO19
MII_CRS 45
PNPIRQ2
PRDY
ACRTST_IN1
AC_SDIN0
ACSDI1
ACRTST_RDCLK
ACRTST_TDCLK
ACRTST_IN0
BIT_ACCLK
AMD-8111 Thor Misc I/F
GA-7A8DRL
FET_SMBUSC_0
FET_SMBUSD_0
FET_SMBUSD_1
FET_SMBUSC_1
R454 8.2K/6
R456 8.2K/6
R457 8.2K/6/X
R458 8.2K/6
R213 100K/6
R463 8.2K/6/X
R465 100K/6/X
R24 100K/6
RP131
1
2
3
4
5
6
7
RP132
8
1
2
3
4
5
6
7
8
R22 8.2K/6
R476 8.2K/6
46 81 Thursday, November 10, 2005
8P4R-8.2K
8P4R-8.2K
of
VCC3
GND
GND
2.0
Thor Configuration
* DEFAULT VALUE
VCC3
R488
A_D11
A_D8
A_D8 48,50,67,70,71
8.2K/6/X
A_D5 48,50,67,70,71 A_D11 48,50,67,70,71
R490
8.2K/6
GND
R492
8.2K/6/X
A_D0 48,50,67,70,71
R494
8.2K/6
GND
VCC3
A_D10
A_D10 48,50,67,70,71
SPKR
SPKR 45,58
A_D10
A_D15
A_D15 48,50,67,70,71
A_D14
A_D14 48,50,67,70,71
A_D13
A_D13 48,50,67,70,71
A_D9
A_D9 48,50,67,70,71
A_D1
A_D1 48,50,67,70,71
A_D3
A_D3 48,50,67,70,71
A_D2
A_D2 48,50,67,70,71
A_D4
A_D4 48,50,67,70,71
A_D6
A_D6 48,50,67,70,71
A_D7
A_D7 48,50,67,70,71
R496 8.2K/6
R497 8.2K/6
R498 8.2K/6/X
R499 8.2K/6
R500 8.2K/6
R501 8.2K/6
R502 8.2K/6
R503 8.2K/6
R504 8.2K/6
RP134 8P4R-8.2K
1
2
3
4
5
6
7
8
A_D5
A_D0
VCC3
GND
VCC3 VCC3
GND
R489
8.2K/6
R491
8.2K/6/X
R493
8.2K/6/X
R495
8.2K/6
PIN
AD(15)
AD(14)
AD(13)
AD(12)
AD(11)
AD(10)
AD(9)
AD(8)
AD(7)
AD(6)
AD(5)
AD(4)
AD(3)
AD(2)
AD(1)
AD(0)
SPKR
DESCRIPTION (AMD PERIPHERAL BUS CONTROLLER DevB:3x48)
STATE
1
RESERVED
0
RESERVED
RESERVED
1
RESERVED
0
RESERVED
1
RESERVED
0
1
THERE IS NO STRAPPING OPTION ASSOCIAT ED WI TH AD (1 2).
0
THERE IS NO STRAPPING OPTION ASSOCIAT ED WI TH AD (1 2).
1
THE COMPENSATION VALUES SPECIFIED BY DevA:0xE0 ARE USED BY THE HT PHY.
THE AUTOMATIC PHY COMPENSATION CIRCUIT VALUES ARE USED BY THE HT PHY.
0*
1*
DO NOT REBOOT THE SYSTEM WHEN A DOUBLE TCO TIM ER TI ME OU T OCCURS.
REBOOT SYSTEM AS SPECIFIED BY PORTCF9 W H EN PM 4 6 I S S ET .
0
1
ACCESSES TO BIOS USE THE FWHUB PR OT OC OL OV ER T HE LPC BU S.
0*
NORMAL LPC PROTOCOL IS USED FOR BIOS ACCESES.
THE DEFAULT BASE UNIT ID IS 01h.
1
THE DEFAULT BASE UNIT ID IS 00h.
0*
1
HT MESSAGES ARE NOT USED FOR INTR,NMI,SMI#,INIT#,STPCLK#,IGNNE#,A20M#,PICD0#,PICD1#,PICCLK , AND FER R#.
0*
HT MESSAGES ARE UTILIZED TO TRANSMIT THE STATE OF THE CPU SIGNALS L IST ED ABO VE.
1
THE 400 MHZ OUTPUT OF THE VCO IS DRIVEN BY THE GPIO26 PIN .
THE PLL OPERATES NORMALLY.
0*
THE NORMAL, GREATER THAN 1.5ms, RESET PULSE (AFTER PWROK GOES HIGH) IS SELECTED.
1*
THE FAST, APPROXIMATELY 1.5us, RESET PULSE IS SELECTED .
0
1
GPIO PINS SPECIFIED BY PM[DF:C0] ARE IN TEST MODE FOR TH E RN G A ND PLL .
GPIO PINS ARE NOT IN TEST MODE.
0*
1
RESERVED
RESERVED
0
1
400 MHZ HT CLOCK FREQUENC Y.
200 MHZ HT CLOCK FREQUENC Y.
0*
1
THE SECONDARY PCI BUS BELONGS TO BUS 0.
0*
THE SECONDARY PCI BUS IS ENBALED.
BIOS ADDRESS SPACE IS LOCATED ON TH E PC I B US .
1
BIOS ADDRESS SPACE IS LOCATED O N T H E LP C B US .
0*
SETS BIT 12 IN REGISTER DevB:3x48 TO 1 .
1*
0
SETS BIT 12 IN REGISTER DevB:3x48 TO 0 .
GND
GIGABYTE THCHNOLOGIES , INC.
Title
Size Document Number Rev
Custom
Date: Sheet
AMD-8111 Thor Configurat i ons
GA-7A8DRL
of
47 81 Thursday, November 10, 2005
2.0
PCICLKF_IOH 57
NOTE: PCI signals are terminated
on the second PCI sheet.
Thor PCI 33 and EIDE Interfaces
NOTE: Commands sent over the
HT bus are used instead of the
Processor Interface signals.
R446
100/6/X
PCLKIOHRC
C482
100P/6/X
GND
VCC3
PCICLKF_IOH
FERR_IOH_L
RP126
1
2
4
6
8
8P4R-8.2K
PDDREQ
PIORDY_1
SDDREQ
SIORDY_1
PICCLK_IOH
PICD0_IOH_L
PICD1_IOH_L
STOPSERRPERRFRAMEIRDYTRDYDEVSELPAR
PREQREQ6-
REQ5REQ4REQ3REQ2REQ1REQ0-
A_D31
A_D30
A_D29
A_D28
A_D27
A_D26
A_D25
A_D24
A_D23
A_D22
A_D21
A_D20
A_D19
A_D18
A_D17
A_D16
A_D15
A_D14
A_D13
A_D12
A_D11
A_D10
A_D9
A_D8
A_D7
A_D6
A_D5
A_D4
A_D3
A_D2
A_D1
A_D0
C_BE3C_BE2C_BE1C_BE0-
PIRQAPIRQBPIRQCPIRQD-
3
5
7
STOP- 50,67,70,71
SERR- 50,70
PERR- 50,67,70
FRAME- 50,67,70,71
IRDY- 50,67,70,71
TRDY- 50,67,70,71
DEVSEL- 50,67,70,71
PAR 50,67,70,71
PREQ- 50
REQ6- 50
REQ5- 50
REQ4- 50,67
REQ3- 50,70
REQ2- 50,71
REQ1- 50
REQ0- 50
A_D31 50,67,70,71
A_D30 50,67,70,71
A_D29 50,67,70,71
A_D28 50,67,70,71
A_D27 50,67,70,71
A_D26 50,67,70,71
A_D25 50,67,70,71
A_D24 50,67,70,71
A_D23 50,67,70,71
A_D22 50,67,70,71
A_D21 50,67,70,71
A_D20 50,67,70,71
A_D19 50,67,70,71
A_D18 50,67,70,71
A_D17 50,67,70,71
A_D16 50,67,70,71
A_D15 47,50,67,70,71
A_D14 47,50,67,70,71
A_D13 47,50,67,70,71
A_D12 50,67,70,71
A_D11 47,50,67,70,71
A_D10 47,50,67,70,71
A_D9 47,50,67,70,71
A_D8 47,50,67,70,71
A_D7 47,50,67,70,71
A_D6 47,50,67,70,71
A_D5 47,50,67,70,71
A_D4 47,50,67,70,71
A_D3 47,50,67,70,71
A_D2 47,50,67,70,71
A_D1 47,50,67,70,71
A_D0 47,50,67,70,71
C_BE3- 50,67,70,71
C_BE2- 50,67,70,71
C_BE1- 50,67,70,71
C_BE0- 50,67,70,71
PIRQA- 39,50,70,71
PIRQB- 39,50
PIRQC- 39,50,67
PIRQD- 39,50
PDDREQ 52
PIORDY_1 52
SDDREQ 52
SIORDY_1 52
AD14
AE6
AD6
AB5
AC5
AD5
AE5
AE20
AF13
AB13
AE12
AC12
AF11
AD11
AB11
AA5
AA3
AB1
AB2
AB3
AC1
AC3
AD1
AE1
AD3
AE3
AD4
AB4
AB6
AB7
AD8
AD7
AE8
AC8
AD9
AE9
AB9
AC9
AB10
AF10
AD10
AD2
AC6
AB8
AA1
AA2
B5
D5
E4
B4
AF5
AF6
AF1
AF2
AF3
AF7
AF8
AF9
AF4
Y5
Y4
A15
E15
C9
A8
FERR_L
PICCLK
PICD0_L
PICD1_L
PCLK
STOP_L
SERR_L
PERR_L
FRAME_L
IRDY_L
TRDY_L
DEVSEL_L
PAR
PREQ_L
REQ6_L
REQ5_L
REQ4_L
REQ3_L
REQ2_L
REQ1_L
REQ0_L
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
CBE_L3
CBE_L2
CBE_L1
CBE_L0
PIRQA_L
PIRQB_L
PIRQC_L
PIRQD_L
DDRQP
DRDYP
DDRQS
DRDYS
PCI/ULTRA DMA IDE
U21B
A20M_L
IGNNE_L
STPCLK_L
PGNT_L
GNT6_L
GNT5_L
GNT4_L
GNT3_L
GNT2_L
GNT1_L
GNT0_L
DDATA_P15
DDATA_P14
DDATA_P13
DDATA_P12
DDATA_P11
DDATA_P10
DDATA_P9
DDATA_P8
DDATA_P7
DDATA_P6
DDATA_P5
DDATA_P4
DDATA_P3
DDATA_P2
DDATA_P1
DDATA_P0
DDATA_S15
DDATA_S14
DDATA_S13
DDATA_S12
DDATA_S11
DDATA_S10
DDATA_S9
DDATA_S8
DDATA_S7
DDATA_S6
DDATA_S5
DDATA_S4
DDATA_S3
DDATA_S2
DDATA_S1
DDATA_S0
DRSTP_L
DIOWP_L
DIORP_L
DDACKP_L
DADDR_P2
DADDR_P1
DADDR_P0
DCS1P_L
DCS3P_L
DRSTS_L
DIOWS_L
DIORS_L
DADDR_S2
DADDR_S1
DADDR_S0
DCS1S_L
DCS3S_L
DDACKS_L
INIT_L
INTR
SMI_L
A20M_IOH_L
A3
IGNNE_IOH_L
E5
INIT_IOH_L
A5
INTR_IOH
C6
NMI_IOH
A6
NMI
SMI_IOH_L
C5
STPCLK_IOH_L
A4
PGNT-
AD15
GNT6-
AB14
GNT5-
AD13
GNT4-
AF12
GNT3-
AD12
GNT2-
AB12
GNT1-
AE11
GNT0-
AC11
PDD15
D16
PDD14
C16
PDD13
A16
PDD12
E17
PDD11
D18
PDD10
C18
PDD9
A18
PDD8
E19
PDD7
C19
PDD6
D19
PDD5
B18
PDD4
E18
PDD3
A17
PDD2
C17
PDD1
B16
PDD0
E16
SDD15
B9
SDD14
D10
SDD13
C10
SDD12
A10
SDD11
E11
SDD10
D12
SDD9
C12
SDD8
A12
SDD7
D13
SDD6
B12
SDD5
E12
SDD4
A11
SDD3
C11
SDD2
B10
SDD1
E10
SDD0
A9
PDRST-
B19
PDIOW-
B15
PDIOR-
C15
PDDACK-
D15
PDA2
A13
PDA1
E14
PDA0
C14
PCS1-
B13
PCS3-
C13
SDRST-
E13
SDIOW-
E9
SDIOR-
D9
SDA2
C7
SDA1
A7
SDA0
B7
SCS1-
E7
SCS3-
D7
SDDACK-
E8
TP178
1
TP179
1
TP180
1
TP181
1
TP182
1
TP183
1
TP184
1
GNT4- 67
GNT3- 70
GNT2- 71
GNT1- 50
GNT0- 50
PDD15 52
PDD14 52
PDD13 52
PDD12 52
PDD11 52
PDD10 52
PDD9 52
PDD8 52
PDD7 52
PDD6 52
PDD5 52
PDD4 52
PDD3 52
PDD2 52
PDD1 52
PDD0 52
SDD15 52
SDD14 52
SDD13 52
SDD12 52
SDD11 52
SDD10 52
SDD9 52
SDD8 52
SDD7 52
SDD6 52
SDD5 52
SDD4 52
SDD3 52
SDD2 52
SDD1 52
SDD0 52
PDRST- 52
PDIOW- 52
PDIOR- 52
PDDACK- 52
PDA2 52
PDA1 52
PDA0 52
PCS1- 52
PCS3- 52
SDRST- 52
SDIOW- 52
SDIOR- 52
SDA2 52
SDA1 52
SDA0 52
SCS1- 52
SCS3- 52
SDDACK- 52
TP136
TP137
HINIT- 56
GIGABYTE THCHNOLOGIES , INC.
Title
Size Document Number Rev
Custom
Date: Sheet
AMD-8111 Thor PCI and E-IDE
GA-7A8DRL
of
48 81 Thursday, November 10, 2005
2.0
Thor Power and Ground Connections
VDD_1D8V
VCC3
VCC3_DUAL
VDD_1D8V_DUAL
T0_H1_VLDT
VLDT_1D2V
VCC_DUAL
VDD_RTC
GND
AA8
AA9
AA10
D17
AC4
AC21
AC7
AC10
D11
AC13
D14
AA4
D23
AA17
AA18
AA19
AA20
AC16
AC19
D20
M22
R22
V22
AB22
M23
R23
V23
AA23
AC23
AD24
AE25
K21
H21
G21
AA21
Y21
W21
V21
U21
A26
A23
K23
D24
G25
H25
M25
C26
E26
M26
B20
F10
F9
F8
F7
Y6
W6
V6
U6
K6
J6
H6
D6
D8
F17
F18
F19
F20
J21
Y1
Y2
Y3
W4
C1
C2
C3
D4
J22
L23
VDD_CORE11
VDD_CORE10
VDD_CORE9
VDD_CORE8
VDD_CORE7
VDD_CORE6
VDD_CORE5
VDD_CORE4
VDD_CORE3
VDD_CORE2
VDD_CORE1
VDD_CORE12
VDD_CORE13
VDD_CORE14
VDD_IO22
VDD_IO23
VDD_IO1
VDD_IO2
VDD_IO3
VDD_IO4
VDD_IO5
VDD_IO6
VDD_IO7
VDD_IO8
VDD_IO9
VDD_IO10
VDD_IO12
VDD_IO13
VDD_IO14
VDD_IO15
VDD_IO16
VDD_IO17
VDD_IO18
VDD_IO19
VDD_IO20
VDD_IO21
VDD_IO122
VDDIOX1
VDDIOX2
VDDIOX3
VDDIOX4
VDDIOX5
VDDIOX6
VDDIOX7
VDDIOX8
VDDIOX9
VDDIOX10
VDDIOX11
VDD_COREXA4
VDD_COREXA3
VDD_COREXA2
VDD_COREXA1
VDD_COREXB5
VDD_COREXB4
VDD_COREXB3
VDD_COREXB2
VDD_COREXB1
VLDT0_A0
VLDT0_A1
VLDT0_A2
VLDT0_A3
VLDT0_B0
VLDT0_B1
VLDT0_B2
VLDT0_B3
VDD_REF
VDD_RTC
VSS25
VSS92
VSS93
VSS94
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
POWER/GROUND
U21D
VSS91
VSS14
VSS95
VSS96
VSS97
VSS98
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS26
VSS27
VSS28
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
E23
B6
F24
J24
L24
M24
AC22
B1
B2
E2
G2
J2
L2
N2
R2
U2
W2
AC2
AE2
B3
W3
C4
F4
H4
K4
M4
P4
T4
V4
AE4
V5
W5
F6
G6
AA6
AE7
AA7
B8
AE10
L11
M11
N11
P11
R11
T11
B11
L12
M12
N12
P12
R12
T12
AE13
L13
M13
N13
P13
R13
T13
L14
M14
N14
P14
R14
T14
B14
L15
M15
N15
P15
R15
T15
AE16
L16
M16
N16
P16
R16
T16
B17
AE19
B23
F21
AE22
B25
AE24
C25
K26
R25
V25
AA25
AD25
AF26
GND
VCC3
C499
0.1U/6
VDD_1D8V_DUAL
C493
0.1U/6
GND
T0_H1_VLDT
R510
0/6/X
C500
C501
0.1U/6
0.1U/6
BAT+SOCKET
C510
10U/12
VLDT_1D2V
C502
0.1U/6
GND
C487
0.1U/6
C503
0.1U/6
BAT1
C494
10U/12/B
1 2
GND
C511
0.1U/6
VDD_1D8V
VDD_1D8V
C496
0.1U/6
C504
0.1U/6
C522
0.1U/6
R479 820/6
C509
0.1U/6/B
C497
0.1U/6
GND
C505
0.1U/6
D79 RB751V-40
1 2
D4 RB751V-40
1 2
VCC3_DUAL
1 2
D5 RB751V-40
C1377
1000U/6.3V/8X11.5/KZG
C536
0.1U/6
0.1U/6
C495
C498
0.1U/6
C506
0.1U/6
GND
To fix ITE8712 battery
voltage drop when enter
into Mech. off
VDD_RTC_SIO
R136 1K/6
D7 RB751_0
1 2
1 2
+
GND
C537
0.1U/6
VCC3_DUAL
C507
0.1U/6
GND
C508
0.1U/6
R157 0/6/B/X
VCC3
C546
0.1U/6
GND
C545
10U/12
VDD_RTC
1-2 : CLEAR CMOS
2-3 : NORMAL
CLR_CMOS1
3
2
1
JP1X3/2-3[B]
GND
C491
0.1U/6
GND
280mA
Q6
1
3
D
2
GS
NDS7002A/SOT23
+12V
R1025
C
1K/6
Q137
SC431L/1.25V/SOT23
VLDT_1D2V VLDT_1D2V VLDT_1D2V
A
GND
T0_H1_VLDT
C571
4.7U/12
GND GND GND
R127
499/6/1
R
R128
562/6/1
GND
VCC_DUAL
C553
C512
4.7U/12
0.1U/6
GND GND
192mA
VDD_2D5V
C1182
C1183
10U/12
0.1U/6/16V
GND
GND
VCC3_DUAL
C513
0.1U/6
GND
Title
Size Document Number Rev
Custom
Date: Sheet
C552
4.7U/12
GIGABYTE THCHNOLOGIES , INC.
AMD-8111 Thor Power and Gnd
VCC3_DUAL
C551
4.7U/12
C514
0.1U/6
GND
GA-7A8DRL
VDD_RTC
49 81 Thursday, November 10, 2005
GND
of
C550
2.2uF/8
2.0
PCICLK0 57
DEVSEL- 48,67,70,71
VCC3
GND
R721
5.1K/6
PIRQB- 39,48
PIRQD- 39,48
REQ0- 48
A_D31 48,67,70,71
A_D29 48,67,70,71
A_D27 48,67,70,71
A_D25 48,67,70,71
C_BE3- 48,67,70,71
A_D23 48,67,70,71
A_D21 48,67,70,71
A_D19 48,67,70,71
A_D17 48,67,70,71
C_BE2- 48,67,70,71
IRDY- 48,67,70,71
PERR- 48,67,70
SERR- 48,70
C_BE1- 48,67,70,71
A_D14 47,48,67,70,71
A_D12 48,67,70,71
A_D10 47,48,67,70,71
A_D8 47,48,67,70,71
A_D7 47,48,67,70,71
A_D5 47,48,67,70,71
A_D3 47,48,67,70,71
A_D1 47,48,67,70,71
R506 8.2K/6
GND
PCI Slot 6
PCI_6
B1
-12V
PCI_TCK
VCC
PIRQB- PIRQCPIRQD-
PCICLK0
REQ0A_D31
A_D29
A_D27
A_D25
C_BE3-
A_D23
A_D19
A_D17
C_BE2IRDYDEVSELPLOCK-
PERRSERRC_BE1-
A_D14
A_D12
A_D10
A_D8
A_D7
A_D5
A_D3
A_D1
VCC
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC
VCC
GND GND
VCC
1 2
C1097
0.1U/6
-12V
B2
TCK
B3
GND
B4
TDO
B5
+5V
B6
+5V
B7
INTB
B8
INTD
B9
PRSNT1
B10
RESERVED
B11
PRSNT2
B12
GND
B13
GND
B14
RESERVED
B15
GND
B16
CLK
B17
GND
B18
REQ
B19
+5V
B20
AD31
B21
AD29
B22
GND
B23
AD27
B24
AD25
B25
+3.3V
B26
C/BE3
B27
AD23
B28
GND
B29
AD21
B30
AD19
B31
+3.3V
B32
AD17
B33
C/BE2
B34
GND
B35
IRDY
B36
+3.3V
B37
DEVSEL
B38
GND
B39
LOCK
B40
PERR
B41
+3.3V
B42
SERR
B43
+3.3V
B44
C/BE1
B45
AD14
B46
GND
B47
AD12
B48
AD10
B49
GND
B52
AD8
B53
AD7
B54
+3.3V
B55
AD5
B56
AD3
B57
GND
B58
AD1
B59
+5V
B60
ACK64
B61
+5V
B62
+5V
PCI/CO/GF
1 2
C1098
0.1U/6
1 2
1 2
C1100
C1099
0.1U/6
0.1U/6
TRST
+12V
TMS
INTA
INTC
RESERVED
RESERVED
GND
GND
3.3V_AUX
RST
GNT
GND
PME
AD30
+3.3V
AD28
AD26
GND
AD24
IDSEL
+3.3V
AD22
AD20
GND
AD18
AD16
+3.3V
FRAME
GND
TRDY
GND
STOP
+3.3V
SDONE
SBO
GND
PAR
AD15
+3.3V
AD13
AD11
GND
C/BE0
+3.3V
GND
REQ64
+5V
+5V
+5V
+5V
AD9
AD6
AD4
AD2
AD0
+5V
+5V
+5V
A1
A2
A3
A4
TDI
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
1 2
1 2
C1101
C1102
1U/6
1U/6
R718
5.1K/6
PCI_TRST_L
+12V
PCI_TMS
PCI_TDI
VCC
VCC
VCC
VCC3_DUAL
VCC
R556
0/6
VCC3
R505
VCC3
100/6
VCC3
VCC3
VCC3
VCC3
VCC
R507 8.2K/6 R735 8.2K/6
VCC
1 2
C1103
1U/6
1 2
C1104
1U/6
GNT0PME_L
A_D30
A_D28
A_D26
A_D24
A_D20
A_D22
A_D20 A_D21
A_D18
A_D16
FRAMETRDYSTOP-
PCI_SCL
PCI_SDA
PAR
A_D15
A_D13
A_D11
A_D9
C_BE0A_D6
A_D4
A_D2
A_D0
PIRQA-
PIRQBPIRQD-
GNT1-
R1321
A_D30
A_D28
A_D26
A_D24
A_D21
A_D22
A_D20
A_D18
A_D16
FRAMETRDYSTOPPCI_SCL
PCI_SDA
PAR
A_D15
A_D13
A_D11
A_D9
C_BE0A_D6
A_D4
A_D2
A_D0
8.2K/6
R736
VCC3
R732
R731
5.1K/6
5.1K/6
GNT1- 48
PME_L
0/6
VCC3
Title
Size Document Number Rev
Custom
Date: Sheet
GND GND
PCI Slot 5
GND
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B1
B2
B3
B4
B5
B6
B7
B8
B9
PCI_5
-12V
TCK
GND
TDO
+5V
+5V
INTB
INTD
PRSNT1
RESERVED
PRSNT2
GND
GND
RESERVED
GND
CLK
GND
REQ
+5V
AD31
AD29
GND
AD27
AD25
+3.3V
C/BE3
AD23
GND
AD21
AD19
+3.3V
AD17
C/BE2
GND
IRDY
+3.3V
DEVSEL
GND
LOCK
PERR
+3.3V
SERR
+3.3V
C/BE1
AD14
GND
AD12
AD10
GND
AD8
AD7
+3.3V
AD5
AD3
GND
AD1
+5V
ACK64
+5V
+5V
PCI/CO/GF
TRST
+12V
INTA
INTC
RESERVED
RESERVED
GND
GND
3.3V_AUX
GND
AD30
+3.3V
AD28
AD26
GND
AD24
IDSEL
+3.3V
AD22
AD20
GND
AD18
AD16
+3.3V
FRAME
GND
TRDY
GND
STOP
+3.3V
SDONE
GND
AD15
+3.3V
AD13
AD11
GND
C/BE0
+3.3V
GND
REQ64
PME_L
TMS
+5V
+5V
+5V
RST
+5V
GNT
PME
SBO
PAR
AD9
AD6
AD4
AD2
AD0
+5V
+5V
+5V
TDI
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
GND
R508 8.2K/6
R734
5.1K/6
-12V
PCI2_TCK
A_D29
A_D27
A_D25
C_BE3-
A_D23
A_D21
A_D19
A_D17
C_BE2IRDYDEVSELPLOCK-
PERRSERR-
C_BE1A_D14
A_D12
A_D10
A_D8
A_D7
A_D3
A_D1
1
3
5
7
2
4
6
8
1
3
5
7
1
3
5
7
1
3
5
7
2
4
6
8
PIRQCPIRQA-
REQ1-
A_D31
RP135
8P4R-8.2K
RP136
8P4R-8.2K
RP137
8P4R-8.2K
RP138
8P4R-8.2K
RP139
8P4R-8.2K
RP140
8P4R-8.2K
VCC
PCICLK1
VCC
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC
VCC
VCC3
PIRQA- 39,48,70,71
PIRQC- 39,48,67
RESET_PCI0- 61,71 RESET_PCI1- 61
GNT0- 48
PME_L 41,42,43,44,46,58,62,70,75
A_D30 48,67,70,71
A_D28 48,67,70,71
A_D26 48,67,70,71
A_D24 48,67,70,71
A_D20 48,67,70,71
A_D22 48,67,70,71
A_D20 48,67,70,71
A_D18 48,67,70,71
A_D16 48,67,70,71
FRAME- 48,67,70,71
TRDY- 48,67,70,71
STOP- 48,67,70,71
PCI_SCL 41,42,43,44,75
PCI_SDA 41,42,43,44,75
PAR 48,67,70,71
A_D15 47,48,67,70,71
A_D13 47,48,67,70,71
A_D11 47,48,67,70,71
A_D9 47,48,67,70,71
C_BE0- 48,67,70,71
A_D6 47,48,67,70,71
A_D4 47,48,67,70,71
A_D2 47,48,67,70,71
A_D0 47,48,67,70,71
VCC3
PREQ- 48
REQ6- 48
REQ4- 48,67
REQ1- 48
REQ2- 48,71
REQ0- 48
REQ3- 48,70
REQ5- 48
VCC3
REQ6PCI_TMS
PCI_TDI
REQ4REQ1REQ2-
SERRPERRREQ0PLOCKSTOPPAR
DEVSELTRDYIRDYFRAMEREQ3REQ5PIRQAPIRQCPIRQDPIRQB-
PCICLK1 57
REQ1- 48
A_D5
2
4
6
8
1
3
5
7
2
4
6
8
2
4
6
8
2
4
6
8
1
3
5
7
R733
5.1K/6
PCI2_TRST_L
+12V
VCC
VCC
VCC
VCC3_DUAL
VCC
VCC3
R737 100/6
VCC3
VCC3
VCC3
VCC3
VCC3
VCC
VCC
VCC3_DUAL
PCI2_TMS
PCI2_TDI
VCC
1 2
1 2
GND
EC131
1000U/6.3V/8X11.5/KZG
VCC3
GND
C1091
4.7U/12
1 2
C1085
1U/6
C1092
4.7U/12
1 2
GND GND
1 2
1 2
C1086
1U/6
VCC3
1 2
C1093
4.7U/12
C1087
1U/6
1 2
VCC3 VCC
C1094
4.7U/12
1 2
EC130
1000U/6.3V/8X11.5/KZG
1 2
1 2
C1089
C1088
0.1U/6
0.1U/6
1 2
C1095
4.7U/12
GND
1 2
1 2
C1096
4.7U/12
GIGABYTE THCHNOLOGIES , INC.
PCI Slot X2
GA-7A8DRL
of
50 81 Thursday, November 10, 2005
C1090
0.1U/6
2.0
USB 1.1
5
NOTE: USB 1.1 OHC should have 22 ohm series resistors at source,
22 ohm series resistors OR ferrite beads and 47pF capacitors to GND for
EMI/ESD at connector side.
1
3
5
7
1
3
5
7
Near AMD 8111
RP142
8P4R-22/X
RP145
8P4R-22
2
4
6
8
2
4
6
8
USB1_USBN2 46
USB1_USBP2 46
USB0_USBP2 46
USB0_USBN2 46
USB1_USBN2
USB1_USBP2
USB0_USBP2
USB0_USBN2
Near AMD 8111
USB1_USBP0 46
USB1_USBN0 46
USB1_USBP1 46
USB1_USBN1 46
USB1_USBP0
USB1_USBN0
USB1_USBP1
USB1_USBN1
USB3
VCC
C518
C517
0.1U/6
0.1U/6
GND
GND
135
7
RP143
8P4R-15K/X
246
8
GND
RP144
1
2
3
4
5
6
7
8
8P4R-0/X
L5
USB1P0
USB1N0
USB1P1
USB1N1
135
7
RP146
8P4R-15K
246
8
GND
4 5
3
6
2
7
1
8
CUB-8P-RID3
CO-LAYOUT
Close to USB
Con.
USB1P_SR0
USB1N_SR0
USB1P_SR1
USB1N_SR1
CP26
8P4C-47P
1 2
3 4
5 6
7 8
GND
R513
1K/6
GND
Rset = 4.51K, Current Limit = 1065 < 1420 < 1775 mA
SOT-23-5
U26
5
IN
AAT4610IGV
SOT-23-5
1
OUT
2
GND
3 4
SET /ON
Rear USB3
C526
0.1U/6
40 mils Width 80 mils Width
R514 4.53K/6/1
USB3_VCC
C525
1U/6
EGND
USB1N_SR1
USB1P_SR1
EGND EGND
2
4
6
8
USB/ATX
GND GND
GND
EC82
220U/10V/6*11/D
USB3
1
3
5
7
9 10
11 12
EGND
C524
0.1U/6
VCCUSB3
GND
VCCUSB3
+
USB1N_SR0
USB1P_SR0
C519
0.1U/6
FB8
FB30/8
C527
0.1U/6
R1177 0/6
EGND
R1179
680/6
GND
VCC3
3
D
GS
2
GND
R520
10K/6
Q10
2N7002
1
USBR_FUSE 75
VCC3
3
D
GS
2
GND
R518
10K/6/X
1
Q9
2N7002
R519
0/6
USBOC- 46
R522
10K/6
VCC3
R521
10K/6
R132
3
Q11
D
GS
2N7002
2
1
Q12
GND
2N7002
R616 0/6
VCCUSB1
R738
680/6
GIGABYTE THCHNOLOGIES , INC.
Title
Size Document Number Rev
C
Date: Sheet
USBOC- 46
0/6
VCC
1 2
D52
RB751V-40
GND
USB Ports
GA-7A8DRL
R557
4.7K/6
USBF_FUSE 75
51 81 Thursday, November 10, 2005
5
2.0
of
GND
USB0P_SR1
USB0N_SR1
C532
0.1U/6
GND
R524
4.53K/6/1
GND
VCCUSB1
GND
C528
1U/6
VCC3
3
D
GS
2
1
USB1_VCC
GND
C529
1000P/6
GND
FB9
EC83
GND
2
10 9
GND
U27
OUT
IN
GND
SET /ON
AAT4610IGV
FB30/8
1
2
3 4
C531
0.1U/6
GND
USB1_VCC
R523
1K/6
3
220U/10V/6*11/D
C530
1U/6
GND
1
3 4
5 6
7 8
GND GND
USB1
H2X5
5
USB1
Front Side
CO-LAYOUT
USB0P0
USB0N0
USB0P1
USB0N1
L6
4 5
3
2
1
CUB-8P-RID3
1
3
5
7
USB0_USBP0 46
USB0_USBN0 46
USB0_USBP1 46
USB0_USBN1 46
USB0_USBP0
USB0_USBN0
USB0_USBP1
USB0_USBN1
RN1
1 2
3 4
5 6
7 8
8P4R-22
USB0P0
USB0N0
USB0P1
USB0N1
RN2
8P4R-15K
1 2
3 4
5 6
7 8
GND
RN3
8P4R-0/X
2
4
6
8
6
7
8
USB0P_SR0
USB0N_SR0
USB0P_SR1
USB0N_SR1
USB0P_SR0
USB0N_SR0
USB0P_SR1
USB0N_SR1
CP27
8P4C-47P
1 2
3 4
5 6
7 8
GND
D
2 1 4
USB0N_SR0
USB0P_SR0
VCC
C533
0.1U/6
GND
ATA-133 EIDE Connectors
VCC
EIDE Activity
VCC
R129
IDEACTP-
IDEACTS-
R535
8.2K/6
C534
0.047U/6
1K/6
Primary EIDE Connector
VCC3
R526
8.2K/6
PDRST-
PDRST- 48
R528
33/6
GND
VCC3
R540
8.2K/6
R527
8.2K/6
SR_RESET_IDEP_L
SR_DDATA_P7
SR_DDATA_P6
SR_DDATA_P5
SR_DDATA_P4
SR_DDATA_P3
SR_DDATA_P2
SR_DDATA_P1
SR_DDATA_P0
GND
SR_DDREQP
SR_DIOWP_L
SR_DIORP_L
SR_DIORDYP
SR_DDACKP_L
SR_IRQ14
SR_DADDR_P1
SR_DADDR_P0
SR_DCS1P_L
IDEACTP-
IDE1
1
3
5 6
7 8
9
11 12
13 14
15 16
17 18
19
21 22
23 24
25 26
27 28
29
31 32
33 34
35 36
37 38
39
hdr20x2
GND
2
SR_DDATA_P8
4
SR_DDATA_P9
SR_DDATA_P10
SR_DDATA_P11
10
SR_DDATA_P12
SR_DDATA_P13
SR_DDATA_P14
SR_DDATA_P15
30
SR_DADDR_P2
SR_DCS3P_L
40
VCC3
GND
GND
GND
R130
1K/6
2
1
PCABLE_DET- 46
D9
SOT23
BAW56
R525
1K/6
HDLED-
3
HDLED- 58,66,67
SR_DDATA_P7
SR_DDATA_P8
SR_DDATA_P9 PDD9
SR_DDATA_P6
SR_DDATA_P5
SR_DDATA_P10
SR_DDATA_P4
SR_DDATA_P11
SR_DDATA_P3
SR_DDATA_P2
SR_DDATA_P1
SR_DDATA_P15
SR_DADDR_P1 PDA1
RP147 8P4R-33
1
2
3
4
5
6
7
8
RP148 8P4R-33
1
2
3
4
5
6
7
8
RP149 8P4R-33
1
2
3
4
5
6
7
8
RP150 8P4R-33
1
2
3
4
5
6
7
8
RP151 8P4R-33
1
2
3
4
5
6
7
8
PDD7
PDD8
PDD6
PDD5
PDD10
PDD4
PDD11
PDD3
PDD12 SR_DDATA_P12
PDD2
PDD13 SR_DDATA_P13
PDD1
PDD14 SR_DDATA_P14
PDD0 SR_DDATA_P0
PDD15
PDA0 SR_DADDR_P0
PDA2 SR_DADDR_P2
PDD7 48
PDD8 48
PDD9 48
PDD6 48
PDD5 48
PDD10 48
PDD4 48
PDD11 48
PDD3 48
PDD12 48
PDD2 48
PDD13 48
PDD1 48
PDD14 48
PDD0 48
PDD15 48
PDA1 48
PDA0 48
PDA2 48
NOTE: Populate when using
alternate form of cable detection.
Secondary EIDE Connector
VCC3
R544
8.2K/6
SDRST- SR_DCS1S_L
SDRST- 48
R549
33/6
GND
VCC3
R555
8.2K/6
R545
8.2K/6
SR_RESET_IDES_L
SR_DDATA_S7
SR_DDATA_S6
SR_DDATA_S5
SR_DDATA_S4
SR_DDATA_S3
SR_DDATA_S2
SR_DDATA_S1
SR_DDATA_S0
GND
SR_DDREQS
SR_DIOWS_L
SR_DIORS_L
SR_DIORDYS
SR_DDACKS_L
SR_IRQ15
SR_DADDR_S1
SR_DADDR_S0
SR_DCS1S_L
IDEACTS-
IDE2
1
3
5 6
7 8
9
11 12
13 14
15 16
17 18
19
21 22
23 24
25 26
27 28
29
31 32
33 34
35 36
37 38
39
hdr20x2/WHTE
GND
2
SR_DDATA_S8
4
SR_DDATA_S9
SR_DDATA_S10
SR_DDATA_S11
10
SR_DDATA_S12
SR_DDATA_S13
SR_DDATA_S14
SR_DDATA_S15
30
SR_DADDR_S2
SR_DCS3S_L
40
VCC3
GND
GND
GND
NOTE: Populate when using
R554
8.2K/6
C535
0.047U/6
SCABLE_DET- 46
SR_DDATA_S7
SR_DDATA_S8
SR_DDATA_S6
SR_DDATA_S9
SR_DDATA_S5
SR_DDATA_S10
SR_DDATA_S4
SR_DDATA_S11
SR_DDATA_S3
SR_DDATA_S12
SR_DDATA_S2
SR_DDATA_S13
SR_DDATA_S1
SR_DDATA_S14
SR_DDATA_S0
SR_DDATA_S15
SR_DADDR_S1
SR_DADDR_S2
RP152 8P4R-33
1
2
3
4
5
6
7
8
RP153 8P4R-33
1
2
3
4
5
6
7
8
RP154 8P4R-33
1
2
3
4
5
6
7
8
RP155 8P4R-33
1
2
3
4
5
6
7
8
RP156 8P4R-33
1
2
3
4
5
6
7
8
SDD7
SDD8
SDD6
SDD9
SDD5
SDD10
SDD4
SDD11
SDD3
SDD12
SDD2
SDD13
SDD1
SDD14
SDD0
SDD15
SDA1
SDA0 SR_DADDR_S0
SDA2
SDD7 48
SDD8 48
SDD6 48
SDD9 48
SDD5 48
SDD10 48
SDD4 48
SDD11 48
SDD3 48
SDD12 48
SDD2 48
SDD13 48
SDD1 48
SDD14 48
SDD0 48
SDD15 48
SDA1 48
SDA0 48
SDA2 48
alternate form of cable detection.
VCC3
R529
4.7K/6
SR_DIORDYP
SR_DIORP_L
SR_DIOWP_L
SR_DDREQP
SR_DDACKP_L
SR_DCS1P_L
SR_DCS3P_L
SR_IRQ14
SR_DIORDYS
SR_DIORS_L
SR_DIOWS_L
SR_DDREQS
SR_DDACKS_L
SR_DCS3S_L
SR_IRQ15
R530 33/6
R531 33/6
R532 33/6
R533 33/6
R534 33/6
R536 33/6
R537 33/6
R538 33/6
R542 33/6
R543 33/6
R546 33/6
R547 33/6
R548 33/6
R550 33/6
R551 33/6
R552 33/6
GIGABYTE THCHNOLOGIES , INC.
Title
Size Document Number Rev
Custom
Date: Sheet
PIORDY_1
R539
4.7K/6
GND
VCC3
R541
4.7K/6
SIORDY_1
R553
4.7K/6
GND
ATA-133 E-IDE I/F
GA-7A8DRL
PIORDY_1 48
PDIOR- 48
PDIOW- 48
PDDREQ 48
PDDACK- 48
PCS1- 48
PCS3- 48
IRQ14 46
SIORDY_1 48
SDIOR- 48
SDIOW- 48
SDDREQ 48
SDDACK- 48
SCS1- 48
SCS3- 48
IRQ15 46
of
52 81 Thursday, November 10, 2005
2.0
5
DCDA- 54
RIA- 54
CTSA- 54
DTRA- 54
RTSA- 54
DSRA- 54
SOUTA 54
SINA 54
DCDB- 54
RIB- 54
VCC3
CTSB- 54
DTRB- 54
RTSB- 54
DSRB- 54
SOUTB 54
SINB 54
FAN_TAC1 68
FAN_CTRL1 68
FAN_TAC2 68
FAN_CTRL2 68
FAN_TAC3 76
FAN_CTRL3 76
GND
SYS_READY 58,75
WDTGPIO 46
LPC_RST- 56,61
LDRQ0- 45
R1245 4.7K/6
SERIRQ 46,75
LFRAME- 45,56,75
LAD0 45,56,75
LAD1 45,56,75
LAD2 45,56,75
LAD3 45,56,75
KBRST- 46
A20GATE 46
LPC33 57
LPC48 57
VCC
R155 0/6/X
R156 0/6/X
WDTGPIO
VCC
SCRRST
SCRFETSCRIO
SCRCLK
VCC
1
DTR2#
2
RTS2#
3
DSR2#
4
VCC
5
SOUT2
6
SIN2
7
FAN_TAC1
8
FAN_CTL1
9
FAN_TAC2/GP52
10
FAN_CTL2/GP51
11
FAN_TAC3/GP37
12
FAN_CTL3/GP36
13
WTI#/GP35
14
VID4/GP34
15
GNDD
16
VID3/GP33
17
VID2/GP32
18
VID1/GP31
19
VID0/GP30
20
JSBB2/GP27
21
JSBB1/GP26
22
JSBCY/GP25
23
JSBCX/GP24
24
JSAB2/GP23
25
JSAB1/GP22
26
JSACY/GP21
27
JSACX/GP20
28
MIDI_OUT/GP17
29
R150 10K/6/B
SERIRQ WPTLFRAME- INDEXLAD0
LAD1
LAD2
LAD3
MIDI_IN/GP16
30
CIRTX/GP15
31
SCRRST/GP14
32
SCRFET#/GP13
33
SCRIO/GP12
34
SCRCLK/GP11
35
VCC
36
LPCPD#
37
LRESET#
38
LDRQ#
D D
POWERED BY VCC
SYSTEM_STATUS_LED 58,75
C C
R1243
4.7K/6
VCC3
WDT Function for Google
R113
VCC
VCC
R90
4.7K/6/X
3
D
GS
2
1
2N7002/SOT23/X
GND
PWRBTN 46,58,75
3
Q3
D
GS
2
1
GND
Q4
2N7002/SOT23/X
B B
4.7K/6/X
WDTGPIO
4
GND
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
RI2#
CTS2#
DCD2#
LAD0
SERIRQ
LFRAME
39
40
GPIO40/41/42/43/44/45/46/53/54/55 POWERED BY VCCH
SCRCLK
SCRIO
SCRFETSCRRST
RI1#
SIN1
LAD1
434241
SCRPRES-
GNDD
CTS1#
RTS1#
DTR1#
DSR1#
DCD1#
SOUT1
LAD2
LAD3
KRST#
GA20
PCICLK
CLKRUN#/GP50
CLKIN
GNDD
DENSEL#
MTRA#
MTRB#
DRVA#
DRVB#
R1249
4.7K/6
8P4R-4.7K
WDATA#
VCC
VCC
RN13
44
45464748495051525354555657585960616263
GND
1 2
3 4
5 6
7 8
DIR#
INIT#
STB#
AFD#
ACK#
ERR#
SLIN#
STEP#
HDSEL#
WGATE#
RDATA#
TRK0#
INDEX#
WPT#
64
SIO_VREF
R1314
10K/6/1
TMPIN1
TMPIN2
TMPIN3
JP11
1
2
H1X2
3
PD[0..7]
STBAFDERRINITSLINACK-
U109
BUSY
PE
SLCT
VCC
VIN0
VIN1
VIN2
VIN3
VIN4
VIN5
VIN6
VIN7
VREF
TMPIN1
TMPIN2
TMPIN3
GNDA
CIRRX/GP55
SCRPRES#/GP10
MCLK
MDAT
KCLK
KDAT
SCLK/GP40
SDAT/GP41
RING#/GP53
PSON#/GP42
PANSWH#/GP43
GNDD
PME#/GP54
PWRON#GP44
PSIN/GP45
IRRX/GP46
VBAT
COPEN#
VCCH
IRTX/GP47
DSKCHG#
ITE8712/IC128QFPL/IX
RT2
RT/SMD/R0805/X
C1388
T
0.1U/6
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
TK00RDATAWGATESIDE1STEPDIRWDATADRVBDRVAMOTEBMOTEADENSEL-
R1307 0/6/X
SIO_SCL
SIO_SDA
GND
R1347
10K/6/1
RT3
RT/SMD/R0805
T
PD[0..7] 54
STB- 54
AFD- 54
ERR- 54
INIT- 54
SLIN- 54
ACK- 54
BUSY 54
PE 54
SLCT 54
VCC
VCC
GND
R151 10K/6/B
C1387
1U/6
CLOSE TO 8712
R152 10K/6/B
SIO_VREF
TMPIN1
TMPIN2
TMPIN3
RSMRSTSCRPRES-
R1722 0/6/B/X R115
R1723 0/6/B/X
GND
BMCRST_SIO-
1 2
C1389
0.1U/6
COPEN-
DSKCHG-
C1336
10U/12
5VSB
COPEN- 41
C1337
0.1U/6
R1348
10K/6/1
RT4
RT/SMD/R0805
T
VCC3_DUAL
C1370
0.1U/6
RSMRST- 61,62,75
MCLK 55
MDAT 55
KCLK 55
KDAT 55
SENSOR_SCL 46,58,74,75
SENSOR_SDA 46,58,74,75
C1373
10U/12
GND
GND
11 12
13 14
15 16
17 18
19
21 22
23 24
25 26
27 28
29 30
31 32
33 34
GND
C1390
0.1U/6
VDD_RTC_SIO
FDD1
1 2
3
5
7 8
9 10
FLOPPY/-PIN5
2
3
MIC809SU/MICREL
GND
VCC3_DUAL
4
6
20
U119
RST_
VCC
GND
4.7K/6
VCC3_DUAL
1
2
VCC3_DUAL
GND
246
135
C1335
1U/6/X
R1308
4.7K/6/X
RSMRST-
GND
R1702
4.7K/6/B
POWERED BY
VCCH
R441
4.7K/6
BMCRST_SIO- 75
8
RP161
8P4R-470
7
LFRAME-
LAD3
LAD2
LAD1
LAD0
SERIRQ
R122 0/6/X
R1703 0/6/B/X
LPCPME_L 45,46
PSOUT_L 46
PWRON_IOH 46
DENSEL-
INDEXMOTEADRVBDRVAMOTEBDIRSTEPWDATAWGATETK00WPTRDATASIDE1DSKCHG-
R581
470/6
VCC
R92
8.2K/6
RP97 8P4R-8.2K
1
2
3
4
5
6
7
8
4.7K/6
R466
R118 0/6
PWRON_ATX_L
COPEN-
VCC3
VDD_RTC
R650
1M/6/X
GND
1
PWRON_CPLD 61
PWRON_ATX_L 45,46,61,76
PWRBTN 46,58,75
CASE_OPEN1
2
H1X2
1
Close to ITE8712 VCC pin
A A
C1372
10U/12
5
C1371
10U/12
C1338
0.1U/6
VCC
C1339
C1340
0.1U/6
0.1U/6
GND
4
GND
GIGABYTE THCHNOLOGIES , INC.
Title
ITE8712 LPC SIO
Size Document Number Rev
Custom
3
2
Date: Sheet
GA-7A8DRL
1
53 81 Thursday, November 10, 2005
2.0
of
5
COM PORT
COMA
(UARTA)
NDCDA
NDSRA
NSINA
NRTSA
NSOUTA
NCTSA
NDTRA
NRIA
NDCDB
NSOUTB
EGND_C2
NRTSB
NRIB
EGND2
EGND
COM2
1
3 4
5 6
7 8
H2X5/-PIN_10/BOXED
COMA1
1
6
2
7
3
8
4
9 10
5
COM/ATX
NSINB
2
NDTRB
NDSRB
NCTSB
10 9
11
EGND
C1+
VCC
GND
C1-
INVALIDROUT2B
ROUT1
ROUT2
ROUT3
ROUT4
FORCEON
FORCEOFF-
INVALIDROUT2B
ROUT1
ROUT2
ROUT3
ROUT4
VCC
C556 0.047U/6/B
28
C555 0.33U/6/B
27
V+
C554 0.1U/6/B
26
25
24
R124 0/6/B
23
R133 0/6/B
22
21
20
CTSA-
19
18
17
16
C1+
V+
VCC
GND
C1-
28
27
26
25
24
23
22
21
20
19
18
17
16
RIADSRASINA
DCDA-
VCC
C558 0.047U/6/B
C559 0.33U/6/B
C557 0.1U/6/B
R135 0/6/B
R134 0/6/B
S_CTSBS_RIBS_DSRBS_SINB
S_DCDB-
CTSA- 53
RIA- 53
DSRA- 53
SINA 53
DCDA- 53 RTSA- 53
GND
VCC
GND
VCC
AU1
C4 0.33U/6/B
1
C2+
2
C2-
C18 0.33U/6/B
GND
NRIA 58
SOUTA 53
DTRA- 53
C652 0.33U/6/B
C777 0.33U/6/B
GND
NRIB 58
NCTSA
NRIA
NDSRA
NSINA
NDCDA
NRTSA
NDTRA
NSOUTA
SOUTA
DTRARTSA-
NCTSB
NRIB
NDSRB
NSINB
NDCDB
NRTSB
NDTRB
NSOUTB
S_SOUTB
S_DTRBS_RTSB-
3
V-
4
RIN1
5
RIN2
6
RIN3
FORCEON
7
RIN4
FORCEOFF-
8
RIN5
9
DOUT1
10
DOUT2
11
DOUT3
12
DIN3
13
DIN2
14 15
DIN1 ROUT5
MAX3243/SSOP28/TI/B
BU1
1
C2+
2
C2-
3
V-
4
RIN1
5
RIN2
6
RIN3
7
RIN4
8
RIN5
9
DOUT1
10
DOUT2
11
DOUT3
12
DIN3
13
DIN2
14 15
DIN1 ROUT5
MAX3243/SSOP28/TI/B
NRTSA
NDSRA
NCTSA
NRIA
NDCDA
NSOUTA
NSINA
NDTRA
NDTRB
NSINB
NSOUTB
NDCDB
NRTSB
NDSRB
NCTSB
NRIB
ACP1
8P4C-180P
ACP2
8P4C-180P
BCP1
8P4C-180P
BCP2
8 7
6 5
4 3
2 1
8P4C-180P
8 7
6 5
4 3
2 1
EGND
8 7
6 5
4 3
2 1
EGND
8 7
6 5
4 3
2 1
EGND2
EGND2
+12V
R1279
1K/6
1 2
3
Q155
D
2N7002/SOT23
G S
2
1
GND
R1277
1.5K/6
1 2
+12V
R1280
1 2
1.5K/6
VCC
1 2
R1281
4.7K/6
FANPWM3
Q153
2
1
2N2907A
Q154
2
1
2N2907A
1 2
C799
22U/1210/16V
GND
FANPWM3 74
3
3
0/6/X
R1278
V12_SYS_FAN1
C563
0.1U/6
GND
Layout pattern
Copper pour(+12V)
+12V
Routed
trace
1 2
width > 40
mils
CVS
SYS_FAN1
GND
FAN1x3/W
3
21
VCC
R595
8.2K/6
C562
213
3300P/6/X7R/X
GND
FANIO3
FANIO3 74
2 1
RP164
8P4R-1K
246
135
2 1
4 3
CP31
8P4C-180P
8
7
6 5
8 7
RP165
8P4R/1K/B
246
8
135
7
2 1
4 3
6 5
8 7
CP32
8P4C-0402/180P/B
EGND
R594
1K/6/B
LPD_STBLPD_AFDLPD_INITLPD_SLIN-
LPD_0
LPD_1
LPD_2
LPD_3
LPD_4
LPD_5
LPD_6
LPD_7
ERR-
ACKBUSY
PE
SLCT
C564
180pF/6/B
LPD_STBLPD_AFD-
ERRLPD_INITLPD_SLIN-
ACK-
EGND
LPT1
1 26
14
2
15
3
16
4
17
5
18
6
19
7
20
8
21
9
22
10
23
11
24
12
25
13
LPT/ATX/1UX/5U
EMP / COM2
Multiplexing
S_DCDB-
-EMP_EN
2
S_DSRBS_SINB
S_RTSBS_SOUTB
S_CTSBS_DTRBS_RIB-
VCC
1 2
1 3
R1164
1K/6
VCC
R1162
10K/6
-EMP_EN 75
27
28
R1163
1K/6
Q147
MMBT2222A/SOT23
U98
2
3
4
5
6
7
8
9
1
19
2
3
4
5
6
7
8
9
1
19
4
18
A0
B0
17
A1
B1
16
A2
B2
15
A3
B3
14
A4
B4
13
A5
B5
12
A6
B6
11
A7
B7
20
NC
VCC
10
OE#
GND
FST3245MTC/TSSOP20
GND
U99
18
A0
B0
17
A1
B1
16
A2
B2
15
A3
B3
14
A4
B4
13
A5
B5
12
A6
B6
11
A7
B7
20
NC
VCC
10
OE#
GND
FST3245MTC/TSSOP20
GND GND
GIGABYTE THCHNOLOGIES , INC.
Title
LPT & COM
Size Document Number Rev
C
Date: Sheet
VCC
1 2
C1326
0.1U/6
GND
VCC
C1327
0.1U/6
GND
GA-7A8DRL
BMC_DCDB 75
BMC_DSRB 75
BMC_SINB 75
BMC_RTSB 75
BMC_SOUB 75
BMC_CTSB 75
BMC_DTRB 75
BMC_RIB 75
DCDB- 53
DSRB- 53
SINB 53
RTSB- 53
SOUTB 53
DTRB- 53
RIB- 53
54 81 Thursday, November 10, 2005
of
2.0
5 3
RP163
C561
0.1U/6/X
RP162
8P4R-1K
246
135
2 1
4 3
CP29
8P4C-180P
6 5
8
7
8 7
8P4C-180P
8P4R-1K
246
135
2 1
4 3
CP30
8
7
6 5
8 7
PRT PORT
PD[0..7]
PD[0..7] 53
ERR- 53
ACK- 53 CTSB- 53
BUSY 53
PE 53
SLCT 53
VCC
GND
PD1
STB-
STB- 53
AFD- 53
PD0
SLIN- 53
PD3
INIT- LPD_INIT-
INIT- 53
PD2
PD7
PD6
PD5
PD4
PD1 1N4148/S/B
C560
0.1U/6
RP166 8P4R-33
1
3
5
7
RP167 8P4R-33
1
3
5
7
RP168 8P4R-33
1
3
5
7
2
4
6
8
2
4
6
8
2
4
6
8
EGND
LPD_1
LPD_STBLPD_AFD- AFDLPD_0
LPD_SLIN- SLINLPD_3
LPD_2
LPD_7
LPD_6
LPD_5
LPD_4
D
KEYBOARD & MOUSE CONNECTOR
KB_DT
KB_CK
EGND
MS_DT
MS_CK
CP33
8P4C-180P
VCC_PS2
C565
0.1U/6
C566
0.1U/6/X
EGND
EGND MOAT
CN4
1
KBDAT
2
3
4
5
6
7
8
9
10
11
12
NC
KBGND
KBVCC
KBCLK
NC
MSDAT
NC
MSGND
MSVCC
MSCLK
NC
KBMS/ATX
G
G
G
G
G
13
14
15
16
17
EGND
VCC
GND
SOT-23-5
GND
R596
1K/6
5
U29
IN
OUT
GND
SET /ON
AAT4610IGV
25 mils 25 mils
C567
0.1U/6
FUSEVCC
1
2
3 4
GND
R597
4.53K/6/1
GND GND GND
GND
5VSB
C568
0.1U/6
C569
1U/6
KFB1 FB30/8
C570
0.1U/6
VCC_PS2
R1173 0/6
GND
KBMS_FUSE 75
R1174
8.2K/6
B
5VSB
RUN_EN 61
R89 1K/6/B
C484
0.1U/6/B
5VSB
GND
8 4
U34A
3
+
1
2
-
KA393/TO8/B
GND
R598
1K/6/B
5VSB
8 4
5
+
6
-
GND
U34B
7
KA393/TO8/B
+12V
R599
8.2K/6/B
KDAT
KCLK
MDAT
MCLK
KDAT 53
KCLK 53
MDAT 53
MCLK 53
8P4R-2.2K
1 2
3 4
5 6
7 8
KDAT
KCLK
MDAT
MCLK
R1587 60Z/6
R1588 60Z/6
R1589 60Z/6
R1590 60Z/6
EGND
1 23 45 6
7 8
VCC
RP169
R126
1K/6/B
2
Q43
1000U/6.3V/8X11.5/KZG
3 4
G S
5
D86
1 2
SR32/X
EC84
D
D
GND
SI3443DV/PMOS/TSOP-6
EC85
10U/12/B
5VSB
GND
C
VCC_DUAL
1
D
D
6
+
GND
Q38
D
D
NEC2SK3639/TO252
D87
SR32/X
G
G
S
S
VCC
1 2
C1374
10U/12
GND
GIGABYTE THCHNOLOGIES , INC.
Title
Size Document Number Rev
Custom
Date: Sheet
PS2 DEVICE
GA-7A8DRL
of
55 81 Thursday, November 10, 2005
2.0
VCC3
LPC_RST- 53,61
GND
GPO11 46
RP171 8P4R-8.2K
1
2
3
4
5
6
7
8
R607
10K/6
VCC3
LPC_RSTFGPI3
FGPI2
FGPI1
FGPI0
FWPGPO11
LAD0
LAD0 45,53,75
LAD1
LAD1 45,53,75
LAD2
LAD2 45,53,75
GND
U31
1
NC
2
RST#
3
GPI3
4
GPI2
5
GPI1
6
GPI0
7
WP#
8
TBL#
9
ID3
10
ID2
11
ID1
12
ID0
13
LAD0
14
LAD1
15
LAD2
16 17
GND LAD3
LPC_FLASH_ROM/SST49LF040A
MAIN BIOS PLCC
2nd Source: Winbond W39V040A
4 Mbits LPC flash
VCC
CLK
GPI4
MODE
GND
VCC
INIT#
LFRAME#
RFU
RFU
RFU
RFU
RFU
32
31
30
29
28
27
NC
26
NC
25
24
23
22
21
20
19
18
GND
FWH33
FGPI4
IC
LFRAMEFGP7
FGP6
FGP5
FGP4
LAD3
R602 8.2K/6
R603 8.2K/6
RP172
1
2
3
4
5
6
7
8
8P4R-8.2K/X
To SB
GPO7 46
To SB
GPIO15 46
FWH33 57
GND
LFRAME- 45,53,75
GND
LAD3 45,53,75
GPO7
GPIO15
R604
1K/6
VCC3
R606
8.2K/6
VCC3
R608
R605
8.2K/6
FWP-
GND
HINIT- 48
0/6
BIOS_WP1
1
2
3
JP1X3/2-3 BLUE/X
CLR_PWD1
1
2
JP1X2/BLUE/X
1-2 WRITE PROTECT ENABLE
2-3 WRITE PROTECT DISABLE
OPEN : CLEAR PASSWORD
VCC3
GND
CLOSE : NORMAL:
C8
10U/12
C573
0.1U/6
GND
C574
0.1U/6
LPC_RST-
GND
C575
0.1U/6/X
GIGABYTE THCHNOLOGIES , INC.
Title
Size Document Number Rev
B
Date: Sheet
Bios ROM
GA-7A8DRL
56 81 Thursday, November 10, 2005
of
2.0
1
Sytem Reset # ( O : Watch Dog Register byte 6 b it 6 : 0 )
Power Down # ( I : Watch Dog Register byte 6 bit 6 : 1 )
Slave Address = 1101 0010 h ( D2 h )
SMBUS 2.0 with 100k ohms internal pull-up
resistors ; 5 V tolerance
8P4R-8.2K
FS2
FS1
FS0
FS3
MODE1 =0 PIN24 PCI33_6
MODE1 =1 PIN24 PCISTOP-
CLK14 45
-RESET 58,75
RCC_SCL 13,14,15,16,29,30,31,32,75
RP173
1
3
5
7
R944 2K/6
GND
GND
R617 33/6
VCC3
2
4
6
8
GND
CY 28331 Frequency table & Strap pin
Clock Generator
33pF/6/NP0
C576
X2
14.318M/32P/D
33pF/6/NP0
C577
PCI33_HT66_SEL0
{ 100 K ohms internal pull -up }
RCC_SCL
GND GND
3DVCLK
U32
CLK_X1
3
X1
CLK_X2
4
X2
FS2
45
REF2/FS2
FS1
48
REF1/FS1
FS0
1
REF0/FS0
6
PCI33_LDT66SEL_L
44
#RESET
25 26
SCLK SDATA
33
GNDF
42
GNDA
PCI33_HT66_SEL0
MODE1
PCI33_HT66_SEL0
PCI33_HT66_SEL1
SR_24_48_SEL
3AVCLK
2916192935384643
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
PCI33_F/MODE1
PCI33_LDT66_1
PCI33_LDT66_0/MODE2
24_48MHZ_24_48SEL_L
GND
GND
GND
GND
GND
GND
GND
10152027303439
R624 8.2K/6
R627 8.2K/6
R625 8.2K/6/X
R626 8.2K/6
R628 8.2K/6
47
GND
VDD8
GND
5
32
VDDA
CPUCLKT1
CLK_STOP#
CPUCLKC1
CPUCLKT0
CPUCLKC0
USB/FS3
GND
37
36
41
40
24
PCI33_8
22
PCI33_5
21
PCI33_4
18
PCI33_3
17
PCI33_2
14
PCI33_1
13
PCI33_0
23
12
PCI33_6
11
PCI33_7
8
7
31
28
CY28331
VCC3
For CY28331 only
For ICS950405 only
PULL-DOWN 48MHz
GND
P1_CPUCLK_SR_H
P1_CPUCLK_SR_L
P0_CPUCLK_SR_H
P0_CPUCLK_SR_L
PCICLK0_SR
PCI_IDE_CLK_SR PCI_IDE_CLK
LPC_CLK_IPMI_SR LPC_CLK_IPMI
LPC33_SR
PCICLKF_IOH_SR
PCICLK_VGA_SR PCICLK_VGA
MODE1
FWH33_SR
PCICLKLAN_SR PCICLKLAN
G0_REFCLK_SR
PCI33_HT66_SEL1
FS3
SR_24_48_SEL
R609 15/6
R610 15/6
R611 15/6
R612 15/6
R613 22/6
R137 22/6
R1 22/6
R614 22/6
R615 22/6
R370 22/6
R618 22/6
R619 22/6
R18 22/6
R620 22/6
R622 22/6
R623 22/6
P1_CPUCLK_H
P1_CPUCLK_L
P0_CPUCLK_H
P0_CPUCLK_L
PCICLK0
LPC33
PCICLKF_IOH
PCICLK1 PCICLK1_SR
FWH33
G0_REFCLK
USBCLK
LPC48
P1_CPUCLK_H 23
P1_CPUCLK_L 23
P0_CPUCLK_H 7
P0_CPUCLK_L 7
PCICLK0 50
PCI_IDE_CLK 67
LPC_CLK_IPMI 75
LPC33 53
PCICLKF_IOH 48
PCICLK_VGA 71
PCICLK1 50
FWH33 56
PCICLKLAN 70
G0_REFCLK 39
USBCLK 46
LPC48 53
RCC_SDA 13,14,15,16,29,30,31,32,75
General Clock Layout Rules
1. Place series terminating resistors as close to clock chip pin as possible.
2. Place high frequency decoupling caps next to power pin(s). 1 cap per VDD pin.
3. Minimize layer changes and if routing on bottom layer, add interplane cap
every time a clock line crosses a plane split. Use 0.01uF cap.
4. Place Freq. Select pullup resistors right next to where trace is routed to
minimize stubs.
5. After routing PCI clocks, untwist the nets by pin swapping between PCICLK(0:3),
PCICLK_ROM, PCICLKF_SIO and PCICLKF_IOH.
6. PCICLK(0:3) and PCICLKF_SIO and PCICLKF_IOH and PCICLK_ROM all
need to be
length matched as follows:
6.1 Length match PCICLK(0:3) to within 0.100inch
6.2 Length Match PCICLKF_SIO and PCICLKF_IOH and PCICLK_ROM to be 2.5inch
longer than PCICLK(0:3) to within 0.100inch
6.3 Include length of trace from clock chip pin to series terminator resistor
7. Route CPUCLK_H and CPUCLK_L as differential pair using 20/5/5/5/20 space and
trace width.
8. Use 5/20 or 5/15 trace and space for all other clocks.
9. Place xtal (Y3) next to clock chip and flood surface layer of PC-Board with
ground plane to surround xtal and traces to clock chip pins.
PCI_IDE_CLK
PCICLKLAN
G0_REFCLK
LPC48
USBCLK
FWH33
PCICLKF_IOH
PCICLK0
PCICLK1
PCICLK_VGA
LPC_CLK_IPMI
LPC33
C2 10P/6/X
C435 10P/6/X
C578 10P/6/X
C580 10P/6/X
C581 10P/6/X
C9 10P/6/X
C10 10P/6/X
C14 10P/6/X
C17 10P/6/X
C11 10P/6/X
C13 10P/6/X
C12 10P/6/X
VCC3
C589
C588
0.1U/6
0.1U/6/B
GND
VCC3 VCC3 3AVCLK
FB10 FB30/8
C582
GND
0.1U/6
C431
4.7U/12
C583
0.1U/6
3DVCLK
C584
1U/6
C585
0.1U/6
FB11 FB30/8
C430
4.7U/12
C586
0.1U/6
C587
1U/6/B
5
C598
0.1U/6/B
GND GND
C599
0.1U/6/B
GND
C
ICS950405 Frequency table & Strap pin
MODE A=SEL0
MODE B=SEL1
3DVCLK
C590
0.1U/6/B
C591
0.1U/6/B
C592
0.1U/6/B
C593
0.1U/6/B
C594
0.1U/6/B
C595
0.1U/6/B
C596
0.1U/6/B
C597
0.1U/6/B
D
GIGABYTE THCHNOLOGIES , INC.
1 3 2
Title
Size Document Number Rev
C
Date: Sheet
4
Clock Generator
GA-7A8DRL
57 81 Thursday, November 10, 2005
5
2.0
of
FRONT PANEL
HI
MPD+
LO
MPD-
LO
HI
(YELLOW)
(GREEN)
States for a single-color power LED
LED States
OFF S1,S3,S5
Steady Green
Blinking Green
ACPI States
S0
S0(message waiting)
States for a dual-color power LED
LED States
OFF
Steady Green
Blinking Green
Steady Yellow
Blinking Yellow
ALL_PG_SB 46
-GSM_SYS_RESET 75
-RESET
VCC3_DUAL
R742
1K/6
ACPI States
S5
S0
S0(message waiting)
S1,S3
S1,S3(message
waiting)
5 3
4
GND
D6
1 2
RB751V-40
D17
1 2
RB751V-40
PME_L 41,42,43,44,46,50,62,70,75
WAKE ON LAN
5VSB
R658
10K/6
R660
10K/6
WOL1
D
3
2
1
H1*3/WOL
近
WOL CONN
C608
0.1U/6
GND GND GND GND
MPD+
HI
HI
HI
VCC3_DUAL
U124
1
2
NC7S08/SOT23-5
R652
0/6
MPD-
HI
LO
BLINKING
-RST
MPD+
HI
HI
HI
LO
LO
ALL_PG_SB_BUF 61
VCC3
GND
C607
GND
0.1U/6
-RESET 57,75
MPD-
HI
LO
BLINKING
HI
BLINKING
AATI3522IGY-2.93-50/MIC809-5S-U
R640
U47
1K/6
RST_
3
VCC
GND
C605
0.01U/6
Q78
MMBT2222A/SOT23
SOT23
132
Reset BTN/ POWER LED(GREEN)
RESET_N
R1715
330/6/X
VCC
R631
A C
330/6
HD+
HD-
GND
VCC_DUAL
-SERVICE_SW 75
SENSOR_SDA 46,53,74,75
P1_LINK_LED- 62,65
P2_LINK_LED- 63,65,70
VCC3_DUAL
5VSB
R629
330/6
Q67
MMBT2222A/SOT23
SOT23
132
GND
R635 1K/6
VCC_PWR_LED
C600
0.1U/6
GND
1 2
3 4
5 6
7 8
9
13
15 16
17 18
19
JP2x10/-10-11-12-13-15-17-19
VCC
VCC3
HDLED- 52,66,67
RESET_N
SLPBTN_L
C602
180pF/6/X
R1724
1K/6
R1726 33/6
C1680
1U/6
R1591
330/6/X
VCC
SLEEP_LED
R632
1K/6
-RESET
C601
1U/6
GND
-RST
1
2
GND
R1720
33/6
SLPBTN_L 46
NMI_SW- 46
D80
YELLOW-LED/RA_SMD/X
GND
VCC3
GND
SLEEP_LED
MODEM RING ON
D13
NRIA
NRIB
2
3
1
BAV70
SOT23
NRIA 54
NRIB 54
F_PANEL1
HD+ MPD+
HD- MPD-
PW+
RST-
PW-
RST+
NC
GD+
SPK+
GDGN+
SPK-
GN-
PWRLED+
PW+
-SERVICE_SW
SENSOR_SDA
P1_LINK_LEDP2_LINK_LEDHD+
-NMI_SW
SLPBTN_L
RESET_N
F_SYSRDY_LED
GPIO10
R659
82K/6
SW2
4
6
2
LED_SW/X
GND
14
NC
NC
20
GPIO10 46
GND
3
5
1
GND
PW+
5VSB
SP-
F_PANEL2
1 2
R85 330/6/B
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
HEADER_2X13-14/X
<DUAL COLOR LED>
Q79
MMBT2222A/SOT23
R661
10U/12
8.2K/6
GND
PWRLED+
C606
0.1U/6
GND
GND
Y
SYSTEM_STATUS_LED
G
RI-
SOT23
132
C611
GND
5VSB
R1718
330/6
3
Q193
D
2N7002
G S
2
1
GND
5VSB
PWRLED-
3
Q70
D
2N7002
1
GND GND
PWRLEDID_LED1
SENSOR_SCL
P1_BUSY_LEDP2_BUSY_LED-
HD-
SYSTEM_STATUS_LED-
RI- 46
WOM1
1
2
MRN H1X2/1UX/5U
GND
GND
R1732
330/6
G S
2
VCC_DUAL
ID_LED1 75
SENSOR_SCL 46,53,74,75
P1_BUSY_LED- 62,65
P2_BUSY_LED- 63,65,70
VCC
VCC
R638
1K/6
3
Q190
D
G S
2
1
5VSB
R1737
1K/6/B
3
D
G S
2
1
R1738 0/6/B/X
CUT THIS PIN
2N7002
R643
GPO1
100/6
Q194
2N7002/B
GPO1 46
FROM 8111,
default = Hi
PW+
R645
GPO25
GPO25 46
FROM 8111,
100/6
default =
Low
VCC
F_SYSRDY_LED- F_SYSRDY_LED
VCC VCC
R1727
330/6
3
Q192
D
2N7002
G S
2
1
R1731 100/6
GND
5VSB
123
BZ
BZ1
BUZZER
GND
SYSTEM_STATUS_LED
RP127
SP-
1
3
5
7
8P4R-150
3
D
1
2
4
6
8
R1721
33/6
R1725
330/6
Q191
2N7002
G S
2
R1729 100/6
Q72
MMBT2222A/SOT23
132
GND
GPIO25
Hi
Hi-Low
Hi
Hi
LOW
VCC3_DUAL VCC3_DUAL
R641
1K/6
PW_P
GND
-GSM_PWR_BTN 75
SYS_READY
VCC
R1730
1K/6
Q77
MMBT2222A/SOT23
132
GND
GPIO1
X
LOW
LOW
Yellow LOW
Hi
Yellow-Blinking
Hi
Green
Hi-LOW
Green-Blinking
X
Hi
D19
1N4148/S
D18
1 2
C604
0.01U/6
SYSTEM_STATUS_LED 53,75
5VSB
D12
1N4148/S
Q74
MMBT2222A/SOT23
132
GND
R657
0/6
5VSB
GIGABYTE THCHNOLOGIES , INC.
Title
Size Document Number Rev
C
Date: Sheet
VCC3_DUAL
R1728
1K/6
R653 1K/6
VCC
R648
1K/6/X
BMC_BEEP 75
RB751V-40
1 2
R696
4.7K/6
D16
RB751V-40
SYS_READY 53,75
SPKR 45,47
R656
1K/6
HM_BEEP 74
Front Panel
GA-7A8DRL
1 2
R642
4.7K/6
PWRBTN 46,53,75
58 81 Thursday, November 10, 2005
2.0
of
VCC3
CPLD_TDO
CPLD_TDI
CPLD_TMS
CPLD_TCK
5
GND
VCC3_DUAL VCC3_DUAL
36
VCC
35
TDO
34
B11
33
B10
32
B9
31
B8
30
29
GND
28
B7
27
B6
26
B5
25
TMS
P0_VDD_2D5V_PG
VDD_1D8V_PG 77
P0_VCORE_EN 59
-SERVICE_SW_PLD 75
RSMRST- 53,62,75
P1_VDD_2D5V_PG 25
P1_VTT_DDR_PG 25
CPLD_TDO
ALL_PG
C547 0.1U/6
P1_VRM_PG
RUN_EN
CPLD_TMS
GND
P0_VDD_2D5V_PG 9
P1_PRESENT- 26,75
VDD_1D8V_EN 77
RPWRON 46
ALL_PG 75
GND
P1_VRM_PG 60
RUN_EN 55
VDDA_1D8V_EN 40
VCC3
NOTE: Thor can only
drive 4mA on RESET_L.
RESET_L 46
PCI_RESET BUFFER
GND
RESET_L
C492
0.1U/6
RESET_BUF
RESET_BUF
141312111098
I5O5I4O4I3
VCC
I0O0I1O1I2O2GND
1234567
U24
O3
74LCX14/TSSOP14
R486 22/6
R487
22/6
PCI_IDE_RST- 67
PWROK
R484 0/6/X
GND
LPC_RST-
ATXPWROK 76
R147 0/6
RESET_G0- 39
LPC_RST- 53,56
P0_VCORE_EN
P0_VDDA_2D5V_EN 9
P1_VCORE_EN 60
P0_VDD2D5V_VTT_EN 11
U107
CPLD_TDI
P1_VDDA_2D5V_EN 25
U108
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
JTAG_CON
GND
P0_VRM_PG 59
-SERVICE_LED 75
P1_VDDA_2D5V_EN
VLDT_PG 77
VLDT_EN 77
GND
P1_VDDA_2D5V_PG 25
P1_VDD2D5V_VTT_EN 24
P0_VDDA_2D5V_PG 9
RPWRON
P0_VRM_PG
-SERVICE_LED
CPLD_TCK
C548 1U/6
P0_VTT_DDR_PG 9
PWROK
ISPMACH4032/CPLD/C4FE
RPWRON 46
GND
1
TDI
2
A5
3
A6
4
A7
5
GND
6
VCC_B0
7
A8
8
A9
9
A10
10
A11
11
TCK
12
VCC_JTAG
P1_VDDA_2D5V_PG
P0_VDDA_2D5V_PG
P0_VTT_DDR_PG
PWRON_ATX_L 45,46,53,76
PWRON_CPLD 53
46
47
48
A4
GND
1314151617181920212223
GND
SUSCLK 46
A3
A12
A13
R91 0/6/X
A14
A0A1A2
CLK0
A15
CLK1
CLK3
CLK2B0B1B2B3
373839404142434445
B12
B13
B14
B15
GND
VCC_B1
B4
24
VCC3_DUAL
R9
1K/6
VCC3_DUAL
C619 0.1U/6
GND
14 7
ALL_PG
U116F
13 12
74LCX07/TSSOP14
GND
D
11 10
VCC3_DUAL
14 7
1 2
GND
VCC3_DUAL
14 7
U116C
5 6
74LCX07/TSSOP14
GND
VCC3_DUAL
14 7
U116B
3 4
74LCX07/TSSOP14
GND
VCC3_DUAL
14 7
U116D
9 8
74LCX07/TSSOP14
GND
VCC3_DUAL
14 7
U116E
74LCX07/TSSOP14
GND
P0_VDD_2D5V
R11
1K/6/X
U116A
74LCX07/TSSOP14
P0_VDD_2D5V
R12
1K/6/X
VCC3
R13
1K/6/X
VCC3
R14
1K/6
VCC3
R15
1K/6
ALL_PG_P0 7
ALL_PG_P1 23
HTSTOP_IOH_L 45
ALL_PG_G0 39
ALL_PG_SB_BUF 58
GND
C620 0.1U/6
HTSTOP_IOH_L
VCC3_DUAL
14 7
11 10
GND
VCC3_DUAL P0_VDD_2D5V
R26
1K/6
U117E
74LCX07/TSSOP14
GND
VCC3_DUAL
14 7
3 4
GND
VCC3_DUAL
14 7
1 2
GND
VCC3_DUAL
14 7
5 6
GND
VCC3_DUAL
14 7
9 8
GND
VCC3_DUAL
14 7
13 12
GND
U117B
74LCX07/TSSOP14
P0_VDD_2D5V
U117A
74LCX07/TSSOP14
VCC3
U117C
74LCX07/TSSOP14
VCC3
U117D
74LCX07/TSSOP14
U117F
74LCX07/TSSOP14
R27
1K/6/X
R28
1K/6/X
R29
1K/6/X
R30
1K/6
To Opteron0
LDT_STOP0_L 7
To Opteron1
LDT_STOP1_L 23
To Golem0
LDT_STOP2_L 39
VCC3
LPC_RST
RESET_PCI_LAN- 70
RESET_PCA- 75
RESET_PCI1- 50
C1369
141312111098
0.1U/6
2 1
GND
LPC_RSTLPC_RST
I5O5I4O4I3
VCC
I0O0I1O1I2O2GND
1234567
O3
GND
U118
74LCX14/TSSOP14
-PCIRST_IPMI 75
RESET_PCI0- 50,71
1 5 2 3 4
GIGABYTE THCHNOLOGIES , INC.
Title
Power Sequencing Circuit
Size Document Number Rev
C
Date: Sheet
GA-7A8DRL
of
61 81 Thursday, November 10, 2005
2.0
5
4
3
2
1
G0_B_AD0
G0_B_PAR 39,41,42
G0_B_PAR64 39,41,42
G0_B_IRDY_L 39,41,42
G0_B_TRDY_L 39,41,42
G0_B_STOP_L 39,41,42
1 2
1 2
G0_B_AD1
G0_B_AD2
G0_B_AD3
G0_B_AD4
G0_B_AD5
G0_B_AD6
G0_B_AD7
G0_B_AD8
G0_B_AD9
G0_B_AD10
G0_B_AD11
G0_B_AD12
G0_B_AD13
G0_B_AD14
G0_B_AD15
G0_B_AD16
G0_B_AD17
G0_B_AD18
G0_B_AD19
G0_B_AD20
G0_B_AD21
G0_B_AD22
G0_B_AD23
G0_B_AD24
G0_B_AD25
G0_B_AD26
G0_B_AD27
G0_B_AD28
G0_B_AD29
G0_B_AD30
G0_B_AD31
G0_B_AD32
G0_B_AD33
G0_B_AD34
G0_B_AD35
G0_B_AD36
G0_B_AD37
G0_B_AD38
G0_B_AD39
G0_B_AD40
G0_B_AD41
G0_B_AD42
G0_B_AD43
G0_B_AD44
G0_B_AD45
G0_B_AD46
G0_B_AD47
G0_B_AD48
G0_B_AD49
G0_B_AD50
G0_B_AD51
G0_B_AD52
G0_B_AD53
G0_B_AD54
G0_B_AD55
G0_B_AD56
G0_B_AD57
G0_B_AD58
G0_B_AD59
G0_B_AD60
G0_B_AD61
G0_B_AD62
G0_B_AD63
G0_B_CBE_L0
G0_B_CBE_L1
G0_B_CBE_L2
G0_B_CBE_L3
G0_B_CBE_L4
G0_B_CBE_L5
G0_B_CBE_L6
G0_B_CBE_L7
G0_B_PAR
G0_B_PAR64
G0_B_FRAME_L
G0_B_IRDY_L
G0_B_TRDY_L
G0_B_STOP_L
GLAN_IDSEL
G0_B_DEVSEL_L
GIGA1_VIVO1_2
GIGA1_VIVO1_2
G0_B_REQ64_L
G0_B_ACK64_L
G0_B_REQ_L0
G0_B_GNT_L0
G0_B_LOCK_L
G0_B_INTA_L
G0_B_M66EN
G0_B_RST_LAN_L
RSMRSTLAN1_PME_N
RESERVED30
LAN1_AUX_PWR
GND_R1
D D
1 2
C C
B B
G0_B_AD[0..63] 39,41,42
G0_B_CBE_L[0..7] 39,41,42
JP9
1
R1714
0/6/B
2
3
H1X3/LAN1_E/Short_1-2/X
HARDWARE DISABLE JUMPER
PCI-X
VIO = 3.3V
G0_B_M66EN 39,41,42
R1 Reserved29,
L20
Reserved30
G0_B_PCLKLAN 39
VCC3_DUAL
GND
G0_B_RST_LAN_L 38
R1452 100/6
1 2
GND
VCC3_DUAL
GND
GND
C1580
10P/6/X
RSMRST- 53,61,75
PME_L 41,42,43,44,46,50,58,70,75
R1470 10K/6
1 2
G0_B_INTB_L 39,41,42
G0_B_AD[0..63]
G0_B_CBE_L[0..7]
G0_B_AD19
GLAN_IDSEL
1 2
R1453
100K/6
GIGA1_VIVO1_2
1 2
C1574
0.01U/6
G0_B_M66EN
1 2
R1465
0/6/X
GND
G0_B_FRAME_L 39,41,42
G0_B_DEVSEL_L 39,41,42
G0_B_REQ64_L 39,41,42
G0_B_ACK64_L 39,41,42
G0_B_REQ_L0 39
G0_B_GNT_L0 39
1 2
G0_B_LOCK_L 41,42
G0_B_INTA_L 39,41,42
R1468 0/6
R1469 1K/6
R1471 0/6
1 2
R1472 0/6/X
82545GM Gigabit LAN Controller
A A
U142A
T14
AD0
V14
82545EM/
AD1
Y15
AD2
W14
AD3
T13
AD4
82546EB
V13
AD5
Y14
AD6
U12
AD7
V12
AD8
T12
AD9
W12
AD10
Y12
AD11
V11
AD12
T11
AD13
Y11
AD14
W10
AD15
U8
AD16
Y7
AD17
Y6
AD18
V7
AD19
T7
AD20
W6
AD21
Y5
AD22
V6
AD23
U6
AD24
V5
AD25
W4
AD26
V4
AD27
Y3
AD28
U4
AD29
V3
AD30
V1
AD31
L16
AD32
M20
AD33
M19
AD34
M16
AD35
M18
AD36
M17
AD37
N20
AD38
N16
AD39
P20
AD40
N18
AD41
P19
AD42
P16
AD43
R20
AD44
P18
AD45
P17
AD46
T20
AD47
R16
AD48
U20
AD49
R18
AD50
T19
AD51
V20
AD52
T18
AD53
W20
AD54
V19
AD55
T17
AD56
U18
AD57
V18
AD58
U16
AD59
V17
AD60
W18
AD61
Y19
AD62
T16
AD63
Y13
CBE#0
V10
CBE#1
T8
CBE#2
Y4
CBE#3
V16
CBE#4
Y18
CBE#5
Y17
CBE#6
T15
CBE#7
U10
PAR
V15
PAR64
V8
FRAME#
W8
IRDY#
Y8
TRDY#
V9
STOP#
T6
IDSEL
T9
DEVSEL#
Y1
VIO
Y20
VIO
U14
REQ64#
W16
ACK64#
W2
REQ#
T3
GNT#
Y9
LOCK#
Y2
INTA#
U2
CLK
Y16
M66EN
T5
RST#
A17
LAN_PWRGD
T4
PME#
L20
APM_WAKEUP/SIG_DETECT_B
R3
AUX_PWR
R1
PWR_STATE1/GND
T1
PWR_STATE0/INTB#
82545GM
SERR#
PERR#
ZN_COMP
ZP_COMP
SMBALRT#/TBI_MODE
RESERVED0/TX_DATA0
RESERVED1/TX_DATA1
RESERVED2/TX_DATA2
RESERVED3/TX_DATA3
RESERVED4/TX_DATA4
RESERVED5/TX_DATA5
RESERVED6/TX_DATA6
RESERVED7/TX_DATA7
RESERVED8/TX_DATA8
RESERVED9/TX_DATA9
RESERVED23/GTX_CLK
RESERVED10/EWRAP
RESERVED11/RX_DATA0
RESERVED12/RX_DATA1
RESERVED13/RX_DATA2
RESERVED14/RX_DATA3
RESERVED15/RX_DATA4
RESERVED16/RX_DATA5
RESERVED17/RX_DATA6
RESERVED18/RX_DATA7
RESERVED19/RX_DATA8
RESERVED20/RX_DATA9
RESERVED21/RBC0
RESERVED22/RBC1
EE_CS
EE_SK
EE_DI
EE_DO
NC/FL_ADDR0
NC/FL_ADDR1
FL_CS#/FL_ADDR2
FL_DATA0/FL_ADDR3
NC/FL_ADDR4
FL_DATA1/FL_ADDR5
FL_DATA3/FL_ADDR6
GND/FL_ADDR7
NC/FL_ADDR8
FL_ADDR9
FL_DATA5/FL_ADDR10
NC/FL_ADDR11
FL_ADDR8/FL_ADDR12
FL_ADDR0/FL_ADDR13
FL_ADDR13/FL_ADDR14
FL_ADDR2//FL_ADDR15
FL_ADDR10/FL_ADDR16
FL_ADDR18/FL_ADDR17
FL_ADDR14/FL_ADDR18
NC/FL_CS#
FL_ADDR11/FL_OE#
FL_ADDR1/FL_WE#
FL_DATA6/FL_DATA0
NC/FL_DATA1
NC/FL_DATA2
AVDDLB2.5/FL_DATA3
FL_OE#/FL_DATA4
FL_DATA7/FL_DATA5
FL_DATA2/FL_DATA6
FL_DATA4/FL_DATA7
LINKA#/LINK_UP#
ACT_A#/RX_ACTIVITY#
NC/TX_ACTIVITY#
NC/LINK10#
LINKA100#/LINK100#
LINKA1000#/LINK1000#
GND/LOS
RESERVED24/XOFF
RESERVED25/XON
FL_WE#/ABV_HI
CTRL15#/BLW_LO
SDPA0/SDP0
SDPA1/SDP1
CTRL25B/SDP2
MDIB[2]+/SDP3
NC/SDP4
MDIB[3]+/SDP6
MDIB[2]-/SDP7
SDPA7/TEST
GND/GMII_TEST0
GND/GMII_TEST1
RESERVED27/COL_TEST
RESERVED28/CRS_TEST
XTAL1
XTAL2
REFA/REF
MDI0+
MDI0MDI1+
MDI1MDI2+
MDI2MDI3+
MDI3-
G0_B_SERR_L
T10
G0_B_PERR_L
Y10
T2
R5
A16
D4
D5
C4
E4
C5
E5
B5
E6
D7
C7
C6
E10
B7
A7
C8
E8
E9
D9
C9
B9
D10
A9
C11
B10
C20
D20
C19
B20
J20
G20
H20
H16
G19
G18
H18
E20
F20
F18
J18
F19
F17
F16
D19
E16
G17
D17
D18
J19
G16
E18
K17
K19
K20
L18
K18
K16
J16
J17
M1
-LAN1_ACT
N1
N2
M3
N4
N3
A10
A20
B18
C17
A18
G4
G5
H5
J1
J4
J3
J2
E11
K4
K5
E7
A6
LAN1_XTAL1
A3
LAN1_XTAL2
A4
VREFA
E3
B2
B1
C2
C1
D2
D1
E2
E1
P33 W1: Del R942, A10 connect to GND (82545)
P33 W1: Del R460, R461, K4, K5 connect to GND (82545)
R1448 33.2/6/1
LAN1_ZN_COMP
LAN1_ZP_COMP
-G_SMB_ALRT
1 2
R1449 53.6/6/1
1 2
R1450 1K/6/X
1 2
R1451 0/6
1 2
Reserved [23:0] NOT need to pull-low
LAN1_EE_CS
LAN1_EE_SK
LAN1_EE_DI
LAN1_EE_DO
GND
VCC25_SB
1 2
C1577
0.1U/6
GND
U143
1 8
CS VCC
2
SK
3 6
DI ORG
4 5
DO GND
1 2
93C66/3V
R1454
10K/6/X
Vender
GND
Catalyat
ST
1 2
R1459
330/6/X
GND
GND
EEPROM AVL
VCC3_DUAL VCC3_DUAL
[Ball A20, B18, M5] Reserved24, 25, 26 connect t o G N D di r e ctly
P3_TRD2P
P3_TRD3P
P3_TRD2N
P1_TRD0P
P1_TRD0N
P1_TRD1P
P1_TRD1N
P1_TRD2P
P1_TRD2N
P1_TRD3P
P1_TRD3N
P3_TRD2P 65
P3_TRD3P 65
P3_TRD2N 65
GND
1 2
1 2
P1_TRD0P 65
P1_TRD0N 65
P1_TRD1P 65
P1_TRD1N 65
P1_TRD2P 65
P1_TRD2N 65
P1_TRD3P 65
P1_TRD3N 65
R1466 1K/6
R1467 2.49K/6/1
G0_B_SERR_L 39,41,42
G0_B_PERR_L 39,41,42
VCC3_DUAL
VCC3_DUAL
GND
LAN1_SMB_ALERT- 75
VCC3_DUAL
7
NC
P/N
AT93C46 Atmel
CAT93C46
M93C46
1 2
R1460
330/6/X
P1_LINK_LEDP1_BUSY_LED-
P1_100_LEDP1_1000_LED-
GND
GND
R441 NC for 82545/6
1 2
C1573
1U/6
GND
P1_LINK_LED- 58,65
P1_BUSY_LED- 58,65
P1_100_LED- 65
P1_1000_LED- 65
LAN1_XTAL1
LAN1_XTAL2
22P/6
1 2
C1581
Y3
25MHZ_50PPM/SMD
22P/6
1 2
C1582
FAR AWAY LAN1 DIFF PAIRS
Keep PAIR at least 100 mils from
EACH OTHER.
P1_TRD0P
P1_TRD0N
P1_TRD1P
P1_TRD1N
P1_TRD2P
P1_TRD2N
P1_TRD3P
P1_TRD3N
P3_TRD0P 63,65
P3_TRD0N 63,65
P3_TRD1P 63,65
P3_TRD1N 63,65
GND
P3_TRD2P 65
GND
P3_TRD2N 65
P3_TRD3P 65
P3_TRD3N 63,65
P3_TRD0P
P3_TRD0N
P3_TRD1P
P3_TRD1N
P3_TRD2P
P3_TRD2N
P3_TRD3P
P3_TRD3N
1 2
1 2
R1455
49.9/6/1
R1461
49.9/6/1
Reserved for 82546
CLOSE TO 82545 LAN CHIP
1 2
1 2
R1457
R1456
49.9/6/1
49.9/6/1
1 2
C1575
0.01U/6
1 2
R1462
49.9/6/1
1 2
C1578
0.01U/6
GND GND
1 2
R1481
49.9/6/1/X
1 2
1 2
R1485
49.9/6/1/X
1 2
GND GND
1 2
1 2
R1463
49.9/6/1
1 2
1 2
R1482
49.9/6/1/X
C1613
0.01U/6/X
GND GND
1 2
R1486
49.9/6/1/X
C1615
0.01U/6/X
C1576
0.01U/6
GND GND
C1579
0.01U/6
1 2
1 2
1 2
R1458
49.9/6/1
1 2
R1464
49.9/6/1
R1483
49.9/6/1/X
R1487
49.9/6/1/X
1 2
C1614
0.01U/6/X
1 2
C1616
0.01U/6/X
1 2
1 2
R1484
49.9/6/1/X
R1488
49.9/6/1/X
CLOSE TO 82545 LAN CHIP
GIGABYTE THCHNOLOGIES , INC.
Title
82545GM_CONTROLLER
Size Document Number Rev
C
5
4
3
2
Date: Sheet
GA-7A8DRL
1
62 81 Thursday, November 10, 2005
2.0
of
5
4
3
2
1
VCC3_DUAL VCC3_DUAL
1 2
C1539
10U/12/B
1 2
C1549
0.01U/6/B
1 2
C1554
10U/12
1 2
C1600
1U/6/B
1 2
C1560
1U/6/B
TP328
TP329
1 2
C1540
10U/12/B
1 2
C1550
0.1U/6
1 2
C1590
10U/12/B
1 2
C1602
0.01U/6/B
VCC3_DUAL
R1433
1K/6
1 2
1 2
GND
5
R1437
1K/6
1 2
C1538
10U/12
GND
D D
VCC3_DUAL
1 2
C1548
0.01U/6
GND
VCC15_SB
1 2
C1553
10U/12/B
GND
C C
VCC15_SB
1 2
C1599
1U/6/B
GND
VCC15_SB
1 2
C1601
10U/12/B
GND
B B
A A
1 2
1 2
1 2
C1551
0.01U/6
C1591
10U/12
C1561
0.1U/6/B
R1434
1K/6
1 2
1 2
C1541
1U/6/B
GND
1 2
C1552
0.1U/6
1 2
C1603
0.1U/6/B
GND
VCC3_DUAL
P2_LINK_LED- 58,65,70
LAN_SCL 70,75
LAN_SDA 70,75
VCC3_DUAL
VCC3_DUAL
VCC3_DUAL
1 2
1 2
VCC25_SB
1 2
C1604
10U/12
1 2
C1542
1U/6/B
1 2
C1622
0.01U/6
1 2
C1605
1U/6
R1435 330/6/X
1 2
R1438 0/6
1 2
R1440 0/6
1 2
R1441 4.7K/6/X
1 2
R1442 4.7K/6/X
1 2
R1443 330/6/X
1 2
C1543
1U/6/B
C1584
0.1U/6
VCC3_DUAL
VCC15_SB
1 2
1 2
1 2
1 2
GND
1 2
C1562
0.01U/6/B
C1544
1U/6
C1585
0.01U/6
C1555
10U/12/B
C1594
1U/6/B
GND
1 2
C1545
1U/6/B
1 2
C1586
0.1U/6
1 2
C1556
0.01U/6/B
1 2
C1595
10U/8/B
R1432
10K/6/X
1 2
1 2
C1563
0.1U/6/B
R1505 0/6/X
P2_BUSY_LED- 58,65,70
P2_1000_LED- 65,70
P2_100_LED- 65,70
4
1 2
1 2
C1546
C1547
1U/6/B
1U/6/B
1 2
1 2
C1587
C1588
0.01U/6
0.1U/6
1 2
1 2
C1593
C1592
0.1U/6/B
0.1U/6/B
GND
1 2
1 2
C1597
C1596
0.1U/6/B
0.1U/6/B
VCC15_SB
1 2
C1559
1000U/6.3V/8X11.5/KZG
GND
A8 TEST# NOT need pull low
1 2
C1564
0.1U/6/B
G_TCK
G_TDI
G_TDO
G_TMS
G_TRST
GLAN_SCL
GLAN_SDA P3_TRD0N
R1499 0/6/X
R1500 0/6/X
R1501 0/6/X
VCC3_DUAL
1 2
C1583
1U/6/B
1 2
C1589
0.01U/6
1 2
C1598
1U/6/B
P2_LINK_LED-
-LAN2_ACT
-LAN2_1000_SPD
-LAN2_100_SPD
U142B
B8
VDD3.3_0
B14
VDD3.3_1
B19
VDD3.3_2
C10
VDD3.3_3
D6
VDD3.3_4
D11
VDD3.3_5
E17
VDD3.3_6
H4
VDD3.3_7
H19
VDD3.3_8
L17
VDD3.3_9
M2
VDD3.3_10
N19
VDD3.3_11
R4
VDD3.3_12
R17
VDD3.3_13
U1
VDD3.3_14
U3
VDD3.3_15
U7
VDD3.3_16
U11
VDD3.3_17
U15
VDD3.3_18
U19
VDD3.3_19
W5
VDD3.3_20
W9
VDD3.3_21
W13
VDD3.3_22
W17
VDD3.3_23
B4
AVDDH3.3_0/AVDDH
C16
AVDDH3.3_1/VDDO
F1
AVDDH3.3_2/AVDDH
W1
AVDDH3.3_3/VDDO
G7
DVDDH1.8_0/DVDD1.5
G8
DVDDH1.8_1/DVDD1.5
G9
DVDDH1.8_2/DVDD1.5
G12
DVDDH1.8_3/DVDD1.5
G13
DVDDH1.8_4/DVDD1.5
G14
DVDDH1.8_5/DVDD1.5
H7
DVDDH1.8_6/DVDD1.5
H8
DVDDH1.8_7/DVDD1.5
H13
DVDDH1.8_8/DVDD1.5
H14
DVDDH1.8_9/DVDD1.5
J7
DVDDH1.8_10/DVDD1.5
J14
DVDDH1.8_11/DVDD1.5
M7
DVDDH1.8_12/DVDD1.5
M14
DVDDH1.8_13/DVDD1.5
N7
DVDDH1.8_14/DVDD1.5
N8
DVDDH1.8_15/DVDD1.5
N13
DVDDH1.8_16/DVDD1.5
N14
DVDDH1.8_17/DVDD1.5
P7
DVDDH1.8_18/DVDD1.5
P8
DVDDH1.8_19/DVDD1.5
P9
DVDDH1.8_20/DVDD1.5
P12
DVDDH1.8_21/DVDD1.5
P13
DVDDH1.8_22/DVDD1.5
P14
DVDDH1.8_23/DVDD1.5
A8
DVDDL1.5_0/TEST(82545)
A11
DVDDL1.5_1/NC
A12
DVDDL1.5_2/NC
H1
DVDDL1.5_3/NC
A19
AVDDL2.5_0
G1
AVDDL2.5_1
G2
AVDDL2.5_2
G3
AVDDL2.5_3
P1
JTAG_TCK
P4
JTAG_TDI
P2
JTAG_TDO
P5
JTAG_TMS
N5
JTAG_TRST#
A13
NC/LINKB#
A14
NC/SMBCLK
A15
NC/SMBDAT
B12
NC/SDPB1
B13
NC/ACT_B#
B15
NC/FL_ADDR12
B16
NC/FL_ADDR7
C12
NC/SDPB6
C13
NC/LINKB1000#
C14
NC/LINKB100#
C15
NC/FL_ADDR15
C18
NC/FL_ADDR17
D12
NC/SDPB7
D13
NC/SDPB0
D15 D16
NC/FL_ADDR6 FL_ADDR16/NC
82545GM
82545EM/
82546EB
3
NC/MDIB[1]+/GND_27
RESERVED26/GND_48
GND_0
GND_1
GND_2
GND_3
GND_4
GND_5
GND_6
GND_7
GND_8
GND_9
GND_10
GND_11
GND_12
GND_13
GND_14
GND_15
GND_16
GND_17
GND_18
GND_19
GND_20
GND_21
GND_22
GND_23
GND_24
GND_25
GND_26
GND_28
GND_29
GND_30
GND_31
GND_32
GND_33
GND_34
GND_35
GND_36
AVDDLB2.5/GND_37
GND_38
GND_39
GND_40
GND_41
GND_42
GND_43
GND_44
GND_45
GND_46
GND_47
GND_49
GND_50
GND_51
GND_52
GND_53
GND_54
GND_55
GND_56
GND_57
GND_58
GND_59
GND_60
GND_61
GND_62
GND_63
GND_64
GND_65
GND_66
GND_67
GND_68
GND_69
GND_70
GND_71
GND_72
GND_73
CLK_VIEW/NC
AVDDLB2.5/NC
REFB/NC
MDIB[0]-/NC
MDIB[1]-/NC
MDIB[0]+/NC
MDIB[3]-/NC
CTRL_25/NC
FL_ADDR3/NC
FL_ADDR4/NC
FL_ADDR5/NC
SDPA6/NC
NC
NC
NC
A1
A2
A5
B3
B6
B11
B17
C3
D3
D8
D14
E19
F3
G10
G11
H2
H9
H10
H11
H12
H17
J8
J9
J10
J11
J12
J13
K1
K2
K7
K8
K9
K10
K11
K12
K13
K14
L2
L7
L8
L9
L10
L11
L12
L13
L14
L19
M4
M5
M8
M9
M10
M11
M12
M13
N9
N10
N11
N12
N17
P10
P11
R2
R19
U5
U9
U13
U17
V2
W3
W7
W11
W15
W19
P3
L5
L4
L3
L1
K3
J5
H3
F5
F4
F2
E15
E14
E13
E12
82545EM Power Comsumption
VCC3
VCC25
VCC15
82546EB Power Comsuption
VCC3
VCC25
VCC15
D3 cold wake enable 3V3_SB is about 500mA
P3_TRD1P
VCC25_SB
1 2
C1557
10U/12
GND
[Ball A20, B18, M5] Reserved24, 25, 26 connect to GND directly
GND
R1436 1K/6/X
1 2
VREFB
P3_TRD1N
P3_TRD0P
P3_TRD3N
P3_TRD1P 62,65
1 2
C1558
0.1U/6/B
R1439 2.49K/6/1
1 2
P3_TRD0N 62,65
P3_TRD1N 62,65
P3_TRD0P 62,65
P3_TRD3N 62,65
2
W1: Del SC381, Q51, R433, R434, C384, SC382, SC383,
P34
82545EM do not use VCC18
Typ Current (mA)
155mA
175mA
Max Current (mA)
195mA
195mA
575mA 550mA
2.1W 1.8W
Typ Current (mA)
240mA
280mA
740mA
Max Current (mA)
265mA
290mA
845mA
3.1W 2.6W
GND
GIGABYTE THCHNOLOGIES , INC.
Title
82545GM_POWER
Size Document Number Rev
Custom
Date: Sheet
GND
VCC25_SB
1 2
C1565
10U/12
GND
1 2
C1566
0.1U/6
GA-7A8DRL
1
63 81 Thursday, November 10, 2005
2.0
of
A
B
C
D
E
82545EM Power Comsumption
Typ Current (mA)
VCC3
4 4
VCC3_DUAL
VCC15
VCC25
175mA
550mA
1.8W
1 2
C1567
10U/12
VCC25_SB
GND
C1568
10U/12
1 2
1 2
3 3
GND
C1569
0.1U/6/B
1 2
R1444
22.1K/6/1
1 2
R1445
20K/6/1
GND
Layout Notice
U141
1
EN
2
VIN
3
VOUT
4 5
VADJ GND1
SC1565IS-2.5TR/SO8
Vdrop = 0.8 volt ,
Pd = 0.328 watt
8
GND4
7
GND3
6
GND2
GND VIA =
Thermal
Via
GND
GND
Shape
Static Ambient Temp 0-70 C
82546EB Power Comsumption
VCC3 265mA 240mA
280mA
VCC15
Static Ambient Temp 0-55 C
740mA
2.6W
Max Current (mA)
195mA 155mA
195mA
575mA
1.065A
2.1W
Tj_max is 120 C
Max Current (mA) Typ Current (mA)
290mA VCC25
840mA
1.6A
3.1W
Tj_max is 120 C
Q177
APL1084/TO-252
C1572
4.7U/12
2
1
3
C1571
0.1U/6
GND GND
2 2
VCC3_DUAL
1 2
R1446
100/6/1
R1447
20/6/1
1 2
GND
1 1
VCC15_SB
C1570
0.1U/6/B
GND
GIGABYTE THCHNOLOGIES , INC.
Title
82545GM_1.5_2.5_POWER
Size Document Number Rev
A4
A
B
C
Date: Sheet
D
GA-7A8DRL
of
64 81 Thursday, November 10, 2005
E
2.0
5
4
VCC25_SB
3
2
1
D D
P1_TRD0P 62
P1_TRD0N 62
P1_TRD1P 62
P1_TRD1N 62
P1_TRD2P 62
P1_TRD2N 62
P1_TRD3P 62
P1_TRD3N 62
C C
P2_TRD0P 70
P3_TRD0P 62,63
P2_TRD0N 70
P3_TRD0N 62,63
P2_TRD1P 70
P3_TRD1P 62,63
P2_TRD1N 70
P3_TRD1N 62,63
P2_TRD2P 70
P3_TRD2P 62
P2_TRD2N 70
P3_TRD2N 62
B B
P2_TRD3P 70
P3_TRD3P 62
P2_TRD3N 70
P3_TRD3N 62,63
R1473 0/6
R1474 0/6/X
R1475 0/6
R1490 0/6/X
R1476 0/6 C647 1000P/6/B
R1491 0/6/X
R1477 0/6
R1492 0/6/X
R1478 0/6
R1493 0/6/X
R1480 0/6
R1494 0/6/X
R1479 0/6
R1495 0/6/X
R1489 0/6
R1496 0/6/X
GLAN2_TRD0+
GLAN2_TRD0-
GLAN2_TRD1+
GLAN2_TRD1-
GLAN2_TRD2+
GLAN2_TRD2-
GLAN2_TRD3+
GLAN2_TRD3-
GLAN2_TRD0+
GLAN2_TRD0GLAN2_TRD1+
GLAN2_TRD1-
GLAN2_TRD2+
GLAN2_TRD2GLAN2_TRD3+
GLAN2_TRD3-
R1293
0/6
C1356
0.1U/6
GND
R1294
0/6
VLANCOM2
10
C1357
0.1U/6
1
2
3
4
5
6
7
8
9
GLAN1
TRD0+
TRD0TRD1+
TRD1COMSHSH
COM
TRD2+
TRD2TRD3+
TRD3-
RJ45-Tab-UP/FRE
11
G+
12
G1
15
16
17
SH
18
SH
13
Y+
14
Y-
R949 330/6
R951
330/6
VLANCOM1
NOTE:placement 2 Res. must close each other
VLANCOM4
VCC25_SB
R1497
0/6/X
R948
0/6
VLANCOM3
10
C1136
0.1U/6/B
GLAN2
1
TRD0+
2
TRD0-
3
TRD1+
4
TRD1-
5
COMSHSH
6
COM
7
TRD2+
8
TRD2-
9
TRD3+
TRD3-
RJ45-Tab-UP/FRE
11
G+
12
G1
15
16
17
SH
18
SH
13
Y+
14
Y-
R963 330/6
330/6
R950
VLANSB18
R1498
0/6
R947
0/6
C1135
0.1U/6/B
VCC3_DUAL
FB33
FB30/8
2.2K/6
R654
P1_BUSY_LED- 58,62
P1_LINK_LED- 58,62
VCC3_DUAL
FB35
FB30/8
2.2K/6
R655
P2_BUSY_LED- 58,63,70
P2_LINK_LED- 58,63,70
1 2
1 2
D62
1 2
D63
1 2
D60
D61
RB751V-40
RB751V-40
RB751V-40
RB751V-40
P2_1000_LED- 63,70
P2_100_LED- 63,70
P1_1000_LED- 62
P1_100_LED- 62
Place across Analog
and Digital GND
C648 10U/12
Digital Analog
C649 1000P/6
C622 10U/12
C650 10U/12
C651 1000P/6
GND
GND
A A
GIGABYTE THCHNOLOGIES , INC.
Title
Size Document Number Rev
Custom
5
4
3
Date: Sheet
2
Giga_LAN_RJ45
GA-7A8DRL
1
65 81 Thursday, November 10, 2005
2.0
of
A
B
C
D
E
ZCR_CON1
G0_A_FRAME_L 38,43,44
G0_A_IRDY_L 38,43,44
4 4
ZCR_CLK 38
C788
10P/6/X
GND
3 3
2 2
1 1
A
G0_A_TRDY_L 38,43,44
G0_A_DEVSEL_L 38,43,44
SODIMM_IDSEL_AD21 43
G0_A_REQ_L2 38
G0_A_GNT_L2 38
G0_A_RST_ZCR_L 38
G0_A_STOP_L 38,43,44
Near
G0_A_FRAME_L
G0_A_IRDY_L
G0_A_TRDY_L
G0_A_DEVSEL_L
SODIMM_IDSEL_AD21
G0_A_REQ_L2
G0_A_GNT_L2
ZCR_CLK
G0_A_RST_ZCR_L
G0_A_STOP_L
G0_A_AD0
G0_A_AD1
G0_A_AD2
G0_A_AD3
G0_A_AD4
G0_A_AD5
G0_A_AD6
G0_A_AD7
G0_A_AD8
G0_A_AD9
G0_A_AD10
G0_A_AD11
G0_A_AD12
G0_A_AD13 G0_A_PAR64
G0_A_AD14
G0_A_AD15
G0_A_AD16
G0_A_AD17
G0_A_AD18
G0_A_AD19
G0_A_AD20
G0_A_AD21
G0_A_AD22
G0_A_AD23
G0_A_AD24
G0_A_AD25
G0_A_AD26
G0_A_AD27
G0_A_AD28
G0_A_AD29
G0_A_AD30
G0_A_AD31
G0_A_AD32
G0_A_AD33
G0_A_AD34
G0_A_AD35
G0_A_AD36
G0_A_AD37
G0_A_AD38
G0_A_AD39
G0_A_AD40
G0_A_AD41
G0_A_AD42
G0_A_AD43
G0_A_AD44
G0_A_AD45
G0_A_AD46
G0_A_AD47
G0_A_AD48
G0_A_AD49
G0_A_AD50
G0_A_AD51
G0_A_AD52
G0_A_AD53
G0_A_AD54
G0_A_AD55
G0_A_AD56
G0_A_AD57
G0_A_AD58
G0_A_AD59
G0_A_AD60
G0_A_AD61
G0_A_AD62
G0_A_AD63
34
FRAME#
35
IRDY#
39
TRDY#
46
DEVSEL#
18
IDSEL
9
REQ#
3
GNT#
73
CLK
2
RST#
44
STOP#
79
AD00
71
AD01
78
AD02
80
AD03
74
AD04
69
AD05
67
AD06
68
AD07
65
AD08
64
AD09
72
AD10
58
AD11
57
AD12
59
AD13
60
AD14
55
AD15
31
AD16
30
AD17
24
AD18
28
AD19
27
AD20
25
AD21
19
AD22
22
AD23
23
AD24
20
AD25
10
AD26
13
AD27
12
AD28
6
AD29
15
AD30
5
AD31
138
AD32
139
AD33
130
AD34
136
AD35
132
AD36
135
AD37
123
AD38
133
AD39
127
AD40
129
AD41
115
AD42
126
AD43
121
AD44
117
AD45
118
AD46
109
AD47
111
AD48
112
AD49
103
AD50
105
AD51
108
AD52
106
AD53
99
AD54
102
AD55
93
AD56
100
AD57
92
AD58
97
AD59
88
AD60
96
AD61
90
AD62
91
AD63
SO_DIMM
B
INTA#
EXT_INTA#
EXT_INTB#
EMRL_EN#
REQ64#
ACK64#
M66EN
SERR#
PERR#
C/BE0#
C/BE1#
C/BE2#
C/BE3#
C/BE4#
C/BE5#
C/BE6#
C/BE7#
PAR
PAR64
3.3V1
3.3V2
3.3V3
3.3V4
3.3V5
3.3V6
3.3V7
3.3V8
3.3V9
3.3V10
3.3V11
3.3V12
3.3V13
3.3V14
3.3V15
3.3V16
3.3V17
3.3V18
3.3V19
3.3V20
3.3V21
3.3V22
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
GND10
GND11
GND12
GND13
GND14
GND15
GND16
GND17
GND18
GND19
GND20
GND21
GND22
GND23
GND24
GND25
GND26
GND27
GND28
GND29
8
142
114
120
40
36
50
45
41
63
49
33
21
83
77
84
87
56
143
4
11
16
26
37
38
43
48
51
53
54
70
81
82
85
94
101
110
113
128
137
144
1
7
14
17
29
32
42
47
52
61
62
66
75
76
86
89
95
98
104
107
116
119
122
124
125
131
134
140
141
EXT_INTAEXT_INTB-
G0_A_REQ64_L
G0_A_ACK64_L
G0_A_M66EN
G0_A_SERR_L
G0_A_PERR_L
G0_A_CBE_L0
G0_A_CBE_L1
G0_A_CBE_L2
G0_A_CBE_L3
G0_A_CBE_L4
G0_A_CBE_L5
G0_A_CBE_L6
G0_A_CBE_L7
G0_A_PAR
HDLED-
GND
SCSI1_FUSE 75
EXT_INTA- 43
EXT_INTB- 43
SCSI2_FUSE 75
G0_A_REQ64_L 38,43,44
G0_A_ACK64_L 38,43,44
G0_A_M66EN 38,43,44
G0_A_SERR_L 38,43,44
G0_A_PERR_L 38,43,44
G0_A_PAR 38,43,44
G0_A_PAR64 38,43,44
VCC3
For SCSI Card
== TermPower
VCC
Near
HDLED- 52,58,67
SCSI HDD LED x1
SCSI Fuse x2
SCSI Fuse x2
C
G0_A_AD[0..63]
G0_A_CBE_L[0..7]
1 2
C1674
0.01U/6
1 2
C1675
0.01U/6
Place these under SO-DIMM connector Layout Notice:
VCC3 VCC3 VCC3 VCC3
G0_A_AD[0..63] 38,43,44
G0_A_CBE_L[0..7] 38,43,44
1 2
1 2
C1676
0.01U/6
C1677
0.01U/6
VCC VCC VCC VCC
VCC3
1 2
GND
VCC3
1 2
GND
C1641
10U/12/B
C1645
0.1U/6
D
1 2
1 2
C1642
10U/12/B
C1646
0.1U/6
Layout Notice:
IDSEL_SCSI
R1
P1_AD18
P1_AD30
P1_AD19
R1, R2 should be very close to y
point of the PCI AD bus
1 2
C1644
10U/12/B
1 2
C1647
0.1U/6
Title
Size Document Number Rev
A3
Date: Sheet
R2
IDSEL_ZCR
CLOSE TO Y POINT
VCC
1 2
GND
C1640
0.1U/6
1 2
C1643
10U/12
GIGABYTE THCHNOLOGIES , INC.
PCIX-SODIMM
GA-7A8DRL
E
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66 81 Thursday, November 10, 2005
2.0
5
P1DSA0
P1DINT
P1IOWRN
P1DMARQ
P1DSD00
U1001A
A_D0
A_D1
A_D2
A_D3
A_D4
A_D5
A_D6
D D
A_D7
A_D8
A_D9
A_D10
A_D11
A_D12
A_D13
A_D14
A_D15
A_D16
A_D17
A_D18
A_D19
A_D20
A_D21
A_D22
A_D23
A_D24
A_D25
A_D26
A_D27
A_D28
A_D29
A_D30
A_D31
C C
10HP2-900867-10
B Version ?
T1DSD02
T1DSD11
T1DSD12
B B
T1DSD13
T1DSD10
T1DSD05
T1DSD04
T1DSD03
T1DSD07
T1DSD08
T1DSD06
T1DSD09
T1DSD01
T1DSD14
T1DSD00
T1DSD15
TRESET
T1IOWRN
T1IORDN
T1DMACKN
T1DSA1
T1DSA0
T1CS0N
T1DSA2
T1CS1N
T1DMARQ
T1DINT
T1CHRDY
A A
D2PSW D3PSW QACSEL TACSEL
VCC3
GND
VCC
TAD7
TDMARQ
TINTRQ
M19
P4
AD0
D0D0
N2
AD1
P3
AD2
N1
AD3
N4
AD4
M2
AD5
N3
AD6
M1
AD7
L2
AD8
M3
AD9
K2
AD10
L4
AD11
K1
AD12
L3
AD13
J2
AD14
K4
AD15
H3
AD16
F2
AD17
G4
AD18
F1
AD19
G3
AD20
E1
AD21
F4
AD22
D1
AD23
E3
AD24
A3
AD25
E2
AD26
A4
AD27
D2
AD28
B5
AD29
B4
AD30
A5
AD31
V9
AD32
Y8
AD33
U8
AD34
W8
AD35
V8
AD36
Y7
AD37
U7
AD38
W7
AD39
V7
AD40
Y6
AD41
U6
AD42
W6
AD43
V6
AD44
Y5
AD45
V5
AD46
Y3
AD47
W5
AD48
Y2
AD49
W4
AD50
W1
AD51
Y4
AD52
V1
AD53
W3
AD54
U2
AD55
V4
AD56
U1
AD57
V2
AD58
T2
AD59
U5
AD60
T1
AD61
U3
AD62
R2
AD63
D2D0
B20
T1DSD00
RN22
1
2
3
4
5
6
7
8
22/8P4R/X
RN24
1
2
3
4
5
6
7
8
22/8P4R/X
RN26
1
2
3
4
5
6
7
8
22/8P4R/X
RN28
1
2
3
4
5
6
7
8
22/8P4R/X
R1659 22/6/X
1 2
R1661 22/6/X
1 2
R1663 22/6/X
1 2
R1665 22/6/X
1 2
R1667 22/6/X
1 2
R1669 22/6/X
1 2
R1671 22/6/X
1 2
R1673 22/6/X
1 2
R1675 22/6/X
1 2
R1681 82/6/X
1 2
R1683 82/6/X
1 2
R1685 82/6/X
1 2
R1686 0/6/X
1 2
R1688 0/6/X
1 2
R1690 4.7K/6/X
1 2
R1692 47K/6/X
1 2
R1694 10K/6/X
1 2
R1695 5.6K/6/X
1 2
R1697 10K/6/X
1 2
P1DSD09
P1DSD04
P1DSD03
P1DSD06
P1DSD08
P1DSD01
P1DSD02
P1DSD05
P1DSD07
M20
L19
L20
K19
K20
J19
J20
K18
D0D1
D0D2
D0D3
D0D4
D0D5
D0D6
D0D7
D0D8
D2D1
D2D2
D2D3
D2D4
D2D5
D2D6
D2D7
D2D8
C19
A19
B18
A18
B17
A17
B16
C16
T1DSD05
T1DSD03
T1DSD04
T1DSD02
T1DSD09
T1DSD01
T1DSD06
T1DSD08
T1DSD07
TAD2
TAD11
TAD12
TAD13
TAD10
TAD5
TAD4
TAD3
TAD7
TAD8
TAD6
TAD9
TAD1
TAD14
TAD0 Q1DSD14
TAD15
TRESETJ
TIOWJ
TIORJ
TDMACKJ
TSA1
TSA0
TCS0J
TSA2
TCS1J
TDMARQ
TINTRQ
TIORDY
TIORDY
TRESET_G
5
PRESET_G
P1DSD12
P1DSD14
P1DSD10
P1DSD13
P1DSD15
P1DSD11
H20
N20
N18
P18
D0D11
D0D12
D0D13
D2D11
D2D12
D2D13
E17
E18
T1DSD12
T1DSD13
P17
R18
D0D14
D0D15
D0RST#
D2D14
D2D15
D2RST#
F18
G17
A16
C20
T1DMARQ
TRESET_G
T1DSD14
T1DSD15
TRESETJ
TAD7
TAD6
TAD5
TAD4
TAD3
TAD2
TAD1
TAD0
TDMARQ
TIOWJ
TIORJ
TIORDY
TDMACKJ
TINTRQ
TSA1
TSA0
TCS0J
T0ASP
GND GND
N19
D0DRQ
D0IOW#
D2DRQ
D2IOW#
D19
T1IORDN
T1IOWRN
1
3
5 6
7 8
9
11 12
13 14
15 16
17 18
19
21 22
23 24
25 26
27 28
29
31 32
33 34
35 36
37 38
39
K17
L18
M18
D0D9
D0D10
D2D9
D2D10
D16
C17
D18
T1DSD10
T1DSD11
GND
P1CS0N
P1DSA1
P1DSA2
P1DMACKN
P1CS1N
P1IORDN
P1CHRDY
P20
P19
D0IOR#
D2IOR#
D20
E19
T1CHRDY
RIDE3 RIDE4
R20
D0RDY
D2RDY
E20
T1DMACKN
hdr20x2/X
D0PSW
P0ASP
S1DSD02
S1DSD00
S1DSD03
S1DSD01
Y16
W17
Y17
R19
D0IRQ
D0ACK#
D2ACK#
D2IRQ
F19
T1DINT
RIDE3
T17
H18
T1DSA2
T20
D0SA2
D2SA2
F20
T1DSA1
T19
D0SA1
D2SA1
G19
T1DSA0
U18
D0SA0
D2SA0
J18
T1CS1N
2
4
10
30
40
W18
U20
T18
U19
D1D0
D1D1
D1D2
D0ASP
D0PSW
D0CS1#
D0CS0#
D2CS1#
D2CS0#
D2PSW
D2ASP
D3D0
D3D1
D3D2
G20
G18
H19
B11
A10
B10A9B9A8B8A7D7C7C8C9C10
T1CS0N
T0ASP
D2PSW
Q1DSD00
Q1DSD01
Q1DSD02
Q1DSD03
TAD8
TAD9 QAD6
TAD10
TAD11
TAD12
TAD13
TAD14
TAD15
R1651 470/6/X
TACSEL
TSA2
TCS1J
GND GND
4
S1DSD11
S1DSD07
S1DSD04
S1DSD10
D1D3
D3D3
Q1DSD04
S1DSD05
Y18
V19
D1D4
D1D5
D3D4
D3D5
Q1DSD05
GND
1 2
C1671
0.047U/6/X
S1DSD06
Q1DSD06
S1DSD14
S1DSD09
S1DSD08
S1DSD13
S1DSD12
Y19
W20
V16
V15
U15
V14
U14
V13
D1D6
D1D7
D1D8
D1D9
D1D10
D1D11
D1D12
D1D13
D3D6
D3D7
D3D8
D3D9
D3D10
D3D11
D3D12
D3D13
C11
Q1DSD12
Q1DSD14
Q1DSD11
Q1DSD13
Q1DSD10
Q1DSD07
Q1DSD08
Q1DSD09
Q1DSD03
1
Q1DSD12
3
Q1DSD02
5
Q1DSD01
7
Q1DSD05
1
Q1DSD10
3
Q1DSD11
5
Q1DSD04
7
Q1DSD07
1
Q1DSD08
3
Q1DSD06 QAD6
5
Q1DSD09
7
Q1DSD13
1
Q1DSD00
3
5
Q1DSD15
7
QRESET
Q1IOWRN
Q1IORDN
Q1DMACKN
Q1DSA1
Q1DSA0
Q1CS0N
Q1DSA2 QSA2
Q1CS1N
Q1DMARQ
Q1DINT
Q1CHRDY
VCC3
GND
VCC
QAD7
QDMARQ
QINTRQ
4
S1IOWRN
S1IORDN
S1CHRDY
S1DMARQ
S1DINT
SRESET_G
S1DMACKN
S1DSD15
V20
W16
Y15
W15
Y14
W14
U13
V12
D1D14
D3D14
C12
D13B7A11
Q1DSD15
R1658 22/6/X
R1660 22/6/X
R1662 22/6/X
R1664 22/6/X
R1666 22/6/X
R1668 22/6/X
R1670 22/6/X
R1672 22/6/X
R1674 22/6/X
R1676 82/6/X
R1682 82/6/X
R1684 82/6/X
R1687 0/6/X
R1689 0/6/X
R1691 4.7K/6/X
R1693 47K/6/X
Y13
D1IRQ
D1D15
D1RDY
D1DRQ
D1IOR#
D1IOW#
D1RST#
D1ACK#
D3D15
D3RST#
D3DRQ
D3IOW#
D3IOR#
D3RDY
D3ACK#
D3IRQ
B12
A12
B13
A13
B14
Q1CHRDY
QRESET_G
Q1DINT
Q1IORDN
Q1DMARQ
Q1DMACKN
Q1IOWRN
RN23
QAD3
2
QAD12
4
QAD2
6
QAD1
8
22/8P4R/X
RN25
QAD5
2
QAD10
4
QAD11
6
QAD4
8
22/8P4R/X
RN27
QAD7
2
QAD8
4
6
QAD9
8
22/8P4R/X
RN29
QAD13
2
QAD0
4
QAD14
6
QAD15
8
22/8P4R/X
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
R1696 10K/6/X
1 2
R1698 5.6K/6/X
1 2
R1699 10K/6/X
1 2
S1DSA1
S1DSA2
V11
W13
D1SA2
D3SA2
C14
A14
Q1DSA1
Q1DSA2
QRESETJ
QIOWJ
QIORJ
QDMACKJ
QSA1
QSA0
QCS0J
QCS1J
QDMARQ
QINTRQ
QIORDY
S1DSA0
Y12
D1SA1
D1SA0
D3SA1
D3SA0
B15
Q1DSA0
S1CS1N
Q1CS1N
S1CS0N
D1PSW
U11
W12
U12
D1PSW
D1CS1#
D1CS0#
PCLK
PREQ#
INTA#
PGNT#
PRST#
IRDY#
IDSEL
DEVSEL#
PERR#
FRAME#
TRDY#
STOP#
ACK64#
REQ64#
PAR64
M66EN
VDDL
VDDL
BE0#
BE1#
BE2#
BE3#
BE4#
BE5#
BE6#
BE7#
GIO2
GIO1
GIO0
CLK5
CLK6
D3CS1#
D3CS0#
D3PSW
C15
A15
C13
Q1CS0N
D3PSW
QIORDY
QRESET_G
S0ASP
Y11
D1ASP
A6
B6
C6
C5
D6
G2
F3
H1
H2
H4
J3
J4
K3
PAR
P1
R3
T4
L1
D14
V10
C18
VDD
D3
VDD
D9
VDD
D12
VDD
E5
VDD
F17
VDD
J5
VDD
M5
VDD
M17
VDD
R5
VDD
T6
VDD
T13
VDD
T15
VDD
T16
VDD
U4
VDD
V18
VDD
M4
J1
G1
C1
R1
T3
P2
R4
W10
Y10
W11
W9
Y9
D3ASP
D15
APT867-B/66MHz/X
Q0ASP
QRESETJ
QAD5
QAD4
QAD3
QAD2
QAD1
QAD0
QDMARQ
QIOWJ
QIORJ
QIORDY
QDMACKJ
QINTRQ
QSA1
QSA0
QCS0J
Q0ASP
GND
A_D[0..31] 47,48,50,70,71
PCI_IDE_CLK
REQ4PIRQCGNT4PCI_IDE_RSTIRDYIDE_IDSEL
DEVSELPERRFRAMETRDYSTOPPAR
D_ACK64_
D_REQ64_
R1603 8.2K/6/X
R1604 8.2K/6/X
GND
VCC
VCC3
C_BE0-
C_BE0- 48,50,70,71
C_BE1-
C_BE1- 48,50,70,71
C_BE2-
C_BE2- 48,50,70,71
C_BE3-
C_BE3- 48,50,70,71
Internal PU
GIO2
GIO1
VCC
1 2
C1662
0.1U/6/B/X
NEAR BALL
GND
RIDE4
1
2
3
4
5 6
7 8
10
9
11 12
13 14
15 16
17 18
19
21 22
23 24
25 26
27 28
29
30
31 32
33 34
35 36
37 38
39
40
hdr20x2/X
GND
GND
VCC3
Below ATP867
1 2
1 2
SC3
0.1U/6/B/X
GND GND GND GND
VCC3
1 2
1 2
C1664
10U/12/B/X
3
PCI_IDE_CLK 57
REQ4- 48,50
PIRQC- 39,48,50
GNT4- 48
PCI_IDE_RST- 61
IRDY- 48,50,70,71
DEVSEL- 48,50,70,71
PERR- 48,50,70
FRAME- 48,50,70,71
TRDY- 48,50,70,71
STOP- 48,50,70,71
PAR 48,50,70,71
R1652 470/6/X
SC4
0.1U/6/B/X
C1665
10U/12/B/X
QAD8 QAD7
QAD9
QAD10
QAD11
QAD12
QAD13
QAD14
QAD15
QACSEL
QSA2
QCS1J
GND GND GND
1 2
SC5
0.1U/6/B/X
1 2
C1666
10U/12/B/X
3
VCC3
1 2
C1672
0.047U/6/X
1 2
1 2
JP14
1
GIO1 GIO2
2
H1X2/X
R1734
470/6/X
GND
R1602 100/6/X
VCC3
R1733
PRESET_G
10K/6/X
GIO1_GATE
VCC3
SRESET_G
R1735
TRESET_G
10K/6/X
GIO2_GATE
QRESET_G
T1CS0N
P1CS0N
P1CS1N
S1CS0N
S1CS1N
T1CS1N
GND
GND
VCC
1 2
C1663
10U/12/X
GND GND GND
1 2
SC6
SC7
0.1U/6/B/X
0.1U/6/B/X
1 2
C1668
C1667
10U/12/B/X
10U/12/B/X
GND GND
A_D23
VCC3
1 2
SC1
0.1U/6/B/X
1 2
SC8
0.1U/6/B/X
1 2
R1614
10K/6/X
1 2
R1626
1K/6/X
A2
B1
B2
B3
B19
C2
C3
C4
D4
D5
D8
D10
D11
D17
E4
E13
E14
E15
E16
F5
G5
H17
J9
J10
J11
J12
J17
K5
JP15
1
2
H1X2/X
VCC
14 7
1
2
GND
4
5
9
10
12
13
1 2
1 2
R1616
R1615
10K/6/X
10K/6/X
1 2
1 2
R1628
R1627
1K/6/X
1K/6/X
U1001B
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GNDL
GNDL
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
APT867-B/66MHz/X
1 2
SC2
0.1U/6/X
1 2
1 2
SC9
0.1U/6/B/X
GND GND GND GND GND
VCC3
1 2
EC145
1000U/6.3V/8X11.5/KZG/X
GND
GIO2_GATE GIO1_GATE
R1736
470/6/X
GND
VCC
1 2
C1681
0.1U/6/X
3
U1003A
74HCT08/TSSOP14/X
6
U1003B
74HCT08/TSSOP14/X
8
U1003C
74HCT08/TSSOP14/X
11
U1003D
74HCT08/TSSOP14/X
1 2
1 2
R1617
R1618
10K/6/X
10K/6/X
1 2
1 2
R1630
R1629
1K/6/X
1K/6/X
K9
GND
K10
GND
K11
GND
K12
GND
L5
GND
L9
GND
L10
GND
L11
GND
L12
GND
L17
GND
M9
GND
M10
GND
M11
GND
M12
GND
N5
GND
N17
GND
P5
GND
R17
GND
T5
GND
T14
GND
U9
GND
U10
GNDL
U16
GND
U17
GND
V3
GND
V17
GND
W2
GND
W19
GND
1 2
SC10
0.1U/6/B/X
PRESET
SRESET
TRESET
QRESET
1 2
R1619
10K/6/X
1 2
R1631
1K/6/X
GND
SC11
0.1U/6/B/X
2
PRESET
P1IOWRN
P1IORDN
P1DMACKN
P1DSA1
P1DSA0
P1CS0N
P1DSA2
P1CS1N
P1DMARQ
P1DINT
P1CHRDY
D0PSW
GND
VCC3
SRESET
S1IOWRN
S1IORDN
S1DMACKN
S1DSA1
S1DSA0
S1CS0N
S1DSA2
S1CS1N
S1DMARQ
S1DINT
S1CHRDY
D1PSW
GND
VCC3
VCC
SAD7
SDMARQ
P0ASP
S0ASP
T0ASP
Q0ASP
R1677
1K/6/X
SINTRQ
2
GND
RN14
P1DSD08
1
P1DSD09
3
P1DSD03
5
P1DSD02
7
22/8P4R/X
RN15
P1DSD07
1
P1DSD06
3
P1DSD04
5
P1DSD05
7
22/8P4R/X
RN16
P1DSD00
1
P1DSD01
3
P1DSD10
5
P1DSD11
7
22/8P4R/X
RN17
P1DSD12
1
P1DSD13
3
P1DSD14
5
P1DSD15
7
22/8P4R/X
R1605 22/6/X
1 2
R1606 22/6/X
1 2
R1607 22/6/X
1 2
R1608 22/6/X
1 2
R1609 22/6/X
1 2
R1610 22/6/X
1 2
R1611 22/6/X
1 2
R1612 22/6/X
1 2
R1613 22/6/X
1 2
R1620 82/6/X
1 2
R1621 82/6/X
1 2
R1622 82/6/X
1 2
R1623 0/6/X
1 2
R1624 0/6/X
1 2
R1625 4.7K/6/X
1 2
R1632 47K/6/X
1 2
VCC
PAD7
R1633 10K/6/X
PDMARQ
PINTRQ
S1DSD03
S1DSD12
S1DSD02
S1DSD13
S1DSD05
S1DSD10
S1DSD04
S1DSD11
S1DSD07
S1DSD08
S1DSD06
S1DSD09
S1DSD01
S1DSD14
S1DSD00
S1DSD15
1 2
R1634 5.6K/6/X
1 2
R1635 10K/6/X
1 2
RN18
1
3
5
7
22/8P4R/X
RN19
1
3
5
7
22/8P4R/X
RN20
1
3
5
7
22/8P4R/X
RN21
1
3
5
7
22/8P4R/X
R1637 22/6/X
1 2
R1638 22/6/X
1 2
R1639 22/6/X
1 2
R1640 22/6/X
1 2
R1641 22/6/X
1 2
R1642 22/6/X
1 2
R1643 22/6/X
1 2
R1644 22/6/X
1 2
R1645 22/6/X
1 2
R1646 82/6/X
1 2
R1647 82/6/X
1 2
R1648 82/6/X
1 2
R1649 0/6/X
1 2
R1650 0/6/X
1 2
R1653 4.7K/6/X
1 2
R1654 47K/6/X
1 2
R1655 10K/6/X
1 2
R1656 5.6K/6/X
1 2
R1657 10K/6/X
1 2
VCC VCC
R1679
R1678
1K/6/X
1K/6/X
PAD8
2
PAD9
4
PAD3
6
PAD2
8
PAD7
2
PAD6
4
PAD4
6
PAD5
8
PAD0
2
PAD1
4
PAD10
6
PAD11
8
PAD12
2
PAD13
4
PAD14
6
PAD15
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
R1680
1K/6/X
D82
2
SOT23
1
D83
2
SOT23
1
BAW56/SOT23/X
PRESETJ
PIOWJ
PIORJ
PDMACKJ
PSA1
PSA0
PCS0J
PSA2
PCS1J
PDMARQ
PINTRQ
PIORDY
PACSEL
PIORDY
PRESET_G
SAD3
SAD12
SAD2
SAD13
SAD5
SAD10
SAD4
SAD11
SAD7
SAD8
SAD6
SAD9
SAD1
SAD14
SAD0
SAD15
SRESETJ
SIOWJ
SIORJ
SDMACKJ
SSA1
SSA0
SCS0J
SSA2
SCS1J
SDMARQ
SINTRQ
SIORDY
SACSEL
SIORDY
SRESET_G
BAW56/SOT23/X
3
3
PRESETJ
1
PAD7
3
PAD6
5 6
PAD5
7 8
PAD4
9
PAD3
11 12
PAD2
13 14
PAD1
15 16
PAD0
17 18
19
PDMARQ
21 22
PIOWJ
23 24
PIORJ
25 26
PIORDY
27 28
PDMACKJ
29
PINTRQ
31 32
PSA1
33 34
PSA0
35 36
PCS0J
37 38
P0ASP
39
S1
Signal
P1CS1N
RAID/Others Subclass
P1CS0N
S1CS1N
S1CS0N
T1CS1N
T1CS0N
GND
SRESETJ
1
SAD7
3
SAD6
5 6
SAD5
7 8
SAD4
9
SAD3
11 12
SAD2
13 14
SAD1
15 16
SAD0
17 18
19
SDMARQ
21 22
SIOWJ
23 24
SIORJ
25 26
SIORDY
27 28
SDMACKJ
29
SINTRQ
31 32
SSA1
33 34
SSA0
35 36
SCS0J
37 38
S0ASP
39
GND
GND
HDLED-
HDLED- 52,58,66
GIGABYTE THCHNOLOGIES , INC.
Title
Size Document Number Rev
C
Date: Sheet
1
RIDE1
RIDE1
2
PAD8
4
PAD9
PAD10
PAD11
10
PAD12
PAD13
PAD14
PAD15
R1601 470/6/X
30
PACSEL
PSA2
PCS1J
40
hdr20x2/X
GND GND
Pull High
(Default)
ID=000A
IO 29h bit7 Value
IO 29h bit6 Value
64K PCI ROM
subclass=RAID
RIDE2
RIDE2
2
SAD8
4
SAD9
SAD10
SAD11
10
SAD12
SAD13
SAD14
SAD15
R1636 470/6/X
30
SACSEL
SSA2
SCS1J
40
hdr20x2/X
GND
1
PRESETJ
3
PAD7
5
PAD6
PAD5
7
9
PAD4
PAD3
11
PAD2
13
15
PAD1
17
PAD0
19
GND
21
PDMARQ
PIOWJ
23
PIORJ
27
PIORDY 28
PDMACKJ
29
31
PINTRQ
PSA1
33
35
PSA0
37
PCS0J
P0ASP
39
ATP867-B 4 PORT IDE
GA-7A8DRL
1
GND
1 2
C1669
0.047U/6/X
GND
Pull Low
ID=000B
SCSI Subclass
128K PCI ROM
subclass=others
GND
1 2
C1670
0.047U/6/X
GND
GND
2
4
PAD8
6
PAD9
8
PAD10
PAD11
10
12
PAD12
PAD13
14
16
PAD14
18
PAD15
20
22
GND
24 GND
GND
26 25
GND
30
GND
32
PACSEL
34
36
PSA2
38
PCS1J
40
GND
of
67 81 Thursday, November 10, 2005
2.0
5
4
3
2
1
Layout pattern
Copper
R1566
+12V
D D
R1568
1K/6/B/X
1 2
3
Q181
D
G S
2
1
C C
GND
1.5K/6/B/X
1 2
+12V
R1569
1 2
1.5K/6/B/X
2N7002/SOT23/B/X
VCC
1 2
R1571
4.7K/6/B/X
FAN_CTRL1
Q179
2
1
2N2907A/B/X
Q180
2
1
2N2907A/B/X
1 2
C801
22u/1210/16V/B/X
GND
FAN_CTRL1 53
0/6/X
3
3
R1567
+12V
1 2
V12_IDE_FAN1
Routed trace
width > 40
mils
C1652
0.1U/6/16V/X
GND
GND
213
CVS
IDE_FAN1
FAN1x3/W/X
VCC
R1570
8.2K/6/X
C1651
3300P/6/X7R/X
GND
pour(+12V)
3
2
FAN_TAC1
1
FAN_TAC1 53
Layout pattern
Copper
pour(+12V)
+12V
R1574
1K/6/X
GND
1 2
3
Q184
D
G S
2
1
B B
A A
R1572
1 2
+12V
R1575
1 2
2N7002/SOT23/X
VCC
1 2
R1577
4.7K/6/X
FAN_CTRL2
5
1.5K/6/X
1.5K/6/X
Q182
2
1
2N2907A/X
Q183
2
1
2N2907A/X
1 2
C802
22U/1210/16V/X
GND
FAN_CTRL2 53
0/6/X
3
3
R1573
+12V
1 2
V12_IDE_FAN2
Routed trace
width > 40
mils
C1654
0.1U/6/16V/X
GND
4
GND
213
CVS
IDE_FAN2
FAN1x3/W/X
VCC
R1576
8.2K/6/X
C1653
3300P/6/X7R/X
GND
2
FAN_TAC2
3
3
1
FAN_TAC2 53
GIGABYTE THCHNOLOGIES , INC.
Title
Size Document Number Rev
A4
Date: Sheet
2
FAN1-2
GA-7A8DRL
of
68 81 Thursday, November 10, 2005
1
2.0
5
D D
C C
4
3
2
1
B B
A A
5
4
3
GIGABYTE THCHNOLOGIES , INC.
Title
Size Document Number Rev
A4
Date: Sheet
2
BLANK
GA-7A8DRL
of
69 81 Thursday, November 10, 2005
1
2.0
5
4
3
2
1
VCC3_DUAL
VLANSB18
A_D[0..31]
A_D[0..31] 47,48,50,67,71
A_D0
A_D1
A_D2
C_BE0- 48,50,67,71
C_BE1- 48,50,67,71
C_BE2- 48,50,67,71
C_BE3- 48,50,67,71
FRAME- 48,50,67,71
IRDY- 48,50,67,71
TRDY- 48,50,67,71
STOP- 48,50,67,71
PAR 48,50,67,71
PIRQA- 39,48,50,71
PERR- 48,50,67
SERR- 48,50
REQ3- 48,50
GNT3- 48
PME_L 41,42,43,44,46,50,58,62,75
X4
25MHZ_50PPM
GND
R1430 100/6
5
A_D3
A_D4
A_D5
A_D6
A_D7
A_D8
A_D9
A_D10
A_D11
A_D12
A_D13
A_D14
A_D15
A_D16
A_D17
A_D18
A_D19
A_D20
A_D21
A_D22
A_D23
A_D24
A_D25
A_D26
A_D27
A_D28
A_D29
A_D30
A_D31
C_BE0C_BE1C_BE2C_BE3-
FRAMEIRDYTRDYDEVSELSTOPPAR
PIRQAPERRSERRIDSEL_LAN
REQ3GNT3M66EN
PCICLKLAN
RESET_PCI_LANPME_L
LAN_PWRGOOD
LAN2_SMB_ALERTLAN_SCL
LAN_SDA
VIO
CLK_RUN-
1 2
22P/6
C1524
CLK_RUN-
GND GND
R1427 0/6
A_D19
IDSEL_LAN
GND
M66EN
D D
C C
B B
VCC3_DUAL
1 2
C1529
22P/6
GND
A A
PCICLKLAN 57
RESET_PCI_LAN- 61
LAN2_SMB_ALERT- 75
LAN_SCL 63,75
LAN_SDA 63,75
R1423
10M/6/X
1 2
22P/6
C1523
VIO
JP10
1
R1713
2
0/6/B
3
H1X3/LAN1_E/Short_1-2/X
DEVSEL- 48,50,67,71
1 2
N7
M7
P6
P5
N5
M5
P4
N4
P3
N3
N2
M1
M2
M3
L1
L2
K1
E3
D1
D2
D3
C1
B1
B2
B4
A5
B5
B6
C6
C7
A8
B8
M4
L3
F3
C4
F2
F1
G3
H3
H1
J1
H2
J2
A2
A4
C3
J3
C2
G1
B9
A6
A9
B10
A10
C9
K14
J14
G2
C8
D9L8D11
U138
AD0
NC
NC
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C/BE0#
C/BE1#
C/BE2#
C/BE3#
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PAR
INTA#
PERR#
SERR#
IDSEL
REQ#
GNT#
M66EN
PCICLK
PCI_RST#
PME#
LAN_PWR_GOOD
SMB_ALERT#
SMB_CLK
SMB_DAT
XTAL1
XTAL2
VIO
CLK_RUN#
B3B7C10
VCC3_DUAL
R1424 3.3K/6
C1530
10U/8
G12
D12A3A7
CLKR_1P8
ANALOG_1P8
ANALOG_1P8
VSS
VSS
VSS
VSS
C12D5D6D7D8
VLANSB18
1 2
GND
VCC3P3
VCC3P3
VSS
VSS
VSS
10U/8
C1531
1 2
VLANSB12
A11E1K3K4K13N6N8P2P12
VCC3P3
VCC3P3
VSS
VSS
D13E2E4E5E6E7E8E9E10F4F5F6F7F8F9
LAN2_SMB_ALERT-
VCC3P3
VSS
C1532
0.1U/6/16V
1 2
VCC3P3
VSS
VCC3P3
VCC3P3
VCC3P3
VCC3P3
VCC3P3
VSS
VSS
VSS
VSS
VSS
Co-layout
(BCP69/SOT223)
4
E11
E12G5G6
ANALOG_1P2
VSS
VSS
FAN1112/SOT223
VLANSB12
G13H5H6H7H8
ANALOG_1P2
ANALOG_1P2
ANALOG_1P2
ANALOG_1P2
VSS
VSS
VSS
VSS
VCC3_DUAL
R1704 3.3K/6
10U/12
H11J5J6J7J8J9J10
ANALOG_1P2
ANALOG_1P2
ANALOG_1P2
ANALOG_1P2
VSS
VSS
VSS
VSS
F10
F11G7G8G9G10
1 2
C1535
GND
ANALOG_1P2
ANALOG_1P2
ANALOG_1P2
ANALOG_1P2
VSS
VSS
VSS
VSS
G11
G14H9H10K2K12L6L11M6N1
R1425
2.2/8/1
Q176
C1536
0.1U/6/16V
J11K5K6K7K8K9K10
ANALOG_1P2
ANALOG_1P2
ANALOG_1P2
ANALOG_1P2
VSS
VSS
VSS
VSS
VSS
VCC3_DUAL
234
1
C1537
10U/8
ANALOG_1P2
ANALOG_1P2
ANALOG_1P2
ANALOG_1P2
ANALOG_1P2
VSS
VSS
VSS
VSS
VSS
N12
GND
R1426
2.2/8/1
1 2
C1533
4.7U/8
R1429 0/6/X
R1431
0/6
GND
K11L4L5L9L10
ANALOG_1P2
ANALOG_1P2
ANALOG_1P2
VSS
P8
1 2
C1534
0.1U/6/16V
LINK_LED
ACTIVITY#
LINK1000#
ANALOG_1P2
ANALOG_1P2
ANALOG_1P2
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TCK
JTAG_TRST_N
XTAL_1.8V
XTAL_CAP
CLKR_CAP
RESERVED_NC
FLSH_SCK
FLSH_CE#
AUX_PWR
RESERVED_NC
IEEE_TEST+
IEEE_TEST-
RESERVED_C
RESERVED_VSS
INTEL 82541GI
VCTRL12
LINK100#
MDI+(0)
MDI-(0)
MDI+(1)
MDI-(1)
MDI+(2)
MDI-(2)
MDI+(3)
MDI-(3)
EECS
EESK
EEDI
EEDO
SDP(7)
SDP(6)
SDP(1)
SDP(2)
TEST
FLSH_SO
FLSH_SI
PLL_1.2V
PLL_1.2V
CTRL_18
CTRL_12
EEMODE
1 2
C1610
1 2
0.1U/6
C1606
1000P/6
2
P2_TRD0P
P2_TRD0N
P2_TRD1P
P2_TRD1N
P2_TRD2P
P2_TRD2N
P2_TRD3P
P2_TRD3N
R1413
49.9/6/1
C1509
0.01U/6
1 2
R1414
49.9/6/1
R1412
R1411
49.9/6/1
49.9/6/1
1 2
C1508
0.01U/6
GND GND GND GND
CLOSE TO 82541 LAN CHIP
VCC3_DUAL
U137
EECS_2
1 8
EEDO_2
2
R1410 3.3K/6
3
4
AT25160/IC8SO
SPI SERIAL EEPROM
GND
CS VCC
SO
HOLD#
WP#
GND
Co-Layout
U1002
EECS_2
1 8
CS VCC
2
SK
3 6
DI ORG
4 5
DO GND
93C46/3V/B/X
C1609
4.7U/12
1 2
GND GND
C1518
C1517
C1516
1 2
1 2
0.1U/6
1000P/6
1000P/6
C1525
0.1U/6/16V
GND GND
GIGABYTE THCHNOLOGIES , INC.
Title
KENAI 32/82541GI
Size Document Number Rev
Custom
Date: Sheet
C1611
1 2
0.1U/6
VCTRL18
C1607
0.1U/6/16V
1 2
1 2
0.1U/6/16V
1 2
C1612
4.7U/8
C1608
EESK_2
EEDI_2
EEDO_2
1 2
SCK
SI
VCC3_DUAL
1 2
C1526
10U/8
R1415
49.9/6/1
C1510
0.01U/6
7
6
5
NC
0.1U/6/16V
1 2
C1519
0.1U/6
C1512
7
EESK_2
EEDI_2
1 2
XTAL_CAP CLKR_CAP
R1417
R1416
49.9/6/1
49.9/6/1
1 2
C1511
0.01U/6
VCC3_DUAL
R1409 3.3K/6
C1507
0.1U/6
VCC3_DUAL
1 2
C1678
0.1U/6/B/X
GND
C1513
C1514
0.1U/6/16V
0.01U/6
1 2
1 2
C1521
C1520
1 2
4.7U/8
1000P/6
C1527
0.1U/6/16V
GA-7A8DRL
1
R1418
49.9/6/1
1 2
1 2
GND
C1515
0.01U/6
1 2
C1522
1 2
4.7U/8
GND
C1528
10U/8
70 81 Thursday, November 10, 2005
2.0
of
P2_LINK_LED-
A12
C11
B11
B12
C13
C14
E13
E14
F13
F14
H13
H14
P7
M10
P10
N10
M12
N13
P13
N14
L12
M13
M14
L14
L13
A13
J13
H12
F12
C5
P9
M11
N9
M9
J12
M8
H4
G4
B13
P11
B14
D14
D10
NC
N11
NC
L7
J4
D4
P14
NC
P1
NC
A14
NC
A1
NC
3
P2_BUSY_LEDP2_100_LEDP2_1000_LED-
P2_TRD0P
P2_TRD0N
P2_TRD1P
P2_TRD1N
P2_TRD2P
P2_TRD2N
P2_TRD3P
P2_TRD3N
EECS_2
EESK_2
EEDI_2
EEDO_2
XTAL_CAP
CLKR_CAP
R1421 3.3K/6
VCTRL18
VCTRL12
VCC3_DUAL
R1428
200/6
Vref=1.25V
VLANSB18
P2_LINK_LED- 58,63,65
P2_BUSY_LED- 58,63,65
P2_100_LED- 63,65
P2_1000_LED- 63,65
P2_TRD0P 65
P2_TRD0N 65
P2_TRD1P 65
P2_TRD1N 65
P2_TRD2P 65
P2_TRD2N 65
P2_TRD3P 65
P2_TRD3N 65
R1419 0/6
GND
VLANSB18
VCC3_DUAL
VLANSB12
R1422 1K/6/X
GND
MIC809SU/MICREL
U139
RST# VCC
GND
2
GND
Co-layout
(BCP69/SOT223)
FAN1117A/SOT223
Q178
4
C1620
1 2
1 2
C1619
10U/8
10U/8
GND GND
GND
TP327
LAN_PWRGOOD
1 3
VCC3_DUAL
3
2
1
C1621
0.1U/6
1 2
clock test pin
1 2
C1617
4.7U/8
GND GND
R1502
100/6/1
R1503 0/6/X
R1504
44.2/6/1
VLANSB18
VLANSB12
1 2
C1618
0.1U/6
VLANSB18
8
A_D[0..31]
POWER REQUIREMENT
Rage XL
VDDR = 3.3V => 0.25A
D D
VDDQ = 3.3V => 0.15A
VDDC = 2.5V => 1.5A
PVDD = 2.5V => 0.04A
AVDD = 2.5V => 0.07A
PCICLK_VGA 57
RESET_PCI0- 50,61
PIRQA- 39,48,50,70
HAD1 72
FRAME- 48,50,67,70
IRDY- 48,50,67,70
TRDY- 48,50,67,70
DEVSEL- 48,50,67,70
C C
B B
(FOR Rage-XL => PLL - PVDD = 2.5 V)
(PVDD = 2.5V => R305=0/6, R308 = 0/X)
A A
FB21
FB30/8/B
STOP- 48,50,67,70
PAR 48,50,67,70
GNT2- 48
REQ2- 48,50
VCC
1 2
GND
8
C_BE0- 48,50,67,70
C_BE1- 48,50,67,70
C_BE2- 48,50,67,70
C_BE3- 48,50,67,70
R1082 0/6
1 2
IDSELVGA
R1086
1 2
R1087
1 2
R1089
1 2
A_D0
A_D1
A_D2
A_D3
A_D4
A_D5
A_D6
A_D7
A_D8
A_D9
A_D10
A_D11
A_D12
A_D13
A_D14
A_D15
A_D16
A_D17
A_D18
A_D19
A_D20
A_D21
A_D22
A_D23
A_D24
A_D25
A_D26
A_D27
A_D28
A_D29
A_D30
A_D31
C_BE0C_BE1C_BE2C_BE3PCICLK_VGA
RESET_PCI0PIRQA-
FRAMEIRDYTRDYDEVSELSTOPPAR
GNT2REQ2-
VCC3
47K/6
47K/6
47K/6
VCC3
VCC25G
7
C1273
C1272
4.7U/12/B
0.1U/6/B
1 2
1 2
V16
AD0
W16
AD1
V15
AD2
Y16
AD3
W15
AD4
Y15
AD5
V14
AD6
W14
AD7
Y14
AD8
V12
AD9
Y13
AD10
W12
AD11
Y12
AD12
V11
AD13
Y11
AD14
W11
AD15
V8
AD16
W8
AD17
W7
AD18
Y7
AD19
V7
AD20
Y6
AD21
W5
AD22
Y5
AD23
W3
AD24
Y3
AD25
V3
AD26
Y2
AD27
W2
AD28
Y1
AD29
V2
AD30
W1
AD31
V13
C/BE#0
W10
C/BE#1
Y8
C/BE#2
W4
C/BE#3
V1
PCICLK
U2
RESET#
U3
INTR#
U16
M66EN/BIOSFFCLK/HAD1
W9
FRAME#
Y9
IRDY#
V9
TRDY#
Y10
DEVSEL#
V10
STOP#
U10
PAR
T2
GNT#
U1
REQ#
T1
ST0
T3
ST1
R2
ST2
N2
SBA0
N3
SBA1
P2
SBA2
P3
SBA3
P1
SBA4
V5
SBA5
W6
SBA6
V6
SBA7/IDSEL
R3
RBF#
W13
ADSTB0
Y4
ADSTB1
R1
SBSTB
U4
AGPGPIO0/CLKRUN#
V4
AGPGPIO1/STP_AGP#
U5
AGPGPIO2
U13
AGPGPIO3
G1
SAD0/HCLK
G2
SAD1
G3
SAD2
F2
SAD3
F1
SAD4/HAD4
F3
SAD5/HAD5
E3
SAD6/HAD6
E2
SAD7/HAD7
H2
DS/VIPCLK
J1
AS/HCNTL
H3
SRDY/INT/HAD0
H1
BYTCLK
D1
Y0
C1
Y1
C2
Y2
B2
Y3
A2
Y4
C3
Y5
B3
Y6
A3
Y7
E1
PCLK
R1104 2K/6
1 2
R1105 2K/6
1 2
7
6
T4U6U9
VDDQ
VDDQ
C1274
0.1U/6/B
U14
VDDQ
VDDQ
VCC3
C468
C469
0.1U/6/B
4.7U/12/B
1 2
1 2
M17
VDDR1
K17
VDDR1
H17
VDDR1
D16
VDDR1
1 2
D10
VDDR1
D7D4G4
VDDR2
VDDR2
C540
0.1U/6/B
VDDR2
C1275
4.7U/12/B
1 2
1 2
Rage - XL (215R3LASB22)
ATI RAGE 128 VR
LCDPE
LCDCLK
SDA/HAD2
SCL/HAD3/VIPINT
ZVHREF/LCD0
ZVVSYNC/LCD1
UV0/LCD2
UV1/LCD3
UV2/LCD4
UV3/LCD5
UV4/LCD6
UV5/LCD7
UV6/LCD8
UV7/LCD9
SDS/LCD10/SDA
SAS//LCD11/SCL
SSAD0/LCD12
SSAD1/LCD13
SSAD2/LCD14
SSAD3/LCD15
SSAD4/LCD16
SSAD5/LCD17
SSAD6/LCD18
SSAD7/LCD19
MONID0/LCD23
MONID1
MONID2
VSYNC
HSYNC
B
G
R
MONID1/LCD22
E4D2J3J2C9B9A9C8B8A8C7B7A7D6C6B6A6D5C5B5A5C4B4A4K1K2K3J4U8F4U15
GND GND GND GND
VCC25G
MONID1 73
MONID2 73
VSYNC 73
HSYNC 73
B 73
G 73
R 73
6
C539
0.1U/6/B
L17D8P4
U11
VDDC
VDDC
VDDC
VDDC
MONID2/LCD21
MONID3/LCD20
AGPCLAMP
GIOCLAMP
VCCVCC
R1096
10K/6
(Layout 3W rule)
1 2
1 2
GND GND GND GND GND GND GND GND GND
PVSS
TESTEN
M4
PVDD
1 2
GND
R1112 FB80/8
1 2
R1113 FB80/8
1 2
R1114 FB80/8
1 2
C1276
4.7U/12/B
AVSS
PVDD
R1106
365/6/1/B
5
VCC25G
AVDD
AVSS
AAVDD
5
U12
VSS
VSYNC
HSYNCBGRXTALOUT
RSET
M3M2N1M1L1B1A1
L2N4K4L4L3
1 2
VSS
VSS
J17
D15D9H4R4U7
VSS
VSS
VSS
VSS
XTALIN
Y2
29.498928MHZ
T17
N17
VCC3
VSS
VREF
M11
M12
VSS
VSS
CLK1#
M19
L11
L12M9M10
VSS
VSS
VSS
VSS
VSS
CLK0
CLK0#
CLK1
N20
N19
M20
C1285 22P/6/NP0
1 2
R1110
4.7M/6
C1288 22P/6/NP0
4
J10
J11
J12K9K10
K11
K12L9L10
J9
GND
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
DSF
P17
1 2
QS1
M18
22/6
R1100
QS0
N18
1 2
1 2
CS2/QS2
CS3/QS3
V17
U17
4
VSS
WE#0/DQM#0
WE#1/DQM#1
WE#2/DQM#2
WE#3/DQM#3
WE#4/DQM#4
WE#5/DQM#5
WE#6/DQM#6
WE#7/DQM#7
CS0/BA0
CS1/BA1
W17
Y17
ATI RAGE - XL_215R3LASB41
SR_MCS0
1 2
1 2
1 2
CLK0
GND
GND
ROMCS*
R1093 22/6
R1095 22/6
R1103 22/6
VCC25G
U93
VD0
L18
MD0
VD1
L19
MD1
VD2
K18
MD2
VD3
K19
MD3
VD4
K20
MD4
VD5
J18
MD5
VD6
J19
MD6
VD7
J20
MD7
VD8
H18
MD8
VD9
H19
MD9
VD10
H20
MD10
VD11
G17
MD11
VD12
G18
MD12
VD13
G19
MD13
VD14
G20
MD14
VD15
F17
MD15
VD16
F18
MD16
VD17
F19
MD17
VD18
F20
MD18
VD19
E17
MD19
VD20
E18
MD20
VD21
E19
MD21
VD22
E20
MD22
VD23
D17
MD23
VD24
D18
MD24
VD25
D19
MD25
VD26
D20
MD26
VD27
C18
MD27
VD28
C19
MD28
VD29
C20
MD29
VD30
B20
MD30
VD31
A20
MD31
B19
MD32
A19
MD33
B18
MD34
A18
MD35
C17
MD36
B17
MD37
A17
MD38
C16
MD39
B16
MD40
A16
MD41
C15
MD42
B15
MD43
A15
MD44
D14
MD45
C14
MD46
B14
MD47
A14
MD48
D13
MD49
C13
MD50
B13
MD51
A13
MD52
D12
MD53
C12
MD54
B12
MD55
A12
MD56
D11
MD57
C11
MD58
B11
MD59
A11
MD60
C10
MD61
B10
MD62
A10
MD63
ROMCS-
D3
VMA0
Y18
MA0
VMA1
Y19
MA1
VMA2
Y20
MA2
VMA3
W18
MA3
VMA4
W19
MA4
VMA5
W20
MA5
VMA6
V18
MA6
VMA7
V19
MA7
VMA8
V20
MA8
VMA9
U18
MA9
VMA10
U19
MA10
VMA11
U20
MA11
SR_MRAS0
P20
RAS#
SR_MCAS0
L20
CAS#
SR_MWEV
R17
WE#
P19
P18
R20
R19
R18
T20
T19
T18
MCS-0
MCS-2
CKE
DSF 72
R1108 22/6
1 2
Place R329, R330 and R331 close
to VGA controller
EMI Solution
MRAS-0
MCAS-0
-MWE_V
C1289
10P/6
3
1 2
1 2
C476
C538
0.1U/6/B
0.1U/6/B
GND GND
Route Equal Length
CLK0+MCK
VD[0..7], DQM0
VD[8..15], DQM1
VD[16..23], DQM2
VD[24..31], DQM3
Group-GroupWithin 500mil
Signal-Signal Within 200mil
CLK0+MCK = 0.5(DQM_L +
DQM_S)
VA0
1
2
VA1
3
4
VA2
5
6
VA3
7
8
VA4
1
2
VA5
3
4
VA6
5
6
VA7
7
8
VA8
7
8
VA9
5
6
VA10
3
4
VA11
1
2
R1088 22/6
1 2
R1090 22/6
1 2
R1091 22/6
1 2
DQM0
DQM1
DQM2
DQM3
MCS-0 72
MCS-2 72
CKE 72
VCC3
1 2
R1107
150/6/X
1 2
1 2
C1290
10P/6
R1109
100/6/X
GND GND
1 2
C1291
10P/6
3
C1284
10P/6/X
1 2
RN8
8P4R-22
RN9
8P4R-22
RN10
8P4R-22
MRAS-0
MCAS-0
-MWE_V
MCK 72
1 2
GND GND GND
VD[0..31]
VA[0..9]
VA10 72
VA11 72
MRAS-0 72
MCAS-0 72
-MWE_V 72
DQM[0..3]
2
VD[0..31] 72 A_D[0..31] 47,48,50,67,70
VCC25G
Q140
APL1084/TO-252
VCC
VA[0..9] 72
1 2
GND
2
1
3
1 2
C472
4.7U/12
C473
0.1U/6
GND GND
Vo=1.25V x (1+R274/R273) = 2.5 V
A_D22
IDSELVGA
1 2
1 2
R1083 100/6
1 2
GND
R1080
100/6/1
R1081
100/6/1
R1084
0/6/X
1 2
C470
0.1U/6
(PLACE CLOSE TO VGA CHIP)
VCC25G
FB17
1 2
DQM[0..3] 72
FB30/8/B
0.1U/6/B
PVDD
C1282
4.7U/12/B
1 2
C1277
(PLACE CLOE TO PIN L3)
R1111 4.7K/6/X
ROMCS-
1 2
RAGE 128 IMPLEMENT ON BOARD
GIGABYTE THCHNOLOGIES , INC.
Title
ATI_RAGE_XL
Size Document Number Rev
C
Date: Sheet
2
GA-7A8DRL
1
1 2
1 2
C475
C474
4.7U/12/B
4.7U/12/B
GND GND
JP3: VGA ENABLE
1-2: ENABLE
2-3: DISABLE
JP3
1
2
3
1 2
H1X3/VGA_E/Short_1-2
VCC25G
1 2
C471
4.7U/12/B
GND
AAVDD
1 2
C1278
4.7U/12/B
VCC25G
1 2
FB18
FB30/8/B
1 2
1 2
C1283
0.1U/6/B
of
71 81 Thursday, November 10, 2005
1
GND
2.0
SSI Power Connectors
5VSB
R1303
4.7K/6
PWRON_ATX_L 45,46,53,61
PWRON_ATX_L
C627
1000P/6
GND
ATX1
VCC3
13
3.3V
14
-12V
-12V
15
GND
GND
GND
16
PSON
17
GND
GND
18
GND
19
GND
GND
GND
GND
20
-5V
-5V
21
5V
5VSB
22
5V
23
24
ATXPWR/2*12
5
1.5K/6/X
+12V
R1287
1 2
+12V
R1289
1K/6/X
R1291 1.5K/6/X
1 2
1 2
3
GND
D
1
2N7002/SOT23/X
Q161
G S
2
FANPWM5
22U/1210/16V/X
VCC
1 2
1
3.3V
3.3V
5V
5V
POK
12V
12V
3.3V5VGND
VCC3
2
3
GND
5VSB
VCC
GND
VCC
GND
+12V VCC
VCC3
VCC3
GND
R1304
4.7k/6
ATXPWROK
C630
0.1U/6
ATXPWROK 61
4
5
6
7
8
9
10
11
12
C800
R1292
4.7K/6/X
FANPWM5 74
GND
2N2907A/X
1 2
2N2907A/X
Q159
2
3
1
Q160
2
3
1
+12V
0/6/X
R1288
1 2
Routed trace
width > 40
mils
V12_SYS_FAN2
C623
0.1U/6/16V/X
Layout pattern
Copper pour(+12V)
3
VCC
R1290
8.2K/6/X
FANIO5 74
C1355
3300P/6/X7R/X
213
CVS
SYS_FAN2
FAN1x3/W/X
GND
GND GND
+12V
R1578 1.5K/6
1 2
Q187
2N7002/SOT23
VCC
1 2
1 2
R1583
+12V
R1581
1.5K/6
4.7K/6
FAN_CTRL3
R1580
1K/6
1 2
3
D
G S
2
1
GND
Q185
2
1
2N2907A
Q186
2
1
2N2907A
1 2
C798
22U/1210/16V
GND
FAN_CTRL3 53
3
3
+12V
R1579 0/6/X
1 2
V12_PWR_FAN2
Routed trace
width > 40
mils
C1656
0.1U/6/16V
GND
GND
CVS
PWR_FAN2
FAN1x3/W
3
2
1
Layout pattern
Copper
pour(+12V)
VCC
R1582
8.2K/6
FAN_TAC3
C1655
213
3300P/6/X7R/X
GND
FAN_TAC3 53
A
21
ATX2
1
GND
2
GND
3
GND
4
GND
ATX_2X4
GND
+12V
5
+12V
6
+12V
7
+12V
8
+12V
Mounting Holes
9
MH1
1
2
3
4
EGND2
D
5
6
7
8
9
MH3
1
2
3
4
1
2
3
4
1
2
3
4
1
2
3
4
5
6
7
8
9
MH5
5
6
7
8
9
MH7
5
6
7
8
9
MH9
5
6
7
8
GND
GND
FB4 FB30/8/B
MH14
1
GND
9
1
2
3
4
9
1
2
3
4
MH4
1
2
3
4
GND
9
MH2
1
2
3
4
9
MH6
1
2
3
4
9
MH8
1
2
3
4
MH13
1
MH10
1
GND
MH11
5
6
7
8
MH12
5
6
7
8
GND GND
9
5
6
7
8
5
6
7
8
5
6
7
8
5
6
7
8
For SMT NUT
K11
K_ICT/X
K12
K_ICT/X
K13
K_ICT/X
K14
K_ICT/X
EGND
GND
GND
1
1
1
1
1
1
1
1
LAYOUT: Located near PS/2 ports and connects all I/O port CGND's to digital GND except for audio.
K10
K_ICT/X
K9
K_ICT/X
K8
K_ICT/X
K7
K_ICT/X
K6
K_ICT/X/B
K1
K_ICT/X
K2
K_ICT/X
K3
K_ICT/X
K4
K_ICT/X
K5
K_ICT/X/B
VDD_1D8V
C1659
0.1U/6
1
1
I9
1
1
4MMH/X
I8
1
1
4MMH/X
I7
1
1
4MMH/X
I6
1
1
4MMH/X
I1
1
1
4MMH/X
I2
1
1
4MMH/X
I3
1
1
4MMH/X
I4
1
1
4MMH/X
I5
1
1
4MMH/X
近
POWER CONN
C645
0.1U/6
C644
0.1U/6
VCC3
C642
0.1U/6
GND
VCC
C646
0.1U/6
GND
All coupon length 6000 mils
COUPON1
COUPON1 COUPON
COUPON2
COUPON2 COUPON
COUPON11
COUPON3 COUPON
COUPON12
COUPON4 COUPON
C641
0.1U/6
2 1
2 1
2 1
2 1
C640
0.1U/6
VCC3
C632
0.1U/6
-5V
10U/12
VCCB1
VCCB1
GNDB1
GNDB1
C629
C625
0.1U/6/16V
GND
COUPON3
COUPON4
COUPON5
COUPON6
COUPON7
COUPON8
COUPON9
COUPON10
C626
0.1U/6/16V
+12V
C643
0.1U/6/16V
GND GND GND
3 1
C631
0.1U/6/16V
5VSB -12V
C628
EC99
10U/12
10U/12
C624
0.1U/6/16V
VLDT_1D2V
C19
0.01U/6
STITCHING CAP.
DIFF_COUPON1 COUPON
2 1
DIFF_COUPON2 COUPON
2 1
GNDB2
DIFF_COUPON3 COUPON
2 1
DIFF_COUPON4 COUPON
2 1
GNDB2
DIFF_COUPON5 COUPON
2 1
DIFF_COUPON6 COUPON
2 1
VCCB2
DIFF_COUPON7 COUPON
2 1
DIFF_COUPON8 COUPON
2 1
VCCB2
4 2 5
VCC3 VCC3
C1657
C1658
0.01U/6
VDD_1D8V
VCC3
C20
0.01U/6
0.01U/6/B
VDD_1D8V VLDT_1D2V
Title
Size Document Number Rev
Custom
Date: Sheet
C1660
C228
0.01U/6
0.1U/6
VLDT_1D2V VLDT_1D2V
VDD_1D8V
C38
0.01U/6/B
C1661
0.01U/6
C234
0.01U/6/B
0.01U/6
C37
GIGABYTE THCHNOLOGIES , INC.
EATX form factors
GA-7A8DRL
B
C
D
2.0
of
76 81 Thursday, November 10, 2005
5
D D
VCC
L21
1UH/10A
C C
4A
ESR=50mV/4A=12.5m
ohm
VLDT_1D2V
R1315
1.8K/6/1
C733
0.01U/6
B B
R1317
5.36K/6/1
GND
1000U/6.3V/8X11.5/KZG
EC47
+
L27 2.8UH/D/Vertical
560uF/4V/8*11.5/FPCAP
EC50
+
GND
1000P/6
VIN_PWM
GND
C734
GND
VLDT_EN 61
VLDT_PG 61
C726
1U/6
GND
R10
1K/6
VCC3
4
Q2
6
7
8
FDS6930A/SO8
R1319
4.7K/6
VCC3
R1322
4 5
3
2
1
D64
1N5817/S
1U/8/Y/25V
C724
R698 2.4K/6
0/6
GND GND
C738
0.1U/6
VCC
1 2
GND
R1313
47K/6
3
1 2
D65
1N5817/S
R697
100K/6
6
BOOT1
7
ISEN1
5
UGATE1
4
PHASE1
2
LGATE1
3
PGND1
9
VOUT1
10
VSEN1
8
EN1
15
PG1
12
SOFT1
11
OCSET1
VCC
1 2
C721
4.7U/12
GND
14
28
U51
VIN
VCC
BOOT2
ISEN2
UGATE2
PHASE2
LGATE2
PGND2
VOUT2
VSEN2
EN2
PG2/REF
SOFT2
OCSET2
GND
DDR
1
13
ISL6225CA
23
22
24
25
27
26
20
19
21
16
17
18
C725 1U/8/Y/25V
R3
3K/6
R700 0/6
R1323 0/6 R1324 0/6
GND
R1320
47K/6
GND
C737
0.1U/6
Q100
4 5
3
2
1
FDS6930A/SO8
R1318
4.7K/6
VCC3
VCC3
6
7
8
R1302
1K/6
VIN_PWM
VDD_1D8V_EN 61
VDD_1D8V_PG 61
2
1000U/6.3V/8X11.5/KZG
EC49
C728
+
1U/6
GND
GND
2.8UH/D/Vertical
C735
1000P/6
GND GND
L28
+
EC52
560uF/4V/8*11.5/FPCAP
1
2.5A
ESR=100mV/2.5A=40m ohm
VDD_1D8V
R1316
GND
1.8K/6/1
R1312
1.8K/6/1
C736
0.01U/6
GND
GND GND GND
A A
5
4
3
GND GND
GIGABYTE THCHNOLOGIES , INC.
Title
Size Document Number Rev
B
2
Date: Sheet
VLDT1.2V & VDD1.8V Power
GA-7A8DRL
77 81 Thursday, November 10, 2005
1
of
2.0
5
4
3
2
1
PCI-X A
IRQ IDSEL
DEVICE
CH-A
4 4
PCI-X_3
CH-A
PCI-X_4
SCSI-SATA
SODIMM
INT
A.B.C.D
INT
B.C.D.A
INT C.D
AD19
AD22
AD21
REQ#
GNT#
REQ#1
GNT#1
REQ#0
GNT#0
REQ#2
GNT#2
VCC25 for GigaLAN power
VCC18 for GigaLAN power
VCC
VCC3
+12V
-12V
DEVICE
IRQ IDSEL PCI-X B
3 3
CH-B
PCI-X_2
CH-B
PCI-X_1
INT A.B.C.D AD20
INT B.C.D.A AD21
REQ#
GNT#
REQ#1
GNT#1
REQ#2
GNT#2
VCC_DUAL VCC Dual voltage(support S3) 5V
VCC3_DUAL 3.3V VCC3 Dual voltage(support S3)
VDD_1D8V_DUAL 1.8V VDD1.8 Dual voltage(support S3)
VOLTAGE SYMBOL LOGIC
2.5V
1.2V
5V
3.3V
+12V
-12V
ATX Power
ATX Power
ATX Power
ATX Power
SYMBOL VOLTAGE LOGIC
GIGALAN
Intel
82545GM/82546GB
AD19 INT A/INT B
REQ#0
GNT#0
P0_VDD_2D5V
VLDT_1D2V
1.2V
2.5V
ALL LDT Voltage
P0 DDR Power
P0_VTT_DDR P0 DDR Termination voltage
2 2
PCI
DEVICE
PCI_6
PCI_5
ATI RANGE_XL
Intel
82541GI
1 1
ATP867 REQ#4
5
IRQ IDSEL
INT
A.B.C.D
INT
B.C.D.A
INT A
INT A
AD20
AD21
AD22
AD19
AD23 INT C
4
REQ#
GNT#
REQ#0
GNT#0
REQ#1
GNT#1
REQ#2
GNT#2
REQ#3
GNT#3
GNT#4
P1_VTT_DDR 1.25V P1 DDR Termination voltage
P0_VDDA_2D5V P0 PLL voltage
P1_VDDA_2D5V P1 PLL voltage
VDD_1D8V 8131 and 8111 core voltage
SVCC18 SCSI 1.8V power
3
1.25V
2.5V
2.5V
1.8V
1.8V
GIGABYTE THCHNOLOGIES , INC.
Title
Size Document Number Rev
A3
2
Date: Sheet
PCI-X/PCI
GA-7A8DRL
78 81 Thursday, November 10, 2005
1
2.0
of
5
4
3
2
1
PCI 5
PCIX-1
PCIX-3 PCIX-4
I2C Routing Map
IPMI V1.0
Connect
Disconnect
D D
IPMI V1.5
Connect
Disconnect
A8
P1DIMM0
P0DIMM3
A6
LED BOARD
SENSOR LM75
94
P0DIMM1
P0DIMM2
A4
A2
PCA9544
Thor
FET_SCL/SDA0
CH0
AMD-8111
CH1
CH2
CH3
C C
E2
PCI_SCL/SDA
RCC_SCL/SDA
SENSOR_SCL/SDA
LAN_SCL/SDA
HM
W83791D
IPMI Module
2C(58)
PCI 6
Clock
Gen.
D2
FRU
EEPROM
24C02
A0
PCIX-2
P0DIMM0
A0
LED BOARD FRU
EEPROM 24C02
A2
BMC
HOST I2C
SENSOR I2C
LAN I2C
B B
IPMB I2C
LAN
Intel
82545GM
LAN
Intel
82541GI
AC
P1DIMM2
P1DIMM1
AA
P1DIMM3
AE
IPMB1
A A
GIGABYTE THCHNOLOGIES , INC.
Title
Size Document Number Rev
B
5
4
3
2
Date: Sheet
IPMB2
I2C Routing Map
GA-7A8DRL
79 81 Thursday, November 10, 2005
1
of
2.0
5
4
3
2
1
AAT4610| GV
FUSEVCC
D D
AAT4610| GV
VCCUSB1.2.3
APL1084
AME8802DEEV
AME8802DEEV
ISL6225
VCC
C C
VCC25G
P0_VDDA_2D5V
P1_VDDA_2D5V
VLDT_1D2V
VDD_1D8V
LX8384
5VSB
PS2
DEVICE
USB
DEVICE
ATI RANGE XL
Opteron 0.1
Golem0.1
Thor
Golem AMD 8131
Thor AMD 8111
VCC3_DUAL VCC_DUAL
FAN1117A
AME8802DEEV
+12V
VDD_1D8V_DUAL
VDD_2D5V_DUAL
ISL6563
ISL6563
ISL6522
P1_VDD_2D5V
ISL6522
P0_VDD_2D5V
P0_VDD_CORE Opteron 0
0.8~1.55V
80A/95W
Opteron 1 P1_VDD_CORE
0.8~1.55V
80A/95W
B B
CM8500
P0_VDD_2D5V
P0_VTT_DDR
CM8500
P1_VDD_2D5V
A A
5
P1_VTT_DDR
4
APL1084
SC1565
FAN1117
FAN1112
VCC15_SB
VCC25_SB
VLANSB18
VLANSB12
Intel
82545GM
Intel
82541GI
GIGABYTE THCHNOLOGIES , INC.
Title
Size Document Number Rev
C
3
2
Date: Sheet
Power_Routing_Map
GA-7A8DRL
1
2.0
of
80 81 Thursday, November 10, 2005
V0.1 to V0.2
1.Bacause shortage AME8802DEEV change to AME8824AEEY (U78.U79.Q23) in P9 & P25 & P24
2.FAN PWM circuit add pull-up Res to VCC and Q change to 2N700 in P.5 P.20
P.54 P.76 P.21 P.68 P.69
3.CPLD(U107) Power change from vcc3 to vcc3_dual in P.61
4.MOSFET(U120.Q38) S.D should exchange and chnage to diode in P.55
5.COM.LPT.PS2 I/O shielding should connect to EGND in P.54 & P.55
6.CM8500(U10.U76) VCC.VDD use DDR 2.5V not VCC3 in P.24 & P.11
7.Res.(R78.R224)pull-up power change from vcc3_dual to vcc3 in P.9 & P.25
8.Res.(R702.R982) value change from 2.7K to 3.9K in P.9 & P.25
9.RP170 value change from 8.2K to 0 and colayout with bead for EMI in P.55
4 4
10. add pull-up Res.(4.7K) between U123 and F_PANEL in P.58
11. Reset IC(U47) timing too slow change to AATI3522IGY-2.93-50(50 ms) in P.58
12. remove R11.R13.R12.R28.R27.R29 to avoid double pull-up in P.61
13. pull-up Res.(R628) change to pull-down to set clock frequency to 48MHz in P.57
14.8111(U21) ball A22(IRQ6).B24(IRQ1) only pull-up to vcc3 in P.46
15.R1564.R1565 mount 5K ohm Res. in P.43
16.R1452 change to 100 ohm to fit AMD's platfrom in P.62
17.R118 mount 0 ohm to CPLD in P.53
18. add 5.1K ohm Res.between VDD2D5V_VTT_EN and GND in P.11 & P.24
19.AU1.BU1 footprint change to IC28SSOP in P.54
20.RP169 change to 2.2K in P.55
21.rename P0DIMM0.P0DIMM1.P0DIMM2.P0DIMM3 in P.13,14,15,16
22.rename all PCI.PCI-X slot in P.41.42.43.44.50
23. add PCIXCAP jumper for 8131 CHA/B, P38.39
24. add RESET BTN, P58
25. add POWER LED and HDD LED, P58
26. EC6, EC7 change to 10X12.5mm, P24
27. LAN2_SMB_ALERT- PU to VCC3_DUAL, P70
28. -G_SMB_ALRT chnage to PU, P62
29. modify "always on", P46, P53
30. delete LM555 circuit, P61
31. mount C27.C28 , P07
3 3
32. add R76.R77.R79.R80 , P07
33. add R173 pull high P1 TDI , P23
34. mount R1199,R1201, P75
35. R251. R248. R250. R287. R291. R272. R275. R274. R288 change to 8.2K ,P38.39
36.change R1337.R1339.R105.R108 value , P11.24
37.change R284.R285.C312.R254.R255.C309 value , P38.39
38.add FB4 , P76
5
V0.2 to V1.0
1.change PWM output EC footprint to EC10D15MM ,P59.60
2.change D67.D68.D69.D70.D86 footprint ,P55.59.60
3.change C766.C767.C768.C770.C771.C773 footprint to 1206,P19.35
4.delete IPMB colayout sch ,P75
5.change CP32 package to 0402 ,P54
6.change GLAN1.2 Pin17.18 NC(NPTH) ,P65
7.remove decoupling cap C561.C566.C1312 ,P54.55.73
8.modify VGA relative sch for CPU1 PWM GND noise ,P73.71
9.PCIX-1 connect case open of super I/O ,P53.41
2 2
10.modify MH14.P1 to NC pin,P76
11.add WDT Function for Google,P53
12.modify delay start circuit for Google,P67
13.add decoupling CAP for ZCR_CLK ,P66
14.modify F_PANEL2 to compatible 275 LED Board ,P58
15.modify FRU power to VCC3_DUAL ,P75
16.modify SMBus con. to compitable SCSI back plane board ,P46
17.modify Res. to ferrite bead per EMI's request ,P55
4
3
2
1
V1.0 to V1.1
1.NOIOAPIC[A.B.C.D] connect to PCI IRQ[A.B.C.D],P39
2.modify dual circuitry,P55
3.add decoupling cap. C1682.C1683,P35.19
V1.1 to V1.2
1.change U80.U81 package in P.10
2.change R435.R437 to 0 ohm in P.45
3.remove C48.C49.C238.C239 in P.10,P.28
4.change Net:PWMOUT1.2 to FANPWM1.2 in P.74
5.change CM8500 VCC POWER to VCC3 in P.11,P.24
6.modify BAT sch. by design guide in P.49
7.add 10U CAP. for trasient response in P.60
8.change net:5v_sb to 5vsb in P.74
9.add 22u cap. for fan in P.05,P.20,P.21,P.76,P.54,P.68
10.change R1585.R1586 to 10K in P.46
11.change R1337.R105 to 2.7K R1339.R108 to 1.2K in P.24,P.11
12.add R147 for logic glitch in P.61
13.add Q43 for VCC_DUAL in P.55
14.del R909 .R138 add R920 to pass trasient response in P.60
15.correct power of Q149.Q150 pull-up Res. in P.75
16.add sensor i2c bus to SMBUS2 for IPMI access SCSI backplate in P.46
17.change SW1 per ME's request in P.75
18.remove R1722.R1723 add R150.R151.R152 for ITE8712F Rev IX in P.53
19.add R153.R154.R155.R156 to program status LED by IPMI or SIO in P.75,P.53
20.delete C637.C638.C226.C217 in P.12
21.change MH10.13.14 for SMT nut in P.76
22.delete RP142.RP143 in P.51
V1.2 to V1.3
1.change Opteron Power to ISL6559+ISL6605 for new spec. in P.59,60
2.add 1N5817 in CPU FAN Con. to support fan speed detect in P.5,20
3.add inverter sch. to resolve PWRLED issue in AC-on in P.58
V1.3 to V1.4
1.change CPU CORE power for thermal issue in P.59 & P.60
2.add series Res.(560 ohm) for VID[0..4] in P7 & P23
3.add option Res. to select VDDIO feedback source in P11 & P24
V1.4 to V2.0
1.R638 pull-up change to VCC to prevent LED on when shutdown on Post in P.58
2.R203.R374 change to 5.1K/0603/1% to boost CPU core power to pass on/off test on -5
degree in P.59.60
3.add
C818.C820.C821.C823.C824.C825.C1149.C1153.C1150.C1155.C1158.C1161.C1154.C1156.C1157
100U/6.3V/1210 to pass on/off test on -5 degree in P11 & P24
4. R203.R298.R310.R411.R21.R375.R376.R377 change to 0603/2.67K/1% to increase OCP for
2168+2165 in P59 & P60
5.change R32.R33.R34.R74.R86.R87.R88 to 22ohm to decrease PCIX_RST overshoot in P.38
6.delete 2 single net N05430. N05422 in P.71
7.change U1004.U1005 to 12SP2-010006-41 in P.59.60(20A->20B)
8.change 74LCX126 to PI3C3126 n P.43(20A->20B)
9.change CM8500 to CM8500A R119 to 10K R120 to 470K in P.11(20A->20B)
1 1
10.change CM8500 to CM8500A R989 to 10K R990 to 470K in P.24(20A->20B)
GIGABYTE THCHNOLOGIES , INC.
Title
Size Document Number Rev
Custom
5
4
3
2
Date: Sheet
History
GA-7A8DRL
1
2.0
of
81 81 Thursday, November 10, 2005