Gigabyte GA-780T-D3L Schematic rev.3.1

Gigabyte Confidential

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PAGE

GA-780T-D3L

PAGE

D D

C C

01 CONTENTS
02
03
04
05
06
07
08
09
10
11
12
13

TITLE

BOM & PCB MODIFY HISTORY
BLOCK DIAGRAM
CPU HYPER TRANSPORT
CPU DDRII MEMORY
CPU CONTROL
CPU POWER & GND
DDRII CHANNEL A
DDRII TERMINATOR
RS760G HT-LINK I/F
RS760G PCIE I/F

RS760G SYSTEM I/F

RS760G STRAP

Revision :

3.1

26
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TITLE
ALC889A
REAR AUDIO JACK
IT8718 LPC IO
FAN/HWMO KB/MS
ATX, FRONT PANEL
REALTEK RTL8111B/C
VCORE (PWMISL6323+6612A)
PWM MOS
POWER SEQUENCE
NB POWER, VCC12HT, VDDA25
DDRII POWER, VCC18
DUAL BIOS
EUP POWER

14
15

B B

A A

16
17
18
19
20
21
22
23
24
25

RS760G POWER GND
ISL9LPRS472
ATI SB710 PCIE/PCI/CPU/LPC
ATI SB710 ACPI/USB/GPIO/AUDIO
ATI SB710 SATA/FDD/IDE/HWM
ATI SB710 POWER GND
PCI EXPRESS x16
PCI EXPRESS x8
PCIE x1, SLOT 1, 2, 3
PCI SLOT 1, 2
IDE/FLOPPY
COM/LPT/FUSB

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Title

CONTENTS

Size Document Number Rev

Custom

3

2

Date: Sheet of

GA-780T-D3L 3.1

1 37Friday, October 14, 2011

1

Gigabyte Confidential

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Model Name:GA-780T-D3L Rev: 3.1

Circuit or PCB layout change for next version

ReasonDate Change Item

Component value change history

D D

Change ItemDate

2011.10.12

2011.11.01

C C



760G R2783=>2.32K



CPU RM

󰀶󰀶󰀶󰀶(󴞻󴞻󴞻󴞻

)



760G

󰕐󰕐󰕐󰕐󰇞󰇞󰇞󰇞󰘹󰘹󰘹󰘹

Reason

1.1V

2011.10.12

3.1A



770T-D3L 8.81

󰕐󰕐󰕐󰕐

RS760G

B B

A A

Title

BOM & PCB HISTORY

Size Document Number Rev

Custom

5

4

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2

Date: Sheet of

GA-780T-D3L 3.1

2 37Tuesday, November 01, 2011

1

Gigabyte Confidential

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RS760 CUSTOMER DESKTOP REFERENCE DESIGN

2

1

21

27

UNBUFFERED
DDRII
DIMM1

30, 31

SATA#1

21

21

9,11,12

DESKTOP AM2/AM2g2
POWER

DDR3
MEMORY
POWER

SATA#2

21

AMD

D D

Clock
Generator

RTM880N

PCIE
SLOT

C C

RTL8111E-VL

USB-4

28

USB-5

28

B B

25

USB-3

USB-6

USB-2

28

USB-7

29

18

16X

25

6 1X P CIE INTERFACE

PCIE GPP0
X4

USB-1

28

29

28

USB-8

29

16X

USB-0

USB-9

PCI BUS

HyperTransport

25

USB 2.0

28

29

AM2/AM2g2

AM3 SOCKET

LINK

HyperTransport LINK0 CPU I/F
1 16X PCIE VIDEO I/F
1 4X PCIE I/F WITH SB
6 1X PCIE I/F

OUT

ATI NB

RS760G

13,14,15,16,17

ATI SB

SB710

USB2.0 (10)
SATA II

AC97 2.3/ AZALIA

ATA 66/100/133

ACPI
LPC I/F
INT RTC

HW MONITOR

19,20,21,22,23

IN

4X
PCIE

5,6,7,8

16x16

DDRII 400,533,667,866

128bit

DDRII 400,533,667,866

I2C I/F

SATA II I/F

ATA 66/100/133 I/F

BOOTSTRAPS
ROM(NB)

HD AUDIO I/F

15

HD AUDIO
CODEC

SATA#0

EIDE

HW
MONITOR

UNBUFFERED
DDRII DIMM2

36,37

38

SATA#3

21

9,11,12

RS760
CORE & PCIE
POWER

SB710
CORE & PCIE
POWER

21

39, 40

41

SATA#5SATA#4

21

KBD
MOUSE

LPC BUS

32

33

PCI SLOT
#1

A A

PCI SLOT

35

#2

35

ITE LPC SIO
IT8720

FLOPPY

26

Title

BLOCK DIAGRAM

Size Document Number Rev

Custom

5

4

3

2

Date: Sheet of

GA-780T-D3L 3.1

3 37Friday, October 14, 2011

1

Gigabyte Confidential

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L0_CADIN_L[0..15]
L0_CADIN_H[0..15]
L0_CADOUT_L[0..15]
L0_CADOUT_H[0..15]

L0_CADIN_L[0..15] {10}
L0_CADIN_H[0..15] {10}
L0_CADOUT_L[0..15] {10}
L0_CADOUT_H[0..15] {10}

CPU_VDD_RUN = VCORE
CPU_VDDA_RUN = VDDA25
VLDT_RUN = VCC12_HT
CPU_VDDIO_SUS = DDR15V
CPU_VDDR = CPU_VDDR12

M2CPUA

L0_CLKIN_H1{10}
L0_CLKIN_L1{10}
L0_CLKIN_H0{10}
L0_CLKIN_L0{10}

L0_CTLIN_L1{10}

L0_CTLIN_H0{10}

L0_CTLIN_L0{10}

L0_CLKIN_H1
L0_CLKIN_L1
L0_CLKIN_H0
L0_CLKIN_L0

L0_CTLIN_H1
L0_CTLIN_L1
L0_CTLIN_H0
L0_CTLIN_L0

L0_CADIN_H15
L0_CADIN_L15
L0_CADIN_H14
L0_CADIN_L14
L0_CADIN_H13
L0_CADIN_L13
L0_CADIN_H12
L0_CADIN_L12
L0_CADIN_H11
L0_CADIN_L11
L0_CADIN_H10
L0_CADIN_L10
L0_CADIN_H9
L0_CADIN_L9
L0_CADIN_H8
L0_CADIN_L8

L0_CADIN_H7
L0_CADIN_L7
L0_CADIN_H6
L0_CADIN_L6
L0_CADIN_H5
L0_CADIN_L5
L0_CADIN_H4
L0_CADIN_L4
L0_CADIN_H3
L0_CADIN_L3
L0_CADIN_H2
L0_CADIN_L2
L0_CADIN_H1
L0_CADIN_L1
L0_CADIN_H0
L0_CADIN_L0

N6
P6
N3
N2

V4
V5
U1
V1

U6
V6
T4
T5
R6
T6
P4
P5
M4
M5

L6
M6
K4
K5

J6
K6

U3
U2
R1
T1
R3
R2
N1
P1

L1
M1

L3

L2

J1
K1

J3

J2

CPU-SK/942/AM3b/S/GF/[10SC1-A01942-01R_10SC1-A01942-02R]

L0_CLKIN_H(1)
L0_CLKIN_L(1)
L0_CLKIN_H(0)
L0_CLKIN_L(0)

L0_CTLIN_H(1)
L0_CTLIN_L(1)
L0_CTLIN_H(0)
L0_CTLIN_L(0)

L0_CADIN_H(15)
L0_CADIN_L(15)
L0_CADIN_H(14)
L0_CADIN_L(14)
L0_CADIN_H(13)
L0_CADIN_L(13)
L0_CADIN_H(12)
L0_CADIN_L(12)
L0_CADIN_H(11)
L0_CADIN_L(11)
L0_CADIN_H(10)
L0_CADIN_L(10)
L0_CADIN_H(9)
L0_CADIN_L(9)
L0_CADIN_H(8)
L0_CADIN_L(8)

L0_CADIN_H(7)
L0_CADIN_L(7)
L0_CADIN_H(6)
L0_CADIN_L(6)
L0_CADIN_H(5)
L0_CADIN_L(5)
L0_CADIN_H(4)
L0_CADIN_L(4)
L0_CADIN_H(3)
L0_CADIN_L(3)
L0_CADIN_H(2)
L0_CADIN_L(2)
L0_CADIN_H(1)
L0_CADIN_L(1)
L0_CADIN_H(0)
L0_CADIN_L(0)

HYPERTRANSPORT

L0_CLKOUT_H(1)

L0_CLKOUT_L(1)

L0_CLKOUT_H(0)

L0_CLKOUT_L(0)

L0_CTLOUT_H(1)

L0_CTLOUT_L(1)

L0_CTLOUT_H(0)

L0_CTLOUT_L(0)

L0_CADOUT_H(15)

L0_CADOUT_L(15)

L0_CADOUT_H(14)

L0_CADOUT_L(14)

L0_CADOUT_H(13)

L0_CADOUT_L(13)

L0_CADOUT_H(12)

L0_CADOUT_L(12)

L0_CADOUT_H(11)

L0_CADOUT_L(11)

L0_CADOUT_H(10)

L0_CADOUT_L(10)

L0_CADOUT_H(9)

L0_CADOUT_L(9)

L0_CADOUT_H(8)

L0_CADOUT_L(8)

L0_CADOUT_H(7)

L0_CADOUT_L(7)

L0_CADOUT_H(6)

L0_CADOUT_L(6)

L0_CADOUT_H(5)

L0_CADOUT_L(5)

L0_CADOUT_H(4)

L0_CADOUT_L(4)

L0_CADOUT_H(3)

L0_CADOUT_L(3)

L0_CADOUT_H(2)

L0_CADOUT_L(2)

L0_CADOUT_H(1)

L0_CADOUT_L(1)

L0_CADOUT_H(0)

L0_CADOUT_L(0)

AD5
AD4
AD1
AC1

Y6
W6
W2
W3

Y5
Y4
AB6
AA6
AB5
AB4
AD6
AC6
AF6
AE6
AF5
AF4
AH6
AG6
AH5
AH4

Y1
W1
AA2
AA3
AB1
AA1
AC2
AC3
AE2
AE3
AF1
AE1
AG2
AG3
AH1
AG1

L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CLKOUT_H0
L0_CLKOUT_L0

L0_CTLOUT_H1
L0_CTLOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_L0

L0_CADOUT_H15
L0_CADOUT_L15
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H8
L0_CADOUT_L8

L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H0
L0_CADOUT_L0

L0_CLKOUT_H1 {10}
L0_CLKOUT_L1 {10}
L0_CLKOUT_H0 {10}
L0_CLKOUT_L0 {10}

L0_CTLOUT_H1 {10}L0_CTLIN_H1{10}
L0_CTLOUT_L1 {10}
L0_CTLOUT_H0 {10}
L0_CTLOUT_L0 {10}

VLDT_A = VCC12_HT
VLDT_B = HT12B

M2CPU

AM3RM/SC/BK/MB[12KRC-04K812-21R_12KRC-04K812-22R]

Title

Size Document Number Rev

Custom

Date: Sheet of

CPU HYPER TRANSPORT

GA-780T-D3L 3.1

4 37Tuesday, November 01, 2011

Gigabyte Confidential

Do not Copy

-DQSA[0..8]
DQSA[0..8]

MA_CK[0..7]

DMA[0:8]

MAAA[0..15]{8}

-DQSA[0..8] {8}
DQSA[0..8] {8}
MA_CK[0..7] {8}
DMA[0..8] {8}

A00P
A00N

M2CPUB

AG21
AG20

G19
H19

DCLKA3

-DCLKA3

MODT_A2

-SCASA

-SWEA

-SRASA
SBAA2

SBAA1
SBAA0

CKEA1
CKEA0

DQSA7

-DQSA7
DQSA6

-DQSA6
DQSA5

-DQSA5
DQSA4

-DQSA4
DQSA3

-DQSA3
DQSA2

-DQSA2
DQSA1

-DQSA1
DQSA0

-DQSA0
DMA7

DMA6
DMA5
DMA4
DMA3
DMA2
DMA1
DMA0

AC25
AA24

AC28
AE20

AE19

W27

AD27
AA25

AC27

AB25
AB27
AA26

AA27

AC26

W24

AD15
AE15
AG18
AG19
AG24
AG25
AG27
AG28

AF15
AF19
AJ25

AH29

U27
U26

G20
G21
V27

N25
Y27

L27
M25

M27
N24

N26
P25
Y25
N27
R24
P27
R25
R26
R27
T25
U25
T27

D29
C29
C25
D25
E19
F19
F15
G15

B29
E24
E18
H15

DCLKA3{8}

-DCLKA3{8}

-CSA3{8}

-CSA2{8}

MODT_A2{8}

-SCASA{8}

-SWEA{8}

-SRASA{8}
SBAA2{8} SBAB1{9}

SBAA1{8}
SBAA0{8}

CKEA0{8}

MAAA15
MAAA14
MAAA13
MAAA12
MAAA11
MAAA10
MAAA9
MAAA8
MAAA7
MAAA6
MAAA5
MAAA4
MAAA3
MAAA2
MAAA1
MAAA0

MEMORY INTERFACE A

MA0_CLK_H(2)
M

A0_CLK_L(2)
MA0_CLK_H(1)
MA0_CLK_L(1)
MA0_CLK_H(0)
MA0_CLK_L(0)

MA0_CS_L(1)
MA0_CS_L(0)

MA0_ODT(0)
MA1_CLK_H(2)

MA1_CLK_L(2)
MA1_CLK_H(1)
MA1_CLK_L(1)
MA1_CLK_H(0)
MA1_CLK_L(0)

MA1_CS_L(1)
MA1_CS_L(0)

MA1_ODT(0)

MA_CAS_L
MA_WE_L
MA_RAS_L

MA_BANK(2)
MA_BANK(1)
MA_BANK(0)

MA_CKE(1)
MA_CKE(0)

MA_ADD(15)
MA_ADD(14)
MA_ADD(13)
MA_ADD(12)
MA_ADD(11)
MA_ADD(10)
MA_ADD(9)
MA_ADD(8)
MA_ADD(7)
MA_ADD(6)
MA_ADD(5)
MA_ADD(4)
MA_ADD(3)
MA_ADD(2)
MA_ADD(1)
MA_ADD(0)

MA_DQS_H(7)
MA_DQS_L(7)
MA_DQS_H(6)
MA_DQS_L(6)
MA_DQS_H(5)
MA_DQS_L(5)
MA_DQS_H(4)
MA_DQS_L(4)
MA_DQS_H(3)
MA_DQS_L(3)
MA_DQS_H(2)
MA_DQS_L(2)
MA_DQS_H(1)
MA_DQS_L(1)
MA_DQS_H(0)
MA_DQS_L(0)

MA_DM(7)
MA_DM(6)
MA_DM(5)
MA_DM(4)
MA_DM(3)
MA_DM(2)
MA_DM(1)
MA_DM(0)

MA_DATA(63)
MA_DATA(62)
MA_DATA(61)
MA_DATA(60)
MA_DATA(59)
MA_DATA(58)
MA_DATA(57)
MA_DATA(56)
MA_DATA(55)
MA_DATA(54)
MA_DATA(53)
MA_DATA(52)
MA_DATA(51)
MA_DATA(50)
MA_DATA(49)
MA_DATA(48)
MA_DATA(47)
MA_DATA(46)
MA_DATA(45)
MA_DATA(44)
MA_DATA(43)
MA_DATA(42)
MA_DATA(41)
MA_DATA(40)
MA_DATA(39)
MA_DATA(38)
MA_DATA(37)
MA_DATA(36)
MA_DATA(35)
MA_DATA(34)
MA_DATA(33)
MA_DATA(32)
MA_DATA(31)
MA_DATA(30)
MA_DATA(29)
MA_DATA(28)
MA_DATA(27)
MA_DATA(26)
MA_DATA(25)
MA_DATA(24)
MA_DATA(23)
MA_DATA(22)
MA_DATA(21)
MA_DATA(20)
MA_DATA(19)
MA_DATA(18)
MA_DATA(17)
MA_DATA(16)
MA_DATA(15)
MA_DATA(14)
MA_DATA(13)
MA_DATA(12)
MA_DATA(11)
MA_DATA(10)

MA_DATA(9)
MA_DATA(8)
MA_DATA(7)
MA_DATA(6)
MA_DATA(5)
MA_DATA(4)
MA_DATA(3)
MA_DATA(2)
MA_DATA(1)
MA_DATA(0)

MA_DQS_H(8)

MA_DQS_L(8)

MA_DM(8)

MA_CHECK(7)
MA_CHECK(6)
MA_CHECK(5)
MA_CHECK(4)
MA_CHECK(3)
MA_CHECK(2)
MA_CHECK(1)
MA_CHECK(0)

CPU-SK/942/AM3b/S/GF/[10SC1-A01942-01R_10SC1-A01942-02R]

AE14
AG14
AG16
AD17
AD13
AE13
AG15
AE16
AG17
AE18
AD21
AG22
AE17
AF17
AF21
AE21
AF23
AE23
AJ26
AG26
AE22
AG23
AH25
AF25
AJ28
AJ29
AF29
AE26
AJ27
AH27
AG29
AF27
E29
E28
D27
C27
G26
F27
C28
E27
F25
E25
E23
D23
E26
C26
G23
F23
E22
E21
F17
G17
G22
F21
G18
E17
G16
E15
G13
H13
H17
E16
E14
G14

J28
J27

J25
K25

J26
G28
G27
L24
K27
H29
H27

MDA63
MDA62
MDA61
MDA60
MDA59
MDA58
MDA57
MDA56
MDA55
MDA54
MDA53
MDA52
MDA51
MDA50
MDA49
MDA48
MDA47
MDA46
MDA45
MDA44
MDA43
MDA42
MDA41
MDA40
MDA39
MDA38
MDA37
MDA36
MDA35
MDA34
MDA33
MDA32
MDA31
MDA30
MDA29
MDA28
MDA27
MDA26
MDA25
MDA24
MDA23
MDA22
MDA21
MDA20
MDA19
MDA18
MDA17
MDA16
MDA15
MDA14
MDA13
MDA12
MDA11
MDA10
MDA9
MDA8
MDA7
MDA6
MDA5
MDA4
MDA3
MDA2
MDA1
MDA0

DQSA8

-DQSA8
DMA8
MA_CK7

MA_CK6
MA_CK5
MA_CK4
MA_CK3
MA_CK2
MA_CK1
MA_CK0

MDA[0..63] {8}

MAAB[0..15]{9}

-DQSB[0..8]
DQSB[0..8]
MB_CK[0..7]
DMB[0..8]

B11P
B11N

B00P
B00N

-DQSB[0..8] {9}
DQSB[0..8] {9}

DCLKB3{9}

-DCLKB3{9}

-CSB3{9}

-CSB2{9}

MODT_B2{9}

-SCASB{9}

-SWEB{9}

-SRASB{9}
SBAB2{9}
SBAB0{9}
CKEB1{9}

CKEB0{9}CKEA1{8}

MB_CK[0..7] {9}
DMB[0..8] {9}

MAAB15
MAAB14
MAAB13
MAAB12
MAAB11
MAAB10
MAAB9
MAAB8
MAAB7
MAAB6
MAAB5
MAAB4
MAAB3
MAAB2
MAAB1
MAAB0

DCLKB3

-DCLKB3

MODT_B2

-SCASB

-SWEB

-SRASB
SBAB2

SBAB1
SBAB0

CKEB1
CKEB0

DQSB7

-DQSB7
DQSB6

-DQSB6
DQSB5

-DQSB5
DQSB4

-DQSB4
DQSB3

-DQSB3
DQSB2

-DQSB2
DQSB1

-DQSB1
DQSB0

-DQSB0
DMB7

DMB6
DMB5
DMB4
DMB3
DMB2
DMB1
DMB0

AJ19
AK19

AE30

AC31
AD29

AL19
AL18

W29
W28

AE29
AB31

AD31

AC29
AC30
AB29

AA31
AA28

M31
M29

N28
N29

AE31

N30

AA29

R29
R28
R31
R30

U29
U28

AA30
AK13

AJ13

AK17

AJ17

AK23

AL23
AL28
AL29

D31
C31
C24
C23
D17
C17
C14
C13

AJ14

AH17

AJ23

AK29

C30

A18
A19
U31
U30

C19
D19

N31

P29
P31

T31
T29

A23
B17
B13

M2CPUC

MB0_CLK_H(2)
M

B0_CLK_L(2)
MB0_CLK_H(1)
MB0_CLK_L(1)
MB0_CLK_H(0)
MB0_CLK_L(0)

MB0_CS_L(1)
MB0_CS_L(0)

MB0_ODT(0)
MB1_CLK_H(2)

MB1_CLK_L(2)
MB1_CLK_H(1)
MB1_CLK_L(1)
MB1_CLK_H(0)
MB1_CLK_L(0)

MB1_CS_L(1)
MB1_CS_L(0)

MB1_ODT(0)

MB_CAS_L
MB_WE_L
MB_RAS_L

MB_BANK(2)
MB_BANK(1)
MB_BANK(0)

MB_CKE(1)
MB_CKE(0)

MB_ADD(15)
MB_ADD(14)
MB_ADD(13)
MB_ADD(12)
MB_ADD(11)
MB_ADD(10)
MB_ADD(9)
MB_ADD(8)
MB_ADD(7)
MB_ADD(6)
MB_ADD(5)
MB_ADD(4)
MB_ADD(3)
MB_ADD(2)
MB_ADD(1)
MB_ADD(0)

MB_DQS_H(7)
MB_DQS_L(7)
MB_DQS_H(6)
MB_DQS_L(6)
MB_DQS_H(5)
MB_DQS_L(5)
MB_DQS_H(4)
MB_DQS_L(4)
MB_DQS_H(3)
MB_DQS_L(3)
MB_DQS_H(2)
MB_DQS_L(2)
MB_DQS_H(1)
MB_DQS_L(1)
MB_DQS_H(0)
MB_DQS_L(0)

MB_DM(7)
MB_DM(6)
MB_DM(5)
MB_DM(4)
MB_DM(3)
MB_DM(2)
MB_DM(1)
MB_DM(0)

MEMORY INTERFACE B

MB_DATA(63)
MB_DATA(62)
MB_DATA(61)
MB_DATA(60)
MB_DATA(59)
MB_DATA(58)
MB_DATA(57)
MB_DATA(56)
MB_DATA(55)
MB_DATA(54)
MB_DATA(53)
MB_DATA(52)
MB_DATA(51)
MB_DATA(50)
MB_DATA(49)
MB_DATA(48)
MB_DATA(47)
MB_DATA(46)
MB_DATA(45)
MB_DATA(44)
MB_DATA(43)
MB_DATA(42)
MB_DATA(41)
MB_DATA(40)
MB_DATA(39)
MB_DATA(38)
MB_DATA(37)
MB_DATA(36)
MB_DATA(35)
MB_DATA(34)
MB_DATA(33)
MB_DATA(32)
MB_DATA(31)
MB_DATA(30)
MB_DATA(29)
MB_DATA(28)
MB_DATA(27)
MB_DATA(26)
MB_DATA(25)
MB_DATA(24)
MB_DATA(23)
MB_DATA(22)
MB_DATA(21)
MB_DATA(20)
MB_DATA(19)
MB_DATA(18)
MB_DATA(17)
MB_DATA(16)
MB_DATA(15)
MB_DATA(14)
MB_DATA(13)
MB_DATA(12)
MB_DATA(11)
MB_DATA(10)

MB_DATA(9)
MB_DATA(8)
MB_DATA(7)
MB_DATA(6)
MB_DATA(5)
MB_DATA(4)
MB_DATA(3)
MB_DATA(2)
MB_DATA(1)
MB_DATA(0)

MB_DQS_H(8)

MB_DQS_L(8)

MB_DM(8)

MB_CHECK(7)
MB_CHECK(6)
MB_CHECK(5)
MB_CHECK(4)
MB_CHECK(3)
MB_CHECK(2)
MB_CHECK(1)
MB_CHECK(0)

CPU-SK/942/AM3b/S/GF/[10SC1-A01942-01R_10SC1-A01942-02R]

AH13
AL13
AL15
AJ15
AF13
AG13
AL14
AK15
AL16
AL17
AK21
AL21
AH15
AJ16
AH19
AL20
AJ22
AL22
AL24
AK25
AJ21
AH21
AH23
AJ24
AL27
AK27
AH31
AG30
AL25
AL26
AJ30
AJ31
E31
E30
B27
A27
F29
F31
A29
A28
A25
A24
C22
D21
A26
B25
B23
A22
B21
A20
C16
D15
C21
A21
A17
A16
B15
A14
E13
F13
C15
A15
A13
D13

J31
J30

J29
K29

K31
G30
G29
L29
L28
H31
G31

MDB63
MDB62
MDB61
MDB60
MDB59
MDB58
MDB57
MDB56
MDB55
MDB54
MDB53
MDB52
MDB51
MDB50
MDB49
MDB48
MDB47
MDB46
MDB45
MDB44
MDB43
MDB42
MDB41
MDB40
MDB39
MDB38
MDB37
MDB36
MDB35
MDB34
MDB33
MDB32
MDB31
MDB30
MDB29
MDB28
MDB27
MDB26
MDB25
MDB24
MDB23
MDB22
MDB21
MDB20
MDB19
MDB18
MDB17
MDB16
MDB15
MDB14
MDB13
MDB12
MDB11
MDB10
MDB9
MDB8
MDB7
MDB6
MDB5
MDB4
MDB3
MDB2
MDB1
MDB0

DQSB8

-DQSB8
DMB8
MB_CK7

MB_CK6
MB_CK5
MB_CK4
MB_CK3
MB_CK2
MB_CK1
MB_CK0

MDB[0..63] {9}

MEM CHA

CPU

TO DIMMA0 & DIMMA1

A0 A1

CPU

TO DIMMB0 & DIMMB1

MEM CHB

B0 B1

Title

Size Document Number Rev

Custom

Date: Sheet of

CPU DDRIII MEMORY

GA-780T-D3L 3.1

5 37Friday, October 14, 2011

Gigabyte Confidential

Do not Copy

SB600
CPU_PWR / DDR18V

-CPURST

-LDT_STOP

DDR15V

CPU_PG_SB{16}

VCC12_HT

PWROK >

VC/SVD(CPU_PWROK)

S
10 uS

R2724 1K/4/X

0.01u/4/X7R/25V/K

CPUVREF

40 MILS WIDTH

CPU_M_VREF

SBC12

1N/4/X7R/50V/K

Layout: Place within
500mils of the CPU socket.

12

SBC31

0.1U/4/Y5V/16V/Z

SC35
1u/6/Y5V/10V/Z

R26 300/4
R36 300/4

Q309

R2756
300/4

C1791

DDR15V

SR19

15/4/1

SR20
15/4/1

VDDA25

DDR15V

3VDUAL VCC3

R2506

8.2K/4

3

Q310

D

G S

2

1

2N7002/SOT23/25pF/5

MMBT2222A/SOT23/600mA/40

R2755

1K/4/1

Q355

2N7002/SOT23/25pF/5

3

D

G S

2

DDR15V

G S

2

D

R2507

8.2K/4

1

3

R2754
300/4

1

2.5V/0.5A

FB1 30/6/4A/S

CPUCLK0_H{15}

CPUCLK0_L{15}

CPU_CRST-{17}

PWM_PW RGD {32}

C1752

0.1u/4/Y5V/16V/Z/X

CPU_PWRGD

C1790

0.1u/4/Y5V/16V/Z/X

-CPURST

100P/4/NPO/50V/J

C3

4.7u/6/X5R/6.3V/K

CPUCLK0_H

CPUCLK0_L

DDR15V

SI_CLK{28}
SI_DAT{28}

DDR15V

R4102 0/4

3.3n/4/X7R/50V/K

3.9n/4/X7R/50V/K
C1

C2

3.9n/4/X7R/50V/K

C13

R5

169/4/1

R17 1K/4/1
R8 0/4
R9 0/4
R19 1K/4/1

AM3+ Thermal

COREFB+{24,32}

COREFB-{24,32}

VTT_SENSE AM3 only, may not use, like AM2

CPU_M_VREF

DDR15V

R2725 300/4
R2726 300/4
R2727 300/4

GNDA{28}

TMPIN2{28,29}

COREFB-{24,32}

COREFB+{24,32}

COREFB-{24,32}

COREFB+{24,32}

C1798

C4

0.22u/6/X7R/16V/K

CLKIN_H

CLKIN_L

-LDT_STOP{12,16}

CPU_DBREQ-{17} CPU_DBRDY {17}

R11 39.2/4/1
R12 39.2/4/1

R13 300/4
R14 300/4

CPU_PWRGD

-LDT_STOP

-CPURST

-CPURST{12,16}
CPU_PRESENT_L

*

SIC
SID

CPU_TDI CPU_TDO

*

CPU_TRST-

CPU_TRST-{17}

CPU_TCK

CPU_TCK{17}

CPU_TMS

CPU_TMS{17}

CPU_DBREQ-

TP17R1 1K/4/1

VDDR_SENSE

CPU_TEST25_H
CPU_TEST25_L

TP89
TP91

BC116

2.2n/4/X7R/50V/K/X

C9
22u/8/X5R/6.3V/M/X

C10

0.1u/4/Y5V/16V/Z/X

M2CPUD

MISC

VDDA1
VDDA2

CLKIN_H
CLKIN_L

PWROK
LDTSTOP_L
RESET_L

CPU_PRESENT_L

THERMTRIP_L

SIC

PROCHOT_L

SID
TDI

TRST_L
TCK
TMS

DBREQ_L

VDDIO_FB_H

VDD_FB_H

VDDIO_FB_L

VDD_FB_L
VTT_SENSE

M_VREF
M_ZN
M_ZP

TEST25_H
TEST25_L
TEST19
TEST18
TEST13
TEST9

TEST17
TEST16
TEST15
TEST14
TEST12

TEST7
TEST6
THERMDC
THERMDA
TEST3
TEST2

CPU-SK/942/AM3b/S/GF/[10SC1-A01942-01R_10SC1-A01942-02R]

LAYOUT: Route trace 50 mils wide and

VID(5)
VID(4)
VID(3)
VID(2)
VID(1)
VID(0)

TDO

DBRDY

PSI_L

HTREF1
HTREF0

TEST29_H

TEST29_L

TEST24
TEST23
TEST22
TEST21
TEST20

TEST28_H

TEST28_L

TEST27
TEST26
TEST10

TEST8

D2
D1
C1
E3
E2
E1

AK7
AL7

AK10

CPU_DBRDY

B6
AK11

AL11

CPU_PSI-

F1

V8
V7

C11
D11

Route as 80-Ohm differential impedance
Keep trace to resistor less than 1" from CPU pin

CPU_TEST24

AK8
AH8

CPU_TEST22

AJ9

CPU_TEST21

AL8

CPU_TEST20

AJ8
J10

H9

CPU_TEST27

AK9

CPU_TEST26

AK5
G7
D4

AK6

AL10
AJ10

AH10

AH11

AJ11

AH9

AG9
AG8
AH7

C10
D10

A8
B8

C9
D8
C7

AL3

AL6

AL9

A5
G2

G1

E12

F12

A10
B10
F10

E9

AJ7

F6
D6

E7
F8
C5

E5

AJ5

AJ6

500 to 750 mils long between these caps.

A10P
A10N

A01P
A01N

B10P
B10N

B01P
B01N

R56

R65

300/4/X

300/4/X

*

CPU_TDO {17}CPU_TDI{17}

TP18
TP19

TP1

R53 44.2/4/1
R54 44.2/4/1

R55 80.6/4/1

TP92

DCLKA2{8}

-DCLKA2{8}
MODT_A3{8}

DCLKB2{9}

-DCLKB2{9}
MODT_B3{9}

R2555
1K/4/1

THERMTRIP_L

VCC12_HT

DDR15V

R2557
1K/4/1

AM3 only

DCLKA2

-DCLKA2
MODT_A3

AM3 only

DCLKB2

-DCLKB2
MODT_B3

R57
300/4

DDR15V

R4101
300/4/X

DDR15V

R60
300/4

-PROCHOT

L25
L26
L31
L30

W26
W25

AE27

U24
V24

AE28

Y31
Y30

AG31

V31

W31

AF31

R227
300/4/X

VID5 {32}
VID4 {32}
VID3 {32}
VID2 {32}
VID1 {32}
VID0 {32}

R176 1K/4/1

R174 1K/4/1

R190 0/4

M2CPUE

INTERNAL MISC

RSVD1
RSVD2
RSVD3
RSVD4

M_VDDIO_PWRGD
DCLKA2
DCLKA2­MODT_A3
DCLKA1

CORE_TYP_DET
DCLKA1­MODT_A1

DCLKB2
DCLKB2­MODT_B3
DCLKB1
DCLKB1­MODT_B1

Q10

-PROCHOT_CPU

MA_RESET­MB_RESET-

RSVD19
RSVD20
RSVD21

RSVD22

COREFB_NB+
COREFB_NB-

RSVD27
RSVD28
RSVD29
RSVD30
RSVD31
RSVD32
RSVD33
RSVD34
RSVD35

RSVD36
MB_EVENT_L
MA_EVENT_L

3VDUAL

Q9

R175 1K/4/1

MMBT2222A/SOT23/600mA/40

SOT23

132

3VDUAL_SB

R110

8.2K/4/X

-PROCHOT_CPU {16}

Erratum 133, Revision Guide for
AMD NPT 0Fh Processors

AM3 only

MA_RESET_L

E20

MB_RESET_L

B19
AL4

R27 0/4

AK4
AK3

F2
F3

M_VDDIO_PWRGD AM3 only

COREFB_NB+

G4

COREFB_NB-

G3

CORE_TYPE_DET

G5
AD25

AE24
AE25
AJ18
AJ20
C18
C20

AM3 =>DRAM Thermal Event Status

G24

R103 1K/4/1

G25
H25

MB_EVENT_L

V29

MA_EVENT_L

W30

R102 1K/4/1

EVENT pins are for future AM3r2

R59

8.2K/4

THERMTRIP_CPU_L

MMBT2222A/SOT23/600mA/40

SOT23

132

Erratum 133, Revision Guide for
AMD NPT 0Fh Processors

*
*

CPU_TEST26

CPU_PRESENT_L
CPU_TEST25_H

CPU_TEST25_L

CPU_TEST21

CPU_TEST27
CPU_TEST20

CPU_TEST22
CPU_TEST24

MA_RESET_L {8}
MB_RESET_L {9}

THERMTRIP_CPU_L {17,36,37}

*

COREFB_NB+ {32}
COREFB_NB- {32}

R2448 1K/4/1

AM2: high, AM2R2: low

DDR15V

MB_EVENT_L {9}
MA_EVENT_L {8}

DDR15V

DDR15V

R37 300/4/X

R49 10K/4/1
R42 510/4/1

R43 510/4/1

R47 300/4

GND

R2728 300/4
R2729 300/4

R2730 300/4
R2731 300/4

CORE_TYPE_DET {32}

DDR15V

Layout: Route as 60 ohms
with 5/10 W/S from CPU pins.

DDR15V

GND

Title

Size Document Number Rev

Custom

Date: Sheet of

CPU CONTROL

GA-780T-D3L 3.1

6 37Friday, October 14, 2011

Gigabyte Confidential

Do not Copy

VCORE_NB

VCORE

VCORE_NB

VCORE

VCORE_NB

VCORE

VCORE_NB

VCORE

VCORE_NB

VCORE

VCORE_NB

VCORE

VCORE_NB

VCORE

VCC12_HT

AA10
AA12
AA14
AA16
AA18

AB11

AC4
AC5
AC8

AC10

AD2
AD3
AD7
AD9

AE10

AG4
AG5
AG7
AH2
AH3

VLDT_RUN_B is connected to the VLDT_RUN power

VCORE_NB

supply through the package or on the die. It is only connected

M2CPUF

VDD1

A4

VDD1

A6

VDD2

AA8

VDD3
VDD4
VDD5
VDD6
VDD7
VDD8

AB7

VDD9

AB9

VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VDD20

AF7

VDD21

AF9

VDD22
VDD23
VDD24
VDD25
VDD26
VDD27

B3

VDD28

B5

VDD29

B7

VDD30

C2

VDD31

C4

VDD32

C6

VDD33

C8

VDD34

D3

VDD35

D5

VDD36

D7

VDD37

D9

VDD38

E4

VDD39

E6

VDD40

E8

VDD41

E10

VDD42

F5

VDD43

F7

VDD44

F9

VDD45

F11

VDD46

G6

VDD47

G8

VDD48

G10

VDD49

G12

VDD50

H7

VDD51

H11

VDD52

H23

VDD53

J8

VDD54

J12

VDD55

J14

VDD56

J16

VDD57

J18

VDD58

J20

VDD59

J22

VDD60

J24

VDD61

K7

VDD62

K9

VDD63

K11

VDD64

K13

VDD65

K15

VDD66

K17

VDD67

K19

VDD68

K21

VDD69

K23

VDD70

L4

VDD71

L5

VDD72

L8

VDD73

L10

VDD74

L12

VDD75

Y17

VDD150

Y19

VDD151

VSS1
V
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8

VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44

VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75

VSS240
VSS241

A3
A7

SS2

A9
A11
AA4
AA5
AA7
AA9
AA11
AA13
AA15
AA17
AA19
AA21
AA23
AB2
AB3
AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AC7
AC9
AC11
AC13
AC15
AC17
AC19
AC21
AC23
AD8
AD10
AD12
AD14
AD16
AD20
AD22
AD24
AE4
AE5

AE11

AE9 Missing pins on package

AF2
AF3

and socket used for

AF8

mechanical keying. =>AM3

AF10
AF12
AF14
AF16
AF18
AF20
AF22
AF24
AF26
AF28
AG10
AG11
AH14
AH16
AH18
AH20
AH22
AH24
AH26
AH28
AH30
AK2
AK14
AK16
AK18
Y14
Y16

GND

VCORE

M11
M13
M15
M17
M19

W10
W12
W14
W16
W18
W20

M2CPUG

VDD2

L14

VDD1

L16

VDD2

L18

VDD3

M2

VDD4

M3

VDD5

M7

VDD6

M9

VDD7
VDD8
VDD9
VDD10
VDD11
VDD12

N8

VDD13

N10

VDD14

N12

VDD15

N14

VDD16

N16

VDD17

N18

VDD18

P7

VDD19

P9

VDD20

P11

VDD21

P13

VDD22

P15

VDD23

P17

VDD24

P19

VDD25

R4

VDD26

R5

VDD27

R8

VDD28

R10

VDD29

R12

VDD30

R14

VDD31

R16

VDD32

R18

VDD33

R20

VDD34

T2

VDD35

T3

VDD36

T7

VDD37

T9

VDD38

T11

VDD39

T13

VDD40

T15

VDD41

T17

VDD42

T19

VDD43

T21

VDD44

U8

VDD45

U10

VDD46

U12

VDD47

U14

VDD48

U16

VDD49

U18

VDD50

U20

VDD51

V9

VDD52

V11

VDD53

V13

VDD54

V15

VDD55

V17

VDD56

V19

VDD57

V21

VDD58

W4

VDD59

W5

VDD60

W8

VDD61
VDD62
VDD63
VDD64
VDD65
VDD66
VDD67

Y2

VDD68

Y3

VDD69

Y7

VDD70

Y9

VDD71

Y11

VDD72

Y13

VDD73

Y15

VDD74

Y21

VDD75

VSS1
V

SS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9

VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48

VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75

AK20
AK22
AK24
AK26
AK28
AK30
AL5
B4
B9
B11
B14
B16
B18
B20
B22
B24
B26
B28
B30
C3
D14
D16
D18
D20
D22
D24
D26
D28
D30
E11
F4
F14
F16
F18
F20
F22
F24
F26
F28
F30
G9
G11
H8
H10
H12
H14
H16
H18

H22 Missing pins on package

H24
H26

and socket used for

H28

mechanical keying. =>AM3

H30
J4
J5
J7
J9
J11
J13
J15
J17
J19
J21
J23
K2
K3
K8
K10
K12
K14
K16
K18
K20
K22
Y18

GND

VCORE

AA20
AA22
AB13
AB15
AB17
AB19
AB21
AB23
AC12
AC14
AC16
AC18
AC20
AC22
AD11
AD23
AE12
AF11

W22

AM3 Only

GND

M21
M23
N20
N22
P21
P23
R22
T23
U22
V23

Y23

H20
AE7

L20
L22

B2

M2CPUH

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VDD20
VDD21
VDD22
VDD23
VDD24
VDD25
VDD26
VDD27
VDD28
VDD29
VDD30
VDD31
VDD32

NB/RSVD

NP/VSS1
NP/VSS2

CPU_VDDR12

VDD3

VSS1
V
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8

VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65

on the board to decoupling near the CPU package.

VCC12_HT

N17
N19

SS2

N21

CPU_VDDR12

N23
P2
P3
P8

DDR15V

P10
P12
P14
P16
P18
P20
P22
R7
R9
R11
R13
R15
R17
R19
R21
R23
T8
T10
T12
T14
T16
T18
T20
T22
U4
U5
U7
U9
U11
U13
U15
U17
U19
U21
U23
V2
V3
V10
V12
V14
V16
V18
V20
V22
W9
W11
W13
W15
W17
W19
W21
W23
Y8
Y10
Y12
W7
Y20
Y22

VCC12_HT HT12B

AMD suggestion
Patch SB700 leakage

GND

R339
470/4/X

GND GND

AB24
AB26
AB28

AB30
AC24
AD26
AD28
AD30

AF30

M24
M26
M28
M30

AJ4
AJ3
AJ2
AJ1

D12
C12
B12
A12

P24
P26
P28
P30
T24
T26
T28
T30
V25
V26
V28
V30
Y24
Y26
Y28
Y29

R341
470/4/X

VLDT_A1
VLDT_A2
VLDT_A3
VLDT_A4

VDDR_4
VDDR_3
VDDR_2
VDDR_1

VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO6
VDDIO7
VDDIO8
VDDIO29
VDDIO9
VDDIO10
VDDIO11
VDDIO12
VDDIO13
VDDIO14
VDDIO15
VDDIO16
VDDIO17
VDDIO18
VDDIO19
VDDIO20
VDDIO21
VDDIO22
VDDIO23
VDDIO24
VDDIO25
VDDIO26
VDDIO27
VDDIO28

M2CPUI

VDDIO

VLDT_B1
V

LDT_B2
VLDT_B3
VLDT_B4

VDDR_5
VDDR_6
VDDR_7
VDDR_8
VDDR_9

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8

VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28

H6
H5
H2
H1

AG12
AH12
AJ12
AK12
AL12

K24
K26
K28
K30
L7
L9
L11
L13
L15
L17
L19
L21
L23
M8
M10
M12
M14
M16
M18
M20
M22
N4
N5
N7
N9
N11
N13
N15

GND

VCORE

SC16

22u/8/X5R/6.3V/M

VCORE

SC24

22u/8/X5R/6.3V/M

HT12B

CPU_VDDR12

GND

BUTTOM SIDE

SC17

SC25

22u/8/X5R/6.3V/M

22u/8/X5R/6.3V/M

22u/8/X5R/6.3V/M

GND

22u/8/X5R/6.3V/M

GND

BC795

4.7u/6/X5R/6.3V/K

SC18

SC26

C1347
22u/8/X5R/6.3V/M

DDR15V

DDR15V

VCORE

SC11

0.22u/6/X7R/16V/K

SC19

22u/8/X5R/6.3V/M

SC27

22u/8/X5R/6.3V/M

1021 EMI

CPU_VDDR12

C1344
22u/8/X5R/6.3V/M

GND

SC2

0.22u/6/X7R/16V/K

GND

SC9

22u/8/X5R/6.3V/M

GND

SC12

0.22u/6/X7R/16V/K

GND

SC20

22u/8/X5R/6.3V/M

SC28

22u/8/X5R/6.3V/M

C1343

C1342

0.1U/4/Y5V/16V/Z

1u/6/Y5V/10V/Z

BUTTOM SIDE

SC4

0.22u/6/X7R/16V/K

SC10

22u/8/X5R/6.3V/M

SC7

4.7u/6/X5R/6.3V/K

BUTTOM SIDE

SC13

0.22u/6/X7R/16V/K

SC21

22u/8/X5R/6.3V/M

SC29

22u/8/X5R/6.3V/M

C1345

0.01u/4/X7R/25V/K

SC5

0.01u/4/X7R/25V/K

SC8

4.7u/6/X5R/6.3V/K

SC14

0.01u/4/X7R/25V/K

SC22

22u/8/X5R/6.3V/M

SC30

22u/8/X5R/6.3V/M

C1346

C1812

180P/4/NPO/50V/J

0.1U/4/Y5V/16V/Z

SC6

180P/4/NPO/50V/J

SC31
180P/4/NPO/50V/J

SC15
180P/4/NPO/50V/J

SC23

22u/8/X5R/6.3V/M

C1328

4.7u/6/X5R/6.3V/K

GND

DDR15V

C1324

4.7u/6/X5R/6.3V/K

GND

C1329

4.7u/6/X5R/6.3V/K

C1330

0.22u/6/X7R/16V/K

C1331

0.22u/6/X7R/16V/K

C1332
180P/4/NPO/50V/J

C1333

180P/4/NPO/50V/J

C1327

C1325

4.7u/6/X5R/6.3V/K

C1326

0.22u/6/X7R/16V/K

0.22u/6/X7R/16V/K

C1337

0.22u/6/X7R/16V/K

C1319

0.22u/6/X7R/16V/K

C1316

4.7u/6/X5R/6.3V/K

CPU_VDDR12

C1334

4.7u/6/X5R/6.3V/K

C1317

4.7u/6/X5R/6.3V/K

GND

C1335

4.7u/6/X5R/6.3V/K

GND

C1318

0.22u/6/X7R/16V/K

C1336

0.22u/6/X7R/16V/K

C1320
1N/4/X7R/50V/K

C1338
1N/4/X7R/50V/K

C1321
1N/4/X7R/50V/K

C1339
1N/4/X7R/50V/K

C1322
180P/4/NPO/50V/J

C1340
180P/4/NPO/50V/J

C1323
180P/4/NPO/50V/J

C1341
180P/4/NPO/50V/J

BC20

100P/4/NPO/50V/J

Title

CPU POWER & GND

Size Document Number Rev

Custom

Date: Sheet of

BC23

100P/4/NPO/50V/J

GA-780T-D3L 3.1

BC24

100P/4/NPO/50V/J/X

BC25

100P/4/NPO/50V/J/X

7 37Friday, October 14, 2011

Gigabyte Confidential

Do not Copy

8

D D

C C

C275 0.1u/4/Y5V/16V/Z

VCC3

C277 0.1u/4/Y5V/16V/Z
C279 0.1u/4/Y5V/16V/Z

B B

A A

SMBDATA{9,15,17,20,21,22,23,32,36}

-DCLKA3{5}

-DCLKA2{6}

MAAA[0..15]{5}

MA_RESET_L{6}

8

DDRVTT

DDR15V

VREFCA_A
VREFDQ_A

SMBCLK

SMBCLK{9,15,17,20,21,22,23,32,36}

SMBDATA

VCC3

SBAA2

SBAA2{5}

SBAA1

SBAA1{5}

SBAA0

SBAA0{5}

CKEA1

CKEA1{5}
CKEA0{5}

-CSA3

-CSA3{5}

-CSA2

-CSA2{5}

-DCLKA3
DCLKA3

DCLKA3{5}

-DCLKA2
DCLKA2

DCLKA2{6}

MAAA0
MAAA1
MAAA2
MAAA3
MAAA4
MAAA5
MAAA6
MAAA7
MAAA8
MAAA9
MAAA10
MAAA11
MAAA12
MAAA13
MAAA14
MAAA15

MA_RESET_L

-SCASA

-SCASA{5}

-SRASA

-SRASA{5}

-SWEA

-SWEA{5}

DDR3_1

120

VTT

2

VSS

5

VSS

8

VSS

11

VSS

14

VSS

17

VSS

20

VSS

23

VSS

26

VSS

29

VSS

32

VSS

35

VSS

38

VSS

41

VSS

44

VSS

47

VSS

80

VSS

83

VSS

86

VSS

89

VSS

92

VSS

95

VSS

98

VSS

101

VSS

104

VSS

107

VSS

110

VSS

113

VSS

116

VSS

119

VSS

121

VSS

124

VSS

127

VSS

130

VSS

133

VSS

136

VSS

139

VSS

142

VSS

145

VSS

148

VSS

151

VSS

154

VSS

157

VSS

160

VSS

163

VSS

166

VSS

199

VSS

202

VSS

205

VSS

208

VSS

211

VSS

214

VSS

217

VSS

220

VSS

223

VSS

226

VSS

229

VSS

232

VSS

235

VSS

239

VSS

51

VDD

54

VDD

57

VDD

60

VDD

62

VDD

65

VDD

66

VDD

69

VDD

72

VDD

75

VDD

78

VDD

170

VDD

173

VDD

176

VDD

179

VDD

182

VDD

183

VDD

186

VDD

189

VDD

191

VDD

194

VDD

197

VDD

236

VDDSPD

67

VREFCA

1

VREFDQ

118

SCL

238

SDA

237

SA1

117

SA0

52

BA2

190

BA1

71

BA0

169

CKE1

50

CKE0

76

S1*

193

S0*

64

CK1/NU*

63

CK1/NU

185

CK0*

184

CK0

188

A0

181

A1

61

A2

180

A3

59

A4

58

A5

178

A6

56

A7

177

A8

175

A9

70

A10/AP

55

A11

174

A12

196

A13

172

A14

171

A15

168

RESET*

74

CAS*

192

RAS*

73

WE*

DDR3/240/BU/VA/D

7

7

6

48

F

REE

49240

FREEVTT

MA_EVENT_L

187

FREE

198

FREE

79

RSVD

MODT_A3

77

ODT1

MODT_A2

195

ODT0

68

NC/PAR_IN

53

NC/ERR_OUT

167

NC/TEST4

DM0/DQS9

NC/DQS9*

DM1/DQS10

NC/DQS10*

DM2/DQS11

NC/DQS11*

DM3/DQS12

NC/DQS12*

DM4/DQS13

NC/DQS13*

DM5/DQS14

NC/DQS14*

DM6/DQS15

NC/DQS15*

DM7/DQS16

NC/DQS16*

DM8/DQS17

NC/DQS17*

DQS0

DQS0*

DQS1

DQS1*

DQS2

DQS2*

DQS3

DQS3*

DQS4

DQS4*

DQS5

DQS5*

DQS6

DQS6*

DQS7

DQS7*

DQS8

DQS8*

DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

6

MA_CK0

39

CB0

MA_CK1

40

CB1

MA_CK2

45

CB2

MA_CK3

46

CB3

MA_CK4

158

CB4

MA_CK5

159

CB5

MA_CK6

164

CB6

MA_CK7

165

CB7

DQSA0

7

-DQSA0

6

DQSA1

16

-DQSA1

15

DQSA2

25

-DQSA2

24

DQSA3

34

-DQSA3

33

DQSA4

85

-DQSA4

84

DQSA5

94

-DQSA5

93

DQSA6

103

-DQSA6

102

DQSA7

112

-DQSA7

111

DQSA8

43

-DQSA8

42

DMA0

125
126

DMA1

134
135

DMA2

143
144

DMA3

152
153

DMA4

203
204

DMA5

212
213

DMA6

221
222

DMA7

230
231

DMA8

161
162

MDA0

3

DQ0

MDA1

4

DQ1

MDA2

9

DQ2

MDA3

10

DQ3

MDA4

122

DQ4

MDA5

123

DQ5

MDA6

128

DQ6

MDA7

129

DQ7

MDA8

12

DQ8

MDA9

13

DQ9

MDA10

18

MDA11

19

MDA12

131

MDA13

132

MDA14

137

MDA15

138

MDA16

21

MDA17

22

MDA18

27

MDA19

28

MDA20

140

MDA21

141

MDA22

146

MDA23

147

MDA24

30

MDA25

31

MDA26

36

MDA27

37

MDA28

149

MDA29

150

MDA30

155

MDA31

156

MDA32

81

MDA33

82

MDA34

87

MDA35

88

MDA36

200

MDA37

201

MDA38

206

MDA39

207

MDA40

90

MDA41

91

MDA42

96

MDA43

97

MDA44

209

MDA45

210

MDA46

215

MDA47

216

MDA48

99

MDA49

100

MDA50

105

MDA51

106

MDA52

218

MDA53

219

MDA54

224

MDA55

225

MDA56

108

MDA57

109

MDA58

114

MDA59

115

MDA60

227

MDA61

228

MDA62

233

MDA63

234

5

MA_EVENT_L {6}

MODT_A3 {6}
MODT_A2 {5}

MDA[0..63] {5}

SMBCLK

SMBDATA

DDR15V Decouple

DDR15V

BC2

0.1u/4/Y5V/16V/Z
BC3

0.1u/4/Y5V/16V/Z
BC6

0.1u/4/Y5V/16V/Z

5

-DQSA[0..8]
DQSA[0..8]
DMA[0..8]
MA_CK[0..7]

SMBDATA
SMBCLK

C205

100p/4/NPO/50V/J/X

DDR15V

R101
15/4/1

R23
15/4/1

DDR15V

R24
15/4/1

R3
15/4/1

ESD12

1
2
3 4

AOZ8902CIL/SOT23-6

DDRVTT

-DQSA[0..8] {5}
DQSA[0..8] {5}
DMA[0..8] {5}
MA_CK[0..7] {5}

C206
100p/4/NPO/50V/J/X

Trace min 10/10

VREFDQ_A

Trace min 10/10

VREFCA_A

6
5

5VDUAL

4

VREFDQ_A

4

VREFCA_A

DDRVTT Decouple

BC7

0.1u/4/Y5V/16V/Z
BC8

0.1u/4/Y5V/16V/Z
BC9

0.1u/4/Y5V/16V/Z

DDRVTT

BC120

4.7u/6/X5R/6.3V/K

3

3

BC152

4.7u/6/X5R/6.3V/K

2

Title

Size Document Number Rev

Custom

Date: Sheet of

2

DDR III CHANNEL A

GA-780T-D3L 3.1

1

8 37Friday, October 14, 2011

1

Gigabyte Confidential

Do not Copy

8

DDRVTT

D D

C C

DDR15V

VCC3

VREFCA_A

C283 0.1u/4/Y5V/16V/Z
C285 0.1u/4/Y5V/16V/Z

VREFDQ_A

B B

MAAB[0..15]{5}

MB_RESET_L{6}

A A

DDR15V

BC10
1u/6/Y5V/10V/Z

VREFCA_A
VREFDQ_A

SMBCLK

SMBCLK{8,15,17,20,21,22,23,32,36}

SMBDATA

SMBDATA{8,15,17,20,21,22,23,32,36}

VCC3

SBAB2

SBAB2{5}

SBAB1

SBAB1{5}

SBAB0

SBAB0{5}

CKEB1

CKEB1{5}
CKEB0{5}

-CSB3

-CSB3{5}

-CSB2

-CSB2{5}

-DCLKB3

-DCLKB3{5}
DCLKB3

DCLKB3{5}

-DCLKB2

-DCLKB2{6}
DCLKB2

DCLKB2{6}

MAAB0
MAAB1
MAAB2
MAAB3
MAAB4
MAAB5
MAAB6
MAAB7
MAAB8
MAAB9
MAAB10
MAAB11
MAAB12
MAAB13
MAAB14
MAAB15

MB_RESET_L

-SCASB

-SCASB{5}

-SRASB

-SRASB{5}

-SWEB

-SWEB{5}

BC11
1u/6/Y5V/10V/Z

8

7

DDR3_2

120

VTT

2

VSS

5

VSS

8

VSS

11

VSS

14

VSS

17

VSS

20

VSS

23

VSS

26

VSS

29

VSS

32

VSS

35

VSS

38

VSS

41

VSS

44

VSS

47

VSS

80

VSS

83

VSS

86

VSS

89

VSS

92

VSS

95

VSS

98

VSS

101

VSS

104

VSS

107

VSS

110

VSS

113

VSS

116

VSS

119

VSS

121

VSS

124

VSS

127

VSS

130

VSS

133

VSS

136

VSS

139

VSS

142

VSS

145

VSS

148

VSS

151

VSS

154

VSS

157

VSS

160

VSS

163

VSS

166

VSS

199

VSS

202

VSS

205

VSS

208

VSS

211

VSS

214

VSS

217

VSS

220

VSS

223

VSS

226

VSS

229

VSS

232

VSS

235

VSS

239

VSS

51

VDD

54

VDD

57

VDD

60

VDD

62

VDD

65

VDD

66

VDD

69

VDD

72

VDD

75

VDD

78

VDD

170

VDD

173

VDD

176

VDD

179

VDD

182

VDD

183

VDD

186

VDD

189

VDD

191

VDD

194

VDD

197

VDD

236

VDDSPD

67

VREFCA

1

VREFDQ

118

SCL

238

SDA

237

SA1

117

SA0

52

BA2

190

BA1

71

BA0

169

CKE1

50

CKE0

76

S1*

193

S0*

64

CK1/NU*

63

CK1/NU

185

CK0*

184

CK0

188

A0

181

A1

61

A2

180

A3

59

A4

58

A5

178

A6

56

A7

177

A8

175

A9

70

A10/AP

55

A11

174

A12

196

A13

172

A14

171

A15

168

RESET*

74

CAS*

192

RAS*

73

WE*

DDR3/240/BU/VA/D

BC12
1u/6/Y5V/10V/Z 0.1u/4/Y5V/16V/Z

BC13
1u/6/Y5V/10V/Z

7

6

48

F

REE

49240

FREEVTT

MB_EVENT_L

187

FREE

198

FREE

79

RSVD

MODT_B3

77

ODT1

MODT_B2

195

ODT0

68

NC/PAR_IN

53

NC/ERR_OUT

167

NC/TEST4

DM0/DQS9

NC/DQS9*

DM1/DQS10
NC/DQS10*

DM2/DQS11
NC/DQS11*

DM3/DQS12
NC/DQS12*

DM4/DQS13
NC/DQS13*

DM5/DQS14
NC/DQS14*

DM6/DQS15
NC/DQS15*

DM7/DQS16
NC/DQS16*

DM8/DQS17
NC/DQS17*

DQS0

DQS0*

DQS1

DQS1*

DQS2

DQS2*

DQS3

DQS3*

DQS4

DQS4*

DQS5

DQS5*

DQS6

DQS6*

DQS7

DQS7*

DQS8

DQS8*

DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

MB_CK0

39

CB0

MB_CK1

40

CB1

MB_CK2

45

CB2

MB_CK3

46

CB3

MB_CK4

158

CB4

MB_CK5

159

CB5

MB_CK6

164

CB6

MB_CK7

165

CB7

DQSB0

7

-DQSB0

6

DQSB1

16

-DQSB1

15

DQSB2

25

-DQSB2

24

DQSB3

34

-DQSB3

33

DQSB4

85

-DQSB4

84

DQSB5

94

-DQSB5

93

DQSB6

103

-DQSB6

102

DQSB7

112

-DQSB7

111

DQSB8

43

-DQSB8

42
125

126
134

135
143

144
152

153
203

204
212

213
221

222
230

231
161

162

MDB0

3

DQ0

MDB1

4

DQ1

MDB2

9

DQ2

MDB3

10

DQ3

MDB4

122

DQ4

MDB5

123

DQ5

MDB6

128

DQ6

MDB7

129

DQ7

MDB8

12

DQ8

MDB9

13

DQ9

MDB10

18

MDB11

19

MDB12

131

MDB13

132

MDB14

137

MDB15

138

MDB16

21

MDB17

22

MDB18

27

MDB19

28

MDB20

140

MDB21

141

MDB22

146

MDB23

147

MDB24

30

MDB25

31

MDB26

36

MDB27

37

MDB28

149

MDB29

150

MDB30

155

MDB31

156

MDB32

81

MDB33

82

MDB34

87

MDB35

88

MDB36

200

MDB37

201

MDB38

206

MDB39

207

MDB40

90

MDB41

91

MDB42

96

MDB43

97

MDB44

209

MDB45

210

MDB46

215

MDB47

216

MDB48

99

MDB49

100

MDB50

105

MDB51

106

MDB52

218

MDB53

219

MDB54

224

MDB55

225

MDB56

108

MDB57

109

MDB58

114

MDB59

115

MDB60

227

MDB61

228

MDB62

233

MDB63

234

6

DMB0

DMB1

DMB2

DMB3

DMB4

DMB5

DMB6

DMB7

DMB8

MB_EVENT_L {6}

MODT_B3 {6}
MODT_B2 {5}

DDR15V

MDB[0..63] {5}

5

5

-DQSB[0..8]

DQSB[0..8]

DMB[0..8]

MB_CK[0..7]

BC131

0.1u/4/Y5V/16V/Z
BC129

BC125

0.1u/4/Y5V/16V/Z

-DQSB[0..8] {5}

DQSB[0..8] {5}

DMB[0..8] {5}

MB_CK[0..7] {5}

DDRVTT

4

BC1118

0.1u/4/Y5V/16V/Z
BC149

0.1u/4/Y5V/16V/Z

4

3

3

2

Title

Size Document Number Rev

Custom

Date: Sheet of

2

DDR III CHANNEL B

GA-780T-D3L 3.1

1

9 37Friday, October 14, 2011

1

Gigabyte Confidential

Do not Copy

5

4

3

2

1

L0_CADOUT_H0
L0_CADOUT_L0

D D

C C

L0_CLKOUT_H0{4}
L0_CLKOUT_L0{4}
L0_CLKOUT_H1{4}
L0_CLKOUT_L1{4}

L0_CTLOUT_H0{4}
L0_CTLOUT_L0{4}
L0_CTLOUT_H1{4}
L0_CTLOUT_L1{4}

R267 1.21K/4/1

B B

L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H7
L0_CADOUT_L7

L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H15
L0_CADOUT_L15

L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1

L0_CTLOUT_H0
L0_CTLOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1

HT_RXCALP
HT_RXCALN

U3A

Y25

HT_RXCAD0P

Y24

HT_RXCAD0N

V22

HT_RXCAD1P

V23

HT_RXCAD1N

V25

HT_RXCAD2P

V24

HT_RXCAD2N

U24

HT_RXCAD3P

U25

HT_RXCAD3N

T25

HT_RXCAD4P

T24

HT_RXCAD4N

P22

HT_RXCAD5P

P23

HT_RXCAD5N

P25

HT_RXCAD6P

P24

HT_RXCAD6N

N24

HT_RXCAD7P

N25

HT_RXCAD7N

AC24

HT_RXCAD8P

AC25

HT_RXCAD8N

AB25

HT_RXCAD9P

AB24

HT_RXCAD9N

AA24

HT_RXCAD10P

AA25

HT_RXCAD10N

Y22

HT_RXCAD11P

Y23

HT_RXCAD11N

W21

HT_RXCAD12P

W20

HT_RXCAD12N

V21

HT_RXCAD13P

V20

HT_RXCAD13N

U20

HT_RXCAD14P

U21

HT_RXCAD14N

U19

HT_RXCAD15P

U18

HT_RXCAD15N

T22

HT_RXCLK0P

T23

HT_RXCLK0N

AB23

HT_RXCLK1P

AA22

HT_RXCLK1N

M22

HT_RXCTL0P

M23

HT_RXCTL0N

R21

HT_RXCTL1P

R20

HT_RXCTL1N

C23

HT_RXCALP

A24

HT_RXCALN

215-0674058/S/[10HB1-06760G-20R]

PART 1 OF 6

HYPER TRANSPORT CPU

HT_TXCAD0P

HT_TXCAD0N

HT_TXCAD1P

HT_TXCAD1N

HT_TXCAD2P

HT_TXCAD2N

HT_TXCAD3P

HT_TXCAD3N

HT_TXCAD4P

HT_TXCAD4N

HT_TXCAD5P

HT_TXCAD5N

HT_TXCAD6P

HT_TXCAD6N

HT_TXCAD7P

HT_TXCAD7N

HT_TXCAD8P

HT_TXCAD8N

HT_TXCAD9P

HT_TXCAD9N
HT_TXCAD10P
HT_TXCAD10N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD15P
HT_TXCAD15N

HT_TXCLK0P

HT_TXCLK0N

I/F

HT_TXCLK1P

HT_TXCLK1N

HT_TXCTL0P

HT_TXCTL0N

HT_TXCTL1P

HT_TXCTL1N

HT_TXCALP
HT_TXCALN

D24
D25
E24
E25
F24
F25
F23
F22
H23
H22
J25
J24
K24
K25
K23
K22

F21
G21
G20
H21
J20
J21
J18
K17
L19
J19
M19
L18
M21
P21
P18
M18

H24
H25
L21
L20

M24
M25
P19
R18

B24
B25

L0_CADIN_H0
L0_CADIN_L0
L0_CADIN_H1
L0_CADIN_L1
L0_CADIN_H2
L0_CADIN_L2
L0_CADIN_H3
L0_CADIN_L3
L0_CADIN_H4
L0_CADIN_L4
L0_CADIN_H5
L0_CADIN_L5
L0_CADIN_H6
L0_CADIN_L6
L0_CADIN_H7
L0_CADIN_L7

L0_CADIN_H8
L0_CADIN_L8
L0_CADIN_H9
L0_CADIN_L9
L0_CADIN_H10
L0_CADIN_L10
L0_CADIN_H11
L0_CADIN_L11
L0_CADIN_H12
L0_CADIN_L12
L0_CADIN_H13
L0_CADIN_L13
L0_CADIN_H14
L0_CADIN_L14
L0_CADIN_H15
L0_CADIN_L15

L0_CLKIN_H0
L0_CLKIN_L0
L0_CLKIN_H1
L0_CLKIN_L1

L0_CTLIN_H0
L0_CTLIN_L0
L0_CTLIN_H1
L0_CTLIN_L1

HT_TXCALP
HT_TXCALN

L0_CLKIN_H0 {4}
L0_CLKIN_L0 {4}
L0_CLKIN_H1 {4}
L0_CLKIN_L1 {4}

L0_CTLIN_H0 {4}
L0_CTLIN_L0 {4}
L0_CTLIN_H1 {4}
L0_CTLIN_L1 {4}

R268 1.21K/4/1

L0_CADIN_L[0..15]
L0_CADIN_H[0..15]

L0_CADOUT_L[0..15]
L0_CADOUT_H[0..15]

NB_HS/[12SP2-01A004-61R_12SP2-01A004-62R]

L0_CADIN_L[0..15] {4}
L0_CADIN_H[0..15] {4}

L0_CADOUT_L[0..15] {4}
L0_CADOUT_H[0..15] {4}

1

NB_HS

1

2

2

VCORE

BC45

0.1u/4/Y5V/16V/Z

A A

BC46

0.1u/4/Y5V/16V/Z

BC47

0.1u/4/Y5V/16V/Z

BC48

0.1u/4/Y5V/16V/Z

BC49

0.1u/4/Y5V/16V/Z

BC50

0.1u/4/Y5V/16V/Z

5

4

3

BC52

0.1u/4/Y5V/16V/Z

2

Title

RD780-HT LINK I/F

Size Document Number Rev

B

Date: Sheet of

GA-780T-D3L 3.1

10 37Friday, October 14, 2011

1

Gigabyte Confidential

Do not Copy

5

4

3

2

1

EXP_A_RXP[0..15]
EXP_A_RXN[0..15]

EXP_A_RXP0
EXP_A_RXN0
EXP_A_RXP1

A_RX0P
A_RX0N
A_RX1P
A_RX1N
A_RX2P
A_RX2N

A_RX3P

A_RX3N

EXP_A_RXN1
EXP_A_RXP2
EXP_A_RXN2
EXP_A_RXP3
EXP_A_RXN3
EXP_A_RXP4
EXP_A_RXN4
EXP_A_RXP5
EXP_A_RXN5
EXP_A_RXP6
EXP_A_RXN6
EXP_A_RXP7
EXP_A_RXN7
EXP_A_RXP8
EXP_A_RXN8
EXP_A_RXP9
EXP_A_RXN9
EXP_A_RXP10
EXP_A_RXN10
EXP_A_RXP11
EXP_A_RXN11
EXP_A_RXP12
EXP_A_RXN12
EXP_A_RXP13
EXP_A_RXN13
EXP_A_RXP14
EXP_A_RXN14
EXP_A_RXP15
EXP_A_RXN15

D D

C C

PCIE1_IP{22}
PCIE1_IN{22}
PCIE2_IP{22}
PCIE2_IN{22}
PCIE3_IP{22}
PCIE3_IN{22}
PCIE4_IP{21}
PCIE4_IN{21}

ML_IP{31}
ML_IN{31}

A_RX0P{16}
A_RX0N{16}
A_RX1P{16}
A_RX1N{16}
A_RX2P{16}
A_RX2N{16}
A_RX3P{16}
A_RX3N{16} A_TX3N {16}

EXP_A_RXP[0..15] {20}
EXP_A_RXN[0..15] {20}

U3B

D4

GFX_RX0P

C4

GFX_RX0N

A3

GFX_RX1P

B3

GFX_RX1N

C2

GFX_RX2P

C1

GFX_RX2N

E5

GFX_RX3P

F5

GFX_RX3N

G5

GFX_RX4P

G6

GFX_RX4N

H5

GFX_RX5P

H6

GFX_RX5N

J6

GFX_RX6P

J5

GFX_RX6N

J7

GFX_RX7P

J8

GFX_RX7N

L5

GFX_RX8P

L6

GFX_RX8N

M8

GFX_RX9P

L8

GFX_RX9N

P7

GFX_RX10P

M7

GFX_RX10N

P5

GFX_RX11P

M5

GFX_RX11N

R8

GFX_RX12P

P8

GFX_RX12N

R6

GFX_RX13P

R5

GFX_RX13N

P4

GFX_RX14P

P3

GFX_RX14N

T4

GFX_RX15P

T3

GFX_RX15N

AE3

GPP_RX0P

AD4

GPP_RX0N

AE2

GPP_RX1P

AD3

GPP_RX1N

AD1

GPP_RX2P

AD2

GPP_RX2N

V5

GPP_RX3P

W6

GPP_RX3N

U5

GPP_RX4P

U6

GPP_RX4N

U8

GPP_RX5P

U7

GPP_RX5N

AA8

SB_RX0P

Y8

SB_RX0N

AA7

SB_RX1P

Y7

SB_RX1N

AA5

SB_RX2P

AA6

SB_RX2N

W5

SB_RX3P

Y5

SB_RX3N

PART 2 OF 6

PCIE I/F GPP

PCIE I/F SB

EXP_A_TXP[0..15]
EXP_A_TXN[0..15]

GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P

GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N

PCIE I/F

GFX

GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N

GPP_TX0P

GPP_TX0N

GPP_TX1P

GPP_TX1N

GPP_TX2P

GPP_TX2N

GPP_TX3P

GPP_TX3N

GPP_TX4P

GPP_TX4N

GPP_TX5P

GPP_TX5N

SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
SB_TX2P
SB_TX2N
SB_TX3P

PCE_CALRP(PCE_BCALRP)
PCE_CALRN(PCE_BCALRN)

SB_TX3N

EXP_A_TXP[0..15] {20}
EXP_A_TXN[0..15] {20}

A5
B5
A4
B4
C3
B2
D1
D2
E2
E1
F4
F3
F1
F2
H4
H3
H1
H2
J2
J1
K4
K3
K1
K2
M4
M3
M1
M2
N2
N1
P1
P2

GPP_TX0P_C

AC1

GPP_TX0N_C

AC2

GPP_TX1P_C

AB4

GPP_TX1N_C

AB3

GPP_TX2P_C

AA2

GPP_TX2N_C

AA1
Y1
Y2
Y4
Y3

GPP_TX5P_C

V1

GPP_TX5N_C

V2

A_TX0P_CA_TX0P_C

AD7

A_TX0N_CA_TX0N_C

AE7

A_TX1P_CA_TX1P_C

AE6

A_TX1N_CA_TX1N_C

AD6

A_TX2P_C

AB6

A_TX2N_C

AC6

A_TX3P_C

AD5

A_TX3N_C

AE5

R210 1.27K/4/1

AC8

R212 2K/4/1

AB8

EXP_A_TXP0
EXP_A_TXN0
EXP_A_TXP1
EXP_A_TXN1
EXP_A_TXP2

EXP_A_TXN2
EXP_A_TXP3
EXP_A_TXN3

EXP_A_TXP4

EXP_A_TXN4

EXP_A_TXP5

EXP_A_TXN5

EXP_A_TXP6

EXP_A_TXN6

EXP_A_TXP7

EXP_A_TXN7
EXP_A_TXP8
EXP_A_TXN8
EXP_A_TXP9
EXP_A_TXN9
EXP_A_TXP10

EXP_A_TXN10
EXP_A_TXP11
EXP_A_TXN11

EXP_A_TXP12

EXP_A_TXN12

EXP_A_TXP13

EXP_A_TXN13

EXP_A_TXP14

EXP_A_TXN14

EXP_A_TXP15

EXP_A_TXN15

C127 0.1u/4/X7R/16V/K
C128 0.1u/4/X7R/16V/K
C130 0.1u/4/X7R/16V/K
C131 0.1u/4/X7R/16V/K
C132 0.1u/4/X7R/16V/K
C133 0.1u/4/X7R/16V/K
C1677 0.1u/4/X7R/16V/K
C1678 0.1u/4/X7R/16V/K

C136 0.1u/4/X7R/16V/K
C137 0.1u/4/X7R/16V/K

C138 0.1u/4/X7R/16V/K
C139 0.1u/4/X7R/16V/K
C140 0.1u/4/X7R/16V/K
C141 0.1u/4/X7R/16V/K
C142 0.1u/4/X7R/16V/K
C143 0.1u/4/X7R/16V/K
C144 0.1u/4/X7R/16V/K
C145 0.1u/4/X7R/16V/K

PCIE1_OP {22}
PCIE1_ON {22}
PCIE2_OP {22}
PCIE2_ON {22}
PCIE3_OP {22}
PCIE3_ON {22}
PCIE4_OP {21}
PCIE4_ON {21}

ML_OP {31}
ML_ON {31}

A_TX0P {16}
A_TX0N {16}
A_TX1P {16}
A_TX1N {16}
A_TX2P {16}
A_TX2N {16}
A_TX3P {16}

NB_VCC

215-0674058/S/[10HB1-06760G-20R]

PLACE THESE CAP CLOSE

B B

TO CONNECTOR

A A

Title

RS760G-PCIE I/F

Size Document Number Rev

Custom

5

4

3

2

Date: Sheet of

GA-780T-D3L 3.1

11 37Friday, October 14, 2011

1

Gigabyte Confidential

Do not Copy

5

4

3

2

1

-CPURST{6,16}
NB_RST#{28}

D D

C C

NBHT_REFCLKP{15}
NBHT_REFCLKN{15}

OSC_14M_NB{15}

NBSRC_CLKP{15}
NBSRC_CLKN{15}

NBGPP_CLKP{15}
NBGPP_CLKN{15}

SBLINK_CLKP{15}
SBLINK_CLKN{15}

B B

R217 0/4/SHT/X

R269 82.5/4/1/X

VCC18

NB_VCC

R236
150/4/1

R239
150/4/1

NB_RST#_1.8V

R270
100/4/1/X

2.2u/6/X5R/6.3V/K 0.1u/4/Y5V/16V/Z/X

PWM_GPIO3

VCC3

SBC34

1u/4/X5R/6.3V/K

C256

C257

0.1u/4/Y5V/16V/Z/X

VCC18

C258

2.2u/6/X5R/6.3V/K

C259

VCC18

VCC18

SBC29
1u/4/X5R/6.3V/K

DFT_GPIO5{13}
DFT_GPIO2{13}
DFT_GPIO4{13}

DFT_GPIO0{13}
DFT_GPIO1{13}
DFT_GPIO3{13}

NB_VCC
NB_VCC

NB_VCC

VCC18

NB_PWROK{17,34}

ALLOW_LDTSTOP{16}

R273 1K/4/1
R274 1K/4/1

R271 2K/4/1
R272 2K/4/1

R132 715/4/1

VCC18

NB_RST#_1.8V

NBLDT_STOP-

PWM_GPIO3

I2C_DATA
I2C_CLK

STRP_DATA

U3C

F12

AVDD1(NC)

E12

AVDD2(NC)

F14

AVDDDI(NC)

G15

AVSSDI(NC)

H15

AVDDQ(NC)

H14

AVSSQ(NC)

E17

C_Pr(DFT_GPIO5)

F17

Y(DFT_GPIO2)

F15

COMP_Pb(DFT_GPIO4)

G18

RED(DFT_GPIO0)

G17

REDb(NC)

E18

GREEN(DFT_GPIO1)

F18

GREENb(NC)

E19

BLUE(DFT_GPIO3)

F19

BLUEb(NC)

A11

DAC_HSYNC(PWM_GPIO4)

B11

DAC_VSYNC(PWM_GPIO6)

E8

DAC_SDA(PCE_TCALRN)

F8

DAC_SCL(PCE_RCALRN)

G14

DAC_RSET(PWM_GPIO1)

A12

PLLVDD(NC)

D14

PLLVDD18(NC)

B12

PLLVSS(NC)

H17

VDDA18HTPLL

D7

VDDA18PCIEPLL1

E7

VDDA18PCIEPLL2

D8

SYSRESETb

A10

POWERGOOD

C10

LDTSTOPb

C12

ALLOW_LDTSTOP

C25

HT_REFCLKP

C24

HT_REFCLKN

E11

REFCLK_P/OSCIN(OSCIN)

F11

REFCLK_N(PWM_GPIO3)

T2

GFX_REFCLKP

T1

GFX_REFCLKN

U1

GPP_REFCLKP

U2

GPP_REFCLKN

V4

GPPSB_REFCLKP(SB_REFCLKP)

V3

GPPSB_REFCLKN(SB_REFCLKN)

A9

I2C_DATA

B9

I2C_CLK

B8

DDC_DATA/AUX0P(NC)

A8

DDC_CLK/AUX0N(NC)

B7

AUX1P(NC)

A7

AUX1N(NC)

B10

STRP_DATA

G11

RSVD

C8

AUX_CAL(NC)

PART 3 OF 6

MIS.

215-0674058/S/[10HB1-06760G-20R]

TXOUT_L0P(NC)
TXOUT_L0N(NC)
TXOUT_L1P(NC)
TXOUT_L1N(NC)
TXOUT_L2P(NC)

TXOUT_L2N(DBG_GPIO0)

TXOUT_L3P(NC)

TXOUT_L3N(DBG_GPIO2)

TXOUT_U0P(NC)

TXOUT_U1P(PCIE_RESET_GPIO3)
TXOUT_U1N(PCIE_RESET_GPIO2)

TXOUT_U3P(PCIE_RESET_GPIO5)

CRT/TVOUT

TXCLK_UP(PCIE_RESET_GPIO4)

TXCLK_UN(PCIE_RESET_GPIO1)

LVTM

PMCLOCKs PLL PWR

TXOUT_U0N(NC)

TXOUT_U2P(NC)
TXOUT_U2N(NC)

TXOUT_U3N(NC)

TXCLK_LP(DBG_GPIO1)
TXCLK_LN(DBG_GPIO3)

VDDLTP18(NC)
VSSLTP18(NC)

VDDLT18_1(NC)
VDDLT18_2(NC)
VDDLT33_1(NC)
VDDLT33_2(NC)

VSSLT1(VSS)
VSSLT2(VSS)
VSSLT3(VSS)
VSSLT4(VSS)
VSSLT5(VSS)
VSSLT6(VSS)
VSSLT7(VSS)

LVDS_DIGON(PCE_TCALRP)

LVDS_BLON(PCE_RCALRP)

LVDS_ENA_BL(PWM_GPIO2)

TMDS_HPD(NC)

TVCLKIN(PWM_GPIO5)

THERMALDIODE_P
THERMALDIODE_N

TESTMODE

HPD(NC)

A22
B22
A21
B21
B20
A20
A19
B19

B18
A18
A17
B17
D20
D21
D18
D19

B16
A16
D16
D17

A13
B13

A15
B15
A14
B14

C14
D15
C16
C18
C20
E20
C22

R275 1.27K/4/1

E9

R276 1.27K/4/1

F7
G12

D9
D10

-SUS_STAT

D12
AE8

AD8

TEST_EN

D13

BC150

1U/6/Y5V/10V/Z

VDDLT18

R279

1.8K/4/1

VCC18

BC151

0.1U/4/Y5V/16V/Z

0.1U/4/Y5V/16V/Z

-SUS_STAT {17}

R2770/4
R2780/4

Q74

3

D

P8503BMG/SOT23/450pF/85m

BC145

BC146
1U/6/Y5V/10V/Z

NB_THERMDIODEP {29}

NB_THERMDIODEN {29}

1
2

G S

VCC18

R162 8.2K/4

+12V

NR31
1K/4/1

VCC18

NR32
1K/4/1

3

NQ1

D

G S

2

A A

-LDT_STOP{6,16}

NR33 1K/4/1

1

MMBT2222A/SOT23/600mA/40

NBLDT_STOP-

3

NQ2

D

G S

2

1

MMBT2222A/SOT23/600mA/40

NOTE: Provide access to STRAP_DATA and
I2C_CLK is MANDATORY.

VCC18

R2532
2K/4/1

STRP_DATA

R2536
2K/4/X

DFT_GPIO1 :
1 : use Hardware Default Values
0 : I2C Master can load strap
values from EEPROM

5

4

3

2

Title

RS760G-SYSTEM I/F

Size Document Number Rev

Custom

Date: Sheet of

GA-780T-D3L 3.1

12 37Friday, October 14, 2011

1