Gigabyte DR05C034_9ildth-00

第 1 頁，共 1 頁Technical Information Release Notice

Technical Information Release Notice

Doc Type Schematic Date 2005/12/5 上午 10:08:08

Project Code S93048-0 Customer

Project Name GA-9ILDTH Revision Old N/A New 1.1

Model Name GA-9ILDTH IT Doc No DR05C034

P/N RD Doc No

PCB Rev. 1.1 Check Sum

R N M

e

m

gfedc gfedcb gfedc

A B C D E F

gfedcb

A B

gfedc gfedcb

n

e

gfedc

t

gfedc gfedc

M/B GA-9ILDTH 1.1C

P/N Description

FINISHED GOOD LC

Description Schematic release

Remark Approved By daniel.hou 2005/12/6 下午 07:12:12 Applicant Victor.Tien

Research Management

yuling.cheng 2005/12/7 下午 01:21:46

T

I

Validation Manager Project Manager

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Effected Class

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2005/12/7http://gwfap/ef2kweb/CHT/Forms/RTC009/RTC009_P.asp

yuling.cheng

5

4

3

2

1

NOCONA800/LINDENHURST

D D

1 TITLE 2 SYS BLOCK 3 SYS RESET 4 CLOCK 5 SMBUS 6 POWER DELIVERY 7 PCI / GPIO 8-10 P0 NOCONA

C C

11-12 P1 NOCONA 13 ITP 14 BSP_SEL/BREQ/LEVEL 15 MCH/DDRII CH A 16 MCH/DDRII CH B 17 MCH/HI1.5/MISC 18 MCH/SYSBUS 19 MCH/PCIEXPRESS 20 MCH/PWR/GND 21 DECOUPING

B B

22 MCH PCIEXPRESS SERIES CAPS 23 PCI-E X8 (HOT-PLUG) 24-27 MCH/DDRII A DIMMX4 28-31 MCH/DDRII B DIMMX4 32 DDRII TERMINATION/DECOUPING 33-34 CK409B 35 DB800 36 H-R/IDE/PCI/USB/HI1.5 37 H-R/SATA/GPIO/LPC/RTC/HOST/PCI-X 38 H-R/PWR/GND

A A

39 H-R/USB/IDE CONN 40 PXH/PCI-E 41 PXH/PWR/GND 42 PXH/PCI-X CH A(133MHZ)

5

GA-9ILDTH

43 PXH/PCI-X CH B(133MHZ) 44 PCI-X SLOT 2 133MHZ 45 PCI-X SLOT 3 133MHZ 46 PCI-X SLOT 4 66MHZ 47 PCI-X SLOT 5 66MHZ/ZCR 48 PCI SLOT 6 33MHZ 49 PCI-E HOT-PLUG PWR CTRL 50 PCI-X HOT-PLUG PWR CTRL 51 HOT-PLUG ATTN.SW & LED 52-53 Broadcom BCM5721 GbE Lan 54 OVP 55-57 ATI VGA/CONN/SDRAM 58-61 AIC-7902 SCSI/ZCR 62 G-LOGIC/PSON/VIDGOOD 63 SIO-IT8712/FWH 64 PS2/COM/PRT/FLOPPY 65 POWER CONN 66 1.2 VTT R/ PCI VIO 67 1.5V 68 1.8V 69 P0 VR 70 P1 VR 71 FAN CONTROL 72 MB HOLE/FAN/LAN LED 73 SMBUS 74 FP/RIN/WOL/MRN 75 ID/RST/SPKR/HDLED 76 LM93/LM75/83791 77 IPMI 78 CHANGE LIST 79 COUPON AND IMPEDANCE LIST

4

3

PCB VENDOR LIST

HTC/GBT : CADAC/TEAN/ALLED CIRCUIT

BOARD STACK-UP

3.70 mil

PP 2113

4.0 mil

11.1 mil

10.0 mil

11.1 mil

4.0 mil

3.70 mil

CORE

PP 2116+7628

CORE

PP 2116+7628

CORE

PP 2113

GA-9ILDTH FEATURE

MODEL

HOT-PLUG

IPMI FAN

CTRL

0

X

0

-00-LC

2

COMPONENT SIDE

GND

INT 1

(PWR)

INT 2

SOLDER SIDE

X

0

Title

Size Document Number Rev

Date: Sheet

GIGA-BYTE TECHNOLOGY CO., LTD.

COVER SHEET

GA-9ILDTH

1

1.5 OZ

1OZ

2 OZ

2 OZ(PWR)

1OZ

1OZGND

1.5 OZ

1.90 mil

1.30 mil

2.70 mil

1.30 mil

1.3 mil

1.9 mil

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RJ45X2 DUAL-LAN

4

EVRD 10.1

3

EVRD 10.1

2

CPU0 FAN

1

CPU1 FAN

H/M

Intel

D D

NOCONA/Irwindale Processor CPU 0

Intel NOCONA/Irwindale Processor CPU 1

LM93

H/M

SYS1 FAN

SYS2 FAN

SYS3 FAN

83791

Broadcom 5721 Broadcom 5721

GbE MAC/PHY GbE MAC/PHY

PCI EXPRESS X1 ( 2GB/S)

6.4GB/s

System Bus(800MT/S)

2.1GB/s up to 2.7GB/s

Channel A

DDRII-400 DIMM Module X4

1U COOL FAN

PWR4 FAN

PCI-E X8 (SLOT1)

PCI-X 133MHZ (SLOT2)

C C

PCI-X 133MHZ (SLOT3)

PCI-X 66MHZ (SLOT4)

PCI-X 66MHZ[ZCR](SLOT5)

SCSI 68Pin

B B

PCI 33MHZ (SLOT6)

HOT-PLUG

SCSI CHA

SCSI CHB

8MB SDRAM

PCI EXPRESS X8 ( 16GB/S)

PCI-X (133MT/S)

PXH

PCI-X (133MT/S)

Dual U320 SCSI (AIC 7902W)

PCI 32 Bit BUS 133MB/s

ATI Rage XL

VGA

PCI EXPRESS X8

( 16GB/S)

PCI-X (66MT/S)

Intel

FWH

LPC

Interface

Intel Lindenhurst

HUB INTERFACE 1.5

266MB/s

Hance Rapids 6300ESB

LPC

2.1GB/s up to 2.7GB/s

150MB/s

USB

IDE BusATA-100

DDRII-400 DIMM Module X4

SATAx2

IDE Connector * 2

Channel B

Front Side USB 2.0x2

Back Panel USB

2.0X2

IT8712F

LPC Super I/O

PCI

PCI-X 66M

A A

PCI-X 66M

PCI-X 133M

PCI-EX X8

PCI-X 133M

MCH

128 PQFP

GIGA-BYTE TECHNOLOGY CO., LTD.

VGA Connector

5

Floppy Connector

4

COM1

3

COM2 KB & MS

Printer Port

2

GIGA-BYTE TECHNOLOGY CO., LTD.

Title

Size Document Number Rev

Date: Sheet

BLOCK DIAGRAM

GA-9ILDTH

1

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SYS RESET & PWR SET

BTN

FP FFC3

LEVEL

D D

LOGIC

DB800

CK409B

CK409B_PWR_GD#

VID_PWRGD

C C

B B

PWB+

PWRDWN#

CPU0_THRMTRIP#

VIP_PWRGD CPU_PWR_GD

CPU_RST#

CPU0_BSEL[0/1] CPU1_BSEL[0/1]

VIP_PWRGD CPU_PWR_GD

CPU_RST#

CPU1_THRMTRIP#

R R

CPU_VRD_PWR_GD

FET

VTT LEVEL

P0

VTTEN

P1

LINDENHUST

CPU_RST#

A A

MCH

PWROK

PCI_RST#

BTN

FP FFC3

5

RST_SW

R

PWRBTN

IPMI_PWRBT_IN

SB_VTT_PWRGD

VTTEN

P3V3 LEVEL

P1_SKT0CC#

CPU_PWR_GD

PS_PWR_GD

40 35

IPMI CONN

75

37

IPMI CONN

71

SIO

1.2V

ISL6520

VTT_PWRGD

H-R

SYS RST#

IPMI_RST_OUT#RST_IPMI#

4

75--72--71--76

76

72

36

7

CPU 0

HR_PWRBNIN#

P0_SKT0CC#

PWRBTN

R

H-R

3

SLP_S#3

SLP_S#4

DDRII DIMM DDRII DIMM DDRII DIMM

AB

DDRII DIMM DDRII DIMM

VTT_ENABLE

DDRA_PCIRST#

CPU_VRD_PWR_GD

DDRII DIMM DDRII DIMM DDRII DIMM

PWRGD_1_8V

DDRB_PCIRST#

1.8V

HIP6302CB

PLD

PWRGD_1_5V

5VSB

HUF76107

1.5V

P3V3 AUX

APL1084

BSEL COMPARE LOGIC

LOGIC

100ms

CPU_VRD_PWR_GD

PWROK

SYS_PWR_GD_3_3V

SYS_PWR_GD#

PWROK

PXH_HAPRST#

PXH

PCI_RST#

4

PCI_RST#

PLD

BUFF

PCI_RST_BUFF1#

ATI VGA

AIC-7902

IPMI CONN PCI- 66 CONN PCI- 66 CONN

PCI- 32 CONN

3

PXH_HBPRST#

IDE_RSTDRV#

LOGIC

ISL6525

2

CPU1_VRD_PWR_GD

SYS_PWR_GD_BUFF

PCI-X 133 CONN

PCI-E X8 SLOT1

2

PS_PWR_GD#

IDE CONN IDE CONN

SIO

SE-LINK

FWH

1

R

PS_PWR_GD

PS_ON#

ATX CONN

VGA_HV

VR0_SYS_ENABLE

VR1_SYS_ENABLE

P0 VCORE

ISL6556BCPU0_VRD_PWR_GD

P1 VCORE

ISL6556B

PCI-E X8 SLOT1

GIGA-BYTE TECHNOLOGY CO., LTD.

Title

Size Document Number Rev

Date: Sheet

SYS RESET

GA-9ILDTH

379Monday, November 21, 2005

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14.318

SMA CONNECTOR

CLOCK BLOCK DIAGRAM

CRYSTAL

D D

CPU2

3V66_1

CPU1

CPU0

CPU3

CK 409B CLOCK SYNTHESIZER DRIVER

C C

3V66_2 USB_48 PCIF0

REF0

B B

DOT_48 PCI_4

ITP_BCLK_P/N (200MHZ)

MCH_BCLK_P/N (200MHZ)

MCH_66MHZ_CLK

P1_BCLK_P/N(200MHZ)

P0_BCLK_P/N(200MHZ)

ICH_HI66MHZ_CLK

ICH_USB_48MHZ_CLK

ICH_33MHZ_CLK

ICH_14MHZ_CLK

PCI 64/66 (SLOT #4)

PCI 64/66 (SLOT #5)

SIO_48MHZ_CLK

SIO_33MHZ_CLK

2

ITP_XDP

BCLK(P/N-1/0)

32.768KHZ CRYSTAL

Hance Rapids

PX_PCLKO3

PX_PCLKO0

SIO

CUP1

CUP0

LINDENHURST

MCH_SRC_100MHZ_CLK_P/N

ICH_SRC_100MHZ_CLK_P/N

SUS_CLK

PXH_PAPCLK_FB

DDRA_CMDCLK_A0_P/N

DDRA_CMDCLK_A1_P/N

DDRA_CMDCLK_A2_P/N

DDRA_CMDCLK_A3_P/N

DDRB_CMDCLK_B0_P/N

DDRB_CMDCLK_B1_P/N

DDRB_CMDCLK_B2_P/N

DDRB_CMDCLK_B3_P/N

2

DDRII DIMM #A1

2 2 2

2

DIFF3 DIFF5 DIFF0

DB800 (SRC -DIFFERENTIAL BUFFER)

SRC

DIFF2

PXH_SRC_100MHZ_CLK_P/N

PXH_PBPCLK_FB

2

PXH

PBPCLK0(6) PB_PCLKI

PAPCLK0(6) PAPCLKI

2

LANB_SRC_100MHZ_CLK_P/N

BCM5721 BCM5721

DDRII DIMM #B1

DDRII DIMM #A2

DDRII DIMM #B2

PCI EXPRESS SLOT1

EXP_SLOT1_100MHZ_CLK_P/N

DIFF6 DIFF7

LANA_SRC_100MHZ_CLK_P/N

2

DDRII DIMM #A3

DDRII DIMM #B3

2

DDRII DIMM #B4

DDRII DIMM #A4

SRC

PCIF1

PCI 0 PCI 1 PCI 2 REF 1

A A

PCI 3

5

DB800_SRC_100MHZ_CLK_P/N

IPMI33_LPC_CLK

PCI_SLOT3_33MHZ_CLK

VIDEO_33MHZ_CLK

PLD_33MHZ_CLK

VIDEO_14MHZ_CLK

FWH_33MHZ_CLK

2

IPMI CON

PCI 32/33 (SLOT #6)

PLD

VIDEO (RAGE XL)

FWH

25MHZ CRYSTAL

4

SUS_CLK

PAPCLK0(0)

PXH_PAPCLK0<0>

PCI_X SLOT #2

3

PBPCLK0(0)

PXH_PBPCLK0<0>

PCI_X SLOT #3

25MHZ CRYSTAL

Title

Size Document Number Rev

Date: Sheet

2

25MHZ CRYSTAL

GIGA-BYTE TECHNOLOGY CO., LTD.

CLOCK BLOCK

GA-9ILDTH

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PS-PL

W83791D

SMB = 5Ah

IPMI GSMI 70P

GbE BCM5721

IPMB_SDA IPMB_SCL

SR79, SR80

SVP

SMB = 30h

IPMB1

PCA9515

IPMB_SDA2 IPMB_SCL2

HDD-PL

SMB = 94h,E0h

FFC_SDA FFC_SCL

FFC1

HDD-PL

SMB = 90h,E2h

FFC2

GbE BCM5721

D D

Hance Rapids

SMB Address = 44h

LM75 CPU

SMB = 9Ah

R601 R415 R599 R879

LM75 PCI

SMB = 98h

LM75 DDR

SMB = 92h

LM75 SCSI

SMB = 96h

LAN_EMP_SDA LAN_EMP_SCL

SE-LINK

P3V3_STBY

IPMB

PS-UNIT

SMB = A0h,B0h,A2h,B2h, A4h,B4h,ACh,BCh

PWRDET

R329, R330

W83791D

SMB = 5Ch

IPMB2

IPMB2_SDA IPMB2_SCL

PCA9515PCA9515

IPMB_SDA3 IPMB_SCL3

ICH_SDA ICH_SCL

C C

PCA9545 Mutiplexer

SMB = E0h

I2C_BUS0_SDA I2C_BUS0_SCL

P3V3

IDEEPROM

R851, R853

SMB = A8h

PCI-X Slot#4 66MHZ

R289/X, R295/X

PCI-X Slot#5

R288/X, R294/X

PCI Slot#6 33MHZ66MHZ

R272/X, R276/X

R498/X R499/X

I2C_BUS0_SDA2 I2C_BUS0_SCL2

W83791

SMB Address = 5Eh

LM93

SMB = 58h

R817, R819

CK-409B

DIMM B-1

SMB Address = A8h SMB Address = ACh

DIMM B-2

SMB Address = AAh

DIMM B-3

DIMM B-4

SMB Address = AEh

SMB Address = D2h

R937, R949

B B

30

DIMM A-3

SMB Address = A4h SMB Address = DCh

I2C_BUS1_SDA

P3V3

DIMM A-1

SMB Address = A0h

DIMM A-2

SMB Address = A2h

I2C_BUS1_SCL

MCH LINDENHURST

I2C_BUS2_SDA I2C_BUS2_SCL

A A

P3V3

R800, R822

SMB Address = 60h

PCA9554A

SMB Address = 70h

Q-Switch

SR29, SR30

MIC2592B

SMB Address = 8Ch

R282, R285

PCI-X Slot#2 133MHZ

R281, R284

PCI-X Slot#3 133MHZ

3

I2C_BUS3_SDA I2C_BUS3_SCL

5

P3V3

R796, R797

PXH

SMB Address = C2h

Q-Switch

SR154, SR155

4

MIC2593

SMB Address = 8Eh

DIMM A-4

SMB Address = A6h

Q-Switch

SR42, SR54

DB800

PCI-E Slot#1

R818/X, R820/X

Title

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Date: Sheet

2

Date: Sheet

GIGA-BYTE TECHNOLOGY CO., LTD.

SMBUS

GA-9ILDTH

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ERP12V

ISL6556B

D D

P12V_CPU_0

120A

ISL6556B HIP6601B

P12V_CPU_1

120A

ATX CONN

HIP6302

P12V

C C

P5V

39A

ISL6520

6A

RT9173A

1.98A

ISL6525

13A

APL1084

1.5A

HIP6601B X4

X4

HIP6602 X2

P_VCCP0

P_VCCP1

CPU0

1.2/CORE

CPU1

1.2/CORE

P1V8

P_VTT P0V9_DDR P1V5 P2V5_VIDEO

MCH

1.2/1.5/2.5

DDRII-400

0.9/1.8

VIDEO

HR

1.2/1.5

3.3/3.3SBY

LT1963EQ

1.7A

B B

P3V3

P1V8_SCSI

SCSI

3.3/1.8

PXH

3.3/2.5

P5V_STBY

A A

N12V

5

APL1084

3A

GD75232

PCI/PCI-X CONN

4

APL1084

3A

P1V8_STBY

3

P3V3_STBY

265mA

RC1117ST

BROADCOM BCM5721 GBE

2

P1V5_HR_STBY

Title

Size Document Number Rev

Date: Sheet

GIGA-BYTE TECHNOLOGY CO., LTD.

PWR DELIVERY

GA-9ILDTH

1.1

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Hance Rapids

GPIO R PWR WELL FUNCTION

GPIO 0 GPIO 1 GPIO 2 GPIO 3 GPIO 4 GPIO 5

D D

GPIO 6 GPIO 7 GPIO 8 GPIO 9 GPIO 10

GPIO 11 GPIO 12 GPIO 13 GPIO 14 GPIO 15 GPIO 16 GPIO 17 GPIO 18 GPIO 19 GPIO 20 GPIO 21 GPIO 22 GPIO 23

C C

GPIO 24 GPIO 25 GPIO 26 GPIO 27 GPIO 28 GPIO 29 GPIO 30 GPIO 31 GPIO 32 GPIO 33 GPIO 34 GPIO 35 GPIO 36 GPIO 37 GPIO 38 GPIO 39 GPIO 40 GPIO 41 GPIO 42

B B

GPIO 43 GPIO 44 GPIO 55 GPIO 56 GPIO 57 GPIO 58 GPIO 63

NOTE

CONTROLLER

PXH A PXH B

PUPU8.2K

I I

PU

I

PU

I

PU

I

PU

I I

PU 4.7K P3V3 MCH_PME# PME EVENT FROM MCH PCI -E PORT

I I

P3V3

8.2K

P3V3

8.2K

P3V3

8.2K

P3V3

8.2K

P3V3

8.2K

P3V3

4.7K IPMI_FP_SMI#

P3V3PU

RESERVED

I I I

O O O O I I O

O I/O I/

I/ I/ N/A N/A N/A I/O PU P3V3

/O

I I

/O

I

/O

I

I/O PU P3V3

I

O

8.2KPU

P3V3_STBY P3V3_STBY

PU 8.2K

PU IN PU IN PD IN PD IN

PU PU

PU

O

PD

O O

PU 8.2K

P3V3_STBY

RESERVED

P3V3 P3V3

8.2K

P3V3

8.2K

P3V3 P3V3

8.2K P3V3

8.2K

P3V3

P3V3_STBY

8.2K

P3V3_STBY

8.2K

R E S E R V E D

P3V3_STBY

8.2KPU

P3V3_STBY

RESERVED

PU 8.2K P3V3 PU PU PU

PD PD PD PD PD

PU PU

P3V3

8.2K P3V3

8.2K

P3V3

8.2K

P3V3 P3V3

8.2K P3V3

8.2K DP MB ID SETTING P3V3

8.2K P3V3 PERR_SMI_RST#

RESERVED

P3V3_STBY

10K

P3V3_STBY

10K

RESERVED

ONLY GPIO[0:15] ALLOW AN INPUT TO BE ROUTED TO SMI# OR SCI

PCI DEVICE

PCI-X 133 SLOT2

PCI-X 133 SLOT3

PCI-X 66 SLOT4 PX_AD17

A A

PCI-X 66 SLOT5(ZCR)

PCI-X 66 SCSI

Hance Rapids

PCI-33 SLOT6

PCI-33 ATI

5

PX_REQ2

- S1_ATN_SW S2_ATN_SW

GPI3_SMI# P_ IRQG-

S3_ATN_SW

# #

#

PX_REQ2

-

PCI-E SLOT1 Hot-plug event. PCI-X SLOT2 Hot-plug event.

SMI EVENT FROM WINBOND/SIO TM_ALERT#

PCI-X SLOT3 Hot-plug event.

SMI EVENT FROM IPMI or NMI EVENT from FP.

WAKE#PU IN P3V3_STBY PXHPME# FROM PCIE-X CONN AND LAN

PCI_PERR_SMI# ICH_SMBALERT#

MCH_GPE#PU 8.2K SIO_PME#

PX_GNT2PX_GNT3HR_S2_DISABLE HR_S3_DISABLE

S2_PRSNT# S3_PRSNT#

SATALED# SATALED#

I2C_MUX_RST# RST 9545 I2C BUS

DIS_LANA# DIS_LANB# DISABLE BCM5721 LAN B

PX_IRQ0PX_IRQ1PX_IRQ2PX_IRQ3-

S1_PRSNT2

#

S66DET P66DET DPMB_SET0# DPMB_SET1# DPMB_SET2# DP MB ID SETTING

MEM FREQ_SEL0 MEM FREQ_SEL1

IDSEL

PA_AD17

PB_AD17

PX_AD18

PX_AD21

A_D17

A_D18

SMI EVENT FROM EXT-PERR / LM93

MCH GENERAL PURPOSE EVENT for Hot-plug

PME FROM SIO

PX_GNT2-

NO USE

DISABLE PCI-X SLOT2 POWER(HOT-PLUG) DISABLE PCI-X SLOT3 POWER(HOT-PLUG) PCI-X SLOT2 CARD PRSENT STATUS. PCI-E SLOT3 CARD PRSENT STATUS.

NO USE

DISABLE BCM5721 LAN A

NO USEWDT_TOUT#

PCI-X CONN PCI-X CONN PCI-X CONN PCI-X CONN

PCI-E SLOT1 CARD PRSENT STATUS.

DETECT PRIMERY IDE CABLE DETECT SECANDERY IDE CABLE

DP MB ID SETTING

ISSUE RESET WHEN PERR SMI EVENT OCCURS.

AUTO MEM DET 400 AUTO MEM DET 400

REQ / GNT

PA_REQ0 / PA_GNT0

PB_REQ0 / PB_GNT0

PX_REQ2 / PX_GNT2

PX_REQ0 / PX_GNT0

PX_REQ1 / PX_GNT1

REQ0 / GNT0

REQ1 / GNT1

4

CLOCK

PXH_PAPCLKO

PXH_PBPCLKO

PX_PCLKO3

PX_PCLKO0

PX_PCLKO1

PCI_SLOT6_33MHZ_CLK

VIDEO_33MHZ_CLK

0

NOMAL/ACT

H/L H/L H/L H/L H/L H/L H/L H/L H/L

H/L

H/L H/L H/L

L/H L/H

H/L

H/L H/L

H/L H/L L/H

IRQ ROUTING

D

CINT A

B

0 1 2 3

1 0 2 3

0 1 2(SCSIA) 3(SCSIB)

2(SCSIA) 3( SCSIB)

A B C D

D

3

GPIO PWR

GPIO 16 GPIO 17 GPIO 53 GPIO 42 GPIO 43 STBY GPIO 44 GPIO 45 STBY

NOTE

GPIO 0 GPIO 1 GPIO 2 GPIO 3 GPIO 4 GPIO 5 GPIO 6 GPIO 7

P3V3 P3V3OO

STBY STBY

STBY

STBYGPIO 54

SIO_S1_PWR_LED SIO_S1_ATN_LED

O

PWRLED SIO_PSON# PWR ON FROM SIOO

I

PWBTN

O

HR_PWRBTN# SLP_S#3

I

O

SIO_PME#

GPIO(10/40/41/42/43/44/45/46/53/54/55) POWER BY STBY

P3V3

I P3V3 P3V3 P3V3 P3V3 P3V3 P3V3 P3V3

CPU0_FAN_TACH DETECT CPU0 FAN SPEED CPU1_FAN_TACH

OIHW_CPU0_SMI#

HW_CPU1_SMI#O CPU0_THERMTRIP#

I

CPU1_THERMTRIP#

I

CPU0_IERR#

I

CPU1_IERR#

I

DDRII-400 Memory Mapping Table

SMB Addr.Location CMDCLK Mapping CS# Mapping CKE

CH.A

CH.B

DDR8 DDR6 DDR4

DDR2

DDR7 DDR5 DDR3

DDR1

0XA0 0XA2 0XA4

0XA6

0XA8 0XAA 0XAC

0XAE

SIO

FUNCTION NOMAL/ACT

PWR LED for Hot-plug PCI-E Slot1

ATN LED for Hot-plug PCI-E Slot1

ACT PWR ON

PWR BTN FROM FP & IPMI PWR BTN TO H-R INDECATE S3 MODE FROM H-R RST IPMI FROM SIOGPIO 46 STBY O SIO_BMC_RST# H/L WAKE UP FROM ICH5

LM93

DETECT CPU1 FAN SPEED SMI EVENT FROM LM93HW SMI EVENT FROM LM93HW MONITOR CPU0_THERMTRIP# MONITOR CPU1_THERMTRIP# DETECT CPU0_IERR# DETECT CPU1_IERR# H/L

DDRA_CMDCLK0 DDRA_CMDCLK3 DDRA_CMDCLK2

DDRA_CMDCLK1

DDRA_CMDCLK3 DDRA_CMDCLK1 DDRA_CMDCLK2

DDRA_CMDCLK0

2

CS#0,CS#1 CS#2,CS#3 CS#4,CS#5

(CS#2,CS#3)

CS#6,CS#7

(CS#0,CS#1)

CS#0,CS#1 CS#2,CS#3 CS#4,CS#5

(CS#2,CS#3)

CS#6,CS#7

(CS#0,CS#1)

MEM_CKE0 MEM_CKE2 MEM_CKE4/2

MEM_CKE6/0

MEM_CKE1 MEM_CKE3 MEM_CKE5/3

MEM_CKE7/1

GIGA-BYTE TECHNOLOGY CO., LTD.

Title

Size Document Number Rev

Date: Sheet

PCI ROUTING

L/H/Blinking L/H/Blinking

H/L(PWR ON) H/L H/L H/L H/L

H/L

NON NON H/L H/L H/L H/L H/L

GA-9ILDTH

1

1.1

779Monday, November 21, 2005

1.1

of

5

4

3

2

1

END PROCESSOR 0

U86B

U86A

SB_BPRI#{11,18}

SB_CPU0_BREQ#23{9}

SB_BREQ#1{9,11,18} SB_BREQ#0{9,11,18}

SB_CPURST#{9,11,13,14,18}

D D

C C

P_VCCP_A_CPU0

AGND_CPU0

B B

P_VTT

774mV

P_VTT

SB_RS#[0..2]{11,18}

SB_RSP#{11,18}

SB_CPU_A20M#{9,11,37}

SB_CPU_IGNNE#{9,11,37}

SB_CPU_INIT#{9,11,37,63}

SB_CPU_NMI{9,11,14} SB_CPU_INTR{9,11,37} CPU_PWR_GD{9,11,13,37} SB_CPU0_SMI#{9,14} SB_CPU_SLP#{9,11,37}

SB_CPU_STPCLK#{9,11}

P0_BCLK#{33} P0_BCLK{33}

ITP_TCK0{11,13} ITP_TDI_MAIN{13} ITP_TMS_MAIN{11,13}

ITP_TRST#{11,13,17}

SB_CPU0_BSEL1{9,10} SB_CPU0_BSEL0{9,10}

TP97TP97 TP98TP98 TP99TP99 TP116TP116 TP94TP94 TP93TP93 TP112TP112 TP105TP105 TP115TP115 TP107TP107 TP106TP106 TP95TP95 TP108TP108 TP20TP20

VID_CPU0_R[5..0]{69,76}

VR0_VCCSENSE{69}

VTTEN{9,11,62}

VR0_VSSSENSE{69}

SR194

49.9/6/1

VREF_P_VTT_CPU0_3_R VREF_P_VTT_CPU0_3

SC589

SR195

1U/6/Y/10V

90.9/6/1

SB_BPRI#

SB_CPU0_BREQ#23

SB_BREQ#1 SB_BREQ#0 SB_CPURST#

SB_RS#2 SB_RS#1 SB_RS#0

SB_RSP#

SB_CPU_A20M# SB_CPU_IGNNE# SB_CPU_INIT# SB_CPU_NMI SB_CPU_INTR

CPU_PWR_GD

SB_CPU0_SMI# SB_CPU_SLP#

SB_CPU_STPCLK#

P0_BCLK# P0_BCLK ITP_TCK0 ITP_TDI_MAIN ITP_TMS_MAIN ITP_TRST#

SB_CPU0_BSEL1 SB_CPU0_BSEL0

VID_CPU0_R5 VID_CPU0_R4 VID_CPU0_R3 VID_CPU0_R2 VID_CPU0_R1 VID_CPU0_R0

VR0_VCCSENSE

VTTEN

VR0_VSSSENSE

SR190

0/6

SC581

SC581 220P/6/X/50V

220P/6/X/50V

U86A

D23

BPRI#

D10 E11 F12 D20

F21 D22 E21

F27 C26

G23 B24 AB7 C27 AE6

E24 C24 A25 F24

AB3 AA3

AE29 AE28 AE30

AD29 AD28 AC29 AB29 AB28 AA29 AA28 AE15

AC1

AE16

AD4 B27

AB4 AA5

D26

W5

Y8

C6

D6

D4 Y4

Y3

A1 B3 C3 D3 E3 F3

E1

NOCONA 667

BR3# BR2# BR1# BR0# RESET# RS2# RS1# RS0# RSP#

A20M# IGNNE# INIT# LINT1_NMI LINT0_INTR PWRGOOD SMI# SLP# STPCLK# BCLK1 BCLK0 TCK TDI TMS TRST#

BSEL1 BSEL0

RESERVED1 RESERVED0 RSVD16 RSVD15 RSVD14 RSVD13 RSVD12 RSVD10 RSVD9 RSVD8 RSVD7 RSVD3 RSVD2 RSVD1

VID5 VID4 VID3 VID2 VID1 VID0

VCCIOPLL VCC_SENSE

VTTEN VCCA

VSSA VSS_SENSE

NOCONA 800

WIDE 10-12 MILS

SC561

220P/6/X/50V

ADS#

BINIT#

BNR# BPM5# BPM4# BPM3# BPM2# BPM1# BPM0#

DBSY#

DEFER#

DRDY#

HIT#

HITM# TRDY# LOCK#

MCERR#

IERR# FERR#

THERMTRIP#

PROCHOT#

TDO

GTLREF3 GTLREF2 GTLREF1 GTLREF0

ODTEN

SKTOCC#

COMP3 COMP2 COMP1 COMP0

TESTHI8 TESTHI7 TESTHI6 TESTHI5 TESTHI4 TESTHI3 TESTHI2 TESTHI1 TESTHI0

SMB_PRT

VCCPLL THERMDC THERMDA

BOOT_SELECT

RSVD

VIDPWRGD

TEST_BUS

FORCEPR#

SLEW_CTRL

OPTIMIZED_COMPAT#

P_VTT

SB_ADS#

D19

SB_BINIT#

F11

SB_BNR#

F20

CPU0_BPM#5

E4

CPU0_BPM#4

E8

CPU0_BPM#3

F5

CPU0_BPM#2

E7

CPU0_BPM#1

F8

CPU0_BPM#0

F6

SB_DBSY#

F18

SB_DEFER#

C23

SB_DRDY#

E18

SB_HIT#

E22

SB_HITM#

A23

SB_TRDY#

E19

SB_LOCK#

A17

SB_MCERR#

D7

SB_CPU0_IERR#

E5

SB_CPU_FERR#

E27

SB_CPU_THERMTRIP#

F26

SB_CPU0_PROCHOT#

B25

ITP_TDO_P0

E25 F9

F23 W9 W23

PD_ODTEN_CPU0

B5

SMC_CPU0_SKTOCC#

A3

PD_COMP3_CPU0

AC28

PD_COMP2_CPU0

D25

PD_COMP1_CPU0

E16

PD_COMP0_CPU0

AD16

PU_CPU0_8

Y29

PU_CPU0_0

A26

PU_CPU0_5

AE5

PU_CPU0_6

AD5

PU_CPU0_1

AA7

PU_CPU0_7

Y6

PU_CPU0_3

W8

PU_CPU0_2

W7

PU_CPU0_4

W6 AE4

AD1

CPU0_THERMDC

Y28

CPU0_THERMDA

Y27

PU_BOOT_SELECT_CPU0

G7 W3

VID_PWRGD

B1

SB_CPU0_CPU1_TESTBUS

A16

SB_CPU_FORCEPR#

A15

SLEW_CTRL_CPU0

AC30

CPU0_OPTIM_COMPAT_CTRL

C1

COMP3 =SB_CPU0_ADDR_ERC COMP2 =SB_CPU0_DATA_ERC PU_CPU0_8=SB_CPU0_EDRDY PU_CPU0_0=SB_CPU0_SNPD#

WW35 eMOW: Icc of VCCIOPLL pins : 100 mA

WW35 eMOW: Icc for VCCA pins : 120mA

120mA

L13

10UH/8

L12

10UH/8

TP104TP104

TP120TP120

12

SB_ADS# {11,18} SB_BINIT# {9,11,18} SB_BNR# {9,11,18}

CPU0_BPM#[5..0] {13} SB_DBSY# {11,18}

SB_DEFER# {11,18}

SB_DRDY# {11,18} SB_HIT# {9,11,18} SB_HITM# {9,11,18}

SB_TRDY# {11,18}

SB_LOCK# {11,18} SB_MCERR# {9,11,18}

SB_CPU0_IERR# {9,14} SB_CPU_FERR# {9,11,37} SB_CPU0_THERMTRIP# {9,14} SB_CPU0_PROCHOT# {9,14} ITP_TDO_P0 {13}

PD_ODTEN_CPU0 {9} SMC_CPU0_SKTOCC# {9,62,76,77}

PD_COMP3_CPU0 {9} PD_COMP2_CPU0 {9} PD_COMP1_CPU0 {9} PD_COMP0_CPU0 {9}

PU_CPU0_8 {9} PU_CPU0_0 {9} PU_CPU0_5 {9} PU_CPU0_6 {9} PU_CPU0_1 {9} PU_CPU0_7 {9} PU_CPU0_3 {9} PU_CPU0_2 {9} PU_CPU0_4 {9}

CPU0_THERMDC {10} CPU0_THERMDA {10} PU_BOOT_SELECT_CPU0 {9}

VID_PWRGD {11,62} SB_CPU0_CPU1_TESTBUS {9,11} SB_CPU_FORCEPR# {9,11,14}

SLEW_CTRL_CPU0 {9} CPU0_OPTIM_COMPAT_CTRL {9}

WIDE 10-12 MILS

P_VCCP_A_CPU0

C483

C483 22U/12/Y/10V

22U/12/Y/10V

AGND_CPU0

SB_D#[63..0]{11,18}

VREF_P_VTT_CPU0_3 VREF_P_VTT_CPU0_0

PU_VCCPLL_CPU0

P_VTT

12

SC328

SC328 22U/12/Y/10V

22U/12/Y/10V

12

SC580

22U/12/Y/10V

SB_D#63 SB_D#62 SB_D#61 SB_D#60 SB_D#59 SB_D#58 SB_D#57 SB_D#56 SB_D#55 SB_D#54 SB_D#53 SB_D#52 SB_D#51 SB_D#50 SB_D#49 SB_D#48 SB_D#47 SB_D#46 SB_D#45 SB_D#44 SB_D#43 SB_D#42 SB_D#41 SB_D#40 SB_D#39 SB_D#38 SB_D#37 SB_D#36 SB_D#35 SB_D#34 SB_D#33 SB_D#32 SB_D#31 SB_D#30 SB_D#29 SB_D#28 SB_D#27 SB_D#26 SB_D#25 SB_D#24 SB_D#23 SB_D#22 SB_D#21 SB_D#20 SB_D#19 SB_D#18 SB_D#17 SB_D#16 SB_D#15 SB_D#14 SB_D#13 SB_D#12 SB_D#11 SB_D#10 SB_D#9 SB_D#8 SB_D#7 SB_D#6 SB_D#5 SB_D#4 SB_D#3 SB_D#2 SB_D#1 SB_D#0

SC443

SC443 1U/6/Y/10V

1U/6/Y/10V

AB6

Y9 AA8 AC5 AC6 AE7 AD7 AC8

AB10 AA10 AA11 AB13 AB12 AC14 AA14 AA13

AC9 AD8

AD10

AE9

AC11 AE10 AC12 AD11 AD14 AD13 AB15 AD18 AE13 AC17 AA16 AB16 AB17 AD19 AD21 AE20 AE22 AC21 AC20 AA18 AC23 AE23 AD24 AC24 AE25 AD25 AC26 AE26 AA19 AB19 AB22 AB20 AA21 AA22 AB23 AB25 AB26 AA24

Y23

AD27 AA25

Y24

AA27

Y26

SC569

0.1U/6/X/16V

U86B

D63

NOCONA 667

D62 D61 D60 D59 D58 D57 D56 D55 D54 D53 D52 D51 D50 D49 D48 D47 D46 D45 D44 D43 D42 D41 D40 D39 D38 D37 D36 D35 D34 D33 D32 D31 D30 D29 D28 D27 D26 D25 D24 D23 D22 D21 D20 D19 D18 D17 D16 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

NOCONA 800

EC28

EC28 PSA2.5VB820MH11/8X11.5

PSA2.5VB820MH11/8X11.5

ADSTB1# ADSTB0#

DSTBP3# DSTBP2# DSTBP1# DSTBP0# DSTBN3# DSTBN2# DSTBN1# DSTBN0#

BREQ4# BREQ3# BREQ2# BREQ1# BREQ0#

DBI3# DBI2# DBI1# DBI0#

DP3# DP2# DP1# DP0#

AP1# AP0#

A35 A34 A33 A32 A31 A30 A29 A28 A27 A26 A25 A24 A23 A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 A10

A9 A8 A7 A6 A5 A4 A3

C9 A7 A6 B7 C11 D12 E13 B8 A9 D13 E14 C12 B11 B10 A10 F15 D15 D16 C14 C15 A12 B13 B14 B16 A13 D17 C17 A19 C18 B18 A20 A22

B22 C20 C21 B21 B19

AB9 AE12 AD22 AC27

AE17 AC15 AE19 AC18

D9 E10

F14 F17

Y11 Y14 Y17 Y20 Y12 Y15 Y18 Y21

SB_HA#34 SB_HA#33 SB_HA#32 SB_HA#31 SB_HA#30 SB_HA#29 SB_HA#28 SB_HA#27 SB_HA#26 SB_HA#25 SB_HA#24 SB_HA#23 SB_HA#22 SB_HA#21 SB_HA#20 SB_HA#19 SB_HA#18 SB_HA#17 SB_HA#16 SB_HA#15 SB_HA#14 SB_HA#13 SB_HA#12 SB_HA#11 SB_HA#10 SB_HA#9 SB_HA#8 SB_HA#7 SB_HA#6 SB_HA#5 SB_HA#4 SB_HA#3

SB_REQ#4 SB_REQ#3 SB_REQ#2 SB_REQ#1 SB_REQ#0

SB_DBI#3 SB_DBI#2 SB_DBI#1 SB_DBI#0

SB_DP#3 SB_DP#2 SB_DP#1 SB_DP#0

SB_AP#1 SB_AP#0

SB_ADSTB#1 SB_ADSTB#0

SB_DSTBP#3 SB_DSTBP#2 SB_DSTBP#1 SB_DSTBP#0 SB_DSTBN#3 SB_DSTBN#2 SB_DSTBN#1 SB_DSTBN#0

Trace Width:12 Mils

VREF_P_VTT_CPU0_0

SB_HA#35

C8

VREF_P_VTT_CPU0_3 VCCIOPLL_CPU0 AGND_CPU0 PU_VCCPLL_CPU0

WIDE 10-12 MILS

R722

49.9/6/1

A A

774mV

VREF_P_VTT_CPU0_0_R

C479

R721

1U/6/Y/10V

90.9/6/1

5

R762

0/6

VREF_P_VTT_CPU0_0

C490

C489

C489 220P/6/X/50V

220P/6/X/50V

SC465

0.1U/6/X

3

NO USE

SC472

0.1U/6/X

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

GIGA-BYTE TECHNOLOGY CO., LTD.

NOCONA 800 MICS P0

GA-9ILDTH

P1V5

4

SR168

0/6/X

12

+

SEC1

SEC1 470U/4V/7343/X

470U/4V/7343/X

12

SC444

4.7U/1206/X

PU_VCCPLL_CPU0

WIDE 10-12 MILS

SB_HA#[35..3] {11,18}

SB_REQ#[4..0] {11,18}

SB_DBI#[3..0] {11,18}

SB_DP#[3..0] {11,18}

SB_AP#[1..0] {11,18}

SB_ADSTB#[1..0] {11,18}

SB_DSTBP#[3..0] {11,18}

SB_DSTBN#[3..0] {11,18}

879Monday, November 21, 2005

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1

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P_VTT

R920 220/6R920 220/6

D D

C C

B B

A A

R945 220/6R945 220/6

R965 220/6R965 220/6

R719 220/6R719 220/6

R758 220/6R758 220/6

R933 220/6R933 220/6

R951 220/6R951 220/6

R988 51/6R988 51/6

R926 220/6R926 220/6

R966 51/6R966 51/6

R973 51/6R973 51/6

R927 51/6R927 51/6 R935 51/6R935 51/6

R913 51/6R913 51/6

SR183 39/6SR183 39/6

SR191 39/6SR191 39/6

SR192 39/6SR192 39/6

SR182 39/6SR182 39/6

P3V3

R903 4.7K/6R903 4.7K/6

SB_CPU_A20M#

SB_CPU_IGNNE#

SB_CPU_INIT#

SB_CPU_INTR

SB_CPU_SLP#

SB_CPU_STPCLK#

SB_CPU_NMI

SB_CPU_FORCEPR#

SB_CPU0_SMI#

SB_CPU0_IERR#

SB_CPU0_PROCHOT#

SB_CPU1_THERMTRIP# SB_CPU0_THERMTRIP#

SB_CPU_FERR#

SC556

SB_BININ#_R SB_BINIT#

SB_BNR#_R

SB_HIT#_R

SB_HITM#_R

SB_MCERR#_R SB_MCERR#

VTTEN

5

SC556 47P/6/N/50V

47P/6/N/50V SC565

SC565 47P/6/N/50V

47P/6/N/50V SC563

SC563 47P/6/N/50V

47P/6/N/50V SC564

SC564 47P/6/N/50V

47P/6/N/50V SC551

SC551 47P/6/N/50V

47P/6/N/50V

SB_BNR#

SB_HIT#

SB_HITM#

SB_CPU_A20M# {8,11,37}

SB_CPU_IGNNE# {8,11,37}

SB_CPU_INIT# {8,11,37,63}

SB_CPU_INTR {8,11,37}

SB_CPU_SLP# {8,11,37}

SB_CPU_STPCLK# {8,11}

SB_CPU_NMI {8,11,14}

SB_CPU_FORCEPR# {8,11,14}

SB_CPU0_SMI# {8,14}

SB_CPU0_IERR# {8,14}

SB_CPU0_PROCHOT# {8,14}

SB_CPU1_THERMTRIP# {11,14} SB_CPU0_THERMTRIP# {8,14}

SB_CPU_FERR# {8,11,37}

SB_BINIT# {8,11,18}

SB_BNR# {8,11,18}

SB_HIT# {8,11,18}

SB_HITM# {8,11,18}

SB_MCERR# {8,11,18}

VTTEN {8,11,62}

together

4

P_VTT

R989 51/6/XR989 51/6/X

R914 51/6/XR914 51/6/X

SR189 51/6SR189 51/6

SR187 51/6SR187 51/6

SR188 51/6SR188 51/6

R724 510/6R724 510/6

R759 510/6R759 510/6

R972 100/6/1R972 100/6/1

R745 100/6/1R745 100/6/1

SR186 49.9/6/1SR186 49.9/6/1

R761 49.9/6/1R761 49.9/6/1

P_VTT

R967 51/6R967 51/6

R958 51/6R958 51/6

P_VTT

R987

SB_CPU_STPCLK#{8,11}

PU_BOOT_SELECT_CPU0

CPU0_OPTIM_COMPAT_CTRL

SB_BREQ#0

SB_BREQ#1

SB_CPU0_BREQ#23

SB_CPU0_BSEL1

SB_CPU0_BSEL0

PD_COMP2_CPU0

PD_COMP3_CPU0

PD_COMP1_CPU0

PD_COMP0_CPU0

PD_ODTEN_CPU0

PD_ODTEN_CPU1

SB_CPU0_CPU1_TESTBUS

51/6

R986 0/6/XR986 0/6/X

R712 0/6R712 0/6

together

PU_BOOT_SELECT_CPU0 {8}

CPU0_OPTIM_COMPAT_CTRL {8}

SB_BREQ#0 {8,11,18}

SB_BREQ#1 {8,11,18}

SB_CPU0_BREQ#23 {8}

SB_CPU0_BSEL1 {8,10}

SB_CPU0_BSEL0 {8,10}

PD_COMP2_CPU0 {8}

PD_COMP3_CPU0 {8}

PD_COMP1_CPU0 {8}

PD_COMP0_CPU0 {8}

P_VTT

R765 300/6R765 300/6

R764 51/6R764 51/6

R736 51/6/XR736 51/6/X

R742 51/6/XR742 51/6/X

R743 51/6/XR743 51/6/X

R737 0/6R737 0/6

P3V3_STBY

R968 4.7K/6R968 4.7K/6

P_VTT

CPU_PWR_GD

CLOSE TO CPU0

SB_CPURST#

CPU_PWR_GD

CPU_PWR_GD {8,11,13,37}

SB_CPURST# {8,11,13,14,18}

SLEW_CTRL_CPU0

SLEW_CTRL_CPU1

SMC_CPU0_SKTOCC#

C481

C481 100P/6/X

100P/6/X

SLEW_CTRL_CPU0 {8}

SLEW_CTRL_CPU1 {11}

SMC_CPU0_SKTOCC# {8,62,76,77}

END CPU NOT USE

R744 51/6/XR744 51/6/X R690 51/6/XR690 51/6/X

2

R680 51/6R680 51/6 R668 51/6R668 51/6 R710 51/6R710 51/6 R703 51/6R703 51/6 R696 51/6R696 51/6SR193 39/6SR193 39/6 R685 51/6R685 51/6 R955 51/6R955 51/6

Title

Size Document Number Rev

Date: Sheet

PD_ODTEN_CPU0 {8}

PD_ODTEN_CPU1 {11}

SB_CPU0_CPU1_TESTBUS {8,11}

ICH_CPU_STPCLK# {37}

3

PU_CPU0_8 PU_CPU0_7 PU_CPU0_6 PU_CPU0_5 PU_CPU0_4 PU_CPU0_3 PU_CPU0_2 PU_CPU0_1 PU_CPU0_0

GIGA-BYTE TECHNOLOGY CO., LTD.

NOCONA 800 P0 TERMINATION

GA-9ILDTH

PU_CPU0_8 {8} PU_CPU0_7 {8} PU_CPU0_6 {8} PU_CPU0_5 {8} PU_CPU0_4 {8} PU_CPU0_3 {8} PU_CPU0_2 {8} PU_CPU0_1 {8} PU_CPU0_0 {8}

979Monday, November 21, 2005

1

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1.1

5

U86C

K30 K28 K26 K24

H30 H28 H26 H24

G31 G29 G27 G25

F30 F28 F25 F19 F13

E31 E29 E23 E17 E15

D30 D28 D27 D21 D11

C31 C29 C25 C19 C13

B30 B28 B23 B17 B15

A31 A29 A27 A21 A11

L31 L29 L27 L25 L23

L9 L7 L5 L3 L1

K8 K6 K4

K2 J31 J29 J27 J25 J23

J9

J7

J5

J3

J1

H8 H6 H4 H2

G9 G5 G3 G1

F7 F2

E9

D5 D2

C7

B9 B2

A5

VSS9

NOCONA 667

VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94

NOCONA 800

D D

C C

B B

A A

VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189

VSS8 VSS7 VSS6 VSS5 VSS4 VSS3 VSS2 VSS1

AA30 AA23 AA17 AA15 AA9 AA2 Y31 Y25 Y19 Y13 Y7 Y5 Y1 W30 W28 W26 W24 W4 W2 V31 V29 V27 V25 V23 V9 V7 V5 V3 V1 U30 U28 U26 U24 U8 U6 U4 U2 T31 T29 T27 T25 T23 T9 T7 T5 T3 T1 R30 R28 R26 R24 R8 R6 R4 R2 P31 P29 P27 P25 P23 P9 P7 P5 P3 P1 N30 N28 N26 N24 N8 N6 N4 N2 M2 M4 M6 M8 M24 M26 M28 M30

4

U86D

L30

K31 K29 K27 K25 K23

H31 H29 H27 H25 H23

G30 G28 G26 G24

E30 E28 E26 E20

D31 D29 D24 D18 D14

C30 C28 C22 C16

B31 B29 B26 B20

A30 A28 A24 A18 A14

L26 L24

L8 L6 L4 L2

K9 K7 K5 K3

K1 J30 J28 J26 J24

J8 J6 J4 J2

H9

H7

H5

H3

H1

G8 G6 G4

G2 F31 F29 F22 F16

F4 F1

E6 E2

D8 D1

C4 C2

B6

A8 A2

VCC_CORE1 VCC_CORE2 VCC_CORE3 VCC_CORE4 VCC_CORE5 VCC_CORE6 VCC_CORE7 VCC_CORE8 VCC_CORE9 VCC_CORE10 VCC_CORE11 VCC_CORE12 VCC_CORE13 VCC_CORE14 VCC_CORE15 VCC_CORE16 VCC_CORE17 VCC_CORE18 VCC_CORE19 VCC_CORE20 VCC_CORE21 VCC_CORE22 VCC_CORE23 VCC_CORE24 VCC_CORE25 VCC_CORE26 VCC_CORE27 VCC_CORE28 VCC_CORE29 VCC_CORE30 VCC_CORE31 VCC_CORE32 VCC_CORE33 VCC_CORE34 VCC_CORE35 VCC_CORE36 VCC_CORE37 VCC_CORE38 VCC_CORE39 VCC_CORE40 VCC_CORE41 VCC_CORE42 VCC_CORE43 VCC_CORE44 VCC_CORE45 VCC_CORE46 VCC_CORE47 VCC_CORE48 VCC_CORE49 VCC_CORE50 VCC_CORE51 VCC_CORE52 VCC_CORE53 VCC_CORE54 VCC_CORE55 VCC_CORE56 VCC_CORE57 VCC_CORE58 VCC_CORE59 VCC_CORE60 VCC_CORE61 VCC_CORE62 VCC_CORE63 VCC_CORE64 VCC_CORE65 VCC_CORE66 VCC_CORE67 VCC_CORE68 VCC_CORE69 VCC_CORE70 VCC_CORE71 VCC_CORE72 VCC_CORE73 VCC_CORE74 VCC_CORE75 VCC_CORE76 VCC_CORE77 VCC_CORE78 VCC_CORE79 VCC_CORE80

NOCONA 800

NOCONA 667

VCC_CORE81 VCC_CORE82 VCC_CORE83 VCC_CORE84 VCC_CORE85 VCC_CORE86 VCC_CORE87 VCC_CORE88 VCC_CORE89 VCC_CORE90 VCC_CORE91 VCC_CORE92 VCC_CORE93 VCC_CORE94 VCC_CORE95 VCC_CORE96 VCC_CORE97 VCC_CORE98

VCC_CORE99 VCC_CORE100 VCC_CORE101 VCC_CORE102 VCC_CORE103 VCC_CORE104 VCC_CORE105 VCC_CORE106 VCC_CORE107 VCC_CORE108 VCC_CORE109 VCC_CORE110 VCC_CORE111 VCC_CORE112 VCC_CORE113 VCC_CORE114 VCC_CORE115 VCC_CORE116 VCC_CORE117 VCC_CORE118 VCC_CORE119 VCC_CORE120 VCC_CORE121 VCC_CORE122 VCC_CORE123 VCC_CORE124 VCC_CORE125 VCC_CORE126 VCC_CORE127 VCC_CORE128 VCC_CORE129 VCC_CORE130 VCC_CORE131 VCC_CORE132 VCC_CORE133 VCC_CORE134 VCC_CORE135 VCC_CORE136 VCC_CORE137 VCC_CORE138 VCC_CORE139 VCC_CORE140 VCC_CORE141 VCC_CORE142 VCC_CORE143 VCC_CORE144 VCC_CORE145 VCC_CORE146 VCC_CORE147 VCC_CORE148 VCC_CORE149 VCC_CORE150 VCC_CORE151 VCC_CORE152 VCC_CORE153 VCC_CORE154 VCC_CORE155 VCC_CORE156 VCC_CORE157 VCC_CORE158 VCC_CORE159

AA31 AA26 AA20 AA6 AA4 AA1 Y30 Y22 Y16 Y2 W31 W29 W27 W25 W1 V30 V28 V26 V24 V8 V6 V4 V2 U31 U29 U27 U25 U23 U9 U7 U5 U3 U1 T30 T28 T26 T24 T8 T6 T4 T2 R31 R29 R27 R25 R23 R9 R7 R5 R3 R1 P30 P28 P26 P24 P8 P6 P4 P2 N31 N29 N27 N25 N23 N9 N7 N5 N3 N1 M31 M29 M27 M25 M23 M9 M7 M5 M3 M1

3

P_VCCP0P_VCCP0

CPU0_THERMDA{8}

CPU0_THERMDC{8}

MMBT2222A/SOT23

R766

SB_CPU0_BSEL1{8,9}

R766

470/6

2

P_VTT

U86E

AD12

VCC_VTT1

NOCONA 667

AC10 AA12

Y10 F10 E12 C10 B12

B4

C5

P3V3

A4

AE24 AE18 AE14

AE8

AE3 AD30 AD26 AD20

AD6

AD2 AC31 AC22 AC16

AC4

AC3 AB30 AB24 AB18 AB14

AB8

AB2

L28

R747

0/6

R746

0/6

ECB

Q76

SOT23

ECB

P_VCCP0

CPU0_THERMDA CPU0_THERMDA_H7

R726

R726 470/6

470/6

NOCONA 667

VCC_VTT2 VCC_VTT3 VCC_VTT4 VCC_VTT5 VCC_VTT6 VCC_VTT7 VCC_VTT8 VCC_VTT9 VCC_VTT10 VCC_VTT11

VCC_CORE160 VCC_CORE161 VCC_CORE162 VCC_CORE163 VCC_CORE164 VCC_CORE165 VCC_CORE166 VCC_CORE167 VCC_CORE168 VCC_CORE169 VCC_CORE170 VCC_CORE171 VCC_CORE172 VCC_CORE173 VCC_CORE174 VCC_CORE175 VCC_CORE176 VCC_CORE177 VCC_CORE178 VCC_CORE179 VCC_CORE180 VCC_CORE181

NOCONA 667_7

CPU0_THERMDC_H7

CPU0_BSEL1 {33,62}

Q77

Q77 MMBT2222A/SOT23

MMBT2222A/SOT23

SOT23

SB_CPU0_BSEL0{8,9}

MMBT2222A/SOT23

AE2

VSS95

AD3

VSS96

AE27

VSS97

AE21

VSS98

AE11

VSS99

AD31

VSS100

AD23

VSS101

AD17

VSS102

AD15

VSS103

AD9

VSS104

AC25

VSS106

AC19

VSS107

AC13

VSS108

AC7

VSS109

AC2

VSS110

AB31

VSS111

AB27

VSS112

AB21

VSS113

AB11

VSS114

AB5

VSS115

AB1

VSS116

TD1P

SC339

SC339 100P/6

100P/6

TD1NCPU0_THERMDC

CLOSED TO LM93

R725

R725 470/6

470/6

R760

470/6

TD1P {76}

TD1N {76}

P3V3

ECB

Q75

SOT23

1

CPU0_BSEL0 {33,62}

Q72

Q72 MMBT2222A/SOT23

MMBT2222A/SOT23

SOT23

ECB

Title

Size Document Number Rev

Date: Sheet

5

4

3

2

Date: Sheet

GIGA-BYTE TECHNOLOGY CO., LTD.

NOCONA 800 P0 PWR/GND

GA-9ILDTH

10 79Monday, November 21, 2005

of

1

of

1.1

5

4

3

2

1

PROCESSOR 1

U85A

SB_BPRI#{8,18}

SB_CPU1_BREQ#23{13}

SB_BREQ#0{8,9,18} SB_BREQ#1{8,9,18}

SB_CPURST#{8,9,13,14,18}

SB_RS#[0..2]{8,18}

D D

C C

P_VCCP_A_CPU1

AGND_CPU1

B B

754mV

P_VTT

R748

49.9/6/1

VREF_P_VCCP_CPU1_0_R

R749

84.5/6/1

P_VTT

SR144

49.9/6/1

VID_CPU1_R[5..0]{70,76}

SB_CPU_A20M#{8,9,37} SB_CPU_IGNNE#{8,9,37}

CPU_PWR_GD{8,9,13,37}

SB_CPU_STPCLK#{8,9}

SB_CPU1_BSEL1{12,13} SB_CPU1_BSEL0{12,13}

VR1_VCCSENSE{70}

VR1_VSSSENSE{70}

SB_CPU_INIT#{8,9,37,63} SB_CPU_NMI{8,9,14} SB_CPU_INTR{8,9,37}

SB_CPU1_SMI#{13,14} SB_CPU_SLP#{8,9,37}

P1_BCLK#{33} P1_BCLK{33} ITP_TCK0{8,13} ITP_TDI_P1{13}

ITP_TMS_MAIN{8,13}

ITP_TRST#{8,13,17}

C486

C486 1U/6/Y/10V

1U/6/Y/10V

SB_RSP#{8,18}

TP22TP22 TP101TP101 TP100TP100 TP117TP117 TP23TP23 TP103TP103 TP102TP102 TP111TP111 TP110TP110 TP118TP118 TP114TP114 TP24TP24 TP113TP113 TP96TP96

VTTEN{8,9,62}

754mV

A A

P1 VREF

SR145

SC327

84.5/6/1

1U/6/Y/10V

MCH A0 CPU B0 800 64.9ohm 0.678V MCH B0 CPU C1 800 49.9ohm 0.756V

5

SB_BPRI#

SB_CPU1_BREQ#23

SB_BREQ#0 SB_BREQ#1 SB_CPURST# SB_RS#2 SB_RS#1 SB_RS#0 SB_RSP#

SB_CPU_A20M# SB_CPU_IGNNE# SB_CPU_INIT# SB_CPU_NMI SB_CPU_INTR

CPU_PWR_GD

SB_CPU1_SMI# SB_CPU_SLP# SB_CPU_STPCLK#

P1_BCLK#

P1_BCLK

ITP_TCK0

ITP_TDI_P1

ITP_TMS_MAIN

ITP_TRST# SB_CPU1_BSEL1

SB_CPU1_BSEL0

VR1_VCCSENSE

VTTEN

VR1_VSSSENSE

R750

0/6

SR152

0/6

VID_CPU1_R5 VID_CPU1_R4 VID_CPU1_R3 VID_CPU1_R2 VID_CPU1_R1 VID_CPU1_R0

C487

C487 220P/6/X/50V

220P/6/X/50V

SC331

SC331 220P/6/X/50V

220P/6/X/50V

U85A

D23

BPRI#

D10 E11 F12 D20

F21 D22 E21

F27 C26

G23 B24 AB7 C27 AE6

E24 C24 A25 F24

AB3 AA3

AE29 AE28 AE30

AD29 AD28 AC29 AB29 AB28 AA29 AA28 AE15

AC1

AE16

AD4 B27

AB4 AA5

D26

Y8

C6

D6

D4

W5

Y4

Y3

A1 B3 C3 D3 E3 F3

E1

NOCONA 667

BR3# BR2# BR1# BR0# RESET# RS2# RS1# RS0# RSP#

A20M# IGNNE# INIT# LINT1_NMI LINT0_INTR PWRGOOD SMI# SLP# STPCLK# BCLK1 BCLK0 TCK TDI TMS TRST#

BSEL1 BSEL0

RESERVED1 RESERVED0 RSVD16 RSVD15 RSVD14 RSVD13 RSVD12 RSVD10 RSVD9 RSVD8 RSVD7 RSVD3 RSVD2 RSVD1

VID5 VID4 VID3 VID2 VID1 VID0

VCCIOPLL VCC_SENSE

VTTEN VCCA

VSSA VSS_SENSE

NOCONA 800

WIDE 10-12 MILS

VREF_P_VTT_CPU1_0

C488

220P/6/X/50V

WIDE 10-12 MILS

VREF_P_VTT_CPU1_3VREF_P_VCCP_CPU1_3_R

SC332

220P/6/X/50V

ADS#

BINIT#

BNR# BPM5# BPM4# BPM3# BPM2# BPM1# BPM0#

DBSY#

DEFER#

DRDY#

HIT#

HITM# TRDY# LOCK#

MCERR#

IERR# FERR#

THERMTRIP#

PROCHOT#

GTLREF3 GTLREF2 GTLREF1 GTLREF0

ODTEN

SKTOCC#

COMP3 COMP2 COMP1 COMP0

TESTHI8 TESTHI7 TESTHI6 TESTHI5 TESTHI4 TESTHI3 TESTHI2 TESTHI1 TESTHI0

SMB_PRT

VCCPLL THERMDC THERMDA

BOOT_SELECT

RSVD

VIDPWRGD

TEST_BUS

FORCEPR#

SLEW_CTRL

OPTIMIZED_COMPAT#

4

TDO

SB_ADS#

D19

SB_BINIT#

F11

SB_BNR#

F20

CPU1_BPM#5

E4

CPU1_BPM#4

E8

CPU1_BPM#3

F5

CPU1_BPM#2

E7

CPU1_BPM#1

F8

CPU1_BPM#0

F6

SB_DBSY#

F18

SB_DEFER#

C23

SB_DRDY#

E18

SB_HIT#

E22

SB_HITM#

A23

SB_TRDY#

E19

SB_LOCK#

A17

SB_MCERR#

D7

SB_CPU1_IERR#

E5

SB_CPU_FERR#

E27

SB_CPU_THERMTRIP#

F26

SB_CPU1_PROCHOT#

B25

ITP_TDO_MAIN

E25 F9

F23 W9 W23

PD_ODTEN_CPU1

B5

SMC_CPU1_SKTOCC#

A3

PD_COMP3_CPU1

AC28

PD_COMP2_CPU1

D25

PD_COMP1_CPU1

E16

PD_COMP0_CPU1

AD16

PU_CPU1_8

Y29

PU_CPU1_0

A26

PU_CPU0_5

AE5

PU_CPU1_6

AD5

PU_CPU1_1

AA7

PU_CPU1_7

Y6

PU_CPU1_3

W8

PU_CPU1_2

W7

PU_CPU1_4

W6 AE4

AD1

CPU1_THERMDC

Y28

CPU1_THERMDA

Y27

PU_BOOT_SELECT_CPU1

G7 W3

VID_PWRGD

B1

SB_CPU0_CPU1_TESTBUS

A16

SB_CPU_FORCEPR#

A15

SLEW_CTRL_CPU1

AC30

CPU1_OPTIM_COMPAT_CTRL

C1

COMP3 =SB_CPU1_ADDR_ERC COMP2 =SB_CPU1_DATA_ERC PU_CPU1_8=SB_CPU1_EDRDY PU_CPU1_0=SB_CPU1_SNPD#

WW35 eMOW: Icc of VCCIOPLL pins : 100 mA

WW35 eMOW: Icc for VCCA pins : 120mA

P_VTT

SL1

10UH/8

SL2

10UH/8

P1V5

SB_ADS# {8,18} SB_BINIT# {8,9,18} SB_BNR# {8,9,18}

CPU1_BPM#[5..0] {13} SB_DBSY# {8,18}

SB_DEFER# {8,18}

SB_DRDY# {8,18} SB_HIT# {8,9,18} SB_HITM# {8,9,18}

SB_TRDY# {8,18}

SB_LOCK# {8,18} SB_MCERR# {8,9,18}

SB_CPU1_IERR# {13,14} SB_CPU_FERR# {8,9,37} SB_CPU1_THERMTRIP# {9,14} SB_CPU1_PROCHOT# {13,14} ITP_TDO_P1 {13}

PD_ODTEN_CPU1 {9} SMC_CPU1_SKTOCC# {13,62,77}

PD_COMP3_CPU1 {13} PD_COMP2_CPU1 {13} PD_COMP1_CPU1 {13} PD_COMP0_CPU1 {13}

PU_CPU1_8 {13} PU_CPU1_0 {13} PU_CPU1_5 {13} PU_CPU1_6 {13} PU_CPU1_1 {13} PU_CPU1_7 {13} PU_CPU1_3 {13} PU_CPU1_2 {13} PU_CPU1_4 {13}

TP86TP86

CPU1_THERMDC {12} CPU1_THERMDA {12} PU_BOOT_SELECT_CPU1 {13}

TP124TP124

VID_PWRGD {8,62} SB_CPU0_CPU1_TESTBUS {8,9} SB_CPU_FORCEPR# {8,9,14}

SLEW_CTRL_CPU1 {9} CPU1_OPTIM_COMPAT_CTRL {13}

SR167

0/6/X

12

+

SEC2

SEC2 470U/4V/7343/X

470U/4V/7343/X

WIDE 10-12 MILS

P_VCCP_A_CPU1

12

SC473

SC473 22U/12/Y/10V

22U/12/Y/10V

AGND_CPU1

WIDE 10-12 MILS

PU_VCCPLL_CPU1

12

SC438

4.7U/1206/X

3

SB_D#[63..0]{8,18}

VREF_P_VTT_CPU1_3 VREF_P_VTT_CPU1_0

PU_VCCPLL_CPU1

NO USE

SC446

SC439

0.1U/6/X

SB_D#63 SB_D#62 SB_D#61 SB_D#60 SB_D#59 SB_D#58 SB_D#57 SB_D#56 SB_D#55 SB_D#54 SB_D#53 SB_D#52 SB_D#51 SB_D#50 SB_D#49 SB_D#48 SB_D#47 SB_D#46 SB_D#45 SB_D#44 SB_D#43 SB_D#42 SB_D#41 SB_D#40 SB_D#39 SB_D#38 SB_D#37 SB_D#36 SB_D#35 SB_D#34 SB_D#33 SB_D#32 SB_D#31 SB_D#30 SB_D#29 SB_D#28 SB_D#27 SB_D#26 SB_D#25 SB_D#24 SB_D#23 SB_D#22 SB_D#21 SB_D#20 SB_D#19 SB_D#18 SB_D#17 SB_D#16 SB_D#15 SB_D#14 SB_D#13 SB_D#12 SB_D#11 SB_D#10 SB_D#9 SB_D#8 SB_D#7 SB_D#6 SB_D#5 SB_D#4 SB_D#3 SB_D#2 SB_D#1 SB_D#0

AB6

Y9 AA8 AC5 AC6 AE7 AD7 AC8

AB10 AA10 AA11 AB13 AB12 AC14 AA14 AA13

AC9 AD8

AD10

AE9

AC11 AE10 AC12 AD11 AD14 AD13 AB15 AD18 AE13 AC17 AA16 AB16 AB17 AD19 AD21 AE20 AE22 AC21 AC20 AA18 AC23 AE23 AD24 AC24 AE25 AD25 AC26 AE26 AA19 AB19 AB22 AB20 AA21 AA22 AB23 AB25 AB26 AA24

Y23

AD27 AA25

Y24

AA27

Y26

12

SC449

SC449 22U/12/Y/10V

22U/12/Y/10V

2

U85B

D63

NOCONA 667

D62 D61 D60 D59 D58 D57 D56 D55 D54 D53 D52 D51 D50 D49 D48 D47 D46 D45 D44 D43 D42 D41 D40 D39 D38 D37 D36 D35 D34 D33 D32 D31 D30 D29 D28 D27 D26 D25 D24 D23 D22 D21 D20 D19 D18 D17 D16 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

NOCONA 800

P_VTT

12

SC570

22U/12/Y/10V

SB_HA#[35..3] {8,18}

SB_REQ#[4..0] {8,18}

SB_DBI#[3..0] {8,18}

SB_DP#[3..0] {8,18}

SB_AP#[1..0] {8,18}

SB_ADSTB#[1..0] {8,18}

SB_DSTBP#[3..0] {8,18}

SB_DSTBN#[3..0] {8,18}

BREQ4# BREQ3# BREQ2# BREQ1# BREQ0#

DBI3# DBI2# DBI1# DBI0#

ADSTB1# ADSTB0#

DSTBP3# DSTBP2# DSTBP1# DSTBP0# DSTBN3# DSTBN2# DSTBN1# DSTBN0#

SC568

SC568 1U/6/Y/10V

1U/6/Y/10V

A35 A34 A33 A32 A31 A30 A29 A28 A27 A26 A25 A24 A23 A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 A10

A9 A8 A7 A6 A5 A4 A3

DP3# DP2# DP1# DP0#

AP1# AP0#

SC445

0.1U/6/X/16V

SB_HA#35

C8

SB_HA#34

C9

SB_HA#33

A7

SB_HA#32

A6

SB_HA#31

B7

SB_HA#30

C11

SB_HA#29

D12

SB_HA#28

E13

SB_HA#27

B8

SB_HA#26

A9

SB_HA#25

D13

SB_HA#24

E14

SB_HA#23

C12

SB_HA#22

B11

SB_HA#21

B10

SB_HA#20

A10

SB_HA#19

F15

SB_HA#18

D15

SB_HA#17

D16

SB_HA#16

C14

SB_HA#15

C15

SB_HA#14

A12

SB_HA#13

B13

SB_HA#12

B14

SB_HA#11

B16

SB_HA#10

A13

SB_HA#9

D17

SB_HA#8

C17

SB_HA#7

A19

SB_HA#6

C18

SB_HA#5

B18

SB_HA#4

A20

SB_HA#3

A22

SB_REQ#4

B22

SB_REQ#3

C20

SB_REQ#2

C21

SB_REQ#1

B21

SB_REQ#0

B19

SB_DBI#3

AB9

SB_DBI#2

AE12

SB_DBI#1

AD22

SB_DBI#0

AC27

SB_DP#3

AE17

SB_DP#2

AC15

SB_DP#1

AE19

SB_DP#0

AC18

SB_AP#1

D9

SB_AP#0

E10

SB_ADSTB#1

F14

SB_ADSTB#0

F17

SB_DSTBP#3

Y11

SB_DSTBP#2

Y14

SB_DSTBP#1

Y17

SB_DSTBP#0

Y20

SB_DSTBN#3

Y12

SB_DSTBN#2

Y15

SB_DSTBN#1

Y18

SB_DSTBN#0

Y21

EC27

EC27 PSA2.5VB820MH11/8X11.5

PSA2.5VB820MH11/8X11.5

Trace Width:12 Mils

VREF_P_VTT_CPU1_0 VREF_P_VTT_CPU1_3 VCCIOPLL_CPU1 AGND_CPU1 PU_VCCPLL_CPU1

Title

Size Document Number Rev

Date: Sheet

GIGA-BYTE TECHNOLOGY CO., LTD.

NOCONA 800 MICS P1

GA-9ILDTH

1

1.1

11 79Monday, November 21, 2005

1.1

of

5

D D

C C

B B

A A

H30 H28 H26 H24

G31 G29 G27 G25

F30 F28 F25 F19 F13

E31 E29 E23 E17 E15

D30 D28 D27 D21 D11

C31 C29 C25 C19 C13

B30 B28 B23 B17 B15

A31 A29 A27 A21 A11

L31 L29 L27 L25 L23

L9 L7 L5 L3

L1 K30 K28 K26 K24

K8 K6 K4

K2 J31 J29 J27 J25 J23

J9 J7 J5 J3 J1

H8

H6

H4

H2

G9

G5

G3

G1

F7

F2

E9

D5

D2

C7

B9

B2

A5

U85C

VSS9

NOCONA 667

VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94

NOCONA 800

VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189

VSS8 VSS7 VSS6 VSS5 VSS4 VSS3 VSS2 VSS1

AA30 AA23 AA17 AA15 AA9 AA2 Y31 Y25 Y19 Y13 Y7 Y5 Y1 W30 W28 W26 W24 W4 W2 V31 V29 V27 V25 V23 V9 V7 V5 V3 V1 U30 U28 U26 U24 U8 U6 U4 U2 T31 T29 T27 T25 T23 T9 T7 T5 T3 T1 R30 R28 R26 R24 R8 R6 R4 R2 P31 P29 P27 P25 P23 P9 P7 P5 P3 P1 N30 N28 N26 N24 N8 N6 N4 N2 M2 M4 M6 M8 M24 M26 M28 M30

4

P_VCCP1

K31 K29 K27 K25 K23

H31 H29 H27 H25 H23

G30 G28 G26 G24

F31 F29 F22 F16

E30 E28 E26 E20

D31 D29 D24 D18 D14

C30 C28 C22 C16

B31 B29 B26 B20

A30 A28 A24 A18 A14

L30 L26 L24

L8 L6 L4 L2

K9 K7 K5 K3

K1 J30 J28 J26 J24

J8 J6 J4 J2

H9

H7

H5

H3

H1

G8 G6 G4 G2

F4

F1

E6

E2

D8

D1

C4

C2

B6

A8

A2

U85D

VCC_CORE1 VCC_CORE2 VCC_CORE3 VCC_CORE4 VCC_CORE5 VCC_CORE6 VCC_CORE7 VCC_CORE8 VCC_CORE9 VCC_CORE10 VCC_CORE11 VCC_CORE12 VCC_CORE13 VCC_CORE14 VCC_CORE15 VCC_CORE16 VCC_CORE17 VCC_CORE18 VCC_CORE19 VCC_CORE20 VCC_CORE21 VCC_CORE22 VCC_CORE23 VCC_CORE24 VCC_CORE25 VCC_CORE26 VCC_CORE27 VCC_CORE28 VCC_CORE29 VCC_CORE30 VCC_CORE31 VCC_CORE32 VCC_CORE33 VCC_CORE34 VCC_CORE35 VCC_CORE36 VCC_CORE37 VCC_CORE38 VCC_CORE39 VCC_CORE40 VCC_CORE41 VCC_CORE42 VCC_CORE43 VCC_CORE44 VCC_CORE45 VCC_CORE46 VCC_CORE47 VCC_CORE48 VCC_CORE49 VCC_CORE50 VCC_CORE51 VCC_CORE52 VCC_CORE53 VCC_CORE54 VCC_CORE55 VCC_CORE56 VCC_CORE57 VCC_CORE58 VCC_CORE59 VCC_CORE60 VCC_CORE61 VCC_CORE62 VCC_CORE63 VCC_CORE64 VCC_CORE65 VCC_CORE66 VCC_CORE67 VCC_CORE68 VCC_CORE69 VCC_CORE70 VCC_CORE71 VCC_CORE72 VCC_CORE73 VCC_CORE74 VCC_CORE75 VCC_CORE76 VCC_CORE77 VCC_CORE78 VCC_CORE79 VCC_CORE80

NOCONA 800

NOCONA 667

VCC_CORE81 VCC_CORE82 VCC_CORE83 VCC_CORE84 VCC_CORE85 VCC_CORE86 VCC_CORE87 VCC_CORE88 VCC_CORE89 VCC_CORE90 VCC_CORE91 VCC_CORE92 VCC_CORE93 VCC_CORE94 VCC_CORE95 VCC_CORE96 VCC_CORE97 VCC_CORE98

VCC_CORE99 VCC_CORE100 VCC_CORE101 VCC_CORE102 VCC_CORE103 VCC_CORE104 VCC_CORE105 VCC_CORE106 VCC_CORE107 VCC_CORE108 VCC_CORE109 VCC_CORE110 VCC_CORE111 VCC_CORE112 VCC_CORE113 VCC_CORE114 VCC_CORE115 VCC_CORE116 VCC_CORE117 VCC_CORE118 VCC_CORE119 VCC_CORE120 VCC_CORE121 VCC_CORE122 VCC_CORE123 VCC_CORE124 VCC_CORE125 VCC_CORE126 VCC_CORE127 VCC_CORE128 VCC_CORE129 VCC_CORE130 VCC_CORE131 VCC_CORE132 VCC_CORE133 VCC_CORE134 VCC_CORE135 VCC_CORE136 VCC_CORE137 VCC_CORE138 VCC_CORE139 VCC_CORE140 VCC_CORE141 VCC_CORE142 VCC_CORE143 VCC_CORE144 VCC_CORE145 VCC_CORE146 VCC_CORE147 VCC_CORE148 VCC_CORE149 VCC_CORE150 VCC_CORE151 VCC_CORE152 VCC_CORE153 VCC_CORE154 VCC_CORE155 VCC_CORE156 VCC_CORE157 VCC_CORE158 VCC_CORE159

AA31 AA26 AA20 AA6 AA4 AA1 Y30 Y22 Y16 Y2 W31 W29 W27 W25 W1 V30 V28 V26 V24 V8 V6 V4 V2 U31 U29 U27 U25 U23 U9 U7 U5 U3 U1 T30 T28 T26 T24 T8 T6 T4 T2 R31 R29 R27 R25 R23 R9 R7 R5 R3 R1 P30 P28 P26 P24 P8 P6 P4 P2 N31 N29 N27 N25 N23 N9 N7 N5 N3 N1 M31 M29 M27 M25 M23 M9 M7 M5 M3 M1

3

P_VCCP1

2

P_VTT

U85E

AD12

VCC_VTT1

NOCONA 667

AC10 AA12

Y10 F10 E12 C10 B12

B4

C5

SR157

SR157 470/6

470/6

P3V3

A4

AE24 AE18 AE14

AE8

AE3 AD30 AD26 AD20

AD6

AD2 AC31 AC22 AC16

AC4

AC3 AB30 AB24 AB18 AB14

AB8

AB2

L28

R740

0/6

R739

0/6

SQ28

SOT23

ECB

P_VCCP1

CPU1_THERMDA{11}

SB_CPU1_BSEL1{11,13}

CPU1_THERMDA

CPU1_THERMDC TD2N

MMBT2222A/SOT23

SR176

470/6

NOCONA 667

VCC_VTT2 VCC_VTT3 VCC_VTT4 VCC_VTT5 VCC_VTT6 VCC_VTT7 VCC_VTT8 VCC_VTT9 VCC_VTT10 VCC_VTT11

VCC_CORE160 VCC_CORE161 VCC_CORE162 VCC_CORE163 VCC_CORE164 VCC_CORE165 VCC_CORE166 VCC_CORE167 VCC_CORE168 VCC_CORE169 VCC_CORE170 VCC_CORE171 VCC_CORE172 VCC_CORE173 VCC_CORE174 VCC_CORE175 VCC_CORE176 VCC_CORE177 VCC_CORE178 VCC_CORE179 VCC_CORE180 VCC_CORE181

NOCONA 667_7

CPU1_THERMDA_H7 TD2P

CPU1_THERMDC_H7

VSS95 VSS96 VSS97 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116

CLOSED TO LM93

CPU1_BSEL1 {62}

SQ29

SQ29 MMBT2222A/SOT23

MMBT2222A/SOT23

SOT23

ECB

MMBT2222A/SOT23

SR179

SB_CPU1_BSEL0{11,13}

SR179

470/6

AE2 AD3 AE27 AE21 AE11 AD31 AD23 AD17 AD15 AD9 AC25 AC19 AC13 AC7 AC2 AB31 AB27 AB21 AB11 AB5 AB1

SC345

SC345 100P/6

100P/6

SR162

SR162 470/6

470/6

1

TD2P {76}

TD2N {76}CPU1_THERMDC{11}

P3V3

SQ30

SOT23

ECB

CPU1_BSEL0 {62}

SQ31

MMBT2222A/SOT23

SOT23

ECB

Title

Size Document Number Rev

Date: Sheet

5

4

3

2

Date: Sheet

GIGA-BYTE TECHNOLOGY CO., LTD.

NOCONA 800 P1 PWR/GND

GA-9ILDTH

12 79Monday, November 21, 2005

of

1

of

1.1

P_VTT

5

4

P_VTT

3

2

1

R936 220/6R936 220/6

R925 51/6R925 51/6

D D

R963 51/6R963 51/6

R961 51/6/XR961 51/6/X

R948 51/6/XR948 51/6/X

R964 51/6R964 51/6

C C

SR175 510/6SR175 510/6

SR178 510/6SR178 510/6

R741 100/6/1R741 100/6/1

R962 100/6/1R962 100/6/1

SR185 49.9/6/1SR185 49.9/6/1

B B

R767 49.9/6/1R767 49.9/6/1

A A

SB_CPU1_SMI#

SB_CPU1_IERR#

SB_CPU1_PROCHOT#

PU_BOOT_SELECT_CPU1

CPU1_OPTIM_COMPAT_CTRL

R960 51/6/XR960 51/6/X

SB_CPU1_BREQ#23

SB_CPU1_BSEL1

SB_CPU1_BSEL0

PD_COMP3_CPU1

PD_COMP2_CPU1

PD_COMP1_CPU1

PD_COMP0_CPU1

CPU_PWR_GD{8,9,11,37}

I2C_BUS2_SDA{17,23,49,73} I2C_BUS2_SCL{17,23,49,73}

ITP_TCK1{17} ITP_TCK0{8,11}

5

SB_CPU1_SMI# {11,14}

SB_CPU1_IERR# {11,14}

SB_CPU1_PROCHOT# {11,14}

PU_BOOT_SELECT_CPU1 {11}

CPU1_OPTIM_COMPAT_CTRL {11}

SB_CPU1_BREQ#23 {11}

SB_CPU1_BSEL1 {11,12}

SB_CPU1_BSEL0 {11,12}

PD_COMP3_CPU1 {11}

PD_COMP2_CPU1 {11}

PD_COMP1_CPU1 {11}

PD_COMP0_CPU1 {11}

CPU_PWR_GD

R938 0/6R938 0/6

MCH_PME#{18,36}

R950 0/6/XR950 0/6/X R971 0/6/XR971 0/6/X

R984 51/6R984 51/6 R982 51/6R982 51/6

P_VTT

R738 51/6R738 51/6

R754 51/6R754 51/6 R757 51/6R757 51/6 R756 51/6R756 51/6 R755 51/6R755 51/6 R751 51/6R751 51/6 R753 51/6R753 51/6 R752 51/6R752 51/6

R947 51/6R947 51/6

P3V3_STBY

R959 4.7K/6R959 4.7K/6

CPU_PWR_GD

C480

C480 100P/6/X

100P/6/X

CPU0_BPM#5 CPU0_BPM#4

CPU0_BPM#3 CPU0_BPM#2

CPU0_BPM#1 CPU0_BPM#0

CPU1_BPM#5 CPU1_BPM#4

CPU1_BPM#3 CPU1_BPM#2

CPU1_BPM#1 CPU1_BPM#0

ITP_CPU_PWRGOOD

MCH_PME# SB_CPURST#_R

ITP_SMBDAT ITP_SMBCLK ITP_TCK1 ITP_TCK0

4

11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59

PU_CPU1_8

PU_CPU1_7 PU_CPU1_6 PU_CPU1_5 PU_CPU1_4 PU_CPU1_3 PU_CPU1_2 PU_CPU1_1

PU_CPU1_0

SMC_CPU1_SKTOCC#

CPU_PWR_GD {8,9,11,37}

ITP

1 3 5 7 9

ITP/X

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60

P1V5

PU_CPU1_8 {11}

PU_CPU1_7 {11} PU_CPU1_6 {11} PU_CPU1_5 {11} PU_CPU1_4 {11} PU_CPU1_3 {11} PU_CPU1_2 {11} PU_CPU1_1 {11}

PU_CPU1_0 {11}

SMC_CPU1_SKTOCC# {11,62,77}

MODE TEST PROCESSOR CONFIGURATION UP 2-3 P0 INSTALLED;P1 REMOVED DP 1-2 & 3-4 P0 & P1 INSTALLED

ITP_MCH_DEBUG0

ITP_MCH_DEBUG1 ITP_MCH_DEBUG2

ITP_MCH_DEBUG3

ITP_MCH_DEBUG4 ITP_MCH_DEBUG5

ITP_MCH_DEBUG6 ITP_MCH_DEBUG7

ITP_BCLK ITP_BCLK#

DBR_RESET# ITP_TDO_MAIN

ITP_TRST# ITP_TDI_MAIN ITP_TMS_MAIN

R1024

1K/6

3

ITP_MCH_DEBUG[7..0]

PLACE WITHIN 1" OF CPU

R1025

R1025 51/6/X

51/6/X

ITP_BCLK {33} ITP_BCLK# {33}

ITP_TRST# {8,11,17} ITP_TMS_MAIN {8,11}

TP31TP31 TP135TP135 TP137TP137 TP136TP136

ITP_TMS_MAIN{8,11} ITP_TMS_MCH {17}

ITP_TDI_MAIN{8}

ITP_MCH_DEBUG[7..0] {17}

P_VTT

R908

R1012

51/6

R1026 0/6R1026 0/6

ITP_TDI_MAIN {8}

ITP_TDI_P1 ITP_TDO_P0

ITP_TDO_P1

ITP_TDI_P1 {11} ITP_TDO_P0 {8}

ITP_TDO_P1 {11}

SB_CPURST#_R

ITP_TMS_MAIN

DBR_RESET#

R1005

ITP_TDI_MAIN

P_VTT

R1033

51/6

2

R1005

0/6

RN46 51/8P4RRN46 51/8P4R

1 2 3 4 5 6 7 8

RN47 51/8P4RRN47 51/8P4R

1 2 3 4 5 6 7 8

RN49 51/8P4RRN49 51/8P4R

1 2 3 4 5 6 7 8

R991 51/6R991 51/6 R1001 51/6R1001 51/6

P_VTT

PLACE WITHIN 1" OF MCH

ITP_TDO_MCH

R763 0/6R763 0/6

R997 0/6R997 0/6

R1027 0/6R1027 0/6

R1003

R1003 51/6

51/6

Title

Size Document Number Rev

Date: Sheet

SB_CPURST#

ITP_TMS_MCH

ITP_RESET#

P_VTT

SB_CPURST# {8,9,11,14,18}

ITP_RESET# {75}

PLACE WITHIN 1" OF MCH

ITP_TDI_MCH

CPU1_BPM#5 CPU1_BPM#4 CPU1_BPM#3 CPU1_BPM#2

CPU1_BPM#1 CPU1_BPM#0 CPU0_BPM#5 CPU0_BPM#4

CPU0_BPM#0 CPU0_BPM#1 CPU0_BPM#2 CPU0_BPM#3

ITP_TMS_MCH ITP_TMS_MAIN

ITP_TDO_MCH {17}

GIGA-BYTE TECHNOLOGY CO., LTD.

NOCONA 800 P1 TERMINATION/ITP

GA-9ILDTH

ITP_TDI_MCH {17}

CPU1_BPM#[5..0] {11} CPU0_BPM#[5..0] {8}

ITP_TMS_MCH {17} ITP_TMS_MAIN {8,11}

13 79Monday, November 21, 2005

1

of

1.1

5

P_VTT

C664

C665

1U/6/Y/10V

0.01U/6/X/50V

D D

SB_CPU1_IERR#{11,13} SB_CPU0_IERR#{8,9} SB_CPU0_THERMTRIP#{8,9} SB_CPU1_THERMTRIP#{9,11}

SB_CPU0_PROCHOT#{8,9} SB_CPU1_PROCHOT#{11,13} CPU1_PROCHOT# {76}

SB_CPU_FORCEPR#{8,9,11}

ICH_CPU_SMI#{37} HW_CPU0_SMI#{76} HW_CPU1_SMI#{76} SB_ICH_NMI{37}

R1008

R1008 200/6

200/6

R1009

R1009 200/6

200/6

R979

R979 220/6

220/6

4

R1014

R1014 51/6

51/6

P_VTT

R1013

R1013 51/6

51/6

R1010

R1010 51/6

51/6

R1011

R1011 51/6

51/6

R981

R981 51/6

51/6

GTL2006_VREF

R996

R996 100/6/1

100/6/1

U100

1

VREF

27

1BI

26

2BI

19

3BI

18

4BI

21

5BI

25

7BO1

20

6BI

24

7BO2

23

8BO

9

9BI

12

10AI1

13

10AI2

7

11BI

14

GND

3

R1002

49.9/6/1

C672

C672 1U/6/Y/10V

1U/6/Y/10V

VCC 1AO 2AO 3AO 4AO

8AI

9AO 10BO1 10BO2

11BO

11A

GTL2006/TSSOP28

2

P3V3P_VTT

28 2 3 10 11

4

5A

5

6A

6 15 17 16 22 8

C678

C678 1U/6/Y/10V

1U/6/Y/10V

P3V3

R980

R980 220/6

220/6

CPU0_THERMTRIP# CPU1_THERMTRIP#

GTL_SMI# SB_CPU0_SMI# SB_CPU1_SMI#

CPU1_IERR# {76,77} CPU0_IERR# {76,77}

CPU0_PROCHOT# {76}

SB_CPU0_SMI# {8,9} SB_CPU1_SMI# {11,13} SB_CPU_NMI {8,9,11}

R994

R994 10K/6

10K/6

P3V3

U95

53

74LVC1G08

4

1 2

CPU1_FORCEPR# {70,76} CPU0_FORCEPR# {69,76}

1

SB_CPU0_THERMTRIP#{8,9}

SB_CPU1_THERMTRIP#{9,11}

C C

B B

12

R977

R970

1K/6

BMC_BSP_TRI#{77}

BMC_AP_TRI#{77}

GTL_SMI#

P3V3

12

R969

CPU Reduction Circuit

A A

MMBT2222A/SOT23

R1000

SB_CPURST#{8,9,11,13,18}

5

1 2

10K/6

P3V3

12

R983

R983 1K/6

1K/6

Q85

12

C670

SOT23

0.1U/6/X/16V

ECB

R969 1K/6

1K/6

DS

Q83

2N7002

G

2N7002

4

P3V3P3V3

U97

16

VCC

2

1A

1Y

3

1B

5

2A

2Y

6

2B

11

3A

3Y

10

3B

14

4A

4Y

13

4B

1

A/B

15

G

8

GND

74LCX157/TSSOP16

12

C663

0.1U/6/X/16V

4 7 9 12

74LVC07

P3V3

U98

53

2 4

P3V3

U94

53

2 4

12

C677

0.1U/6/X/16V

74LVC07

12

C660

0.1U/6/X/16V

SB_CPU0_SMI#

SB_CPU1_SMI#

3

CPU0_THERMTRIP#

CPU1_THERMTRIP#

PS_PWR_GD#{62,65}

P3V3

12

R479

4.7K/6/X

D33 RB751V-40D33 RB751V-40

D34 RB751V-40D34 RB751V-40

12

R425

4.7K/6/X

12

U55

U55 SN74LVC2G32-2.5/DCT/IC8MSOP

SN74LVC2G32-2.5/DCT/IC8MSOP

P3V3_STBY

1 2 3

8

1A

VCC

7

1B

1Y

6

2Y

2B

5

GND42A

D14 RB751V-40D14 RB751V-40

D15 RB751V-40D15 RB751V-40

2

12

CPU_THERMTRIP# {37}

P3V3

12

R450

R433

4.7K/6/X

Title

Size Document Number Rev

Date: Sheet

12

R441

R462

4.7K/6

IPMI_CPU0_THRMTRIP# {77}

IPMI_CPU1_THRMTRIP# {77}

LM93_CPU0_THRMTRIP# {76}

LM93_CPU1_THRMTRIP# {76}

GIGA-BYTE TECHNOLOGY CO., LTD.

LEVEL/THERMAL/BREQ

GA-9ILDTH

1

of

14 79Monday, November 21, 2005

1.1

5

DDRA_MA[13..0]{24,25,26,27,32}

D D

DDRA_CB[7..0]{24,25,26,27}

C C

MOW 40 4 DIMM 2/4 CHANGE

DDRA_CMDCLK0_P{24,32} DDRA_CMDCLK0_N{24,32} DDRA_CMDCLK3_P{27,32} DDRA_CMDCLK3_N{27,32} DDRA_CMDCLK2_P{26,32}

PLACE DDR VREF VOLTAGE DIVIDER NEAR CHANNEL A DIMMS

P1V8

R354

R354 75/6/1

75/6/1

B B

R357

R357 75/6/1

75/6/1

PLACE CLOSE TO DIMM < 0.5

A A

C310

C310 1U/6/Y/10V

1U/6/Y/10V

5

PLACE CLOSE TO MCH < 0.5

C319

0.1U/6/X/16V

DDRA_DQS[8..0]{24,25,26,27}

DDRA_DQS#[8..0]{24,25,26,27}

DDRA_CMDCLK2_N{26,32} DDRA_CMDCLK1_P{25,32} DDRA_CMDCLK1_N{25,32}

DDRA_CS#[7..0]{24,25,26,27,32}

DDRA_MCH_VREF_R

4

U54A

DDRA_MA0 DDRA_MA1 DDRA_MA2 DDRA_MA3 DDRA_MA4 DDRA_MA5 DDRA_MA6 DDRA_MA7 DDRA_MA8 DDRA_MA9 DDRA_MA10 DDRA_MA11 DDRA_MA12 DDRA_MA13

DDRA_CB0 DDRA_CB1 DDRA_CB2 DDRA_CB3 DDRA_CB4 DDRA_CB5 DDRA_CB6 DDRA_CB7

MEM_CKE0{24,27,32} MEM_CKE1{28,31,32} MEM_CKE2{25,26,32} MEM_CKE3{29,30,32}

DDRA_CAS#{24,25,26,27,32} DDRA_RAS#{24,25,26,27,32} DDRA_WE#{24,25,26,27,32}

DDRA_BA[2..0]{24,25,26,27,32}

4

MEM_CKE0 MEM_CKE1 MEM_CKE2 MEM_CKE3

DDRA_CMDCLK0_P DDRA_CMDCLK0_N DDRA_CMDCLK3_P DDRA_CMDCLK3_N DDRA_CMDCLK2_P DDRA_CMDCLK2_N DDRA_CMDCLK1_P DDRA_CMDCLK1_N

DDRA_CS#0 DDRA_CS#1 DDRA_CS#2 DDRA_CS#3 DDRA_CS#4 DDRA_CS#5 DDRA_CS#6 DDRA_CS#7

DDRA_CAS# DDRA_RAS# DDRA_WE#

DDRA_DQS0

DDRA_DQS#0

DDRA_DQS1

DDRA_DQS#1

DDRA_DQS2

DDRA_DQS#2

DDRA_DQS3

DDRA_DQS#3

DDRA_DQS4

DDRA_DQS#4

DDRA_DQS5

DDRA_DQS#5

DDRA_DQS6

DDRA_DQS#6

DDRA_DQS7

DDRA_DQS#7

DDRA_DQS8

DDRA_DQS#8

DDRA_BA0 DDRA_BA1 DDRA_BA2

AH5

DDR_A_MA0

AD14

DDR_A_MA1

AL14

DDR_A_MA2

AK15

DDR_A_MA3

AJ16

DDR_A_MA4

AH17

DDR_A_MA5

AF18

DDR_A_MA6

AN20

DDR_A_MA7

AK20

DDR_A_MA8

AJ22

DDR_A_MA9

AE4

DDR_A_MA10

AF22

DDR_A_MA11

AG23

DDR_A_MA12

U6

DDR_A_MA13

AJ9

DDR_A_CB0

AG11

DDR_A_CB1

AE11

DDR_A_CB2

AD11

DDR_A_CB3

AJ10

DDR_A_CB4

AH10

DDR_A_CB5

AF10

DDR_A_CB6

AE10

DDR_A_CB7

AE26

DDR_CKE0

AN26

DDR_CKE1

AL26

DDR_CKE2

AK26

DDR_CKE3

AF13

DDR_A_CMDCLK_P0

AF12

DDR_A_CMDCLK_N0

AH11

DDR_A_CMDCLK_P1

AJ12

DDR_A_CMDCLK_N1

AH13

DDR_A_CMDCLK_P2

AG12

DDR_A_CMDCLK_N2

AC10

DDR_A_CMDCLK_P3

AD9

DDR_A_CMDCLK_N3

W2

DDR_A_#CS0

V3

DDR_A_#CS1

T8

DDR_A_#CS2

T10

DDR_A_#CS3

N5

DDR_A_#CS4

M5

DDR_A_#CS5

M3

DDR_A_#CS6

L4

DDR_A_#CS7

AM3

DDR_A_VREF

W8

DDR_A_CAS#

AA6

DDR_A_RAS#

Y10

DDE_A_WE#

AB5

DDR_A_BA0

AF6

DDR_A_BA1

AE25

DDR_A_BA2

AJ30

DDR_A_DQS_P0

AJ31

DDR_A_DQS_N0

AJ24

DDR_A_DQS_P1

AJ25

DDR_A_DQS_N1

AH19

DDR_A_DQS_P2

AH20

DDR_A_DQS_N2

AG14

DDR_A_DQS_P3

AG15

DDR_A_DQS_N3

AC6

DDR_A_DQS_P4

AD6

DDR_A_DQS_N4

W7

DDR_A_DQS_P5

V8

DDR_A_DQS_N5

N7

DDR_A_DQS_P6

P7

DDR_A_DQS_N6

G4

DDR_A_DQS_P7

H4

DDR_A_DQS_N7

AF9

DDR_A_DQS_P8

AG9

DDR_A_DQS_N8

3

DDR_A_DQ0 DDR_A_DQ1 DDR_A_DQ2 DDR_A_DQ3 DDR_A_DQ4 DDR_A_DQ5 DDR_A_DQ6 DDR_A_DQ7 DDR_A_DQ8

DDR_A_DQ9 DDR_A_DQ10 DDR_A_DQ11 DDR_A_DQ12 DDR_A_DQ13 DDR_A_DQ14 DDR_A_DQ15 DDR_A_DQ16 DDR_A_DQ17 DDR_A_DQ18 DDR_A_DQ19 DDR_A_DQ20 DDR_A_DQ21 DDR_A_DQ22 DDR_A_DQ23 DDR_A_DQ24 DDR_A_DQ25 DDR_A_DQ26 DDR_A_DQ27

DDR GROUP A

Lindenhurst

3

DDR_A_DQ28 DDR_A_DQ29 DDR_A_DQ30 DDR_A_DQ31 DDR_A_DQ32 DDR_A_DQ33 DDR_A_DQ34 DDR_A_DQ35 DDR_A_DQ36 DDR_A_DQ37 DDR_A_DQ38 DDR_A_DQ39 DDR_A_DQ40 DDR_A_DQ41 DDR_A_DQ42 DDR_A_DQ43 DDR_A_DQ44 DDR_A_DQ45 DDR_A_DQ46 DDR_A_DQ47 DDR_A_DQ48 DDR_A_DQ49 DDR_A_DQ50 DDR_A_DQ51 DDR_A_DQ52 DDR_A_DQ53 DDR_A_DQ54 DDR_A_DQ55 DDR_A_DQ56 DDR_A_DQ57 DDR_A_DQ58 DDR_A_DQ59 DDR_A_DQ60 DDR_A_DQ61 DDR_A_DQ62 DDR_A_DQ63

DDR_A_DQS_P9

DDR_A_DQS_N9 DDR_A_DQS_P10 DDR_A_DQS_N10 DDR_A_DQS_P11 DDR_A_DQS_N11 DDR_A_DQS_P12 DDR_A_DQS_N12 DDR_A_DQS_P13 DDR_A_DQS_N13 DDR_A_DQS_P14 DDR_A_DQS_N14 DDR_A_DQS_P15 DDR_A_DQS_N15 DDR_A_DQS_P16 DDR_A_DQS_N16 DDR_A_DQS_P17 DDR_A_DQS_N17

AK32 AH31 AH29 AF28 AJ33 AK33 AG30 AG29 AG27 AG26 AD24 AD23 AE28 AF27 AH25 AG24 AF21 AG21 AF19 AG18 AE22 AD21 AJ18 AG20 AF16 AF15 AE13 AD12 AE17 AJ15 AE16 AD17 AH4 AG5 AB8 AB7 AB10 AA9 AE5 AD5 U9 AA5 V6 U7 W10 U10 W5 V5 R6 R5 L7 L6 P9 T5 N8 M9 K5 J5 K8 K10 L9 L10 K7 H7

AL32 AL31 AF25 AF24 AE20 AE19 AH14 AJ13 AD8 AC7 Y7 Y6 P10 N10 J6 H6 AH8 AJ7

DDRA_DQ0 DDRA_DQ1 DDRA_DQ2 DDRA_DQ3 DDRA_DQ4 DDRA_DQ5 DDRA_DQ6 DDRA_DQ7 DDRA_DQ8 DDRA_DQ9 DDRA_DQ10 DDRA_DQ11 DDRA_DQ12 DDRA_DQ13 DDRA_DQ14 DDRA_DQ15 DDRA_DQ16 DDRA_DQ17 DDRA_DQ18 DDRA_DQ19 DDRA_DQ20 DDRA_DQ21 DDRA_DQ22 DDRA_DQ23 DDRA_DQ24 DDRA_DQ25 DDRA_DQ26 DDRA_DQ27 DDRA_DQ28 DDRA_DQ29 DDRA_DQ30 DDRA_DQ31 DDRA_DQ32 DDRA_DQ33 DDRA_DQ34 DDRA_DQ35 DDRA_DQ36 DDRA_DQ37 DDRA_DQ38 DDRA_DQ39 DDRA_DQ40 DDRA_DQ41 DDRA_DQ42 DDRA_DQ43 DDRA_DQ44 DDRA_DQ45 DDRA_DQ46 DDRA_DQ47 DDRA_DQ48 DDRA_DQ49 DDRA_DQ50 DDRA_DQ51 DDRA_DQ52 DDRA_DQ53 DDRA_DQ54 DDRA_DQ55 DDRA_DQ56 DDRA_DQ57 DDRA_DQ58 DDRA_DQ59 DDRA_DQ60 DDRA_DQ61 DDRA_DQ62 DDRA_DQ63

DDRA_DQS9

DDRA_DQS#9

DDRA_DQS10

DDRA_DQS#10

DDRA_DQS11

DDRA_DQS#11

DDRA_DQS12

DDRA_DQS#12

DDRA_DQS13

DDRA_DQS#13

DDRA_DQS14

DDRA_DQS#14

DDRA_DQS15

DDRA_DQS#15

DDRA_DQS16

DDRA_DQS#16

DDRA_DQS17

DDRA_DQS#17

2

DDRA_DQ[63..0] {24,25,26,27}

1

A1 A2 A3 A4

MCH

B1 B2 B3

A1 A2 A3 A4

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

A2A1A0 A2A1A0

0XA0(000) 0XA2(001) 0XA4(010) 0XA6(011)

DDRA_DQS#[17..9] {24,25,26,27}

DDRA_DQS[17..9] {24,25,26,27}

GIGA-BYTE TECHNOLOGY CO., LTD.

MCH_MR DDR II CHA

0XA8(100)

B1

0XAA(101)

B2

0XAC(110)

B3

0XAE(111)

B4

GA-9ILDTH

B4

1.1

15 79Monday, November 21, 2005

of

1

of

1.1

5

D D

DDRB_CB[7..0]{28,29,30,31}

C C

PLACE DDR VREF VOLTAGE DIVIDER NEAR CHANNEL B DIMMS

P1V8

R353

R353 75/6/1

75/6/1

B B

A A

R356

R356 75/6/1

75/6/1

PLACE CLOSE TO DIMM< 0.5

C309

C309 1U/6/Y/10V

1U/6/Y/10V

5

MOW 40 4 DIMM 1/4 CHANGE

DDRB_CS#[7..0]{28,29,30,31,32}

DDRB_MCH_VREF_R

C318

0.1U/6/X/16V

DDRB_DQS[8..0]{28,29,30,31}

DDRB_DQS#[8..0]{28,29,30,31}

DDRB_CMDCLK3_P{31,32} DDRB_CMDCLK3_N{31,32} DDRB_CMDCLK1_P{29,32} DDRB_CMDCLK1_N{29,32} DDRB_CMDCLK2_P{30,32} DDRB_CMDCLK2_N{30,32} DDRB_CMDCLK0_P{28,32} DDRB_CMDCLK0_N{28,32}

4

U54B

DDRB_MA[13..0]{28,29,30,31,32}

MEM_CKE4{26,32} MEM_CKE5{30,32} MEM_CKE6{27,32} MEM_CKE7{31,32}

DDRB_CAS#{28,29,30,31,32} DDRB_RAS#{28,29,30,31,32} DDRB_WE#{28,29,30,31,32}

DDRB_BA[2..0]{28,29,30,31,32}

DDRB_DQS0 DDRB_DQS1 DDRB_DQS2 DDRB_DQS3 DDRB_DQS4 DDRB_DQS5 DDRB_DQS6 DDRB_DQS7 DDRB_DQS8

4

DDRB_MA0 DDRB_MA1 DDRB_MA2 DDRB_MA3 DDRB_MA4 DDRB_MA5 DDRB_MA6 DDRB_MA7 DDRB_MA8 DDRB_MA9 DDRB_MA10 DDRB_MA11 DDRB_MA12 DDRB_MA13

DDRB_CB0 DDRB_CB1 DDRB_CB2 DDRB_CB3 DDRB_CB4 DDRB_CB5 DDRB_CB6 DDRB_CB7

MEM_CKE4 MEM_CKE5 MEM_CKE6 MEM_CKE7

DDRB_CMDCLK3_P DDRB_CMDCLK3_N DDRB_CMDCLK1_P DDRB_CMDCLK1_N DDRB_CMDCLK2_P DDRB_CMDCLK2_N DDRB_CMDCLK0_P DDRB_CMDCLK0_N

DDRB_CS#0 DDRB_CS#1 DDRB_CS#2 DDRB_CS#3 DDRB_CS#4 DDRB_CS#5 DDRB_CS#6 DDRB_CS#7

DDRB_CAS# DDRB_RAS# DDRB_WE#

DDRB_BA0 DDRB_BA1 DDRB_BA2

DDRB_DQS#0 DDRB_DQS#9 DDRB_DQS#1 DDRB_DQS#2 DDRB_DQS#3 DDRB_DQS#4 DDRB_DQS#5 DDRB_DQS#6 DDRB_DQS#7 DDRB_DQS#8

AF7

DDR_B_MA0

AE14

DDR_B_MA1

AN14

DDR_B_MA2

AK14

DDR_B_MA3

AD15

DDR_B_MA4

AH16

DDR_B_MA5

AG17

DDR_B_MA6

AD18

DDR_B_MA7

AL20

DDR_B_MA8

AJ21

DDR_B_MA9

AC4

DDR_B_MA10

AH22

DDR_B_MA11

AH23

DDR_B_MA12

U4

DDR_B_MA13

AM7

DDR_B_CB0

AL7

DDR_B_CB1

AM4

DDR_B_CB2

AL4

DDR_B_CB3

AN8

DDR_B_CB4

AK8

DDR_B_CB5

AN5

DDR_B_CB6

AL5

DDR_B_CB7

AH26

DDR_CKE4

AJ27

DDR_CKE5

AJ28

DDR_CKE6

AH28

DDR_CKE7

AH7

DDR_B_CMDCLK_P0

AJ6

DDR_B_CMDCLK_N0

AH6

DDR_B_CMDCLK_P1

AG6

DDR_B_CMDCLK_N1

AG8

DDR_B_CMDCLK_P2

AE8

DDR_B_CMDCLK_N2

AK9

DDR_B_CMDCLK_P3

AL8

DDR_B_CMDCLK_N3

V9

DDR_B_#CS0

V2

DDR_B_#CS1

T7

DDR_B_#CS2

P6

DDR_B_#CS3

N4

DDR_B_#CS4

M2

DDR_B_#CS5

M6

DDR_B_#CS6

L3

DDR_B_#CS7

AN4

DDR_B_VREF

W1

DDR_B_CAS#

Y9

DDR_B_RAS#

W4

DDE_B_WE#

AA8

DDR_B_BA0

AE7

DDR_B_BA1

AM25

DDR_B_BA2

AM28

DDR_B_DQS_P0

AN29

DDR_B_DQS_N0

AM22

DDR_B_DQS_P1

AN23

DDR_B_DQS_N1

AK17

DDR_B_DQS_P2

AL17

DDR_B_DQS_N2

AK11

DDR_B_DQS_P3

AL11

DDR_B_DQS_N3

AG2

DDR_B_DQS_P4

AH2

DDR_B_DQS_N4

AA3

DDR_B_DQS_P5

AB4

DDR_B_DQS_N5

P1

DDR_B_DQS_P6

R2

DDR_B_DQS_N6

H3

DDR_B_DQS_P7

H1

DDR_B_DQS_N7

AK5

DDR_B_DQS_P8

AK6

DDR_B_DQS_N8

Lindenhurst

3

DDR GROUP B

DDR_B_DQS_P9

DDR_B_DQS_N9 DDR_B_DQS_P10 DDR_B_DQS_N10 DDR_B_DQS_P11 DDR_B_DQS_N11 DDR_B_DQS_P12 DDR_B_DQS_N12 DDR_B_DQS_P13 DDR_B_DQS_N13 DDR_B_DQS_P14 DDR_B_DQS_N14 DDR_B_DQS_P15 DDR_B_DQS_N15 DDR_B_DQS_P16 DDR_B_DQS_N16 DDR_B_DQS_P17 DDR_B_DQS_N17

3

DDR_B_DQ0 DDR_B_DQ1 DDR_B_DQ2 DDR_B_DQ3 DDR_B_DQ4 DDR_B_DQ5 DDR_B_DQ6 DDR_B_DQ7 DDR_B_DQ8

DDR_B_DQ9 DDR_B_DQ10 DDR_B_DQ11 DDR_B_DQ12 DDR_B_DQ13 DDR_B_DQ14 DDR_B_DQ15 DDR_B_DQ16 DDR_B_DQ17 DDR_B_DQ18 DDR_B_DQ19 DDR_B_DQ20 DDR_B_DQ21 DDR_B_DQ22 DDR_B_DQ23 DDR_B_DQ24 DDR_B_DQ25 DDR_B_DQ26 DDR_B_DQ27 DDR_B_DQ28 DDR_B_DQ29 DDR_B_DQ30 DDR_B_DQ31 DDR_B_DQ32 DDR_B_DQ33 DDR_B_DQ34 DDR_B_DQ35 DDR_B_DQ36 DDR_B_DQ37 DDR_B_DQ38 DDR_B_DQ39 DDR_B_DQ40 DDR_B_DQ41 DDR_B_DQ42 DDR_B_DQ43 DDR_B_DQ44 DDR_B_DQ45 DDR_B_DQ46 DDR_B_DQ47 DDR_B_DQ48 DDR_B_DQ49 DDR_B_DQ50 DDR_B_DQ51 DDR_B_DQ52 DDR_B_DQ53 DDR_B_DQ54 DDR_B_DQ55 DDR_B_DQ56 DDR_B_DQ57 DDR_B_DQ58 DDR_B_DQ59 DDR_B_DQ60 DDR_B_DQ61 DDR_B_DQ62 DDR_B_DQ63

AM30 AN30 AN27 AM27 AK30 AM31 AL28 AK27 AM24 AN24 AN21 AM21 AL25 AK24 AL22 AK21 AK18 AM18 AN15 AM15 AL19 AM19 AM16 AL16 AK12 AM12 AN9 AM9 AL13 AM13 AM10 AL10 AJ3 AJ4 AF1 AF4 AK3 AK2 AG3 AF3 AC3 AC1 Y3 Y4 AD2 AD3 AA2 Y1 T4 T1 N1 N2 U3 U1 P3 P4 K2 K1 F2 E1 L1 K4 G1 G2

AK29 AL29 AK23 AL23 AN18 AN17 AN12 AN11 AJ1 AH1 AB2 AB1 T2 R3 J3 J2 AM6 AN6

DDRB_DQ0 DDRB_DQ1 DDRB_DQ2 DDRB_DQ3 DDRB_DQ4 DDRB_DQ5 DDRB_DQ6 DDRB_DQ7 DDRB_DQ8 DDRB_DQ9 DDRB_DQ10 DDRB_DQ11 DDRB_DQ12 DDRB_DQ13 DDRB_DQ14 DDRB_DQ15 DDRB_DQ16 DDRB_DQ17 DDRB_DQ18 DDRB_DQ19 DDRB_DQ20 DDRB_DQ21 DDRB_DQ22 DDRB_DQ23 DDRB_DQ24 DDRB_DQ25 DDRB_DQ26 DDRB_DQ27 DDRB_DQ28 DDRB_DQ29 DDRB_DQ30 DDRB_DQ31 DDRB_DQ32 DDRB_DQ33 DDRB_DQ34 DDRB_DQ35 DDRB_DQ36 DDRB_DQ37 DDRB_DQ38 DDRB_DQ39 DDRB_DQ40 DDRB_DQ41 DDRB_DQ42 DDRB_DQ43 DDRB_DQ44 DDRB_DQ45 DDRB_DQ46 DDRB_DQ47 DDRB_DQ48 DDRB_DQ49 DDRB_DQ50 DDRB_DQ51 DDRB_DQ52 DDRB_DQ53 DDRB_DQ54 DDRB_DQ55 DDRB_DQ56 DDRB_DQ57 DDRB_DQ58 DDRB_DQ59 DDRB_DQ60 DDRB_DQ61 DDRB_DQ62 DDRB_DQ63

DDRB_DQS9 DDRB_DQS10

DDRB_DQS#10

DDRB_DQS11

DDRB_DQS#11

DDRB_DQS12

DDRB_DQS#12

DDRB_DQS13

DDRB_DQS#13

DDRB_DQS14

DDRB_DQS#14

DDRB_DQS15

DDRB_DQS#15

DDRB_DQS16

DDRB_DQS#16

DDRB_DQS17

DDRB_DQS#17

2

DDRB_DQ[63..0] {28,29,30,31}

DDRB_DQS#[17..9] {28,29,30,31} DDRB_DQS[17..9] {28,29,30,31}

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

GIGA-BYTE TECHNOLOGY CO., LTD.

MCH_MR DDR II CHB

GA-9ILDTH

1

1.1

16 79Monday, November 21, 2005

of

1

of

1.1

5

4

3

2

1

P3V3

D D

MCH_HI_VSWING

MCH_HI_VREF

C C

B B

P1V5

C394

C394 100P/6/X

100P/6/X

R414 40.2/6/1R414 40.2/6/1

P1V8

R558

43.2/6/1

R422

40.2/6/1

HIA_STRBS{36}

HIA_STRBF{36}

MCH_66MHZ_CLK{34}

SYS_PWR_GD_3_3V{34,37,40,62}

I2C_BUS2_SCL{13,23,49,73} I2C_BUS2_SDA{13,23,49,73}

C331

0.1U/6/X/16V

ITP_TMS_MCH{13} ITP_TDI_MCH{13} ITP_TDO_MCH{13}

ITP_TCK1{13}

ITP_TRST#{8,11,13}

TP44TP44 TP45TP45

C329

TP46TP46

0.1U/6/X/16V

TP43TP43 TP52TP52 TP54TP54 TP55TP55 TP57TP57 TP47TP47 TP53TP53 TP56TP56

C416

C416 10P/6/X

10P/6/X

HIA_STRBS HIA_STRBF

MCH_HI_RCOMP

SYS_PWR_GD_3_3V

I2C_BUS2_SCL I2C_BUS2_SDA

ITP_TMS_MCH ITP_TDI_MCH ITP_TDO_MCH ITP_TCK1 ITP_TRST#

PD_DDRRES1 PD_DDRRES2

TP_RESERVED2 TP_RESERVED3 TP_RESERVED4 TP_RESERVED5 TP_RESERVED6 TP_RESERVED7 TP_RESERVED8 TP_RESERVED9 TP_RESERVED10 TP_RESERVED11 TP_RESERVED12

E31 D32

H31

L24

K25

F32

AE2

AE1 AF30 AE23 AD20

AJ19

R10

AA24

R32

L33

G5 G6

M8

E3

C3 D4

F3

D2

J9

R9 R8

U54E

HI_STBS HI_STBF

HISWING HICLK HIRCOMP HIVREF

PWRGOOD

SMBCLK SMBDATA

TMS TDI TDO TCK TRST#

DDR_RES1 DDR_RES2 RESERVED2 RESERVED3 RESERVED4 RESERVED5 RESERVED6 RESERVED7 RESERVED8 RESERVED9 RESERVED10 RESERVED11 RESERVED12

Lindenhurst

C364

0.1U/6/X/16V

H33

V3REF

DDRSLWCRES

DDR_CRES0

DDR_IMPCRES

PLLSEL1# PLLSEL0#

HI0 HI1 HI2 HI3 HI4 HI5 HI6 HI7 HI8

HI9 HI10 HI11

DEBUG0 DEBUG1 DEBUG2 DEBUG3 DEBUG4 DEBUG5 DEBUG6 DEBUG7

TDIOCATHODE

TDIOANODE

HI 1.5 & Miscellaneous

MCH_DDRSLWCRES

AK1

MCH_DDRCRES0

AC9

MCH_DDRIMPCRES

AL2

MCH_PLLSEL1#MCH_66MHZ_CLK

A29

MCH_PLLSEL0#

C31 J30

H30 C32 G31 G29 H28 K26 J27 F30 E33 J29 G32

ITP_MCH_DEBUG0

J8

ITP_MCH_DEBUG1

G7

ITP_MCH_DEBUG2

G8

ITP_MCH_DEBUG3

H9

ITP_MCH_DEBUG4

B2

ITP_MCH_DEBUG5

D3

ITP_MCH_DEBUG6

L11

ITP_MCH_DEBUG7

D1

F33 D33

HI_A0 HI_A1 HI_A2 HI_A3 HI_A4 HI_A5 HI_A6 HI_A7 HI_A8 HI_A9 HI_A10 HI_A11

MCH_TDC MCH_TDA

D13

12

1N5820/SMD

R381 1.13K/6/1R381 1.13K/6/1 R373 374/6/1R373 374/6/1

TP60TP60 TP59TP59

MCH_PLLSEL1# {37} MCH_PLLSEL0# {37} HI_A[11..0] {36}

ITP_MCH_DEBUG[7..0] {13}

NO USE

P1V5

R555

1K/6/X

MCH_PLLSEL0# MCH_PLLSEL1#

R559

R559 0/6

0/6

FSB Speed 533 MHz 667 MHz 800 MHz

Memory

DDRII 400

PLLSEL0# PLLSEL1#

LO LO

LODDRII 400

P1V5

R550

1K/6/X

R544

R544 0/6

0/6

HI HIDDRII 400

LO

P1V5 P1V5

R493

78.7/6/1

R489

43.2/6/1

20MILS 20MILS

354mV

MCH_VREF_DIV MCH_HI_VREF MCH_HI_VSWING

20MILS

A A

R494

24.3/6/1

5

C368

0.01U/6/X/50V

4

804mV

20MILS

R492

49.9/6/1

C367

0.01U/6/X/50V

3

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

GIGA-BYTE TECHNOLOGY CO., LTD.

MCH HI 1.5/MISC

GA-9ILDTH

17 79Monday, November 21, 2005

of

1

of

1.1

5

U54C

SB_ADS#{8,11} SB_AP#0{8,11} SB_AP#1{8,11}

SB_MCERR#{8,9,11} SB_BNR#{8,9,11} SB_BPRI#{8,11} SB_BREQ#0{8,9,11}

D D

C C

B B

A A

SB_BREQ#1{8,9,11} SB_CPURST#{8,9,11,13,14}

SB_DBSY#{8,11} SB_DEFER#{8,11} SB_DRDY#{8,11}

SB_DP#[3..0]{8,11}

SB_DBI#[3..0]{8,11}

SB_D#[63..0]{8,11}

SB_ADS# SB_AP#0 SB_AP#1

SB_MCERR# SB_BNR# SB_BPRI# SB_BREQ#0 SB_BREQ#1

SB_CPURST# SB_DBSY# SB_DEFER# SB_DRDY#

SB_DP#0 SB_DP#1 SB_DP#2 SB_DP#3

SB_DBI#0 SB_DBI#1 SB_DBI#2 SB_DBI#3

SB_D#0 SB_D#1 SB_D#2 SB_D#3 SB_D#4 SB_D#5 SB_D#6 SB_D#7 SB_D#8 SB_D#9 SB_D#10 SB_D#11 SB_D#12 SB_D#13 SB_D#14 SB_D#15 SB_D#16 SB_D#17 SB_D#18 SB_D#19 SB_D#20 SB_D#21 SB_D#22 SB_D#23 SB_D#24 SB_D#25 SB_D#26 SB_D#27 SB_D#28 SB_D#29 SB_D#30 SB_D#31 SB_D#32 SB_D#33 SB_D#34 SB_D#35 SB_D#36 SB_D#37 SB_D#38 SB_D#39 SB_D#40 SB_D#41 SB_D#42 SB_D#43 SB_D#44 SB_D#45 SB_D#46 SB_D#47 SB_D#48 SB_D#49 SB_D#50 SB_D#51 SB_D#52 SB_D#53 SB_D#54 SB_D#55 SB_D#56 SB_D#57 SB_D#58 SB_D#59 SB_D#60 SB_D#61 SB_D#62 SB_D#63

5

B27 G25 H25

H24 B31 A28 F24 D29

J24 H27 B28 B30

C29 E28 E25 F27

D16 E15

C18 B19 C14 A17 A19 B16 C17 B18 D17 A16 B13 A14 A13 D14 C12 B12 E18

J18 H18 F17 G17 K17 E16

J17

J14 F14 F15 G16 K16 H16 G14 K14 E12 C11 H13 F11 G13 D11

F12 G10

H10

J12 G11 K13 H12 B10 A10 A11

F9 A5

E9

D8 F8

C9 B9 C8 B6 B7 E7 B4 A4 B3 D5 C6 D7 C5

U54C

ADS# AP#0 AP#1

MCERR# BNR# BPRI# BREQ#0 BREQ#1

CPURST# DBSY# DEFER# DRDY#

DP#0 DP#1 DP#2 DP#3

DBI#0 DBI#1 DBI#2 DBI#3

HD#0 HD#1 HD#2 HD#3 HD#4 HD#5 HD#6 HD#7 HD#8 HD#9 HD#10 HD#11 HD#12 HD#13 HD#14 HD#15 HD#16 HD#17 HD#18 HD#19 HD#20 HD#21 HD#22 HD#23 HD#24 HD#25 HD#26 HD#27 HD#28 HD#29 HD#30 HD#31 HD#32 HD#33 HD#34 HD#35 HD#36 HD#37 HD#38 HD#39 HD#40 HD#41 HD#42 HD#43 HD#44 HD#45 HD#46 HD#47 HD#48 HD#49 HD#50 HD#51 HD#52 HD#53 HD#54 HD#55 HD#56 HD#57 HD#58 HD#59 HD#60 HD#61 HD#62 HD#63

Lindenhurst

4

SB_DSTBP#0

HIT#

HITM# HLOCK# HTRDY#

HREQ#0 HREQ#1 HREQ#2

HREQ#3

HREQ#4

TESTIN#

RSTIN#

HCRES0

HDVREF0 HDVREF1

HACVREF

HA#3 HA#4 HA#5 HA#6 HA#7 HA#8

HA#9 HA#10 HA#11 HA#12 HA#13 HA#14 HA#15 HA#16 HA#17 HA#18 HA#19 HA#20 HA#21 HA#22 HA#23 HA#24 HA#25 HA#26 HA#27 HA#28 HA#29 HA#30 HA#31 HA#32 HA#33 HA#34 HA#35

HCLKINN HCLKINP

RS#0

RS#1

RS#2

RSP#

BINIT#

PME# GPE#

C15 B15 J15 H15 E10 D10 A7 A8

E30 D28 C30 A30

K20 J21 J23 H22 K23

L12 C2

C27 E27 F26

D13 E13

F23

K22 J20 G23 G22 H21 K19 H19 G19 E22 E21 F18 E19 F21 F20 D26 C26 A26 D22 B22 A25 B25 D25 C24 A22 B21 D23 A23 B24 A20 D19 C20 C21 D20

J11 K11

G20 C23

F29 D31 G28 J26

G26

M24 L25

SB_DSTBN#0 SB_DSTBP#1 SB_DSTBN#1 SB_DSTBP#2 SB_DSTBN#2 SB_DSTBP#3 SB_DSTBN#3

SB_HIT# SB_HITM# SB_LOCK# SB_TRDY#

SB_REQ#0 SB_REQ#1 SB_REQ#2 SB_REQ#3 SB_REQ#4

MCH_TESTIN# PCIRST#

SB_ODTCRES_MCH SB_SLWCRES_MCH

SB_HA#3 SB_HA#4 SB_HA#5 SB_HA#6 SB_HA#7 SB_HA#8 SB_HA#9 SB_HA#10 SB_HA#11 SB_HA#12 SB_HA#13 SB_HA#14 SB_HA#15 SB_HA#16 SB_HA#17 SB_HA#18 SB_HA#19 SB_HA#20 SB_HA#21 SB_HA#22 SB_HA#23 SB_HA#24 SB_HA#25 SB_HA#26 SB_HA#27 SB_HA#28 SB_HA#29 SB_HA#30 SB_HA#31 SB_HA#32 SB_HA#33 SB_HA#34 SB_HA#35

MCH_BCLK# MCH_BCLK

SB_ADSTB#0 SB_ADSTB#1

SB_RS#0 SB_RS#1 SB_RS#2 SB_RSP#

SB_BINIT#

MCH_PME# MCH_ACPI_GPE#

PCIRST# {37,40,44,45,48,52,53,55,62,73,77}

MCH_BCLK# {33} MCH_BCLK {33}

SB_BINIT# {8,9,11}

MCH_PME# {13,36}

HDSTBP#0 HDSTBN#0 HDSTBP#1 HDSTBN#1 HDSTBP#2 HDSTBN#2 HDSTBP#3 HDSTBN#3

HODTCRES HSLWCRES

System Bus Interface

HADSTB#0 HADSTB#1

4

3

SB_HIT# {8,9,11} SB_HITM# {8,9,11} SB_LOCK# {8,11} SB_TRDY# {8,11}

SB_REQ#[4..0] {8,11}

TP58TP58

SB_HA#[35..3] {8,11}

SB_ADSTB#[1..0] {8,11}

SB_RS#[2..0] {8,11}

SB_RSP# {8,11}

3

SB_DSTBP#[3..0] {8,11} SB_DSTBN#[3..0] {8,11}

R548

48.7/6/1

MCH_ACPI_GPE#

R549

R549 442/6/1

442/6/1

MCH_SB_VREF

P3V3

R488

8.2K/6

1 2

P3V3

SOT23

S G

2

SQ34

S

G

2N7002

2

1

P_VTT

R587

49.9/6/1

R554 0/6R554 0/6

774mV

C417

C400

C400 220P/6/X/50V

220P/6/X/50V

P3V3_STBY

SR240

8.2K/6

D

1 2

D

MCH_GPE# {37}

Title

Size Document Number Rev

Date: Sheet

C417

R569

1U/6/Y/10V

90.9/6/1

MCH_HSINK1

1

MCH_HSINK

GIGA-BYTE TECHNOLOGY CO., LTD.

MCH SYS BUS

MCH_HSINK1

GA-9ILDTH

2

of

18 79Monday, November 21, 2005

1

1.1

5

4

3

2

1

MCH_EXPCOMP EXPHPINTR#

CLOSE MCH

EXP_A_TXP_C[3..0] {22}

EXP_A_TXP_C[7..4] {22}

EXP_A_TXN_C[3..0] {22}

EXP_A_TXN_C[7..4] {22}

EXP_B_TXP_C0 {22}

EXP_B_TXP_C4 {22}

EXP_B_TXN_C0 {22}

EXP_B_TXN_C4 {22}

EXP_C_TXP_C[3..0] {22}

EXP_C_TXP_C[7..4] {22}

EXP_C_TXN_C[3..0] {22}

EXP_C_TXN_C[7..4] {22}

P1V5

R476

24.9/6/1

P3V3

R535

R535 1K/6

1K/6

MCH_VCCBGEXP MCH_VSSBGEXP

P3V3

R482

R482 100/6

100/6

2.5V 3% 600uA

U52

U52 LM431BCM3

LM431BCM3

A C

R

L6 4.7UH/80mA/8L6 4.7UH/80mA/8

R474

R474 0/6

0/6

12

C351

C351 10U/8/Y/10V

10U/8/Y/10V

DIFFERENTIAL PAIRS

EXPHPINTR# {49}

C355

0.1U/6/X/16V

R460 0/6R460 0/6

MCH_VCCBGEXP

MCH_VSSBGEXP

CLOSE PXH

U54D

M27

M26

AG33 AE32 AC30 AC31 AD29 AC25 AB26

AF33 AD32 AD30 AB31 AE29 AC24 AB25

AA30

AA29

R33 N28 L31 J33 R26 N25

K29

P33 N29 L30 J32 R27 N26

K28

Y25

Y24

Y28 Y30

V33 T32 R30 V27 V24

Y27 Y31

V32 T31 R29 V26 U24

R24 T23

U54D

EXP_A_RXP0 EXP_A_RXP1 EXP_A_RXP2 EXP_A_RXP3 EXP_A_RXP4 EXP_A_RXP5 EXP_A_RXP6 EXP_A_RXP7

EXP_A_RXN0 EXP_A_RXN1 EXP_A_RXN2 EXP_A_RXN3 EXP_A_RXN4 EXP_A_RXN5 EXP_A_RXN6 EXP_A_RXN7

EXP_B_RXP0 EXP_B_RXP1 EXP_B_RXP2 EXP_B_RXP3 EXP_B_RXP4 EXP_B_RXP5 EXP_B_RXP6 EXP_B_RXP7

EXP_B_RXN0 EXP_B_RXN1 EXP_B_RXN2 EXP_B_RXN3 EXP_B_RXN4 EXP_B_RXN5 EXP_B_RXN6 EXP_B_RXN7

EXP_C_RXP0 EXP_C_RXP1 EXP_C_RXP2 EXP_C_RXP3 EXP_C_RXP4 EXP_C_RXP5 EXP_C_RXP6 EXP_C_RXP7

EXP_C_RXN0 EXP_C_RXN1 EXP_C_RXN2 EXP_C_RXN3 EXP_C_RXN4 EXP_C_RXN5 EXP_C_RXN6 EXP_C_RXN7

EXP_CLKN EXP_CLKP

Lindenhurst

VCCBGEXP VSSBGEXP

P30 N31 M33 K32 P24 P27 M30 L28

P31 N32 M32 K31 P25 P28 M29 L27

AG32 AF31 AC33 AB32 AD27 AC27 AB29 AA27

AH32 AE31 AD33 AA32 AD26 AC28 AB28 AA26

W26 W28 Y33 W32 U31 V30 T29 T26

W25 W29 AA33 W31 U30 V29 T28 T25

U33 U25 E6 U27 U28

EXP_A_TXP0 EXP_A_TXP1 EXP_A_TXP2 EXP_A_TXP3 EXP_A_TXP4 EXP_A_TXP5 EXP_A_TXP6 EXP_A_TXP7

EXP_A_TXN0 EXP_A_TXN1 EXP_A_TXN2 EXP_A_TXN3 EXP_A_TXN4 EXP_A_TXN5 EXP_A_TXN6 EXP_A_TXN7

EXP_B_TXP0 EXP_B_TXP1 EXP_B_TXP2 EXP_B_TXP3

PCI Express

EXP_B_TXP4 EXP_B_TXP5 EXP_B_TXP6 EXP_B_TXP7

EXP_B_TXN0 EXP_B_TXN1 EXP_B_TXN2 EXP_B_TXN3 EXP_B_TXN4 EXP_B_TXN5 EXP_B_TXN6 EXP_B_TXN7

EXP_C_TXP0 EXP_C_TXP1 EXP_C_TXP2 EXP_C_TXP3 EXP_C_TXP4 EXP_C_TXP5 EXP_C_TXP6 EXP_C_TXP7

EXP_C_TXN0 EXP_C_TXN1 EXP_C_TXN2 EXP_C_TXN3 EXP_C_TXN4 EXP_C_TXN5 EXP_C_TXN6 EXP_C_TXN7

EXP_COMP0 EXP_COMP1

EXPHPINTR#

EXP_A_TXP_C0 EXP_A_TXP_C1 EXP_A_TXP_C2 EXP_A_TXP_C3 EXP_A_TXP_C4 EXP_A_TXP_C5 EXP_A_TXP_C6 EXP_A_TXP_C7

EXP_A_TXN_C0 EXP_A_TXN_C1 EXP_A_TXN_C2 EXP_A_TXN_C3 EXP_A_TXN_C4 EXP_A_TXN_C5 EXP_A_TXN_C6 EXP_A_TXN_C7

EXP_B_TXP_C0

EXP_B_TXP_C4

EXP_B_TXN_C0

EXP_B_TXN_C4

EXP_C_TXP_C0 EXP_C_TXP_C1 EXP_C_TXP_C2 EXP_C_TXP_C3 EXP_C_TXP_C4 EXP_C_TXP_C5 EXP_C_TXP_C6 EXP_C_TXP_C7

EXP_C_TXN_C0 EXP_C_TXN_C1 EXP_C_TXN_C2 EXP_C_TXN_C3 EXP_C_TXN_C4 EXP_C_TXN_C5 EXP_C_TXN_C6 EXP_C_TXN_C7

D D

EXP_A_RXP[3..0]{22}

EXP_A_RXP[7..4]{22}

PXH

EXP_A_RXN[3..0]{22}

EXP_A_RXN[7..4]{22}

EXP_B_RXP0{22}

EXP_B_RXP4{22}

EXP_A_RXP0 EXP_A_RXP1 EXP_A_RXP2 EXP_A_RXP3 EXP_A_RXP4 EXP_A_RXP5 EXP_A_RXP6 EXP_A_RXP7

EXP_A_RXN0 EXP_A_RXN1 EXP_A_RXN2 EXP_A_RXN3 EXP_A_RXN4 EXP_A_RXN5 EXP_A_RXN6 EXP_A_RXN7

EXP_B_RXP0

EXP_B_RXP4

5721A X1

C C

5721B X1

PCIE-SLOT X8

B B

EXP_B_RXN0{22}

EXP_B_RXN4{22}

EXP_C_RXP[7..0]{23}

EXP_C_RXN[7..0]{23}

MCH_SRC_100MHZ_CLK_N{35} MCH_SRC_100MHZ_CLK_P{35}

MCH_SRC_100MHZ_CLK_N MCH_SRC_100MHZ_CLK_P

EXP_B_RXN0

EXP_B_RXN4

EXP_C_RXP0 EXP_C_RXP1 EXP_C_RXP2 EXP_C_RXP3 EXP_C_RXP4 EXP_C_RXP5 EXP_C_RXP6 EXP_C_RXP7

EXP_C_RXN0 EXP_C_RXN1 EXP_C_RXN2 EXP_C_RXN3 EXP_C_RXN4 EXP_C_RXN5 EXP_C_RXN6 EXP_C_RXN7

5721A X1 5721B X1

SLOT 1 X8

PXH

PORT B

PORT C

PORT A

DDRII

FSB

HI

A A

Title

Size Document Number Rev

Date: Sheet

5

4

3

2

Date: Sheet

GIGA-BYTE TECHNOLOGY CO., LTD.

MCH PCI EXPRESS

GA-9ILDTH

1

of

19 79Monday, November 21, 2005

1.1

5

P1V8

D D

C C

P1V5

B B

A A

AN28 AN22 AN16 AN10

AN3 AL30 AL24 AL18 AL12

AL6 AJ26 AJ20 AJ14

AJ8

AH3 AG28 AG22 AG16 AG10

AF5 AE24 AE18 AE12

AD7

AD1 AC23 AC21 AC19 AC17 AC15 AC13 AC11

AB22 AB20 AB18 AB16 AB14 AB12

AB9

AB3

AA11

Y12

W11

V12

U11 T12

R11 P12

N11

AL1

AH33

AE33 AE30

AC29

AB33 AB27 AB24 AA23

Y29

Y22 W33 W27 W23

V22

U29

T33

T27

T24

T22

R23

P29

N33 M28

K33

K30

Y5

V7 V1

T9 T3

P5

M1

K3 H5 F1

M7

5

U54F

VCC_DDR0 VCC_DDR1 VCC_DDR2 VCC_DDR3 VCC_DDR4 VCC_DDR5 VCC_DDR6 VCC_DDR7 VCC_DDR8 VCC_DDR9 VCC_DDR10 VCC_DDR11 VCC_DDR12 VCC_DDR13 VCC_DDR14 VCC_DDR15 VCC_DDR16 VCC_DDR17 VCC_DDR18 VCC_DDR19 VCC_DDR20 VCC_DDR21 VCC_DDR22 VCC_DDR23 VCC_DDR24 VCC_DDR25 VCC_DDR26 VCC_DDR27 VCC_DDR28 VCC_DDR29 VCC_DDR30 VCC_DDR31 VCC_DDR32 VCC_DDR33 VCC_DDR34 VCC_DDR35 VCC_DDR36 VCC_DDR37 VCC_DDR38 VCC_DDR39 VCC_DDR40 VCC_DDR41 VCC_DDR42 VCC_DDR43 VCC_DDR44 VCC_DDR45 VCC_DDR46 VCC_DDR47 VCC_DDR48 VCC_DDR49 VCC_DDR50 VCC_DDR51 VCC_DDR52 VCC_DDR53 VCC_DDR54 VCC_DDR55 VCC_DDR56 VCC_DDR57 VCC_DDR58 VCC_DDR59 VCC_DDR60

VCC_EXP0 VCC_EXP1 VCC_EXP2 VCC_EXP3 VCC_EXP4 VCC_EXP5 VCC_EXP6 VCC_EXP7 VCC_EXP8 VCC_EXP9 VCC_EXP10 VCC_EXP11 VCC_EXP12 VCC_EXP13 VCC_EXP14 VCC_EXP15 VCC_EXP16 VCC_EXP17 VCC_EXP18 VCC_EXP19 VCC_EXP20 VCC_EXP21 VCC_EXP22 VCC_EXP23 VCC_EXP24

Lindenhurst

VCC_CORE0 VCC_CORE1 VCC_CORE2 VCC_CORE3 VCC_CORE4 VCC_CORE5 VCC_CORE6 VCC_CORE7 VCC_CORE8

VCC_CORE9 VCC_CORE10 VCC_CORE11 VCC_CORE12 VCC_CORE13 VCC_CORE14 VCC_CORE15 VCC_CORE16 VCC_CORE17 VCC_CORE18 VCC_CORE19 VCC_CORE20 VCC_CORE21 VCC_CORE22 VCC_CORE23 VCC_CORE24

POWER

VCC_CORE25 VCC_CORE26 VCC_CORE27 VCC_CORE28 VCC_CORE29 VCC_CORE30 VCC_CORE31 VCC_CORE32 VCC_CORE33 VCC_CORE34 VCC_CORE35 VCC_CORE36 VCC_CORE37 VCC_CORE38 VCC_CORE39 VCC_CORE40 VCC_CORE41 VCC_CORE42 VCC_CORE43 VCC_CORE44 VCC_CORE45 VCC_CORE46 VCC_CORE47 VCC_CORE48 VCC_CORE49

VCC_VTT0 VCC_VTT1 VCC_VTT2 VCC_VTT3 VCC_VTT4 VCC_VTT5 VCC_VTT6 VCC_VTT7 VCC_VTT8

VCC_VTT9 VCC_VTT10 VCC_VTT11 VCC_VTT12 VCC_VTT13 VCC_VTT14 VCC_VTT15 VCC_VTT16 VCC_VTT17 VCC_VTT18 VCC_VTT19 VCC_VTT20 VCC_VTT21 VCC_VTT22 VCC_VTT23 VCC_VTT24 VCC_VTT25 VCC_VTT26 VCC_VTT27 VCC_VTT28

VCCA_CORE0

VSSA_CORE1

VCCA_EXP0 VSSA_EXP1

VCCA_HI0

VSSA_HI1

VCCA_DDR

AA21 AA19 AA17 AA15 AA13 Y20 Y18 Y16 Y14 W21 W19 W17 W15 W13 V20 V18 V16 V14 U21 U19 U17 U15 T20 T18 T16 T14 R21 R19 R17 R15 R13 P18 P16 P14 N21 N19 N17 N15 N13 U13 C33 K9 M12 G33 H29 K27 L23 N23 P22 M22

A31 M20 M18 M16 M14 L21 L19 L17 L15 L13 J19 J16 J13 H26 H23 E23 E20 E17 E14 E11 E8 D30 D27 A18 A15 A12 A9 A6 A3

F6 F5 U23 V23 P20 P21 E4

P1V5

VCCA_SB VSSA_SB VCCA_EXP VSSA_EXP VCCA_HI VSSA_HI VCCA_DDR

P_VTT

4

Y13 Y11

Y8

Y2 W30 W24 W22 W20 W18 W16 W14 W12

W9 W6

W3 V31 V28 V25 V21 V19 V17 V15 V13 V11 V10

V4

U32

AB6 AA31 AA28 AA25 AA22 AA20 AA18 AA16 AA14 AA12 AA10

AA7 AB23 AB21 AB19 AB17 AB15 AB13 AN31 AN25 AN19 AN13

AN7

AM32 AM29 AM26 AM23 AM20 AM17 AM14 AM11

AM8

AM5

AM2 AL33 AL27 AL21 AL15

AL9

AL3 AK31 AK28 AK25 AK22 AK19 AK16 AG13

E24

VCCA_SB {21} VSSA_SB {21} VCCA_EXP {21} VSSA_EXP {21} VCCA_HI {21} VSSA_HI {21} VCCA_DDR {21}

4

U54G

VSS0 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74

Lindenhurst

3

GND

VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147

VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99

AF29 AF26 AF23 AF20 AF17 AF14 AF11 AF8 AF2 AE27 AE21 AE15 AE9 AE6 AE3 AD31 AD28 AD25 AD22 AD19 AD16 AD13 AD10 AD4 AC32 AC26 AC22 AC20 AC18 AC16 AC14 AC12 AC8 AC5 AC2 AB30 AK7 AK4 AJ32 AJ29 AJ17 AJ11 AJ5 AJ23 AJ2 AH30 AH27 AH24 AH21 AH18 AH15 AH12 AH9 AG31 AG25 AG19 AG1 AF32 AA4 AA1 Y32 Y26 Y23 Y21 Y19 Y17 Y15 AB11 AK10 AK13 U26 U22 U20

2

U54H

M13

VSS148

M11

VSS149

M10

VSS150

M4

VSS151

L32

VSS152

L29

VSS153

L26

VSS154

L22

VSS155

L20

VSS156

L18

VSS157

L16

VSS158

L14

VSS159

L8

VSS160

L5

VSS161

L2

VSS162

K24

VSS163

K21

VSS164

K18

VSS165

K15

VSS166

K12

VSS167

K6

VSS168

J31

VSS169

J28

VSS170

J25

VSS171

J22

VSS172

J10

VSS173

J7

VSS174

J4

VSS175

J1

VSS176

H32

VSS177

H20

VSS178

H17

VSS179

H14

VSS180

H11

VSS181

AG4

VSS182

AG7

VSS183

U18

VSS184

U16

VSS185

U14

VSS186

U12

VSS187

U8

VSS188

U5

VSS189

U2

VSS190

T30

VSS191

T21

VSS192

T19

VSS193

T17

VSS194

T15

VSS195

T11

VSS196

T13

VSS197

T6

VSS198

R31

VSS199

R28

VSS200

R25

VSS201

R22

VSS202

R20

VSS203

R18

VSS204

R16

VSS205

R14

VSS206

R12

VSS207

R7

VSS208

R4

VSS209

R1

VSS210

P32

VSS211

P26

VSS212

P23

VSS213

P19

VSS214

P17

VSS215

P15

VSS216

N22

VSS217

N20

VSS218

N18

VSS219

N16

VSS220

N14

VSS221

Lindenhurst

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

GND

F16

VSS222

F13

VSS223

F10

VSS224

F7

VSS225

F4

VSS226

H8

VSS227

H2

VSS228

G30

VSS229

G27

VSS230

G21

VSS231

G18

VSS232

G15

VSS233

G12

VSS234

G9

VSS235

G3

VSS236

F31

VSS237

F28

VSS238

G24

VSS239

F25

VSS240

F22

VSS241

F19

VSS242

N3

VSS243

M31

VSS244

M25

VSS245

M23

VSS246

M21

VSS247

M19

VSS248

M17

VSS249

M15

VSS250

N6

VSS251

E32

VSS252

E29

VSS253

E26

VSS254

E5

VSS255

E2

VSS256

D24

VSS257

D21

VSS258

D18

VSS259

D15

VSS260

D12

VSS261

D9

VSS262

D6

VSS263

B32

VSS264

C28

VSS265

C25

VSS266

C22

VSS267

C19

VSS268

C16

VSS269

C13

VSS270

C10

VSS271

C7

VSS272

C4

VSS273

C1

VSS274

B29

VSS275

B26

VSS276

B23

VSS277

B20

VSS278

B14

VSS279

B11

VSS280

B8

VSS281

B5

VSS282

A27

VSS283

A24

VSS284

A21

VSS285

P13

VSS286

P11

VSS287

P8

VSS288

P2

VSS289

N30

VSS290

N27

VSS291

N24

VSS292

N12

VSS293

N9

VSS294

B17

VSS295

GIGA-BYTE TECHNOLOGY CO., LTD.

MCH PWR/GND

GA-9ILDTH

1

1.1

of

20 79Monday, November 21, 2005

1

1.1

5

P1V5

SC220

SC310

0.1U/6/X/16V

SC265

0.1U/6/X/16V

SC279

0.01U/6/X/50V

SC287

0.1U/6/X/16V

SC247

0.1U/6/X/16V

SC262

0.1U/6/X/16V

SC271

0.01U/6/X/50V

SC253

0.1U/6/X/16V

C380

0.1U/6/X/16V

D D

C C

P1V5

0.1U/6/X/16V

SC263

0.1U/6/X/16V

SC289

0.1U/6/X/16V

SC268

0.1U/6/X/16V

C389

0.1U/6/X/16V

SC228

0.1U/6/X/16V

SC264

0.1U/6/X/16V

SC280

0.01U/6/X/50V

SC261

0.1U/6/X/16V

C391

0.1U/6/X/16V

SC272

SC239

SC310

SC238

0.1U/6/X/16V

SC243

0.1U/6/X/16V

SC240

0.01U/6/X/50V

C401

0.1U/6/X/16V

SC220

0.1U/6/X/16V

SC258

0.1U/6/X/16V

SC254

0.01U/6/X/50V

C363

0.01U/6/X/50V

SC252

0.1U/6/X/16V

SC266

0.1U/6/X/16V

SC275

0.01U/6/X/50V

C396

0.01U/6/X/50V

4

SC259

0.1U/6/X/16V

SC267

0.1U/6/X/16V

SC257

0.01U/6/X/50V

C403

0.1U/6/X/16V

SC256

0.1U/6/X/16V

SC270

0.01U/6/X/50V

SC248

0.01U/6/X/50V

C325

0.01U/6/X/50V

SC274

0.1U/6/X/16V

SC311

0.1U/6/X/16V

SC294

0.1U/6/X/16V

C404

0.01U/6/X/50V

SC255

0.1U/6/X/16V

SC312

0.1U/6/X/16V

SC323

0.01U/6/X/50V

3

VCCA_HI VCCA_EXP VCCA_DDR VCCA_SB PLACE COMPONENTS: GROUP ASSOCIATE COMPONENTS TOGHTER AND AS PHYSICALLY PIN AS POSSIBLE

MIN TRACE WIDTH: AS WIDE AS POSSIBLE >= 25 MILS

MIN TRACE SPACING: >= 10 MILS

MAX LENGTH >=1.2(BOARD+BREAKOUT)

ROUTE DIFFERENTIAL PAIRS

MCH VCCA

P1V5

2

R483

VCCA_HI_R_N VCCA_HI

1/6/1

3% 31.8mA

R444

1/6/1

3% 30.9mA

R589

1/6/1

3% 28.9mA

R588

VCCA_SB_R_N VCCA_SB

1/6/1

3% 28.9mA

L7 4.7UH/80mA/8L7 4.7UH/80mA/8

L5 4.7UH/80mA/8L5 4.7UH/80mA/8

12

C346

C346 10U/8/Y/10V

10U/8/Y/10V

L10 4.7UH/80mA/8L10 4.7UH/80mA/8

L9 4.7UH/80mA/8L9 4.7UH/80mA/8

12

C360

C360 10U/8/Y/10V

10U/8/Y/10V

12

C345

10U/8/Y/10V

12

C408

C408 10U/8/Y/10V

10U/8/Y/10V

12

C407

C407 10U/8/Y/10V

10U/8/Y/10V

C362

0.1U/6/X/16V

VSSA_HI

VCCA_EXPVCCA_EXP_R_N

C344

0.1U/6/X/16V

VSSA_EXP

VCCA_DDRVCCA_DDR_R_N

C413

0.1U/6/X/16V

VSSA_SB

C412

0.1U/6/X/16V

VSSA_SB

1

VCCA_HI {20}

VSSA_HI {20}

VCCA_EXP {20}

VSSA_EXP {20}

VCCA_DDR {20}

VSSA_SB {20}

VCCA_SB {20}

VSSA_SB {20}

SC282

C378

SC245

SC288

0.1U/6/X/16V

P1V8

0.1U/6/X/16V

SC198

0.1U/6/X/16V

C288

0.1U/6/X/16V

SC192

0.1U/6/X/16V

C289

0.1U/6/X/16V

5

SC214

0.1U/6/X/16V

SC221

0.1U/6/X/16V

B B

A A

0.1U/6/X/16V

SC245

0.01U/6/X/50V

C343

0.1U/6/X/16V

C341

0.1U/6/X/16V

C312

0.1U/6/X/16V

C657

0.1U/6/X/16V

C402

0.01U/6/X/50V

C313

0.1U/6/X/16V

C347

0.1U/6/X/16V

C383

0.1U/6/X/16V

C314

0.1U/6/X/16V

C350

0.1U/6/X/16V

C315

0.1U/6/X/16V

C357

0.1U/6/X/16V

4

C316

0.1U/6/X/16V

C358

0.1U/6/X/16V

C317

0.1U/6/X/16V

C361

0.1U/6/X/16V

12

+

EC19

EC19 82U/12/Y5U/6.3V

82U/12/Y5U/6.3V

12

+

EC17

EC17 82U/12/Y5U/6.3V

82U/12/Y5U/6.3V

12

+

EC18

EC18 82U/12/Y5U/6.3V

82U/12/Y5U/6.3V

12

+

EC20

EC20 82U/12/Y5U/6.3V

82U/12/Y5U/6.3V

P_VTT

12

C415

C410

C398

C399

22U/12/Y/10V

3

0.1U/6/X/16V

C399

1U/6/Y/10V

2

Title

Size Document Number Rev

Date: Sheet

GIGA-BYTE TECHNOLOGY CO., LTD.

MCH DECOUPING

GA-9ILDTH

21 79Monday, November 21, 2005

of

1

of

1.1

5

4

3

2

1

X8 PXH LINK

EXP_A_TXP_C4 EXP_A_TXP_C5 EXP_A_TXP_C6

EXP_A_TXP_C[3..0]{19} EXP_A_TXP[3..0] {40}

D D

C C

EXP_A_TXP_C7 EXP_A_TXP_C0 EXP_A_TXP_C1 EXP_A_TXP_C2 EXP_A_TXP_C3

EXP_A_TXN_C4 EXP_A_TXN_C5 EXP_A_TXN_C6 EXP_A_TXN_C7 EXP_A_TXN_C0 EXP_A_TXN_C1 EXP_A_TXN_C2 EXP_A_TXN_C3

SC314 0.1U/4/Y/16VSC314 0.1U/4/Y/16V SC284 0.1U/4/Y/16VSC284 0.1U/4/Y/16V SC342 0.1U/4/Y/16VSC342 0.1U/4/Y/16V SC364 0.1U/4/Y/16VSC364 0.1U/4/Y/16V SC299 0.1U/4/Y/16VSC299 0.1U/4/Y/16V SC292 0.1U/4/Y/16VSC292 0.1U/4/Y/16V SC291 0.1U/4/Y/16VSC291 0.1U/4/Y/16V SC317 0.1U/4/Y/16VSC317 0.1U/4/Y/16V

SC313 0.1U/4/Y/16VSC313 0.1U/4/Y/16V SC283 0.1U/4/Y/16VSC283 0.1U/4/Y/16V SC343 0.1U/4/Y/16VSC343 0.1U/4/Y/16V SC365 0.1U/4/Y/16VSC365 0.1U/4/Y/16V SC300 0.1U/4/Y/16VSC300 0.1U/4/Y/16V SC293 0.1U/4/Y/16VSC293 0.1U/4/Y/16V SC290 0.1U/4/Y/16VSC290 0.1U/4/Y/16V SC316 0.1U/4/Y/16VSC316 0.1U/4/Y/16V

EXP_A_TXP4 EXP_A_TXP5 EXP_A_TXP6 EXP_A_TXP7 EXP_A_TXP0 EXP_A_TXP1 EXP_A_TXP2 EXP_A_TXP3

EXP_A_TXN4 EXP_A_TXN5 EXP_A_TXN6 EXP_A_TXN7 EXP_A_TXN0 EXP_A_TXN1 EXP_A_TXN2 EXP_A_TXN3

EXP_A_TXP[7..4] {40}EXP_A_TXP_C[7..4]{19} EXP_A_RXP[7..4] {19}EXP_A_RXP_C[7..4]{40}

EXP_A_TXN[7..4] {40}EXP_A_TXN_C[7..4]{19}

EXP_A_TXN[3..0] {40}EXP_A_TXN_C[3..0]{19}

EXP_A_RXP_C4

CLOSE TO PXH

EXP_A_RXN_C[3..0]{40} EXP_A_RXN[3..0] {19}

CLOSE TO PXH

EXP_A_RXP_C6 EXP_A_RXP_C7

EXP_A_RXP_C0 EXP_A_RXP_C1 EXP_A_RXP_C2

EXP_A_RXN_C4

EXP_A_RXN_C6 EXP_A_RXN_C7 EXP_A_RXN7

EXP_A_RXN_C1 EXP_A_RXN_C2 EXP_A_RXN_C3

SC371 0.1U/4/Y/16VSC371 0.1U/4/Y/16V SC349 0.1U/4/Y/16VSC349 0.1U/4/Y/16V SC379 0.1U/4/Y/16VSC379 0.1U/4/Y/16V SC394 0.1U/4/Y/16VSC394 0.1U/4/Y/16V

SC360 0.1U/4/Y/16VSC360 0.1U/4/Y/16V SC352 0.1U/4/Y/16VSC352 0.1U/4/Y/16V SC353 0.1U/4/Y/16VSC353 0.1U/4/Y/16V SC355 0.1U/4/Y/16VSC355 0.1U/4/Y/16V

SC373 0.1U/4/Y/16VSC373 0.1U/4/Y/16V SC350 0.1U/4/Y/16VSC350 0.1U/4/Y/16V SC383 0.1U/4/Y/16VSC383 0.1U/4/Y/16V SC395 0.1U/4/Y/16VSC395 0.1U/4/Y/16V

SC368 0.1U/4/Y/16VSC368 0.1U/4/Y/16V SC351 0.1U/4/Y/16VSC351 0.1U/4/Y/16V SC354 0.1U/4/Y/16VSC354 0.1U/4/Y/16V SC356 0.1U/4/Y/16VSC356 0.1U/4/Y/16V

EXP_A_RXP4 EXP_A_RXP5EXP_A_RXP_C5 EXP_A_RXP6 EXP_A_RXP7

EXP_A_RXP0 EXP_A_RXP1 EXP_A_RXP2 EXP_A_RXP3EXP_A_RXP_C3

EXP_A_RXN4 EXP_A_RXN5EXP_A_RXN_C5 EXP_A_RXN6

EXP_A_RXN0EXP_A_RXN_C0 EXP_A_RXN1 EXP_A_RXN2 EXP_A_RXN3

EXP_A_RXP[3..0] {19}EXP_A_RXP_C[3..0]{40}

EXP_A_RXN[7..4] {19}EXP_A_RXN_C[7..4]{40}

X8 SLOT1 LINK

EXP_C_TXP_C0 EXP_C_TXP_C1 EXP_C_TXP_C2 EXP_C_TXP2 EXP_C_TXP_C3

EXP_C_TXP_C[7..4]{19} EXP_C_TXP[7..4] {23} EXP_C_TXN_C[7..4]{19} EXP_C_TXN[7..4] {23}

B B

EXP_C_TXP_C4 EXP_C_TXP_C5 EXP_C_TXP_C6 EXP_C_TXP_C7

SC203 0.1U/4/Y/16VSC203 0.1U/4/Y/16V SC202 0.1U/4/Y/16VSC202 0.1U/4/Y/16V SC200 0.1U/4/Y/16VSC200 0.1U/4/Y/16V SC242 0.1U/4/Y/16VSC242 0.1U/4/Y/16V

SC231 0.1U/4/Y/16VSC231 0.1U/4/Y/16V SC250 0.1U/4/Y/16VSC250 0.1U/4/Y/16V SC273 0.1U/4/Y/16VSC273 0.1U/4/Y/16V SC281 0.1U/4/Y/16VSC281 0.1U/4/Y/16V

EXP_C_TXP0 EXP_C_TXP1

EXP_C_TXP3

EXP_C_TXP4 EXP_C_TXP5 EXP_C_TXP6 EXP_C_TXP7

CLOSE TO BCM5721A

EXP_B_RXP_C0 EXP_B_RXN_C0

EXP_B_TXP_C0 EXP_B_TXP0

A A

EXP_B_TXN_C0{19} EXP_B_TXN0 {52}

SC690 0.1U/4/Y/16VSC690 0.1U/4/Y/16V SC691 0.1U/4/Y/16VSC691 0.1U/4/Y/16V

SC194 0.1U/4/Y/16VSC194 0.1U/4/Y/16V

SC195 0.1U/4/Y/16VSC195 0.1U/4/Y/16V

EXP_B_RXP0 EXP_B_RXN0

EXP_B_TXN0EXP_B_TXN_C0

EXP_C_TXP[3..0] {23}EXP_C_TXP_C[3..0]{19} EXP_C_TXN_C[3..0]{19} EXP_C_TXN[3..0] {23}

EXP_C_TXN_C0 EXP_C_TXN_C1 EXP_C_TXN1 EXP_C_TXN_C2 EXP_C_TXN_C3

EXP_C_TXN_C4 EXP_C_TXN_C5 EXP_C_TXN_C6

CLOSE TO BCM5721B

EXP_B_RXP0 {19}EXP_B_RXP_C0{52} EXP_B_RXN0 {19}EXP_B_RXN_C0{52}

EXP_B_TXP0 {52}EXP_B_TXP_C0{19}

X1 BCM5721 LINK

EXP_B_RXP_C4{53} EXP_B_RXN_C4{53}

X1 BCM5721A LINK

EXP_B_RXP_C4 EXP_B_RXN_C4

X8 SLOT1 LINK

SC204 0.1U/4/Y/16VSC204 0.1U/4/Y/16V SC201 0.1U/4/Y/16VSC201 0.1U/4/Y/16V SC199 0.1U/4/Y/16VSC199 0.1U/4/Y/16V SC246 0.1U/4/Y/16VSC246 0.1U/4/Y/16V

SC230 0.1U/4/Y/16VSC230 0.1U/4/Y/16V SC249 0.1U/4/Y/16VSC249 0.1U/4/Y/16V SC276 0.1U/4/Y/16VSC276 0.1U/4/Y/16V SC285 0.1U/4/Y/16VSC285 0.1U/4/Y/16V

SC107 0.1U/4/Y/16VSC107 0.1U/4/Y/16V SC114 0.1U/4/Y/16VSC114 0.1U/4/Y/16V

EXP_C_TXN0

EXP_C_TXN2 EXP_C_TXN3

EXP_C_TXN4 EXP_C_TXN5 EXP_C_TXN6 EXP_C_TXN7EXP_C_TXN_C7

EXP_B_RXP4 EXP_B_RXN4

EXP_B_RXP4 {19} EXP_B_RXN4 {19}

CLOSE TO MCH

5

EXP_B_TXP_C4

SC196 0.1U/4/Y/16VSC196 0.1U/4/Y/16V

SC197 0.1U/4/Y/16VSC197 0.1U/4/Y/16V

EXP_B_TXP4

EXP_B_TXN4EXP_B_TXN_C4

4

Title

EXP_B_TXP4 {53}EXP_B_TXP_C4{19}

EXP_B_TXN4 {53}EXP_B_TXN_C4{19}

X1 BCM5721B LINK

3

2

Title

Size Document Number Rev

Date: Sheet

GIGA-BYTE TECHNOLOGY CO., LTD.

MCH PCI EXPRESS SERIES CAPS

GA-9ILDTH

1

of

22 79Monday, November 21, 2005

1.1

5

S1_P12V

SC82

SC81

0.1U/6/Y/50V

D D

0.1U/6/Y/50V

SC45

0.1U/6/Y/50V

C126

0.1U/6/Y/50V

EC5

+

47U/16V/PTC

KEMET T520D476M016

4

3

EXP_S1_PWRGD

2

U126

2

RST_

1

GND

MIC809SU/X

VCC

3

S1_PWRGD {49}

1

S1_P3V3 S1_P3V3_STBY

SC108

SC115

SC115 1000P/6/X/50V

1000P/6/X/50V

C C

B B

A A

5

0.1U/6/X/16V

S1_PRSNT2#{36,49}

SC106

SC95

C183

+

0.1U/6/X/16V

+

47U/16V/PTC

KEMET T520D476M016

P3V3_STBY

S1_P3V3_STBY

SR47

SR51

5.1K/6/X

SR57 8.2K/6SR57 8.2K/6

R296 1K/6R296 1K/6

0.1U/6/X/16V

I2C_S1_SCL EXP_TCK I2C_S1_SDA EXP_TDI

P3V3_STBY

EXP_S1_WAKE#

EXP_C_TXP[7..0]{22}

EXP_C_TXN[7..0]{22}

P3V3

S1_P3V3

EXP_TRST#

EXP_C_TXP0 EXP_C_TXN0

EXP_C_TXP1 EXP_C_TXN1

EXP_C_TXP2 EXP_C_TXN2

EXP_C_TXP3 EXP_C_TXN3

EXP_C_TXP4 EXP_C_TXN4

EXP_C_TXP5 EXP_C_TXN5

EXP_C_TXP6 EXP_C_TXN6

EXP_C_TXP7 EXP_C_TXN7

S1_PRSNT2#

C250

0.1U/6/X/16V

SC142

SC142 1U/6/Y/10V

1U/6/Y/10V

S1_P12V

S1_P3V3

R197 4.7K/6R197 4.7K/6 R199 4.7K/6R199 4.7K/6

R194 4.7K/6R194 4.7K/6 R203 4.7K/6R203 4.7K/6

EXP_TDI EXP_TMS

EXP_TCK EXP_TRST#

PCI-E SLOT-1

PCI-E_1

PCI_EXP_8PORT

B1

12V_2

B2

12V_3

B3

RSVD3

B4

GND18

B5

SMCLK

B6

SMDATA

B7

GND19

B8

3.3V_2

B9

JTAG1

B10

3.3VAUX

B11

WAKE_N

B12

RSVD4

B13

GND20

B14

HOSP0+

B15

HOSP0-

B16

GND21

B17

PRSNT2_N

B18

GND22

B19

HOSP1+

B20

HOSP1-

B21

GND23

B22

GND24

B23

HOSP2+

B24

HOSP2-

B25

GND25

B26

GND26

B27

HOSP3+

B28

HOSP3-

B29

GND27

B30

RSVD5

B31

PRSNE2_N

B32

GND28

B33

HOSP4+

B34

HOSP4-

B35

GND29

B36

GND30

B37

HOSP5+

B38

HOSP5-

B39

GND31

B40

GND32

B41

HOSP6+

B42

HOSP6-

B43

GND33

B44

GND34

B45

HOSP7+

B46

HOSP7-

B47

GND35

B48

PRSNT2_N

B49

GND36

PCI EXPRESS 98PIN

4

PRSNT1_N

12V_0 12V_1

GND0 JTAG2 JTAG3 JTAG4 JTAG5

3.3V_0

3.3V_1

PWRGD

GND1

REFCLK+

REFCLK-

GND2

HSIP0+

HSIP0-

GND3

RSVD0

GND4

HSIP1+

HSIP1-

GND5

GND6

HSIP2+

HSIP2-

GND7

GND8

HSIP3+

HSIP3-

GND9

RSVD1

RSVD2 GND10

HISP4+

HISP4-

GND11 GND12

HISP5+

HISP5-

GND13 GND14

HISP6+

HISP6-

GND15 GND16

HISP7+

HISP7-

GND17

A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11

A12 A13 A14 A15 A16 A17 A18

A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32

A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49

S1_P3V3

S1_P12V

EXP_TDO EXP_TMS

EXP_S1_PWRGD

EXP_SLOT1_100MHZ_CLK_P EXP_SLOT1_100MHZ_CLK_N

EXP_C_RXP0 EXP_C_RXN0

EXP_C_RXP1 EXP_C_RXN1

EXP_C_RXP2 EXP_C_RXN2

EXP_C_RXP3 EXP_C_RXN3

EXP_C_RXP4 EXP_C_RXN4

EXP_C_RXP5 EXP_C_RXN5

EXP_C_RXP6 EXP_C_RXN6

EXP_C_RXP7 EXP_C_RXN7

3

EXP_SLOT1_100MHZ_CLK_P {35} EXP_SLOT1_100MHZ_CLK_N {35}

EXP_C_RXP[7..0] {19}

EXP_C_RXN[7..0] {19}

I2C_S1_SCL I2C_S1_SDA EXP_S1_WAKE#

EXP_S1_PWRGD

I2C_S1_SCL I2C_BUS2_SCL

EXP_S1_WAKE#

SR42 0/6/XSR42 0/6/X SR54 0/6/XSR54 0/6/X SR58 0/6/XSR58 0/6/X

S1_P3V3

R211 0.01/25/1R211 0.01/25/1

S1_P12V

R160 0.01/25/1R160 0.01/25/1

S1_P3V3_STBY P3V3_STBY

R226 0/6R226 0/6

R236 0/6R236 0/6

2

HP_S1_SCL HP_S1_SDA

HOT-PLUG ENABLE

R1155 0/8R1155 0/8

SR40 0/6SR40 0/6 SR55 0/6SR55 0/6

SR41 0/6SR41 0/6

I2C_BUS2_SDAI2C_S1_SDA

HOT-PLUG DISABLE

HP_S1_SCL {49} HP_S1_SDA {49}

S1_WAKE# {49}

P3V3

P12V

Modify in 1.0

PCIRST_BUFF#1 {62,63,74}

SYS_PWR_GD_BUFF {40,49,62}

I2C_BUS2_SCL {13,17,49,73} I2C_BUS2_SDA {13,17,49,73}

WAKE# {37,40,49,52,53}

Title

Size Document Number Rev

Date: Sheet

GIGA-BYTE TECHNOLOGY CO., LTD.

PCI E SLOT-1 X4 (HOT-PLUG)

GA-9ILDTH

1

23 79Monday, November 21, 2005

1.1

of

Gigabyte DR05C034_9ildth-00_1 Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual