Gigabyte CRU51-M2 Schematics Rev.1.3

TITLE

5

COVER SHEET
BLOCK DIAGRAM
RESET&CLK MAP
SPEC&CHANGE LIST

D D

PROCESSOR M2 940
DDR ADD/CTL/VTT TERMINATI
DDR 1&2

4

SHEET

3

2

1

1
2
3
4
5,6,7,8,9
10
11

CRU51-M2

DDR 3&4 12
NORTH BRIDGE(C51)
SOURTH BRIDGE(MCP51)
PCI 1&2
FRONT PANEL HEADER
PCI EXPRESS X16 & X1

C C

IDE CONN
POWER CONN & FAN CONTROL
FLOOPY / KB / MOUSE / CMOS
VGA CONN & TV OUT
USB DEVICE
SERIAL & PARALLEL

AUDIO CODEC
AUDIO CONN
VCORE POWER SUPPLY
MEM_VREG/MEM_VTT

B B

LPC SUPER IO(IT8712/8716)
FLASH ROM & H/W MON
POWER SEQUENCING
LAN 10/100
OVER VOLTAGE
C51 CORE

13,14,15
16,17,18,19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37

38

VER:1.3

A A

Title

COVER SHEET

Size Document Number Rev

Custom

5

4

3

2

Date: Sheet of

CRU51-M2

1

1.3

1 39Friday, July 07, 2006

PDF created with pdfFactory Pro trial version www.pdffactory.com

5

4

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1

D D

POWER
SUPPLY
CONN

VREG

PEX X16 (1)

PEX X1 (2)

PRIMARY IDE

C C

SECONDARY IDE

SATA CONN(X2)

SIOFLOPPY CONN

IT8712/8716

PS2/KBRD CONN

AMD M2 SOCKET 940

ATA 133

INTEGRATED SATA 1/2

LPC BUS 33MHZ

M2

HT 16X16 1GHZ

NFORCE
CRUSH 51G
468BGA

HT 8X8 800MHZ

NFORCE
MCP 51G
508BGA

MEMORY DDR2

VGA

CONN

DDR DIMM(4)

128-BIT 400/533/667/800 MHZ

PCI 33MHZ

PCI SLOT (2)

AC97

AUDIO CODEC

USB2.0 (X8)

DOUBLE STACK
USB2 PORTS 3-2

LAN RJ45

BACK PANEL CONNUSB2 PORTS 5-4

PARALLEL CONN

B B

SERIAL CONN

H/W MON

RGMII

4MB FLASH

A A

USB2 PORTS 1-0FRONT PANEL HDR

USB2 PORTS 7-6

MII/RGMII

Title

SYSTEM BLOCK

Size Document Number Rev

Custom

5

4

3

2

Date: Sheet of

CRU51-M2

1

1.3

2 39Friday, July 07, 2006

PDF created with pdfFactory Pro trial version www.pdffactory.com

5

M2 940 CPU

D D

CRUSH 51

C C

B B

MCP 51

32.0 KHZ

25 MHZ

HT_CPU_TXCLK0

HT_CPU_TXCLK0*
HT_CPU_RXCLK0

HT_CPU_RXCLK0*

HT_CPU_TXCLK1

HT_CPU_TXCLK1*
HT_CPU_RXCLK1

HT_CPU_RXCLK1*

CPUCLK_IN*

CPUCLK_IN

CLKOUT_200MHZ
CLKOUT_200MHZ*

HT_CPU_RXCLK1*
HT_CPU_RXCLK1
HT_CPU_TXCLK1*

HT_CPU_TXCLK1
HT_CPU_RXCLK0*

HT_CPU_RXCLK0
HT_CPU_TXCLK0*

HT_CPU_TXCLK0
HT_MCP_TXCLK0

HT_MCP_TXCLK0*
HT_MCP_RXCLK0

HT_MCP_RXCLK0*
CLKIN_25MHZ

CLKIN_200MHZ*

CLKIN_200MHZ

MCPCLK_OUT
MCPCLK_OUT*
25MHZ_CLKOUT

HT_MCP_RXCLK0*
HT_MCP_RXCLK0
HT_MCP_RXCLK0*

HT_MCP_RXCLK0

RTC_XTAL

XTAL_IN

XTAL_OUT

MEMORY_A1_CLK[2:0]

MEMORY_A1_CLK[2:0]*

MEMORY_B1_CLK[2:0]

MEMORY_B1_CLK[2:0]*

MEMORY_A2_CLK[2:0]

MEMORY_A2_CLK[2:0]*

MEMORY_B2_CLK[2:0]

MEMORY_B2_CLK[2:0]*

PE0_REFCLK
PE0_REFCLK*

PE1_REFCLK
PE1_REFCLK*

PE2_REFCLK
PE2_REFCLK*

XTAL_IN

XTAL_OUT

BUF_SIO
SUSCLK

LPC_CLK0
PCI_CLK0

PCI_CLK1
PCI_CLK2
PCI_CLK3
PCI_CLK4
PCI_CLK_FB

LPC_CLK1
AC_97CLK
AC_BITCLK
BUF_25MHZ

4

CHANNEL A1 0-63

CHANNEL B1 64-127
CHANNEL A2 0-63

CHANNEL B2 64-127

PEX X16

PEX X1

PEX X1
/NI

CLOCK
DISTRIBUTION

27 MHZ (TV OUT ONLY)

14MHZ OR 24MHZ

32KHZ

33MHZ
33MHZ

33MHZ
AC97/AZALIA LINK

AC97 CODEC

LAN PHY

DIMM 0

DIMM 1

DIMM 2
/NI

DIMM 3
/NI

SIO

PWR SWTCH

PWR CONN

PWR GOOD

FLASH

S-IO

PS ON

PCI SLOT2

PCI SLOT1

PCI SLOT 3
/NI

PCI SLOT4
/NI

8712/8716

PWR
BUTTON*

PS ON

3

RESET MAP

PWRBT
ON*

SLP_S3*

CIRCUIT

PEX X16

PEX X1

PEX X1
/NI

PWRBTN*

SLP_S3*

POWER_GOOD

PWRGD_SB

PWR BUTTON

SLP S3*

PWRGD

PWRGD_SB

GPIO_AUX*

LAN_PHY
RESET*

CRUSH 51

PE_RESET*

MCP 51

M2 SKT 939

CPU RST*

CPU PWRGD

HT CPU PWRGD

HT CPU RST*

HT MCP PWRGD

HT MCP RST*

HT MCP RST*

HT MCP PWRGD

PCI RST0*
PCI RST1*
PCI RST2*
PCI RST3*
LPC_RST*PWRGD SB
AC_RESET*

AUDIO_PHY
RESET*

2

CPU_RST*

CPU_PWRGD

HT_CPU_PWRGD

HT_CPU_RST*

HT_MCP_PWRGD

HT_MCP_RST*

HT_MCP_RST*

HT_MCP_PWRGD

PCIRST_SLOT1*
PCIRST_SLOT2*
PCIRST_SLOT3-4*
PCIRST_IDE*
LPCRST_FLASH*
LPCRST_SIO*

SIO FLASH

PRI IDE

SEC IDE

PCI SLOT 3
/NI

PCI SLOT4
/NI

1

PCI SLOT2 PCI SLOT1

A A

Title

RESET&CLOCK MAP

Size Document Number Rev

Custom

5

4

3

2

Date: Sheet of

CRU51-M2

1

1.3

3 39Friday, July 07, 2006

PDF created with pdfFactory Pro trial version www.pdffactory.com

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1

CPU VID TABLE

VDD

VID [4..0]

D D

C C

B B

0X00000

0X00010
0X00011
0X00100
0X00101
0X00110
0X00111
0X01000
0X01001
0X01010 1.300V
0X01011
0X01100
0X01101
0X01110
0X01111

SMBUS ADDRESS MAP

DEVICE
SLOT
DIMM 0
DIMM 1
DIMM 2
DIMM 3
SIO
PCI SLOT 1 1
PCI SLOT 2
PCI SLOT 3
PCI SLOT 4

22U/25DE 5*7 mm
100U/16DE
220U/10DE
470U/16DE
1000U/10DE
1500U/16DE
3300U/25DE

VID [4..0]
0X10000

1.550V
0X10001

1.525V

1.500V

0X10010
0X10011

1.475V
0X10100

1.450V
0X10101

1.425V

1.400V

0X10110

1.375V

0X10111

1.350V

0X11000
0X11001

1.325V
0X11010

1.275V

0X11011

1.250V

0X11100

1.225V

1.200V

0X11110
0X11111

1.175V

SMBUS # ADDRESS

0
0
0
1

1
1
1
ADDC BUS
BDDC BUS

6.3*11 mm

6.3*11 mm

8*11 mm
8*14 mm
10*25 mm
10*25 mm

1010 000 = 0X500
1010 001 = 0X51
1010 010 = 0X52
1010 011 = 0X53
0101 101 = 0X2D
ARP
ARP
ARP
ARP
?
?

G

PCI INTERRUPT/IDSEL MAP

VDD

BACK PANEL

1.150V

SLOT

1.125V0X00001

1

1.100V

2

1.075V

3

1.050V

4

1.025V

5

1.000V

0.975V

PCI DEVICE MAP

0.950V

0.925V

DEVICE

0.900V

MCP51

0.875V

0.850V

MAC /MAC

0.825V0X11101

PCI-PCI BRIDGE

0.800V

SATA1

OFF

SATA0
IDE
MODEM CODEC
AUDIO CODEC
USB 2.0
USB 1.1
SHAPE TRIM
LDT
SMBUS2
LEGACY SLAVE
LPC
LOGICAL PCI BUS
PCI SLOT 1
PCI SLOT 2
PCI SLOT 3
PCI SLOT 4
PCI SLOT 5

D

D

G

TO-263

TO-252

20N03

PHB55N03

TM3055TL-S

90N02

PHD55N03

PCI BUS#

01
01
01
01
01
016

S

DEVICE#

0X05
0X06
0X07
0X08
0X09
0X0A

PCI BUS# FUNCTION
MCP51

LOGICAL
PCI BUS 0

0
0
0
0
0
0
0
0
0
0
0
0
0
0
1

O

I

O

A

SOT-223

AMS1117

IDSEL PIN

22
24

IDSEL PIN

0X01-0X0F

- -

0

XA

0

X9

0

X8

0

X8

0

X6
X4

1

X4

0

X2

1

X2

0

X1

2

X0

0

X1

1

?

?

X1

0

?

?

A

R E

C

G

SOT-23

SOT-23

2N7002
SI2303S
SI2301S

PCI SLOT
INTA*
P_INTY*
P_INTW*

D

DEVICE ID

- -

0X56/57
0X005C
0X0055
0X0054
0X0053
0X0058
0X0059
0X005B
0X005A
0X005F
0X005E
0X0052
0X00D3
0X0050/51
?

S

PCI SLOT

PCI SLOT

INTB*

INTC*

P_INTZ*

P_INTW*

P_INTX*

P_INTY*

C

B

A

SOT-23

BAT54CKLM431 2N2222ALM431

2N3904
2N3906

BAT54S 78L05-DS2N2097A
MMBT2907A
2N2222A

PCI SLOT
INTD*
P_INTX*
P_INTZ*

KA

O

I

G

TO-92SOT-23

LM432

CRU51-M9

1. CPU --- AMD Socket 939(3-Phase Power)

REQ/GNT

2. CHIPSET --- NF C51G IGP + NF MCP51

3. MEMORY ---Dual Channel DDR SDRAM X 2 (Max. 2GB)

1/1

4. SLOTS --- PEX X16 (x1),PEX X1 (x1),PCI (x2)

2/2

5. CODEC --- Realtek ALC655 5.1 Channel Audio

6. LAN PHY --- RTL8201

7. LPC/SIO --- IT8712F

8. SATA -- INTEGRATED(x2)

9. PCB Size --- 24.4cmx24.4cm, 4-Layer

CHANGE LIST

1.Q37 2N7002 CHANGE 2N3904 FOR POWER_SB TIMING

2.ADD C398 10U/10V FOR POWER_SB TIMING

3.PHY RST FOR S3 WAKE CAN WORK R134,C187 /NI, R136 0

4.DEL VID[0..5] TO MCP51.IT8712

5.ADD C45 1U/10V , R16 10K--> 100K FOR +2.6V

6.ADD U5,R83,R82(22) R84,R81(0)/NI FOR ON BOARD VGA PLUG INTO THE MONITOR CAN'T BOOT UP

7.ADD HEATSINK FOR S/B

8.R262.R264 20K --> 56K FOR KBRST,A20GATE BECOMING 3.3V

9.DEL R217,R222 SLEEPBTNJ CHANGE FROM S/B EXSMI PIN. R206 MOVE NEAR S/B

10.ADD OV-->R222,R281,R282,R283 /NI,R217

11.ADD LED-->D14,D15,D16,D17,R64,R66,R67,R74,R108,R149, SW-->PWRSW1,RSTSW2,R62,R63

12.DEL CT31,PWRGD,C3,C4,C6,C7,C13,CT5,CT19,C209,C210,C230,C211,C212,C213,C227,C228,C229,C17(BOM)

13.AR19 0 /NI FOR AUDIO CLK TO 24Mhz

14.ADD FOR EMI BC92,AR23,AL8,FB24

15.FOR EMI C9,C10,C12,C14-->47P
C8,C193,C196,AC32,C331-->104P
C395,C394,C393,C392,C391,C390,C389,C388,C383C387,C382,C386,C381,C385,C378,C384,C380-->100P
C116,C119,C123-->33P
AR22-->0
C343-->103P
C342-->102P
C336-->10P H1,H2-->COMMOM CHOKE

16.DEL BOM FOR EMI FB6 /NI

5.CHANGE HEATSINK FOR N/B TO SHORT

B

EC

B

C

E

TO-92

TO-92

HSD882-D

A A

Title

SPEC&CHANGE LIST

Size Document Number Rev

Custom

5

4

3

2

Date: Sheet of

CRU51-M2

1

1.3

4 39Friday, July 07, 2006

PDF created with pdfFactory Pro trial version www.pdffactory.com

5

CPU1A

N6

P6
N3
N2

V4

V5
U1

V1
U6

V6

T4

T5
R6

T6

P4

P5
M4
M5

L6
M6

K4

K5

J6

K6
U3

U2
R1

T1
R3
R2
N1

P1

L1
M1

L3

L2

J1

K1

J3

J2

L0_CLKIN_H(1)
L0_CLKIN_L(1)
L0_CLKIN_H(0)
L0_CLKIN_L(0)

L0_CTLIN_H(1)
L0_CTLIN_L(1)
L0_CTLIN_H(0)
L0_CTLIN_L(0)

L0_CADIN_H(15)
L0_CADIN_L(15)
L0_CADIN_H(14)
L0_CADIN_L(14)
L0_CADIN_H(13)
L0_CADIN_L(13)
L0_CADIN_H(12)
L0_CADIN_L(12)
L0_CADIN_H(11)
L0_CADIN_L(11)
L0_CADIN_H(10)
L0_CADIN_L(10)
L0_CADIN_H(9)
L0_CADIN_L(9)
L0_CADIN_H(8)
L0_CADIN_L(8)

L0_CADIN_H(7)
L0_CADIN_L(7)
L0_CADIN_H(6)
L0_CADIN_L(6)
L0_CADIN_H(5)
L0_CADIN_L(5)
L0_CADIN_H(4)
L0_CADIN_L(4)
L0_CADIN_H(3)
L0_CADIN_L(3)
L0_CADIN_H(2)
L0_CADIN_L(2)
L0_CADIN_H(1)
L0_CADIN_L(1)
L0_CADIN_H(0)
L0_CADIN_L(0)

HYPERTRANSPORT

L0_CADOUT_H(15)
L0_CADOUT_L(15)
L0_CADOUT_H(14)
L0_CADOUT_L(14)
L0_CADOUT_H(13)
L0_CADOUT_L(13)
L0_CADOUT_H(12)
L0_CADOUT_L(12)
L0_CADOUT_H(11)
L0_CADOUT_L(11)
L0_CADOUT_H(10)
L0_CADOUT_L(10)

L0_CLKOUT_H(1)
L0_CLKOUT_L(1)
L0_CLKOUT_H(0)
L0_CLKOUT_L(0)

L0_CTLOUT_H(1)

L0_CTLOUT_L(1)

L0_CTLOUT_H(0)

L0_CTLOUT_L(0)

L0_CADOUT_H(9)
L0_CADOUT_L(9)
L0_CADOUT_H(8)
L0_CADOUT_L(8)

L0_CADOUT_H(7)
L0_CADOUT_L(7)
L0_CADOUT_H(6)
L0_CADOUT_L(6)
L0_CADOUT_H(5)
L0_CADOUT_L(5)
L0_CADOUT_H(4)
L0_CADOUT_L(4)
L0_CADOUT_H(3)
L0_CADOUT_L(3)
L0_CADOUT_H(2)
L0_CADOUT_L(2)
L0_CADOUT_H(1)
L0_CADOUT_L(1)
L0_CADOUT_H(0)
L0_CADOUT_L(0)

HTCPU_UPCLK113

HTCPU_UPCLK1_13

HTCPU_UPCLK013

HTCPU_UPCLK0_13

D D

HTCPU_UPCNTL_13

C C

HTCPU_UP[15..0]13

HTCPU_UP_[15..0]13 HTCPU_DWN_[15..0] 13

B B

HTCPU_UPCLK1
HTCPU_UPCLK1_
HTCPU_UPCLK0
HTCPU_UPCLK0_

R34 49.9 1%

+1.2V_HT

R35 49.9 1%

HTCPU_UPCNTL
HTCPU_UPCNTL_

HTCPU_UP15
HTCPU_UP_15
HTCPU_UP14
HTCPU_UP_14
HTCPU_UP13
HTCPU_UP_13
HTCPU_UP12
HTCPU_UP_12
HTCPU_UP11
HTCPU_UP_11
HTCPU_UP10
HTCPU_UP_10
HTCPU_UP9
HTCPU_UP_9
HTCPU_UP8
HTCPU_UP_8

HTCPU_UP7
HTCPU_UP_7
HTCPU_UP6
HTCPU_UP_6
HTCPU_UP5
HTCPU_UP_5
HTCPU_UP4
HTCPU_UP_4
HTCPU_UP3
HTCPU_UP_3
HTCPU_UP2
HTCPU_UP_2
HTCPU_UP1
HTCPU_UP_1 HTCPU_DWN_1
HTCPU_UP0
HTCPU_UP_0

HTCPU_UP[15..0]
HTCPU_UP_[15..0] HTCPU_DWN_[15..0]

HTCPU_DWNCLK1

AD5

HTCPU_DWNCLK1_

AD4

HTCPU_DWNCLK0

AD1

HTCPU_DWNCLK0_

AC1
Y6

W6

HTCPU_DWNCNTL

W2

HTCPU_DWNCNTL_

W3

HTCPU_DWN15

Y5

HTCPU_DWN_15

Y4

HTCPU_DWN14

AB6

HTCPU_DWN_14

AA6

HTCPU_DWN13

AB5

HTCPU_DWN_13

AB4

HTCPU_DWN12

AD6

HTCPU_DWN_12

AC6

HTCPU_DWN11

AF6

HTCPU_DWN_11

AE6

HTCPU_DWN10

AF5

HTCPU_DWN_10

AF4

HTCPU_DWN9

AH6

HTCPU_DWN_9

AG6

HTCPU_DWN8

AH5

HTCPU_DWN_8

AH4

HTCPU_DWN7

Y1

HTCPU_DWN_7

W1

HTCPU_DWN6

AA2

HTCPU_DWN_6

AA3

HTCPU_DWN5

AB1

HTCPU_DWN_5

AA1

HTCPU_DWN4

AC2

HTCPU_DWN_4

AC3

HTCPU_DWN3

AE2

HTCPU_DWN_3

AE3

HTCPU_DWN2

AF1

HTCPU_DWN_2

AE1

HTCPU_DWN1

AG2
AG3

HTCPU_DWN0

AH1

HTCPU_DWN_0

AG1

HTCPU_DWN[15..0]

4

HTCPU_DWNCLK1 13
HTCPU_DWNCLK1_ 13
HTCPU_DWNCLK0 13
HTCPU_DWNCLK0_ 13

HTCPU_DWNCNTL 13HTCPU_UPCNTL13
HTCPU_DWNCNTL_ 13

HTCPU_DWN[15..0] 13

3

CPU1B

MEMORY INTERFACE A

MEM_MA0_CLK_H210,11

MEM_MA0_CLK_L210,11

MEM_MA0_CLK_H110,11

MEM_MA0_CLK_L110,11

MEM_MA0_CLK_H010,11

MEM_MA0_CLK_L010,11

MEM_MA0_CS_L110,11
MEM_MA0_CS_L010,11

MEM_MA0_ODT010,11

MEM_MA1_CLK_H210,11

MEM_MA1_CLK_L210,11

MEM_MA1_CLK_H110,11

MEM_MA1_CLK_L110,11

MEM_MA1_CLK_H010,11

MEM_MA1_CLK_L010,11

MEM_MA1_CS_L110,11
MEM_MA1_CS_L010,11

MEM_MA1_ODT010,11

MEM_MA_CAS_L10,11

MEM_MA_WE_L10,11

MEM_MA_RAS_L10,11
MEM_MA_BANK210,11

MEM_MA_BANK110,11
MEM_MA_BANK010,11

MEM_MA_CKE110,11
MEM_MA_CKE010,11

MEM_MA_ADD[15..0]10,11

MEM_MA_DQS_H[8..0]11

MEM_MA_DQS_L[8..0]11

MEM_MA_DM[8..0]11

MEM_MA_ADD[15..0]
MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0
MEM_MA_DQS_H[8..0]
MEM_MA_DQS_H7
MEM_MA_DQS_L7
MEM_MA_DQS_H6
MEM_MA_DQS_L6
MEM_MA_DQS_H5
MEM_MA_DQS_L5
MEM_MA_DQS_H4
MEM_MA_DQS_L4
MEM_MA_DQS_H3
MEM_MA_DQS_L3
MEM_MA_DQS_H2
MEM_MA_DQS_L2
MEM_MA_DQS_H1
MEM_MA_DQS_L1
MEM_MA_DQS_H0
MEM_MA_DQS_L0 MEM_MA_DM8
MEM_MA_DQS_L[8..0]
MEM_MA_DM7
MEM_MA_DM6
MEM_MA_DM5
MEM_MA_DM4
MEM_MA_DM3
MEM_MA_DM2
MEM_MA_DM1
MEM_MA_DM0
MEM_MA_DM[8..0]

AG21
AG20

G19
H19
U27
U26

AC25
AA24

AC28
AE20

AE19

G20
G21

W27

AD27
AA25

AC27

AB25
AB27
AA26

N25

AA27

M25
M27

N24

AC26

N26

N27
R24

R25
R26
R27

U25
W24

AD15
AE15
AG18
AG19
AG24
AG25
AG27
AG28

D29
C29
C25
D25

G15

AF15
AF19

AJ25

AH29

H15

V27

Y27

L27

P25
Y25

P27

T25
T27

E19
F19
F15

B29
E24
E18

MA0_CLK_H(2)
MA0_CLK_L(2)
MA0_CLK_H(1)
MA0_CLK_L(1)
MA0_CLK_H(0)
MA0_CLK_L(0)

MA0_CS_L(1)
MA0_CS_L(0)

MA0_ODT(0)
MA1_CLK_H(2)

MA1_CLK_L(2)
MA1_CLK_H(1)
MA1_CLK_L(1)
MA1_CLK_H(0)
MA1_CLK_L(0)

MA1_CS_L(1)
MA1_CS_L(0)

MA1_ODT(0)

MA_CAS_L
MA_WE_L
MA_RAS_L

MA_BANK(2)
MA_BANK(1)
MA_BANK(0)

MA_CKE(1)
MA_CKE(0)

MA_ADD(15)
MA_ADD(14)
MA_ADD(13)
MA_ADD(12)
MA_ADD(11)
MA_ADD(10)
MA_ADD(9)
MA_ADD(8)
MA_ADD(7)
MA_ADD(6)
MA_ADD(5)
MA_ADD(4)
MA_ADD(3)
MA_ADD(2)
MA_ADD(1)
MA_ADD(0)

MA_DQS_H(7)
MA_DQS_L(7)
MA_DQS_H(6)
MA_DQS_L(6)
MA_DQS_H(5)
MA_DQS_L(5)
MA_DQS_H(4)
MA_DQS_L(4)
MA_DQS_H(3)
MA_DQS_L(3)
MA_DQS_H(2)
MA_DQS_L(2)
MA_DQS_H(1)
MA_DQS_L(1)
MA_DQS_H(0)
MA_DQS_L(0)

MA_DM(7)
MA_DM(6)
MA_DM(5)
MA_DM(4)
MA_DM(3)
MA_DM(2)
MA_DM(1)
MA_DM(0)

2

MA_DATA(63)
MA_DATA(62)
MA_DATA(61)
MA_DATA(60)
MA_DATA(59)
MA_DATA(58)
MA_DATA(57)
MA_DATA(56)
MA_DATA(55)
MA_DATA(54)
MA_DATA(53)
MA_DATA(52)
MA_DATA(51)
MA_DATA(50)
MA_DATA(49)
MA_DATA(48)
MA_DATA(47)
MA_DATA(46)
MA_DATA(45)
MA_DATA(44)
MA_DATA(43)
MA_DATA(42)
MA_DATA(41)
MA_DATA(40)
MA_DATA(39)
MA_DATA(38)
MA_DATA(37)
MA_DATA(36)
MA_DATA(35)
MA_DATA(34)
MA_DATA(33)
MA_DATA(32)
MA_DATA(31)
MA_DATA(30)
MA_DATA(29)
MA_DATA(28)
MA_DATA(27)
MA_DATA(26)
MA_DATA(25)
MA_DATA(24)
MA_DATA(23)
MA_DATA(22)
MA_DATA(21)
MA_DATA(20)
MA_DATA(19)
MA_DATA(18)
MA_DATA(17)
MA_DATA(16)
MA_DATA(15)
MA_DATA(14)
MA_DATA(13)
MA_DATA(12)
MA_DATA(11)
MA_DATA(10)

MA_DATA(9)
MA_DATA(8)
MA_DATA(7)
MA_DATA(6)
MA_DATA(5)
MA_DATA(4)
MA_DATA(3)
MA_DATA(2)
MA_DATA(1)
MA_DATA(0)

MA_DQS_H(8)
MA_DQS_L(8)

MA_DM(8)

MA_CHECK(7)
MA_CHECK(6)
MA_CHECK(5)
MA_CHECK(4)
MA_CHECK(3)
MA_CHECK(2)
MA_CHECK(1)
MA_CHECK(0)

MEM_MA_DATA[0..63]
MEM_MA_DATA63

AE14

MEM_MA_DATA62

AG14

MEM_MA_DATA61

AG16

MEM_MA_DATA60

AD17

MEM_MA_DATA59

AD13

MEM_MA_DATA58

AE13

MEM_MA_DATA57

AG15

MEM_MA_DATA56

AE16

MEM_MA_DATA55

AG17

MEM_MA_DATA54

AE18

MEM_MA_DATA53

AD21

MEM_MA_DATA52

AG22

MEM_MA_DATA51

AE17

MEM_MA_DATA50

AF17

MEM_MA_DATA49

AF21

MEM_MA_DATA48

AE21

MEM_MA_DATA47

AF23

MEM_MA_DATA46

AE23

MEM_MA_DATA45

AJ26

MEM_MA_DATA44

AG26

MEM_MA_DATA43

AE22

MEM_MA_DATA42

AG23

MEM_MA_DATA41

AH25

MEM_MA_DATA40

AF25

MEM_MA_DATA39

AJ28

MEM_MA_DATA38

AJ29

MEM_MA_DATA37

AF29

MEM_MA_DATA36

AE26

MEM_MA_DATA35

AJ27

MEM_MA_DATA34

AH27

MEM_MA_DATA33

AG29

MEM_MA_DATA32

AF27

MEM_MA_DATA31

E29

MEM_MA_DATA30

E28

MEM_MA_DATA29

D27

MEM_MA_DATA28

C27

MEM_MA_DATA27

G26

MEM_MA_DATA26

F27

MEM_MA_DATA25

C28

MEM_MA_DATA24

E27

MEM_MA_DATA23

F25

MEM_MA_DATA22

E25

MEM_MA_DATA21

E23

MEM_MA_DATA20

D23

MEM_MA_DATA19

E26

MEM_MA_DATA18

C26

MEM_MA_DATA17

G23

MEM_MA_DATA16

F23

MEM_MA_DATA15

E22

MEM_MA_DATA14

E21

MEM_MA_DATA13

F17

MEM_MA_DATA12

G17

MEM_MA_DATA11

G22

MEM_MA_DATA10

F21

MEM_MA_DATA9

G18

MEM_MA_DATA8

E17

MEM_MA_DATA7

G16

MEM_MA_DATA6

E15

MEM_MA_DATA5

G13

MEM_MA_DATA4

H13

MEM_MA_DATA3

H17

MEM_MA_DATA2

E16

MEM_MA_DATA1

E14

MEM_MA_DATA0

G14

MEM_MA_DQS_H8

J28

MEM_MA_DQS_L8

J27
J25

MEM_MA_CHECK[7..0]
MEM_MA_CHECK7

K25

MEM_MA_CHECK6

J26

MEM_MA_CHECK5

G28

MEM_MA_CHECK4

G27

MEM_MA_CHECK3

L24

MEM_MA_CHECK2

K27

MEM_MA_CHECK1

H29

MEM_MA_CHECK0

H27

1

MEM_MA_DATA[0..63] 11

MEM_MA_CHECK[7..0] 11

A A

Title

M2 HT

Size Document Number Rev

Custom

5

4

3

2

Date: Sheet of

CRU51-M2

1

1.3

5 39Friday, July 07, 2006

PDF created with pdfFactory Pro trial version www.pdffactory.com

5

4

3

2

1

CPU1C

MEMORY INTERFACE B

AC31
AD29

AD31

AC29
AC30

AH17

AJ19
AK19

A18
A19
U31
U30

AE30

AL19
AL18

C19

D19
W29
W28

AE29
AB31

AB29

N31
AA31
AA28

M31

M29

N28

N29
AE31

N30

P29
AA29

P31

R29

R28

R31

R30

T31

T29

U29

U28
AA30

AK13
AJ13
AK17
AJ17
AK23
AL23
AL28
AL29

D31

C31

C24

C23

D17

C17

C14

C13
AJ14
AJ23

AK29

C30

A23

B17

B13

MB0_CLK_H(2)
MB0_CLK_L(2)
MB0_CLK_H(1)
MB0_CLK_L(1)
MB0_CLK_H(0)
MB0_CLK_L(0)

MB0_CS_L(1)
MB0_CS_L(0)

MB0_ODT(0)
MB1_CLK_H(2)

MB1_CLK_L(2)
MB1_CLK_H(1)
MB1_CLK_L(1)
MB1_CLK_H(0)
MB1_CLK_L(0)

MB1_CS_L(1)
MB1_CS_L(0)

MB1_ODT(0)

MB_CAS_L
MB_WE_L
MB_RAS_L

MB_BANK(2)
MB_BANK(1)
MB_BANK(0)

MB_CKE(1)
MB_CKE(0)

MB_ADD(15)
MB_ADD(14)
MB_ADD(13)
MB_ADD(12)
MB_ADD(11)
MB_ADD(10)
MB_ADD(9)
MB_ADD(8)
MB_ADD(7)
MB_ADD(6)
MB_ADD(5)
MB_ADD(4)
MB_ADD(3)
MB_ADD(2)
MB_ADD(1)
MB_ADD(0)

MB_DQS_H(7)
MB_DQS_L(7)
MB_DQS_H(6)
MB_DQS_L(6)
MB_DQS_H(5)
MB_DQS_L(5)
MB_DQS_H(4)
MB_DQS_L(4)
MB_DQS_H(3)
MB_DQS_L(3)
MB_DQS_H(2)
MB_DQS_L(2)
MB_DQS_H(1)
MB_DQS_L(1)
MB_DQS_H(0)
MB_DQS_L(0)

MB_DM(7)
MB_DM(6)
MB_DM(5)
MB_DM(4)
MB_DM(3)
MB_DM(2)
MB_DM(1)
MB_DM(0)

MEM_MB0_CLK_H210,12

MEM_MB0_CLK_L210,12

MEM_MB0_CLK_H110,12

MEM_MB0_CLK_L110,12

D D

C C

B B

MEM_MB0_CLK_H010,12

MEM_MB0_CLK_L010,12

MEM_MB0_CS_L110,12
MEM_MB0_CS_L010,12

MEM_MB0_ODT010,12

MEM_MB1_CLK_H210,12

MEM_MB1_CLK_L210,12

MEM_MB1_CLK_H110,12

MEM_MB1_CLK_L110,12

MEM_MB1_CLK_H010,12

MEM_MB1_CLK_L010,12

MEM_MB1_CS_L110,12
MEM_MB1_CS_L010,12

MEM_MB1_ODT010,12

MEM_MB_CAS_L10,12

MEM_MB_WE_L10,12

MEM_MB_RAS_L10,12
MEM_MB_BANK210,12

MEM_MB_BANK110,12
MEM_MB_BANK010,12

MEM_MB_CKE110,12
MEM_MB_CKE010,12

MEM_MB_ADD[15..0]10,12

MEM_MB_DQS_H[8..0]12

MEM_MB_DQS_L[8..0]12

MEM_MB_ADD[15..0]
MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0
MEM_MB_DQS_H[8..0]
MEM_MB_DQS_H7
MEM_MB_DQS_L7
MEM_MB_DQS_H6
MEM_MB_DQS_L6
MEM_MB_DQS_H5
MEM_MB_DQS_L5
MEM_MB_DQS_H4
MEM_MB_DQS_L4
MEM_MB_DQS_H3
MEM_MB_DQS_L3
MEM_MB_DQS_H2
MEM_MB_DQS_L2
MEM_MB_DQS_H1
MEM_MB_DQS_L1
MEM_MB_DQS_H0
MEM_MB_DQS_L0
MEM_MB_DQS_L[8..0]
MEM_MB_DM7
MEM_MB_DM6
MEM_MB_DM5
MEM_MB_DM4
MEM_MB_DM3
MEM_MB_DM2
MEM_MB_DM1
MEM_MB_DM0

MB_DATA(63)
MB_DATA(62)
MB_DATA(61)
MB_DATA(60)
MB_DATA(59)
MB_DATA(58)
MB_DATA(57)
MB_DATA(56)
MB_DATA(55)
MB_DATA(54)
MB_DATA(53)
MB_DATA(52)
MB_DATA(51)
MB_DATA(50)
MB_DATA(49)
MB_DATA(48)
MB_DATA(47)
MB_DATA(46)
MB_DATA(45)
MB_DATA(44)
MB_DATA(43)
MB_DATA(42)
MB_DATA(41)
MB_DATA(40)
MB_DATA(39)
MB_DATA(38)
MB_DATA(37)
MB_DATA(36)
MB_DATA(35)
MB_DATA(34)
MB_DATA(33)
MB_DATA(32)
MB_DATA(31)
MB_DATA(30)
MB_DATA(29)
MB_DATA(28)
MB_DATA(27)
MB_DATA(26)
MB_DATA(25)
MB_DATA(24)
MB_DATA(23)
MB_DATA(22)
MB_DATA(21)
MB_DATA(20)
MB_DATA(19)
MB_DATA(18)
MB_DATA(17)
MB_DATA(16)
MB_DATA(15)
MB_DATA(14)
MB_DATA(13)
MB_DATA(12)
MB_DATA(11)
MB_DATA(10)

MB_DATA(9)
MB_DATA(8)
MB_DATA(7)
MB_DATA(6)
MB_DATA(5)
MB_DATA(4)
MB_DATA(3)
MB_DATA(2)
MB_DATA(1)
MB_DATA(0)

MB_DQS_H(8)
MB_DQS_L(8)

MB_DM(8)

MB_CHECK(7)
MB_CHECK(6)
MB_CHECK(5)
MB_CHECK(4)
MB_CHECK(3)
MB_CHECK(2)
MB_CHECK(1)
MB_CHECK(0)

AH13
AL13
AL15
AJ15
AF13
AG13
AL14
AK15
AL16
AL17
AK21
AL21
AH15
AJ16
AH19
AL20
AJ22
AL22
AL24
AK25
AJ21
AH21
AH23
AJ24
AL27
AK27
AH31
AG30
AL25
AL26
AJ30
AJ31
E31
E30
B27
A27
F29
F31
A29
A28
A25
A24
C22
D21
A26
B25
B23
A22
B21
A20
C16
D15
C21
A21
A17
A16
B15
A14
E13
F13
C15
A15
A13
D13

J31
J30

J29
K29

K31
G30
G29
L29
L28
H31
G31

MEM_MB_DATA63
MEM_MB_DATA62
MEM_MB_DATA61
MEM_MB_DATA60
MEM_MB_DATA59
MEM_MB_DATA58
MEM_MB_DATA57
MEM_MB_DATA56
MEM_MB_DATA55
MEM_MB_DATA54
MEM_MB_DATA53
MEM_MB_DATA52
MEM_MB_DATA51
MEM_MB_DATA50
MEM_MB_DATA49
MEM_MB_DATA48
MEM_MB_DATA47
MEM_MB_DATA46
MEM_MB_DATA45
MEM_MB_DATA44
MEM_MB_DATA43
MEM_MB_DATA42
MEM_MB_DATA41
MEM_MB_DATA40
MEM_MB_DATA39
MEM_MB_DATA38
MEM_MB_DATA37
MEM_MB_DATA36
MEM_MB_DATA35
MEM_MB_DATA34
MEM_MB_DATA33
MEM_MB_DATA32
MEM_MB_DATA31
MEM_MB_DATA30
MEM_MB_DATA29
MEM_MB_DATA28
MEM_MB_DATA27
MEM_MB_DATA26
MEM_MB_DATA25
MEM_MB_DATA24
MEM_MB_DATA23
MEM_MB_DATA22
MEM_MB_DATA21
MEM_MB_DATA20
MEM_MB_DATA19
MEM_MB_DATA18
MEM_MB_DATA17
MEM_MB_DATA16
MEM_MB_DATA15
MEM_MB_DATA14
MEM_MB_DATA13
MEM_MB_DATA12
MEM_MB_DATA11
MEM_MB_DATA10
MEM_MB_DATA9
MEM_MB_DATA8
MEM_MB_DATA7
MEM_MB_DATA6
MEM_MB_DATA5
MEM_MB_DATA4
MEM_MB_DATA3
MEM_MB_DATA2
MEM_MB_DATA1
MEM_MB_DATA0

MEM_MB_DQS_H8
MEM_MB_DQS_L8

MEM_MB_DM8
MEM_MB_CHECK7

MEM_MB_CHECK6
MEM_MB_CHECK5
MEM_MB_CHECK4
MEM_MB_CHECK3
MEM_MB_CHECK2
MEM_MB_CHECK1
MEM_MB_CHECK0

MEM_MB_DATA[0..63]

MEM_MB_CHECK[7..0]MEM_MB_DM[8..0]

MEM_MB_DATA[0..63] 12

MEM_MB_CHECK[7..0] 12MEM_MB_DM[8..0]12

A A

Title

M2 CNTL/STRAPS

Size Document Number Rev

Custom

5

4

3

2

Date: Sheet of

CRU51-M2

1

1.3

6 39Friday, July 07, 2006

PDF created with pdfFactory Pro trial version www.pdffactory.com

5

+5V

D D

C C

B B

+1.8V_SUS

HTCPU_RST_13

MCP51_PWRGD18,35

HTCPU_PWRGD13
MCP51_PWRGD18,35

HTCPU_STOP_13

MCP51_PWRGD18,35

BR1

16.9 1%

CPU_M_VREFF

1 2
12

12

BR2

BC1

16.9 1%

1UF 10V Y5V

+5V_STBY

U1A
SN74ACT08

1
2

+5V_STBY

U1B
SN74ACT08

4
5

+5V_STBY

U1C
SN74ACT08

9

10

147

147

147

12

BC3

0.1UF 25V Y5V

CPU_VDDA_ADJ

3

6

8

RN2

1 2
3 4
5 6
7 8

100 8P4R

CPU_CLK13

CPU_CLK_13

123456

78

+2.5V

CPU_CLK

CPU_CLK*

HTCPU_RST_R

HTCPU_PWRGDR

HTCPU_STOP_R

RN3
56 8P4R

4

12

12

C28

C21
100UF 6.3V D TAN /NI

1UF 16V 0805 Y5V

ROUTE AS DIF 5/5/5/20
LAYOUT: PLACE 169 OHM WITHIN

600mils OF CPU
AND TRACE TO AC CAPS LESS
THAN 1250mil

C30

12

3900P 50V X7R

C29

12

3900P 50V X7R

+1.8V_SUS

R56 300

+1.8V_SUS

CPU_CORE_FB31
CPU_CORE_FB_31

RN4
330 8P4R

1 2

3 4

5 6

7 8

+1.8V_SUS

12

C34
1UF 16V 0805 Y5V

R28
169 1%

1 2

R53 1K 1%1 2

R54 300 /NI

1 2

R55 300 /NI1 2

CPU_SIC

CPU_CORE_FB
CPU_CORE_FB-

TP_VDDIOSENSE1 TP /NI

CPU_M_VREFF

R50 39.2 1%1 2

R59 39.2 1%

1 2

R27 510

1 2

R26 5101 2
R23 300

1 2

R24 3001 2

CPU_THERMDC33,34

CPU_THERMDA33

3

2P5V_PWR 13,14,15,38

CPU1D

MISC

C10

VDDA1

D10

VDDA2

A8

CLKIN_H

B8

C9
D8
C7

AL3

AL6

AK6

AL10
AJ10

AH10

AL9

A5

G2
G1

E12

F12

AH11

AJ11

A10

B10

F10

E9

AJ7

F6

D6

E7
F8

C5

AH9

E5

AJ5
AG9
AG8
AH7

AJ6

CLKIN_L
PWROK

LDTSTOP_L
RESET_L

CPU_PRESENT_L

SIC
SID

TDI
TRST_L
TCK
TMS

DBREQ_L
VDD_FB_H

VDD_FB_L
VTT_SENSE

M_VREF
M_ZN
M_ZP

TEST25_H
TEST25_L
TEST19
TEST18
TEST13
TEST9

TEST17
TEST16
TEST15
TEST14
TEST12

TEST7
TEST6
THERMDC
THERMDA
TEST3
TEST2

THERMTRIP_L

PROCHOT_L

DBRDY

VDDIO_FB_H
VDDIO_FB_L

HTREF1
HTREF0

TEST29_H
TEST29_L

TEST24
TEST23
TEST22
TEST21
TEST20

TEST28_H
TEST28_L

TEST27
TEST26
TEST10

TEST8

VID(5)
VID(4)
VID(3)
VID(2)
VID(1)
VID(0)

PSI_L

D2
D1
C1
E3
E2
E1

AK7
AL7

AK10

TDO

B6
AK11

AL11
F1

V8
V7

C11
D11

AK8
AH8
AJ9
AL8
AJ8

J10
H9
AK9
AK5
G7
D4

HTCPU_PWRGDR
HTCPU_STOP_R
HTCPU_RST_R VID3

2

+1.8V_SUS

RN15
330 8P4R

1 2

3 4

5 6

7 8

TP /NI

VID1

VID4
VID2

VID1
VID0

CPU_THERMTRIP

TP /NI

TP_VDDIOFB1
TP_VDDIOFB_1

TP /NI

R32 44.2 1%

12

R31 44.2 1%12

FBCLKOUT
FBCLKOUT*

R25

80.6 1%

8/5/8/20

1 2

LAYOUT: ROUTE 80 OHM DIFF IMPEDENCE
LAYOUT: PLACE WITHIN 1 INCH OF CPU

R58 300

1 2

R51 300

1 2

+1.2V_HT

+1.8V_SUS

+1.8V_SUS

Q11
2N3904 SOT23

R21
1K 1%

+3.3V_DUAL

12

R17

10K 1%

K8_VID4 31
K8_VID3 31
K8_VID2 31
K8_VID1 31

K8_VID0 31

CPU_THERMTRIP_ 16

1

A A

Title

M2 DDR MEM 0-63

Size Document Number Rev

Custom

5

4

3

2

Date: Sheet of

CRU51-M2

1

1.3

7 39Tuesday, December 26, 2006

PDF created with pdfFactory Pro trial version www.pdffactory.com

5

4

3

2

1

+V_CPU

ADD FOR EMI
PLACE NEAR C80

BC2

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VDD20
VDD21
VDD22
VDD23
VDD24
VDD25
VDD26
VDD27
VDD28
VDD29
VDD30
VDD31
VDD32
VDD33
VDD34
VDD35
VDD36
VDD37
VDD38
VDD39
VDD40
VDD41
VDD42
VDD43
VDD44
VDD45
VDD46
VDD47
VDD48
VDD49
VDD50
VDD51
VDD52
VDD53
VDD54
VDD55
VDD56
VDD57
VDD58
VDD59
VDD60
VDD61
VDD62
VDD63
VDD64
VDD65
VDD66
VDD67
VDD68
VDD69
VDD70
VDD71
VDD72
VDD73
VDD74
VDD75
VDD150
VDD151

5

CPU1F

1UF 10V Y5V

VDD1

A3

VSS1

A7

VSS2

A9

VSS3

A11

VSS4

AA4

VSS5

AA5

VSS6

AA7

VSS7

AA9

VSS8

AA11

VSS9

AA13

VSS10

AA15

VSS11

AA17

VSS12

AA19

VSS13

AA21

VSS14

AA23

VSS15

AB2

VSS16

AB3

VSS17

AB8

VSS18

AB10

VSS19

AB12

VSS20

AB14

VSS21

AB16

VSS22

AB18

VSS23

AB20

VSS24

AB22

VSS25

AC7

VSS26

AC9

VSS27

AC11

VSS28

AC13

VSS29

AC15

VSS30

AC17

VSS31

AC19

VSS32

AC21

VSS33

AC23

VSS34

AD8

VSS35

AD10

VSS36

AD12

VSS37

AD14

VSS38

AD16

VSS39

AD20

VSS40

AD22

VSS41

AD24

VSS42

AE4

VSS43

AE5

VSS44

AE9

VSS45

AE11

VSS46

AF2

VSS47

AF3

VSS48

AF8

VSS49

AF10

VSS50

AF12

VSS51

AF14

VSS52

AF16

VSS53

AF18

VSS54

AF20

VSS55

AF22

VSS56

AF24

VSS57

AF26

VSS58

AF28

VSS59

AG10

VSS61

AG11

VSS62

AH14

VSS63

AH16

VSS64

AH18

VSS65

AH20

VSS66

AH22

VSS67

AH24

VSS68

AH26

VSS69

AH28

VSS70

AH30

VSS71

AK2

VSS72

AK14

VSS73

AK16

VSS74

AK18

VSS75

Y14

VSS240

Y16

VSS241

D D

+V_CPU +V_CPU

A4
A6

AA8
AA10
AA12
AA14
AA16
AA18

AB7

AB9
AB11

AC4

AC5

AC8
AC10

AD2

C C

B B

A A

AD3

AD7

AD9
AE10

AF7

AF9
AG4
AG5
AG7
AH2
AH3

B3
B5
B7
C2
C4
C6
C8
D3
D5
D7
D9
E4
E6
E8

E10

F5
F7
F9

F11

G6

G8
G10
G12

H7
H11
H23

J8
J12
J14
J16
J18
J20
J22
J24

K7

K9
K11
K13
K15
K17
K19
K21
K23

L4

L5

L8

L10

L12
Y17
Y19

+1.8V_SUS

PLACE AT CPU SOCKET SOLDER SIDE

CPU1G

VDD2

L14
L16
L18

M2
M3
M7

M9
M11
M13
M15
M17
M19

N8
N10
N12
N14
N16
N18

P7

P9
P11
P13
P15
P17
P19

R4

R5

R8
R10
R12
R14
R16
R18
R20

T2
T3
T7

T9
T11
T13
T15
T17
T19
T21

U8
U10
U12
U14
U16
U18
U20

V9
V11
V13
V15
V17
V19
V21

W4
W5

W8
W10
W12
W14
W16
W18
W20

Y2
Y3
Y7

Y9
Y11
Y13
Y15
Y21

4

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VDD20
VDD21
VDD22
VDD23
VDD24
VDD25
VDD26
VDD27
VDD28
VDD29
VDD30
VDD31
VDD32
VDD33
VDD34
VDD35
VDD36
VDD37
VDD38
VDD39
VDD40
VDD41
VDD42
VDD43
VDD44
VDD45
VDD46
VDD47
VDD48
VDD49
VDD50
VDD51
VDD52
VDD53
VDD54
VDD55
VDD56
VDD57
VDD58
VDD59
VDD60
VDD61
VDD62
VDD63
VDD64
VDD65
VDD66
VDD67
VDD68
VDD69
VDD70
VDD71
VDD72
VDD73
VDD74
VDD75

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8

VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75

+V_CPU

AK20
AK22
AK24
AK26
AK28
AK30
AL5
B4
B9
B11
B14
B16
B18
B20
B22
B24
B26
B28
B30
C3
D14
D16
D18
D20
D22
D24
D26
D28
D30
E11
F4
F14
F16
F18
F20
F22
F24
F26
F28
F30
G9
G11
H8
H10
H12
H14
H16
H18
H22
H24
H26
H28
H30
J4
J5
J7
J9
J11
J13
J15
J17
J19
J21
J23
K2
K3
K8
K10
K12
K14
K16
K18
K20
K22
Y18

CPU1H

VDD3

VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9

N17
N19
N21
N23
P2
P3
P8
P10
P12
P14
P16
P18
P20
P22
R7
R9
R11
R13
R15
R17
R19
R21
R23
T8
T10
T12
T14
T16
T18
T20
T22
U4
U5
U7
U9
U11
U13
U15
U17
U19
U21
U23
V2
V3
V10
V12
V14
V16
V18
V20
V22
W9
W11
W13
W15
W17
W19
W21
W23
Y8
Y10
Y12
W7
Y20
Y22

AA20

VDD1

AA22

VDD2

AB13

VDD3

AB15

VDD4

AB17

VDD5

AB19

VDD6

AB21

VDD7

AB23

VDD8

AC12

VDD9

AC14

VDD10

AC16

VDD11

AC18

VDD12

AC20

VDD13

AC22

VDD14

AD11

VDD15

AD23

VDD16

AE12

VDD17

AF11

VDD18

L20

VDD19

L22

VDD20

M21

VDD21

M23

VDD22

N20

VDD23

N22

VDD24

P21

VDD25

P23

VDD26

R22

VDD27

T23

VDD28

U22

VDD29

V23

VDD30

W22

VDD31

Y23

VDD32

3

+1.8V_SUS

+1.2V_HT

+0.9V_SUS

C101

1UF 16V 0805 Y5V

1 2

+1.2V_HT

2

C107

1UF 16V 0805 Y5V

1 2

CPU1I

VDDIO

AJ4

VLDT_A1

AJ3

VLDT_A2

AJ2

VLDT_A3

AJ1

VLDT_A4

D12

VTT1

C12

VTT2

B12

VTT3

A12

VTT4

AB24

VDDIO1

AB26

VDDIO2

AB28

VDDIO3

AB30

VDDIO4

AC24

VDDIO5

AD26

VDDIO6

AD28

VDDIO7

AD30

VDDIO8

AF30

VDDIO29

M24

VDDIO9

M26

VDDIO10

M28

VDDIO11

M30

VDDIO12

P24

VDDIO13

P26

VDDIO14

P28

VDDIO15

P30

VDDIO16

T24

VDDIO17

T26

VDDIO18

T28

VDDIO19

T30

VDDIO20

V25

VDDIO21

V26

VDDIO22

V28

VDDIO23

V30

VDDIO24

Y24

VDDIO25

Y26

VDDIO26

Y28

VDDIO27

Y29

VDDIO28

Title

Size Document Number Rev

Custom

Date: Sheet of

+1.2V_HT_CPU

1 2

H6

VLDT_B1

H5

VLDT_B2

H2

VLDT_B3

H1

VLDT_B4

VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9

VTT5
VTT6
VTT7
VTT8
VTT9

1 2

AK12
AJ12
AH12
AG12
AL12

K24
K26
K28
K30
L7
L9
L11
L13
L15
L17
L19
L21
L23
M8
M10
M12
M14
M16
M18
M20
M22
N4
N5
N7
N9
N11
N13
N15

M2 DDR MEM 64-127

+0.9V_SUS

CRU51-M2

1UF 16V 0805 Y5VC43

1UF 16V 0805 Y5VC44

8 39Friday, July 07, 2006

1

1.3

PDF created with pdfFactory Pro trial version www.pdffactory.com

5

DECOUPLING BETWEEN PROCESSOR AND DIMMS
PLACE AS CLOSE TO PROCESSOR AS
POSSIBLE

+1.8V_SUS

C67

0.1UF 25V Y5V

C22

1UF 10V Y5V /NI

12

12

D D

+0.9V_SUS

12

+0.9V_SUS

12

C C

C12

1UF 16V 0805 Y5V /NI

C19

1UF 16V 0805 Y5V /NI

12

C111

1UF 10V Y5V /NI

12

BC14

10UF 10V 0805 Y5V

12

C125

1UF 16V 0805 Y5V

12

C25

0.1UF 25V Y5V

12

BC11

1UF 16V 0805 Y5V

12

C20

1UF 16V 0805 Y5V /NI

12

C45

1UF 16V 0805 Y5V

4

1UF 10V Y5V /NI

12

C35

1UF 10V Y5V

12

C108

3

2

1

12

BC25

1UF 16V 0805 Y5V

12

C75

0.1UF 25V Y5V

+1.8V_SUS

12

12

BC8

1UF 16V 0805 Y5V

C53

0.1UF 25V Y5V

12

BC6

10UF 10V 0805 Y5V

12

3

BC19

1UF 16V 0805 Y5V

12

BC20

1UF 16V 0805 Y5V

12

BC36

1UF 10V Y5V

12

C132

1UF 16V 0805 Y5V

C282

0.1UF 25V Y5V

12

BC7

1UF 16V 0805 Y5V

12

BC26

10UF 10V 0805 Y5V

12

2

BC4

1UF 10V Y5V

Title

M2 PWR/GND

Size Document Number Rev

Custom

Date: Sheet of

CRU51-M2

1

9 39Friday, July 07, 2006

1.3

+V_CPU

12

BC24

+V_CPU

1UF 16V 0805 Y5V

12

BC18

1UF 16V 0805 Y5V

B B

A A

PLACE BOTTOM SIDE DECOUPLING

12

BC5

1UF 16V 0805 Y5V

+1.8V_SUS

5

12

BC32

1UF 16V 0805 Y5V

12

C23

1UF 10V Y5V

12

12

BC31

1UF 16V 0805 Y5V

BC9

1UF 16V 0805 Y5V

12

BC15

1UF 16V 0805 Y5V

12

C14

1UF 10V Y5V

12

BC13

1UF 16V 0805 Y5V

+0.9V_SUS

12

12

4

BC10

1UF 16V 0805 Y5V

C82

0.1UF 25V Y5V

PDF created with pdfFactory Pro trial version www.pdffactory.com

5

MEM_MA0_CLK_H25,11

MEM_MA0_CLK_L25,11

MEM_MA0_CLK_H15,11

D D

MEM_MA0_CLK_L15,11

MEM_MA0_CLK_H05,11

MEM_MA0_CLK_L05,11

MEM_MB0_CLK_H26,12

MEM_MB0_CLK_L26,12

MEM_MB0_CLK_H16,12

MEM_MB0_CLK_L16,12

C C

MEM_MB0_CLK_H06,12

MEM_MB0_CLK_L06,12

LAYOUT: FRONT SIDE PLACE ALTERNATING GND AND 1.8V
ALONG 0.9V VTT FILL

B B

A A

5

12

C116

1.5P 50V NPO 0402

C24

1.5P 50V NPO 0402

BC23

1.5P 50V NPO 0402

C109

1.5P 50V NPO 0402

C26

1.5P 50V NPO 0402

C74

1.5P 50V NPO 0402

+0.9V_SUS

C52 0.1UF 25V Y5V1 2

C85 0.1UF 25V Y5V

1 2

C117 0.1UF 25V Y5V1 2

4

MEM_MA1_CLK_H25,11

MEM_MA1_CLK_L25,11

MEM_MA1_CLK_H15,11

MEM_MA1_CLK_L15,11

MEM_MA1_CLK_H05,11

MEM_MA1_CLK_L05,11

MEM_MB1_CLK_H26,12

MEM_MB1_CLK_L26,12

MEM_MB1_CLK_H16,12

MEM_MB1_CLK_L16,12

MEM_MB1_CLK_H06,12

MEM_MB1_CLK_L06,12

+0.9V_SUS+1.8V_SUS

C126 0.1UF 25V Y5V1 2

C118 0.1UF 25V Y5V

1 2

C100 0.1UF 25V Y5V

1 2

C99 1UF 10V Y5V1 2

C105 0.1UF 25V Y5V1 2

C112 0.1UF 25V Y5V1 2

C130 0.1UF 25V Y5V

1 2

C60 0.1UF 25V Y5V

1 2

4

C115

C31

BC30

C113

C33

C79

+0.9V_SUS

1 2

+1.8V_SUS

C114 1UF 10V Y5V

1 2

C55 1UF 16V 0805 Y5V1 2

1.5P 50V NPO 0402

1.5P 50V NPO 0402

1.5P 50V NPO 0402

1.5P 50V NPO 0402

1.5P 50V NPO 0402

1.5P 50V NPO 0402

3

MEM_MA_ADD[15..0]5,11 MEM_MB_ADD[15..0]6,12

MEM_MA_BANK05,11
MEM_MA_BANK15,11
MEM_MA_BANK25,11
MEM_MA_CAS_L5,11

MEM_MA_WE_L5,11

MEM_MA_RAS_L5,11

MEM_MA_CKE05,11
MEM_MA_CKE15,11 MEM_MB_CKE16,12

MEM_MA0_CS_L05,11
MEM_MA0_CS_L15,11
MEM_MA1_CS_L05,11
MEM_MA1_CS_L15,11

MEM_MA0_ODT05,11
MEM_MA1_ODT05,11

MEM_MA_ADD[15..0]

MEM_MA_ADD9
MEM_MB_BANK2
MEM_MA_ADD12
MEM_MB_ADD12

MEM_MB_ADD4 MEM_MB_ADD14
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MB_ADD2

MEM_MA_ADD0
MEM_MB_BANK1
MEM_MB_ADD10
MEM_MB_BANK0

MEM_MB_ADD3
MEM_MB_ADD5
MEM_MB_ADD6
MEM_MA_ADD4

MEM_MA1_ODT0
MEM_MA0_CS_L1
MEM_MA0_ODT0
MEM_MB_CAS_L

MEM_MA_CKE0
MEM_MA_ADD15
MEM_MB_ADD15
MEM_MA_ADD11

MEM_MA0_CS_L0
MEM_MA_CAS_L
MEM_MB0_ODT0
MEM_MB1_CS_L1

MEM_MA_BANK0
MEM_MA_RAS_L
MEM_MB1_CS_L0
MEM_MB0_CS_L0

MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MA_ADD3
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD8
MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD15

MEM_MB_CKE06,12

MEM_MB0_CS_L06,12
MEM_MB0_CS_L16,12

MEM_MB1_CS_L16,12

MEM_MB1_CS_L06,12

MEM_MB0_ODT06,12
MEM_MB1_ODT06,12

3

RN8 47 8P4R

78
56
34
12

RN1247 8P4R

78
56
34
12

RN1347 8P4R

78
56
34
12

RN1147 8P4R

78
56
34
12

RN1847 8P4R

78
56
34
12

RN7 47 8P4R

78
56
34
12

RN1747 8P4R

78
56
34
12

RN1647 8P4R

78
56
34
12

22P 50V NPO 0402BC43
22P 50V NPO 0402BC44
22P 50V NPO 0402BC22

22P 50V NPO 0402BC47
22P 50V NPO 0402BC46
22P 50V NPO 0402BC41
22P 50V NPO 0402BC40
22P 50V NPO 0402BC39
22P 50V NPO 0402BC37
22P 50V NPO 0402BC38
22P 50V NPO 0402BC34
22P 50V NPO 0402BC35
22P 50V NPO 0402BC33
22P 50V NPO 0402BC29
22P 50V NPO 0402BC28
22P 50V NPO 0402BC42
22P 50V NPO 0402BC27
22P 50V NPO 0402BC21C32 0.1UF 25V Y5V
22P 50V NPO 0402BC48
22P 50V NPO 0402BC16
22P 50V NPO 0402BC17C128 0.1UF 25V Y5V1 2

2

+0.9V_SUS

+1.8V_SUS

2

1

+0.9V_SUS

MEM_MB_ADD[15..0]

MEM_MA_BANK2
MEM_MA_ADD6

MEM_MA_ADD8

MEM_MA_ADD7

MEM_MB_ADD9
MEM_MB_ADD11
MEM_MB_ADD7

MEM_MB_ADD8
MEM_MA_ADD5
MEM_MB_ADD1
MEM_MA_ADD3

MEM_MB_RAS_L
MEM_MB_ADD0
MEM_MA_ADD10
MEM_MA_BANK1

MEM_MB_WE_L
MEM_MA_WE_L
MEM_MA1_CS_L0
MEM_MA_ADD13

MEM_MB_CKE0
MEM_MA_ADD14
MEM_MB_CKE1
MEM_MA_CKE1

MEM_MB_ADD13
MEM_MA1_CS_L1
MEM_MB0_CS_L1
MEM_MB1_ODT0

MEM_MB_BANK06,12
MEM_MB_BANK16,12
MEM_MB_BANK26,12
MEM_MB_CAS_L6,12

MEM_MB_WE_L6,12

MEM_MB_RAS_L6,12

MEM_MB_ADD0
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MB_ADD3
MEM_MB_ADD4
MEM_MB_ADD5
MEM_MB_ADD6
MEM_MB_ADD7
MEM_MB_ADD8
MEM_MB_ADD9
MEM_MB_ADD10
MEM_MB_ADD11
MEM_MB_ADD12
MEM_MB_ADD13
MEM_MB_ADD14
MEM_MB_ADD15

Title

DDR ADD/CTL/VTT TERMINATI

Size Document Number Rev

Custom

Date: Sheet of

CRU51-M2

1

RN6 47 8P4R

78
56
34
12

RN9 47 8P4R

78
56
34
12

RN1047 8P4R

78
56
34
12

RN1447 8P4R

78
56
34
12

RN1947 8P4R

78
56
34
12

RN5 47 8P4R

78
56
34
12

RN2147 8P4R

78
56
34
12

22P 50V NPO 0402C94
22P 50V NPO 0402C90
22P 50V NPO 0402C63
22P 50V NPO 0402C103
22P 50V NPO 0402C10222P 50V NPO 0402BC45
22P 50V NPO 0402C96
22P 50V NPO 0402C88
22P 50V NPO 0402C81
22P 50V NPO 0402C83
22P 50V NPO 0402C77
22P 50V NPO 0402C76
22P 50V NPO 0402C73
22P 50V NPO 0402C72
22P 50V NPO 0402C69
22P 50V NPO 0402C68
22P 50V NPO 0402C65
22P 50V NPO 0402C92
22P 50V NPO 0402C66
22P 50V NPO 0402C61
22P 50V NPO 0402C110
22P 50V NPO 0402C59
22P 50V NPO 0402C57

+1.8V_SUS

10 39Friday, July 07, 2006

1.3

PDF created with pdfFactory Pro trial version www.pdffactory.com

5

4

3

2

1

175

VDDQ1

181

191

VDDQ2

VDDQ3

194515662727578

VDDQ4

VDDQ5

VDDQ6

VDDQ7

+3.3V

DIMMA1

238

VDDQ8

VDDQ9

VDDQ10

VDDQ11

VDDSPD

ERR_OUT_L

PAR_IN

DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
DQ33
DQ32
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1

DQ0
WE_L
VREF
TEST
ODT0

ODT1

NC1

MEM_MA_DATA[0..63]

236
235
230
229
117
116
111
110
227
226
218
217
108
107
99
98
215
214
209
208
96
95
90
89
206
205
200
199
87
86
81
80
159
158
153
152
40
39
34
33
150
149
144
143
31
30
25
24
141
140
132
131
22
21
13
12
129
128
123
122
10
9
4
3

73
1
102
195

77
55

68
19

MEM_MA_DATA[0..63]5

MEM_MA_DATA63
MEM_MA_DATA62
MEM_MA_DATA61
MEM_MA_DATA60
MEM_MA_DATA59
MEM_MA_DATA58
MEM_MA_DATA57
MEM_MA_DATA56
MEM_MA_DATA55
MEM_MA_DATA54
MEM_MA_DATA53
MEM_MA_DATA52
MEM_MA_DATA51
MEM_MA_DATA50
MEM_MA_DATA49
MEM_MA_DATA48
MEM_MA_DATA47
MEM_MA_DATA46
MEM_MA_DATA45
MEM_MA_DATA44
MEM_MA_DATA43
MEM_MA_DATA42
MEM_MA_DATA41
MEM_MA_DATA40
MEM_MA_DATA39
MEM_MA_DATA38
MEM_MA_DATA37

MEM_MA_DATA35
MEM_MA_DATA34
MEM_MA_DATA33
MEM_MA_DATA32
MEM_MA_DATA31
MEM_MA_DATA30
MEM_MA_DATA29
MEM_MA_DATA28
MEM_MA_DATA27
MEM_MA_DATA26
MEM_MA_DATA25
MEM_MA_DATA24
MEM_MA_DATA23
MEM_MA_DATA22
MEM_MA_DATA21
MEM_MA_DATA20
MEM_MA_DATA19
MEM_MA_DATA18
MEM_MA_DATA17MEM_MA_ADD15
MEM_MA_DATA16
MEM_MA_DATA15
MEM_MA_DATA14
MEM_MA_DATA13
MEM_MA_DATA12
MEM_MA_DATA11
MEM_MA_DATA10
MEM_MA_DATA9
MEM_MA_DATA8
MEM_MA_DATA7
MEM_MA_DATA6
MEM_MA_DATA5
MEM_MA_DATA4
MEM_MA_DATA3
MEM_MA_DATA2
MEM_MA_DATA1
MEM_MA_DATA0

MEM_MA_WE_L5,10 MEM_MA_WE_L5,10

MEM_M_VREF

MEM_MA0_ODT05,10

MEM_MA_DQS_H[8..0]5

MEM_MA_DQS_L[8..0]5

MEM_MA_ADD[15..0]5,10

MEM_MA_CHECK[7..0]5

MEM_MA_DM[8..0]

MEM_MA_DM[8..0]5 MEM_MA_DATA[0..63]5

MEM_MA_DM8
MEM_MA_DM7
MEM_MA_DM6
MEM_MA_DM5
MEM_MA_DM4
MEM_MA_DM3
MEM_MA_DM2
MEM_MA_DM1
MEM_MA_DM0

MEM_MA_DQS_H[8..0]
MEM_MA_DQS_H8
MEM_MA_DQS_L8
MEM_MA_DQS_H7
MEM_MA_DQS_L7
MEM_MA_DQS_H6
MEM_MA_DQS_L6
MEM_MA_DQS_H5
MEM_MA_DQS_L5
MEM_MA_DQS_H4
MEM_MA_DQS_L4
MEM_MA_DQS_H3
MEM_MA_DQS_L3 MEM_MA_DATA34
MEM_MA_DQS_H2
MEM_MA_DQS_L2
MEM_MA_DQS_H1
MEM_MA_DQS_L1
MEM_MA_DQS_H0
MEM_MA_DQS_L0
MEM_MA_DQS_L[8..0]

+3.3V

SMB_MEM_SCL12,18
SMB_MEM_SDA12,18
MEM_MA_BANK25,10
MEM_MA_BANK15,10
MEM_MA_BANK05,10

MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0

MEM_MA_CHECK[7..0]
MEM_MA_CHECK7
MEM_MA_CHECK6
MEM_MA_CHECK5
MEM_MA_CHECK4
MEM_MA_CHECK3
MEM_MA_CHECK2
MEM_MA_CHECK1
MEM_MA_CHECK0

MEM_MA1_CLK_H05,10
MEM_MA1_CLK_L05,10
MEM_MA1_CLK_H15,10
MEM_MA1_CLK_L15,10
MEM_MA1_CLK_H25,10
MEM_MA1_CLK_L25,10

MEM_MA_CKE1

MEM_MA_CKE15,10

MEM_MA_RAS_L5,10
MEM_MA_CAS_L5,10

MEM_MA1_CS_L05,10
MEM_MA1_CS_L15,10

+1.8V_SUS +3.3V

DIMMA2

172

178

184

187

189

1975359646769170

VDD1

VDD2

VDD3

VDD4

VDD5

VDD6

VDD7

VDD8

VDD9

VDD10

164
165
232
233
223
224
211
212
202
203
155
156
146
147
134
135
125
126

46

45
114
113
105
104

93

92

84

83

37

36

28

27

16

15

7
6

101
240
239
120
119

54
190

71
173

174
196
176

57

70
177
179

58
180

60

61
182

63
183
188

168
167
162
161

49

48

43

42
185

186
137
138
220
221

18

52
171
192

74
193

76

DQS17_H
DQS17_L
DQS16_H
DQS16_L
DQS15_H
DQS15_L
DQS14_H
DQS14_L
DQS13_H
DQS13_L
DQS12_H
DQS12_L
DQS11_H
DQS11_L
DQS10_H
DQS10_L
DQS9_H
DQS9_L
DQS8_H
DQS8_L
DQS7_H
DQS7_L
DQS6_H
DQS6_L
DQS5_H
DQS5_L
DQS4_H
DQS4_L
DQS3_H
DQS3_L
DQS2_H
DQS2_L
DQS1_H
DQS1_L
DQS0_H
DQS0_L

SA2
SA1
SA0
SCL
SDA
BA2
BA1
BA0

A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

CB7
CB6
CB5
CB4
CB3
CB2
CB1
CB0

CK0_H
CK0_L
CK1_H
CK1_L
CK2_H
CK2_L

RESET_L
CKE0

CKE1
RAS_L
CAS_L

S0_L
S1_L

DDR2-240 pin-W

VDD11

VDDQ1

175

VDDQ2

181

191

VDDQ3

VDDQ4

194515662727578

VDDQ5

VDDQ6

VDDQ7

VDDQ8

VDDQ9

VDDQ10

238

VDDQ11

ERR_OUT_L

VDDSPD

PAR_IN

DIMMA2

236

DQ63

235

DQ62

230

DQ61

229

DQ60

117

DQ59

116

DQ58

111

DQ57

110

DQ56

227

DQ55

226

DQ54

218

DQ53

217

DQ52

108

DQ51

107

DQ50

99

DQ49

98

DQ48

215

DQ47

214

DQ46

209

DQ45

208

DQ44

96

DQ43

95

DQ42

90

DQ41

89

DQ40

206

DQ39

205

DQ38

200

DQ37

199

DQ36

87

DQ35

86

DQ34

81

DQ33

80

DQ32

159

DQ31

158

DQ30

153

DQ29

152

DQ28

40

DQ27

39

DQ26

34

DQ25

33

DQ24

150

DQ23

149

DQ22

144

DQ21

143

DQ20

31

DQ19

30

DQ18

25

DQ17

24

DQ16

141

DQ15

140

DQ14

132

DQ13

131

DQ12

22

DQ11

21

DQ10

13

DQ9

12

DQ8

129

DQ7

128

DQ6

123

DQ5

122

DQ4

10

DQ3

9

DQ2

4

DQ1

3

DQ0

73

WE_L

1

VREF

102

TEST

195

ODT0

77

ODT1

55
68

19

NC1

MEM_MA_DATA[0..63]

MEM_MA_DATA63
MEM_MA_DATA62
MEM_MA_DATA61
MEM_MA_DATA60
MEM_MA_DATA59
MEM_MA_DATA58
MEM_MA_DATA57
MEM_MA_DATA56
MEM_MA_DATA55
MEM_MA_DATA54
MEM_MA_DATA53
MEM_MA_DATA52
MEM_MA_DATA51
MEM_MA_DATA50
MEM_MA_DATA49
MEM_MA_DATA48
MEM_MA_DATA47
MEM_MA_DATA46
MEM_MA_DATA45
MEM_MA_DATA44
MEM_MA_DATA43
MEM_MA_DATA42
MEM_MA_DATA41
MEM_MA_DATA40
MEM_MA_DATA39
MEM_MA_DATA38
MEM_MA_DATA37
MEM_MA_DATA36MEM_MA_DATA36
MEM_MA_DATA35

MEM_MA_DATA33
MEM_MA_DATA32
MEM_MA_DATA31
MEM_MA_DATA30
MEM_MA_DATA29
MEM_MA_DATA28
MEM_MA_DATA27
MEM_MA_DATA26
MEM_MA_DATA25
MEM_MA_DATA24
MEM_MA_DATA23
MEM_MA_DATA22
MEM_MA_DATA21
MEM_MA_DATA20
MEM_MA_DATA19
MEM_MA_DATA18
MEM_MA_DATA17
MEM_MA_DATA16
MEM_MA_DATA15
MEM_MA_DATA14
MEM_MA_DATA13
MEM_MA_DATA12
MEM_MA_DATA11
MEM_MA_DATA10
MEM_MA_DATA9
MEM_MA_DATA8
MEM_MA_DATA7
MEM_MA_DATA6
MEM_MA_DATA5
MEM_MA_DATA4
MEM_MA_DATA3
MEM_MA_DATA2
MEM_MA_DATA1
MEM_MA_DATA0

12

C15

0.1UF 25V Y5V

PLACE NEAR DIMM SOCKETS

MEM_M_VREF

MEM_MA1_ODT05,10

+1.8V_SUS

DIMMA1

172

178

184

187

189

DQS17_H
DQS17_L
DQS16_H
DQS16_L
DQS15_H
DQS15_L
DQS14_H
DQS14_L
DQS13_H
DQS13_L
DQS12_H
DQS12_L
DQS11_H
DQS11_L
DQS10_H
DQS10_L
DQS9_H
DQS9_L
DQS8_H
DQS8_L
DQS7_H
DQS7_L
DQS6_H
DQS6_L
DQS5_H
DQS5_L
DQS4_H
DQS4_L
DQS3_H
DQS3_L
DQS2_H
DQS2_L
DQS1_H
DQS1_L
DQS0_H
DQS0_L

SA2
SA1
SA0
SCL
SDA
BA2
BA1
BA0

A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

CB7
CB6
CB5
CB4
CB3
CB2
CB1
CB0

CK0_H
CK0_L
CK1_H
CK1_L
CK2_H
CK2_L

RESET_L
CKE0

CKE1
RAS_L
CAS_L

S0_L
S1_L

DDR2-240 pin

VDD1

VDD2

VDD3

1975359646769170

VDD4

VDD5

VDD6

VDD7

VDD8

VDD9

VDD10

VDD11

D D

MEM_MA_DQS_H[8..0]5

C C

MEM_MA_DQS_L[8..0]5

MEM_MA_ADD[15..0]5,10

MEM_MA_CHECK[7..0]5

B B

MEM_MA_DM[8..0]

MEM_MA_DM[8..0]5

MEM_MA_DM8

164
165

MEM_MA_DM7

232
233

MEM_MA_DM6

223
224

MEM_MA_DM5

211
212

MEM_MA_DM4

202
203

MEM_MA_DM3

155
156

MEM_MA_DM2

146
147

MEM_MA_DM1

134
135

MEM_MA_DM0

125

MEM_MA_DQS_H[8..0]

126

MEM_MA_DQS_H8

46

MEM_MA_DQS_L8

45

MEM_MA_DQS_H7

114

MEM_MA_DQS_L7

113

MEM_MA_DQS_H6

105

MEM_MA_DQS_L6

104

MEM_MA_DQS_H5

93

MEM_MA_DQS_L5

92

MEM_MA_DQS_H4

84

MEM_MA_DQS_L4

83

MEM_MA_DQS_H3

37

MEM_MA_DQS_L3

36

MEM_MA_DQS_H2

28

MEM_MA_DQS_L2

27

MEM_MA_DQS_H1

16

MEM_MA_DQS_L1

15

MEM_MA_DQS_H0
MEM_MA_DQS_L0
MEM_MA_DQS_L[8..0]

SMB_MEM_SCL12,18
SMB_MEM_SDA12,18
MEM_MA_BANK25,10
MEM_MA_BANK15,10
MEM_MA_BANK05,10

MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0

MEM_MA_CHECK7
MEM_MA_CHECK6
MEM_MA_CHECK5
MEM_MA_CHECK4
MEM_MA_CHECK3
MEM_MA_CHECK2
MEM_MA_CHECK1
MEM_MA_CHECK0

MEM_MA0_CLK_H05,10
MEM_MA0_CLK_L05,10
MEM_MA0_CLK_H15,10
MEM_MA0_CLK_L15,10
MEM_MA0_CLK_H25,10
MEM_MA0_CLK_L25,10

MEM_MA_CKE0

MEM_MA_CKE05,10

MEM_MA_RAS_L5,10
MEM_MA_CAS_L5,10

MEM_MA0_CS_L05,10
MEM_MA0_CS_L15,10

MEM_MA_CHECK[7..0]

7
6

101
240
239
120
119

54

190

71

173
174
196
176

57

70

177
179

58

180

60

61

182

63

183
188

168
167
162
161

49

48

43

42

185
186
137
138
220
221

18

52

171
192

74

193

76

+1.8V_SUS

R20

A A

5

150 1%

1 2

R18
150 1%

1 2

12

C18
1UF 10V Y5V

MEM_M_VREF

12

C10

0.1UF 25V Y5V /NI

PLACE NEAR DIMM SOCKETS

Title

DDR DIMM0&1

Size Document Number Rev

C

4

3

2

Date: Sheet of

CRU51-M2

1

11 39Friday, July 07, 2006

1.3

PDF created with pdfFactory Pro trial version www.pdffactory.com

5

4

3

2

1

+1.8V_SUS

DIMMB1

DIMMB1

172

178

184

187

189

1975359646769170

175

181

191

194515662727578

D D

MEM_MB_DQS_H[8..0]6

C C

B B

MEM_MB_DQS_L[8..0]6

MEM_MB_ADD[15..0]6,10

MEM_MB_CHECK[7..0]6

MEM_MB_DM[8..0]

MEM_MB_DM[8..0]6

MEM_MB_DM8
MEM_MB_DM7
MEM_MB_DM6
MEM_MB_DM5
MEM_MB_DM4
MEM_MB_DM3
MEM_MB_DM2
MEM_MB_DM1
MEM_MB_DM0

MEM_MB_DQS_H[8..0]
MEM_MB_DQS_H8
MEM_MB_DQS_L8
MEM_MB_DQS_H7
MEM_MB_DQS_L7
MEM_MB_DQS_H6
MEM_MB_DQS_L6
MEM_MB_DQS_H5
MEM_MB_DQS_L5
MEM_MB_DQS_H4
MEM_MB_DQS_L4
MEM_MB_DQS_H3
MEM_MB_DQS_L3
MEM_MB_DQS_H2
MEM_MB_DQS_L2
MEM_MB_DQS_H1
MEM_MB_DQS_L1
MEM_MB_DQS_H0
MEM_MB_DQS_L0
MEM_MB_DQS_L[8..0]

+3.3V

SMB_MEM_SCL11,18
SMB_MEM_SDA11,18

MEM_MB_BANK26,10
MEM_MB_BANK16,10
MEM_MB_BANK06,10

MEM_MB_ADD[15..0]
MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10

MEM_MB_ADD8
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0
MEM_MB_CHECK[7..0]
MEM_MB_CHECK7
MEM_MB_CHECK6
MEM_MB_CHECK5
MEM_MB_CHECK4
MEM_MB_CHECK3
MEM_MB_CHECK2
MEM_MB_CHECK1
MEM_MB_CHECK0

MEM_MB0_CLK_H06,10
MEM_MB0_CLK_L06,10
MEM_MB0_CLK_H16,10
MEM_MB0_CLK_L16,10
MEM_MB0_CLK_H26,10
MEM_MB0_CLK_L26,10

MEM_MB_CKE06,10

MEM_MB_RAS_L6,10
MEM_MB_CAS_L6,10

MEM_MB0_CS_L06,10
MEM_MB0_CS_L16,10

164
165
232
233
223
224
211
212
202
203
155
156
146
147
134
135
125
126

46

45
114
113
105
104

93

92

84

83

37

36

28

27

16

15

101
240
239
120
119

54
190

71
173

174
196
176

57

70
177
179

58
180

60

61
182

63
183
188

168
167
162
161

49

48

43

42
185

186
137
138
220
221

18

52
171
192

74
193

76

DQS17_H
DQS17_L
DQS16_H
DQS16_L
DQS15_H
DQS15_L
DQS14_H
DQS14_L
DQS13_H
DQS13_L
DQS12_H
DQS12_L
DQS11_H
DQS11_L
DQS10_H
DQS10_L
DQS9_H
DQS9_L
DQS8_H
DQS8_L
DQS7_H
DQS7_L
DQS6_H
DQS6_L
DQS5_H
DQS5_L
DQS4_H
DQS4_L
DQS3_H
DQS3_L
DQS2_H
DQS2_L
DQS1_H
DQS1_L

7

DQS0_H

6

DQS0_L
SA2

SA1
SA0
SCL
SDA
BA2
BA1
BA0

A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

CB7
CB6
CB5
CB4
CB3
CB2
CB1
CB0

CK0_H
CK0_L
CK1_H
CK1_L
CK2_H
CK2_L

RESET_L
CKE0

CKE1
RAS_L
CAS_L

S0_L
S1_L

DDR2-240 pin

VDD1

VDD2

VDD3

VDD4

VDD5

VDD6

VDD7

VDD8

VDD9

VDD10

VDD11

VDDQ1

238

VDDQ2

VDDQ3

VDDQ4

VDDQ5

VDDQ6

VDDQ7

VDDQ8

VDDQ9

VDDQ10

VDDQ11

ERR_OUT_L

MEM_MB_DATA[0..63]

VDDSPD

236

DQ63

235

DQ62

230

DQ61

229

DQ60

117

DQ59

116

DQ58

111

DQ57

110

DQ56

227

DQ55

226

DQ54

218

DQ53

217

DQ52

108

DQ51

107

DQ50

99

DQ49

98

DQ48

215

DQ47

214

DQ46

209

DQ45

208

DQ44

96

DQ43

95

DQ42

90

DQ41

89

DQ40

206

DQ39

205

DQ38

200

DQ37

199

DQ36

87

DQ35

86

DQ34

81

DQ33

80

DQ32

159

DQ31

158

DQ30

153

DQ29

152

DQ28

40

DQ27

39

DQ26

34

DQ25

33

DQ24

150

DQ23

149

DQ22

144

DQ21

143

DQ20

31

DQ19

30

DQ18

25

DQ17

24

DQ16

141

DQ15

140

DQ14

132

DQ13

131

DQ12

22

DQ11

21

DQ10

13

DQ9

12

DQ8

129

DQ7

128

DQ6

123

DQ5

122

DQ4

10

DQ3

9

DQ2

4

DQ1

3

DQ0

73

WE_L

1

VREF

102

TEST

195

ODT0

77

ODT1

55
68

PAR_IN

19

NC1

MEM_MB_DATA[0..63]6

MEM_MB_DATA63
MEM_MB_DATA62 MEM_MB_DATA63
MEM_MB_DATA61
MEM_MB_DATA60
MEM_MB_DATA59
MEM_MB_DATA58
MEM_MB_DATA57
MEM_MB_DATA56
MEM_MB_DATA55
MEM_MB_DATA54
MEM_MB_DATA53
MEM_MB_DATA52
MEM_MB_DATA51
MEM_MB_DATA50
MEM_MB_DATA49
MEM_MB_DATA48
MEM_MB_DATA47
MEM_MB_DATA46
MEM_MB_DATA45
MEM_MB_DATA44
MEM_MB_DATA43
MEM_MB_DATA42
MEM_MB_DATA41
MEM_MB_DATA40
MEM_MB_DATA39
MEM_MB_DATA38
MEM_MB_DATA37
MEM_MB_DATA36
MEM_MB_DATA35
MEM_MB_DATA34
MEM_MB_DATA33
MEM_MB_DATA32
MEM_MB_DATA31
MEM_MB_DATA30
MEM_MB_DATA29
MEM_MB_DATA28
MEM_MB_DATA27
MEM_MB_DATA26
MEM_MB_DATA25
MEM_MB_DATA24
MEM_MB_DATA23
MEM_MB_DATA22
MEM_MB_DATA21
MEM_MB_DATA20
MEM_MB_DATA19
MEM_MB_DATA18
MEM_MB_DATA17
MEM_MB_DATA16
MEM_MB_DATA15
MEM_MB_DATA14
MEM_MB_DATA13
MEM_MB_DATA12
MEM_MB_DATA11MEM_MB_ADD9
MEM_MB_DATA10
MEM_MB_DATA9
MEM_MB_DATA8
MEM_MB_DATA7
MEM_MB_DATA6
MEM_MB_DATA5
MEM_MB_DATA4
MEM_MB_DATA3
MEM_MB_DATA2
MEM_MB_DATA1
MEM_MB_DATA0

MEM_MB_WE_L6,10

MEM_M_VREF

12

C13

0.1UF 25V Y5V

MEM_MB0_ODT06,10

PLACE NEAR DIMM SOCKETS

MEM_MB_DM[8..0]6

MEM_MB_DQS_H[8..0]6

MEM_MB_DQS_L[8..0]6

MEM_MB_ADD[15..0]6,10

MEM_MB_CHECK[7..0]6

MEM_MB_DM[8..0]
MEM_MB_DM8
MEM_MB_DM7
MEM_MB_DM6
MEM_MB_DM5
MEM_MB_DM4
MEM_MB_DM3
MEM_MB_DM2
MEM_MB_DM1
MEM_MB_DM0

MEM_MB_DQS_H[8..0]
MEM_MB_DQS_H8
MEM_MB_DQS_L8
MEM_MB_DQS_H7
MEM_MB_DQS_L7
MEM_MB_DQS_H6
MEM_MB_DQS_L6
MEM_MB_DQS_H5
MEM_MB_DQS_L5
MEM_MB_DQS_H4
MEM_MB_DQS_L4
MEM_MB_DQS_H3
MEM_MB_DQS_L3
MEM_MB_DQS_H2
MEM_MB_DQS_L2
MEM_MB_DQS_H1
MEM_MB_DQS_L1
MEM_MB_DQS_H0
MEM_MB_DQS_L0
MEM_MB_DQS_L[8..0]

+3.3V

SMB_MEM_SCL11,18
SMB_MEM_SDA11,18

MEM_MB_BANK26,10
MEM_MB_BANK16,10
MEM_MB_BANK06,10

MEM_MB_ADD[15..0]
MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0
MEM_MB_CHECK[7..0]
MEM_MB_CHECK7
MEM_MB_CHECK6
MEM_MB_CHECK5
MEM_MB_CHECK4
MEM_MB_CHECK3
MEM_MB_CHECK2
MEM_MB_CHECK1
MEM_MB_CHECK0

MEM_MB1_CLK_H06,10
MEM_MB1_CLK_L06,10
MEM_MB1_CLK_H16,10
MEM_MB1_CLK_L16,10
MEM_MB1_CLK_H26,10
MEM_MB1_CLK_L26,10

MEM_MB_CKE16,10

MEM_MB_RAS_L6,10
MEM_MB_CAS_L6,10

MEM_MB1_CS_L06,10
MEM_MB1_CS_L16,10

164
165
232
233
223
224
211
212
202
203
155
156
146
147
134
135
125
126

46

45
114
113
105
104

93

92

84

83

37

36

28

27

16

15

7
6

101
240
239
120
119

54
190

71
173

174
196
176

57

70
177
179

58
180

60

61
182

63
183
188

168
167
162
161

49

48

43

42
185

186
137
138
220
221

18

52
171
192

74
193

76

+1.8V_SUS+3.3V

DIMMB2

DQS17_H
DQS17_L
DQS16_H
DQS16_L
DQS15_H
DQS15_L
DQS14_H
DQS14_L
DQS13_H
DQS13_L
DQS12_H
DQS12_L
DQS11_H
DQS11_L
DQS10_H
DQS10_L
DQS9_H
DQS9_L
DQS8_H
DQS8_L
DQS7_H
DQS7_L
DQS6_H
DQS6_L
DQS5_H
DQS5_L
DQS4_H
DQS4_L
DQS3_H
DQS3_L
DQS2_H
DQS2_L
DQS1_H
DQS1_L
DQS0_H
DQS0_L

SA2
SA1
SA0
SCL
SDA
BA2
BA1
BA0

A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

CB7
CB6
CB5
CB4
CB3
CB2
CB1
CB0

CK0_H
CK0_L
CK1_H
CK1_L
CK2_H
CK2_L

RESET_L
CKE0

CKE1
RAS_L
CAS_L

S0_L
S1_L

DDR2-240 pin-W

172

178

VDD1

VDD2

184

187

189

VDD3

VDD4

VDD5

1975359646769170

VDD6

VDD7

VDD8

VDD9

VDD10

+3.3V

DIMMB2

175

181

191

194515662727578

238

VDD11

VDDQ1

VDDQ2

VDDQ3

VDDQ4

VDDQ5

VDDQ6

VDDQ7

VDDQ8

VDDQ9

VDDQ10

VDDQ11

ERR_OUT_L

MEM_MB_DATA[0..63]

VDDSPD

236

DQ63

235

DQ62

230

DQ61

229

DQ60

117

DQ59

116

DQ58

111

DQ57

110

DQ56

227

DQ55

226

DQ54

218

DQ53

217

DQ52

108

DQ51

107

DQ50

99

DQ49

98

DQ48

215

DQ47

214

DQ46

209

DQ45

208

DQ44

96

DQ43

95

DQ42

90

DQ41

89

DQ40

206

DQ39

205

DQ38

200

DQ37

199

DQ36

87

DQ35

86

DQ34

81

DQ33

80

DQ32

159

DQ31

158

DQ30

153

DQ29

152

DQ28

40

DQ27

39

DQ26

34

DQ25

33

DQ24

150

DQ23

149

DQ22

144

DQ21

143

DQ20

31

DQ19

30

DQ18

25

DQ17

24

DQ16

141

DQ15

140

DQ14

132

DQ13

131

DQ12

22

DQ11

21

DQ10

13

DQ9

12

DQ8

129

DQ7

128

DQ6

123

DQ5

122

DQ4

10

DQ3

9

DQ2

4

DQ1

3

DQ0

73

WE_L

1

VREF

102

TEST

195

ODT0

77

ODT1

55
68

PAR_IN

19

NC1

MEM_MB_DATA62
MEM_MB_DATA61
MEM_MB_DATA60
MEM_MB_DATA59
MEM_MB_DATA58
MEM_MB_DATA57
MEM_MB_DATA56
MEM_MB_DATA55
MEM_MB_DATA54
MEM_MB_DATA53
MEM_MB_DATA52
MEM_MB_DATA51
MEM_MB_DATA50
MEM_MB_DATA49
MEM_MB_DATA48
MEM_MB_DATA47
MEM_MB_DATA46
MEM_MB_DATA45
MEM_MB_DATA44
MEM_MB_DATA43
MEM_MB_DATA42
MEM_MB_DATA41
MEM_MB_DATA40
MEM_MB_DATA39
MEM_MB_DATA38
MEM_MB_DATA37
MEM_MB_DATA36
MEM_MB_DATA35
MEM_MB_DATA34
MEM_MB_DATA33
MEM_MB_DATA32
MEM_MB_DATA31
MEM_MB_DATA30
MEM_MB_DATA29
MEM_MB_DATA28
MEM_MB_DATA27
MEM_MB_DATA26
MEM_MB_DATA25
MEM_MB_DATA24
MEM_MB_DATA23
MEM_MB_DATA22
MEM_MB_DATA21
MEM_MB_DATA20
MEM_MB_DATA19
MEM_MB_DATA18
MEM_MB_DATA17
MEM_MB_DATA16
MEM_MB_DATA15
MEM_MB_DATA14
MEM_MB_DATA13
MEM_MB_DATA12
MEM_MB_DATA11
MEM_MB_DATA10
MEM_MB_DATA9
MEM_MB_DATA8
MEM_MB_DATA7
MEM_MB_DATA6
MEM_MB_DATA5
MEM_MB_DATA4
MEM_MB_DATA3
MEM_MB_DATA2
MEM_MB_DATA1
MEM_MB_DATA0

MEM_M_VREF

12

C11
1UF 10V Y5V

PLACE NEAR DIMM SOCKETS

MEM_MB_DATA[0..63]6

MEM_MB_WE_L6,10

MEM_MB1_ODT06,10

A A

Title

DDR DIMM0&1

Size Document Number Rev

C

5

4

3

2

Date: Sheet of

CRU51-M2

1

12 39Friday, July 07, 2006

1.3

PDF created with pdfFactory Pro trial version www.pdffactory.com

5

D D

BFB5
BEAD 60 0805 1A

PLACE ON
CHIP
BACK
SIDE

HTCPU_DWN[15..0]
HTCPU_DWN0
HTCPU_DWN1
HTCPU_DWN2
HTCPU_DWN3
HTCPU_DWN4
HTCPU_DWN5
HTCPU_DWN6
HTCPU_DWN7
HTCPU_DWN8
HTCPU_DWN9
HTCPU_DWN10
HTCPU_DWN11
HTCPU_DWN12
HTCPU_DWN13
HTCPU_DWN14
HTCPU_DWN15
HTCPU_DWN_[15..0]
HTCPU_DWN_0
HTCPU_DWN_1
HTCPU_DWN_2
HTCPU_DWN_3
HTCPU_DWN_4
HTCPU_DWN_5
HTCPU_DWN_6
HTCPU_DWN_7
HTCPU_DWN_8
HTCPU_DWN_9
HTCPU_DWN_10
HTCPU_DWN_11
HTCPU_DWN_12
HTCPU_DWN_13
HTCPU_DWN_14
HTCPU_DWN_15

HTCPU_DWNCLK0
HTCPU_DWNCLK0_
HTCPU_DWNCLK1
HTCPU_DWNCLK1_

HTCPU_DWNCNTL
HTCPU_DWNCNTL_

HTCPUCAL_1P2V
HTCPUCAL_GND

1P2VPLL_FILT

BC56

1UF 10V Y5V

HTCPU_DWN[15..0]5

HTCPU_DWN_[15..0]5

C C

HTCPU_DWNCLK05
HTCPU_DWNCLK0_5
HTCPU_DWNCLK15
HTCPU_DWNCLK1_5

HTCPU_DWNCNTL5
HTCPU_DWNCNTL_5

1P2VPLL_PWR14,15

B B

BC55

1UF 10V Y5V

U5A

Y23

HT_CPU_RXD+0

W24

HT_CPU_RXD+1

V24

HT_CPU_RXD+2

U22

HT_CPU_RXD+3

R24

HT_CPU_RXD+4

P24

HT_CPU_RXD+5

P22

HT_CPU_RXD+6

N22

HT_CPU_RXD+7

Y21

HT_CPU_RXD+8

V21

HT_CPU_RXD+9

W21

HT_CPU_RXD+10

T21

HT_CPU_RXD+11

R18

HT_CPU_RXD+12

P16

HT_CPU_RXD+13

N20

HT_CPU_RXD+14

M17

HT_CPU_RXD+15

Y22

HT_CPU_RXD-0

W23

HT_CPU_RXD-1

V23

HT_CPU_RXD-2

U21

HT_CPU_RXD-3

R23

HT_CPU_RXD-4

P23

HT_CPU_RXD-5

P21

HT_CPU_RXD-6

N21

HT_CPU_RXD-7

Y20

HT_CPU_RXD-8

W20

HT_CPU_RXD-9

W22

HT_CPU_RXD-10

U20

HT_CPU_RXD-11

R19

HT_CPU_RXD-12

P17

HT_CPU_RXD-13

N19

HT_CPU_RXD-14

N18

HT_CPU_RXD-15

T23

HT_CPU_RX_CLK+0

T22

HT_CPU_RX_CLK-0

R21

HT_CPU_RX_CLK+1

R20

HT_CPU_RX_CLK-1

M23

HT_CPU_RXCTL+

M22

HT_CPU_RXCTL-

W19

HT_CPU_CAL_1P2V

Y19

HT_CPU_CAL_GND

N16

+1.2V_PLLHTCPU

T13

+1.2V_PLLHTMCP

C51G_PBGA_468

C51
1 OF 6
CPU

4

HT_CPU_TXD+0
HT_CPU_TXD+1
HT_CPU_TXD+2
HT_CPU_TXD+3
HT_CPU_TXD+4
HT_CPU_TXD+5
HT_CPU_TXD+6
HT_CPU_TXD+7
HT_CPU_TXD+8

HT_CPU_TXD+9
HT_CPU_TXD+10
HT_CPU_TXD+11
HT_CPU_TXD+12
HT_CPU_TXD+13
HT_CPU_TXD+14
HT_CPU_TXD+15

HT_CPU_TXD-0
HT_CPU_TXD-1
HT_CPU_TXD-2
HT_CPU_TXD-3
HT_CPU_TXD-4
HT_CPU_TXD-5
HT_CPU_TXD-6
HT_CPU_TXD-7
HT_CPU_TXD-8

HT_CPU_TXD-9
HT_CPU_TXD-10
HT_CPU_TXD-11
HT_CPU_TXD-12
HT_CPU_TXD-13
HT_CPU_TXD-14
HT_CPU_TXD-15

HT_CPU_TX_CLK+0

HT_CPU_TX_CLK-0

HT_CPU_TX_CLK+1

HT_CPU_TX_CLK-1

HT_CPU_TXCTL+

HT_CPU_TXCTL-

CLKOUT0_200MHZ+

CLKOUT0_200MHZ-

CLKOUT1_200MHZ+

CLKOUT1_200MHZ-

HT_CPU_REQ*

HT_CPU_STOP*
HT_CPU_RESET*
HT_CPU_PWRGD

+2.5V_PLLHTCPU

C23
D23
E22
F23
H22
J21
K21
K23
D21
F19
F21
G20
J19
L17
L20
L18

C24
D24
E23
F24
H23
J22
K22
K24
D22
E20
E21
G19
J18
K17
K19
L19

G23
G24
G22
G21

L23
L24

B24
B23
A22
B21

F18
G18
D20
E19

L16

HTCPU_UP[15..0]
HTCPU_UP0
HTCPU_UP1
HTCPU_UP2
HTCPU_UP3
HTCPU_UP4
HTCPU_UP5
HTCPU_UP6
HTCPU_UP7
HTCPU_UP8
HTCPU_UP9
HTCPU_UP10
HTCPU_UP11
HTCPU_UP12
HTCPU_UP13
HTCPU_UP14
HTCPU_UP15
HTCPU_UP_[15..0]
HTCPU_UP_0
HTCPU_UP_1
HTCPU_UP_2
HTCPU_UP_3
HTCPU_UP_4
HTCPU_UP_5
HTCPU_UP_6
HTCPU_UP_7
HTCPU_UP_8
HTCPU_UP_9
HTCPU_UP_10
HTCPU_UP_11
HTCPU_UP_12
HTCPU_UP_13
HTCPU_UP_14
HTCPU_UP_15

HTCPU_UPCLK0
HTCPU_UPCLK0_
HTCPU_UPCLK1
HTCPU_UPCLK1_

HTCPU_UPCNTL
HTCPU_UPCNTL_

CPU_CLK_L+
CPU_CLK_L-

HTCPU_REQ_
HTCPU_STOP_
HTCPU_RST_
HTCPU_PWRGD

2P5V_PLLHTCPU

BC49

1UF 16V 0805 Y5V

HTCPU_STOP_
HTCPU_RST_
HTCPU_PWRGD

HTCPU_UP[15..0] 5

HTCPU_UP_[15..0] 5

HTCPU_UPCLK05
HTCPU_UPCLK0_5
HTCPU_UPCLK15
HTCPU_UPCLK1_5

HTCPU_UPCNTL 5
HTCPU_UPCNTL_5

HTCPU_STOP_7
HTCPU_RST_ 7
HTCPU_PWRGD 7

BFB1
BEAD 60 0805 1A

BC50

1UF 10V Y5V

CPU_CLK_L+

CPU_CLK_L-

RN25

1 2
3 4
5 6
7 8

1K 8P4R

3

+3.3V

2P5V_PWR 7,14,15,38

47.5 1%

47.5 1%

2P5V_PWR 7,14,15,38

HTMCP_UP[7..0]16

HTMCP_UP_[7..0]16

HTMCP_UPCLK016
HTMCP_UPCLK0_16

HTMCP_UPCNTL16
HTMCP_UPCNTL_16

HTMCP_REQ_16
HTMCP_STOP_16
HTMCP_RST_16
HTMCP_PWRGD16

MCPOUT_25MHZ16
MCPOUT_200MHZ16
MCPOUT_200MHZ_16

CPU_CLK

CPU_CLK_

CPU_CLK 7

261 1%

CPU_CLK_ 7

HTMCP_UP[7..0]
HTMCP_UP0
HTMCP_UP1
HTMCP_UP2
HTMCP_UP3
HTMCP_UP4
HTMCP_UP5
HTMCP_UP6
HTMCP_UP7

HTMCP_UP_[7..0]
HTMCP_UP_0
HTMCP_UP_1
HTMCP_UP_2
HTMCP_UP_3
HTMCP_UP_4
HTMCP_UP_5
HTMCP_UP_6
HTMCP_UP_7

HTMCP_UPCLK0
HTMCP_UPCLK0_

HTMCP_UPCNTL
HTMCP_UPCNTL_

HTMCP_REQ_
HTMCP_STOP_
HTMCP_RST_
HTMCP_PWRGD

MCPOUT_25MHZ
MCPOUT_200MHZ
MCPOUT_200MHZ_

AD6
AC7
AA8

AA9
AD10
AD11
AC12
AC13

AA6

W7

Y8
V9

Y10

AA11

V11

W12

AC6

AB7

AB8

AB9
AC10
AC11
AB12
AB13

Y6
Y7

AA7

W9

W10

Y12

W11

V13

AD9

AC9

U10

T10
AD14

AC14

AB5

AA5

AC5

AD5

AC4

Y5

W5

U5B

HT_MCP_RXD+0
HT_MCP_RXD+1
HT_MCP_RXD+2
HT_MCP_RXD+3
HT_MCP_RXD+4
HT_MCP_RXD+5
HT_MCP_RXD+6
HT_MCP_RXD+7
HT_MCP_RXD+8
HT_MCP_RXD+9
HT_MCP_RXD+10
HT_MCP_RXD+11
HT_MCP_RXD+12
HT_MCP_RXD+13
HT_MCP_RXD+14
HT_MCP_RXD+15

HT_MCP_RXD-0
HT_MCP_RXD-1
HT_MCP_RXD-2
HT_MCP_RXD-3
HT_MCP_RXD-4
HT_MCP_RXD-5
HT_MCP_RXD-6
HT_MCP_RXD-7
HT_MCP_RXD-8
HT_MCP_RXD-9
HT_MCP_RXD-10
HT_MCP_RXD-11
HT_MCP_RXD-12
HT_MCP_RXD-13
HT_MCP_RXD-14
HT_MCP_RXD-15

HT_MCP_RX_CLK+0
HT_MCP_RX_CLK-0
HT_MCP_RX_CLK+1
HT_MCP_RX_CLK-1

HT_MCP_RXCTL+
HT_MCP_RXCTL-

HT_MCP_REQ*
HT_MCP_STOP*
HT_MCP_RESET*
HT_MCP_PWRGD

CLKIN_25MHZ
CLKIN_200MHZ+
CLKIN_200MHZ-

C51G_PBGA_468

2

C51

HT_MCP_TXD+0

2 OF 6

HT_MCP_TXD+1
HT_MCP_TXD+2

HT_MCP

HT_MCP_TXD+3
HT_MCP_TXD+4
HT_MCP_TXD+5
HT_MCP_TXD+6
HT_MCP_TXD+7
HT_MCP_TXD+8

HT_MCP_TXD+9
HT_MCP_TXD+10
HT_MCP_TXD+11
HT_MCP_TXD+12
HT_MCP_TXD+13
HT_MCP_TXD+14
HT_MCP_TXD+15

HT_MCP_TXD-0
HT_MCP_TXD-1
HT_MCP_TXD-2
HT_MCP_TXD-3
HT_MCP_TXD-4
HT_MCP_TXD-5
HT_MCP_TXD-6
HT_MCP_TXD-7
HT_MCP_TXD-8

HT_MCP_TXD-9
HT_MCP_TXD-10
HT_MCP_TXD-11
HT_MCP_TXD-12
HT_MCP_TXD-13
HT_MCP_TXD-14
HT_MCP_TXD-15

HT_MCP_TX_CLK+0

HT_MCP_TX_CLK-0

HT_MCP_TX_CLK+1

HT_MCP_TX_CLK-1

HT_MCP_TXCTL+

HT_MCP_TXCTL-

CLKOUT_CTERM

SCLKIN_MCLKOUT_200MHZ+

SCLKIN_MCLKOUT_200MHZ-

HT_MCP_CAL_1P2V
HT_MCP_CAL_GND

AC24
AD23
AC22
AC20
AB18
AA17
AB16
AC16
AB21
AB20
AB19
W18
W15
AA15
Y14
W13

AC23
AD22
AC21
AD20
AC18
AB17
AB15
AD16
AB22
AA20
AA19
V17
V15
Y15
W14
Y13

AC19
AD19
Y17
W17

AC15
AD15

B22
A20
B20

AB23
AB24

HTMCP_DWN[7..0]
HTMCP_DWN0
HTMCP_DWN1
HTMCP_DWN2
HTMCP_DWN3
HTMCP_DWN4
HTMCP_DWN5
HTMCP_DWN6
HTMCP_DWN7

HTMCP_DWN_[7..0]
HTMCP_DWN_0
HTMCP_DWN_1
HTMCP_DWN_2
HTMCP_DWN_3
HTMCP_DWN_4
HTMCP_DWN_5
HTMCP_DWN_6
HTMCP_DWN_7

HTMCP_DWNCLK0
HTMCP_DWNCLK0_

HTMCP_DWNCNTL
HTMCP_DWNCNTL_

CLKOUTCTERM

HTMCPCAL_1P2V
HTMCPCAL_GND
HTCPUCAL_1P2V
HTCPUCAL_GND

HTMCP_DWN[7..0] 16

HTMCP_DWN_[7..0] 16

HTMCP_DWNCLK0 16
HTMCP_DWNCLK0_ 16

HTMCP_DWNCNTL 16
HTMCP_DWNCNTL_ 16

R71 2.37K 1%

RN24

1 2
3 4
5 6
7 8

150 8P4R

1

+1.2V
+1.2V_HT

A A

Title

C51 (1&2) OF 6

Size Document Number Rev

Custom

5

4

3

2

Date: Sheet of

CRU51-M2

1

1.3

13 39Thursday, November 30, 2006

PDF created with pdfFactory Pro trial version www.pdffactory.com

5

1P2V_PLLPE

U5C

J8

PE0_RX+0

J6

PE0_RX+1

K9

PE0_RX+2

L6

PE0_RX+3

L7

PE0_RX+4

M9

PE0_RX+5

N8

PE0_RX+6

N6

PE0_RX+7

R6

PE0_RX+8

P3

PE0_RX+9

R8

PE0_RX+10

U6

PE0_RX+11

T8

PE0_RX+12

U7

PE0_RX+13

V4

PE0_RX+14

Y3

PE0_RX+15

J7

PE0_RX-0

J5

PE0_RX-1

J9

PE0_RX-2

L5

PE0_RX-3

L8

PE0_RX-4

M8

PE0_RX-5

N7

PE0_RX-6

N5

PE0_RX-7

R5

PE0_RX-8

P4

PE0_RX-9

R7

PE0_RX-10

U5

PE0_RX-11

T9

PE0_RX-12

U8

PE0_RX-13

V3

PE0_RX-14

AA3

PE0_RX-15

D1

PE0_PRSNT*

G6

PE1_RX+

H6

PE1_RX-

E2

PE1_PRSNT*

J4

PE2_RX+

K3

PE2_RX-

E3

PE2_PRSNT*

D3

PE1_CLKREQ*

E4

PE2_CLKREQ*

AC3

PE_REFCLK+

AB3

PE_REFCLK-

T11

+12V_PLLPE

BC60

C51G_PBGA_468

10UF 10V 0805 Y5V

PE0_IN0

PE0_IN022

PE0_IN1

PE0_IN122

PE0_IN2

PE0_IN222

PE0_IN3

PE0_IN322

PE0_IN4

PE0_IN422

PE0_IN5

PE0_IN522

PE0_IN6

PE0_IN622

D D

C C

+3.3V

1P2VPLL_PWR13,15

PE0_IN722
PE0_IN822
PE0_IN922
PE0_IN1022
PE0_IN1122
PE0_IN1222
PE0_IN1322
PE0_IN1422
PE0_IN1522

PE0_IN_022
PE0_IN_122
PE0_IN_222
PE0_IN_322
PE0_IN_422
PE0_IN_522
PE0_IN_622
PE0_IN_722
PE0_IN_822
PE0_IN_922
PE0_IN_1022
PE0_IN_1122
PE0_IN_1222
PE0_IN_1322
PE0_IN_1422
PE0_IN_1522

PE0_PRSNT_22

PE1_IN22
PE1_IN_22
PE1_PRSNT_22

R105 10K 1%

PE0_IN7
PE0_IN8
PE0_IN9
PE0_IN10
PE0_IN11
PE0_IN12
PE0_IN13
PE0_IN14
PE0_IN15

PE0_IN_0
PE0_IN_1
PE0_IN_2
PE0_IN_3
PE0_IN_4
PE0_IN_5
PE0_IN_6
PE0_IN_7
PE0_IN_8
PE0_IN_9
PE0_IN_10
PE0_IN_11
PE0_IN_12
PE0_IN_13
PE0_IN_14
PE0_IN_15

PE0_PRSNT_

PE1_IN
PE1_IN_
PE1_PRSNT_

PE2_PRSNT_

BFB4
0 0805

BC68
10UF 10V 0805 Y5V

C51
3 OF 6
PE

4

PE0_TX+0
PE0_TX+1
PE0_TX+2
PE0_TX+3
PE0_TX+4
PE0_TX+5
PE0_TX+6
PE0_TX+7
PE0_TX+8

PE0_TX+9
PE0_TX+10
PE0_TX+11
PE0_TX+12
PE0_TX+13
PE0_TX+14
PE0_TX+15

PE0_TX-0
PE0_TX-1
PE0_TX-2
PE0_TX-3
PE0_TX-4
PE0_TX-5
PE0_TX-6
PE0_TX-7
PE0_TX-8

PE0_TX-9
PE0_TX-10
PE0_TX-11
PE0_TX-12
PE0_TX-13
PE0_TX-14
PE0_TX-15

PE0_REFCLK+

PE0_REFCLK-

PE1_TX+

PE1_TX-

PE1_REFCLK+

PE1_REFCLK-

PE2_TX+

PE2_TX-

PE2_REFCLK+

PE2_REFCLK-

PE_TSTCLK+

PE_TSTCLK-

PE_RST*

PE_CTERM_GND

PE0_OUT[15..0]
PE0_OUT0

L1

PE0_OUT1

L3

PE0_OUT2

L4

PE0_OUT3

M4

PE0_OUT4

P1

PE0_OUT5

R1

PE0_OUT6

R3

PE0_OUT7

R4

PE0_OUT8

U4

PE0_OUT9

V1

PE0_OUT10

W1

PE0_OUT11

W3

PE0_OUT12

AA1

PE0_OUT13

AB1

PE0_OUT14

AC1

PE0_OUT15

AD2

PE0_OUT_[15..0]
PE0_OUT_0

L2

PE0_OUT_1

M2

PE0_OUT_2

M3

PE0_OUT_3

N3

PE0_OUT_4

P2

PE0_OUT_5

R2

PE0_OUT_6

T2

PE0_OUT_7

T3

PE0_OUT_8

U3

PE0_OUT_9

V2

PE0_OUT_10

W2

PE0_OUT_11

Y2

PE0_OUT_12

AA2

PE0_OUT_13

AB2

PE0_OUT_14

AC2

PE0_OUT_15

AD3

PE0_REFCLK

K1

PE0_REFCLK_

K2

PE1_OUT

G4

PE1_OUT_

G5

PE1_REFCLK

G2

PE1_REFCLK_

G3
H4
J3
H2
H3

TP_PECLK_TEST1

F1

TP_PECLK_TEST_1

F2

PE_RESET_

G1

PE_COMP

R92 2.37K 1%

D2

500mils close to c51
5:5

PE0_OUT[15..0] 22

DAC_BLUE26
DAC_GREEN26
DAC_RED26

PE0_OUT_[15..0] 22

PE0_REFCLK 22
PE0_REFCLK_22

PE1_OUT 22
PE1_OUT_ 22
PE1_REFCLK 22
PE1_REFCLK_22

PE_RESET_ 22

3

PLACE ON CLOSE CHIP < 600 mil

RN31

150 8P4R

78
56
34
12

R78 BEAD 60 0805 1A
R80 BEAD 60 0805 1A
R84 BEAD 60 0805 1A

DAC_HSYNC26
DAC_VSYNC26

R76 124 1%
C151

0.01UF 50V X7R

+3.3V

FB14
BEAD 60 0805 1A

BFB2

2P5V_PWR7,13,15,38

BEAD 60 0805 1A

1P2VPLL_PWR13,15

1P2VPLL_PWR

DAC_VSYNC

BC67
1UF 10V Y5V

DAC_HSYNC
DAC_VSYNC

C7

DACRSET

D8

DACVREF

D9
C8

3P3V_DAC

1UF 16V 0805 Y5VC154

2P5V_PLLGPU

H13

1UF 16V 0805 Y5VBC53

C9

F12
E11
E17
F17
G17

R9

H16

BC65
1UF 10V Y5V

R77 1K 1%

FOR PHILIPS7408

U5D

A5

DAC_RED

B6

DAC_GREEN

A6

DAC_BLUE

B7

DAC_HSYNC
DAC_VSYNC

DAC_RSET
DAC_VREF
DAC_IDUMP

A9

+3.3V_DAC

+2.5V_PLLGPU

XTAL_IN

B9

XTAL_OUT
NC1-DDC_CLK

NC2-DDC_DATA
NC3-HPDET
NC4-EE_CLK
NC5-EE_DATA

+1.2V_PLLGPU

P9

+1.2V_PLLCORE
+1.2V_PLLIFP

C51G_PBGA_468

C51
4 OF 6
VGA

2

DAC_BLUE DAC_GREEN DAC_RED

C14

IFPA_TXC+

B13

IFPA_TXC-

A15

IFPA_TXD+0

D15

IFPA_TXD+1

A14

IFPA_TXD+2

F14

IFPA_TXD+3

B15

IFPA_TXD-0

C15

IFPA_TXD-1

B14

IFPA_TXD-2

E14

IFPA_TXD-3

A10

IFPB_TXC+

B10

IFPB_TXC-

B11

IFPB_TXD+4

E13

IFPB_TXD+5

D13

IFPB_TXD+6

B12

IFPB_TXD+7

A11

IFPB_TXD-4

F13

IFPB_TXD-5

C13

IFPB_TXD-6

C12

IFPB_TXD-7

A16

IFPAB_PROBE

F15

IFPAB_RSET

E16

+2.5V_PLLIFP

H12

+2.5V_PLLCORE

D17

PKG_TEST

C17

TEST_MODE_EN

C18

JTAG_TCK

B19

JTAG_TDI

C19

JTAG_TDO

B18

JTAG_TMS

A19

JTAG_TRST*

C159
10P 50V NPO

IFPAB_PROBE

2P5V_PLLCORE

BC58

1UF 16V 0805 Y5V

TEST_MODE_EN
JTAG_TCK

JTAG_TDI
JTAG_TMS

JTAG_TRST_

JTAG_TCK
JTAG_TMS
JTAG_TRST_
JTAG_TDI

1

C162

C160

10P 50V NPO

10P 50V NPO

+3.3V

C149

0.1UF 25V Y5V

FOR EMI NEAR RN73 RGB SIGNAL VIA

0.1UF 25V Y5V /NIC147

BFB3

2P5V_PWR 7,13,15,38

BEAD 60 0805 1A

R72 1K 1%

2P5V_PWR 7,13,15,38

FOR BOARDCOM NETWORK FAIL

B B

A A

Title

C51 (3&4) OF 6

Size Document Number Rev

Custom

5

4

3

2

Date: Sheet of

CRU51-M2

1

1.3

14 39Friday, July 07, 2006

PDF created with pdfFactory Pro trial version www.pdffactory.com

5

4

3

2

1

U5F

D D

C C

B B

A A

+1.2V_HT

+1.2V

+3.3V

U5E

B5

+1.2V_CORE

C6

+1.2V_CORE

D7

+1.2V_CORE

E8

+1.2V_CORE

E9

+1.2V_CORE

E10

+1.2V_CORE

F10

+1.2V_CORE

F11

+1.2V_CORE

G11

+1.2V_CORE

H11

+1.2V_CORE

J11

+1.2V_CORE

J12

+1.2V_CORE

J13

+1.2V_CORE

J14

+1.2V_CORE

T15

+1.2V_HTMCP

U13

+1.2V_HTMCP

U11

+1.2V_HTMCP

Y9

+1.2V_HTMCP

AB11

+1.2V_HTMCP

AA18

+1.2V_HTMCP

W16

+1.2V_HTMCP

U16

+1.2V_HTMCP

U15

+1.2V_HTMCP

B4

+1.2V_PED

C5

+1.2V_PED

D6

+1.2V_PED

E7

+1.2V_PED

K16

+1.2V_HT

M16

+1.2V_HT

R16

+1.2V_HT

M21

+1.2V_HT

J20

+1.2V_HT

T16

+1.2V_HT

U17

+1.2V_HT

C21

+1.2V_HT

H17

+1.2V_HT

D18

+3.3V

C10

+3.3V

C51G_PBGA_468

100UF 16V 5X11 2mm /NI

C51

+1.2V_PEA
+1.2V_PEA
+1.2V_PEA

5 OF 6

+1.2V_PEA
+1.2V_PEA

PWR

+1.2V_PEA
+1.2V_PEA
+1.2V_PEA

+1.2V_PLL
+1.2V_PLL
+1.2V_PLL
+1.2V_PLL
+1.2V_PLL
+1.2V_PLL
+1.2V_PLL
+1.2V_PLL
+1.2V_PLL
+1.2V_PLL
+1.2V_PLL
+1.2V_PLL

+2.5V_CORE
+2.5V_CORE

+2.5V_IFPA
+2.5V_IFPA

C51 2.5V

2.5V @ 500MA AMPS MAX

+5V

CT15

Q16

AZ1117H-ADJ SOT-223

Vout=Vref (1.25V) X ( 1+R2/R1 )
=2.5V

A3
B3
C4
D5
E6
F7
F8
F9

A2
B2
C2
C3
D4
E5
F6
G7
G8
G9
H10
J10

C16
B16

G15
H15

OIA

R1

R2

BFB6 0 0805

FOR BOARDCOM NETWORK FAIL

FB18 0 0805
FB17 0 0805

2P5V_PWR

R74

49.9 1%

R73

54.9 1%

1P2VPEA_PWR

1P2VPLL_PWR 13,14

2P5V_PWR 7,13,14,38

+2.5V

CT13
100UF 16V 5X11 2mm

+1.2V

+1.2V

2P5V_PWR 7,13,14,38

C1
AA21
AA13

U14
H14
C11

AB4
AA4
J15
E12

AB10

Y18
E18

U18

E15

Y11
U19
N17

F16

J17

L13

B1

T17
D11

T12

J16
D19
H19

L21
M19

P19

T19

L14

F3
L9
P8
N9
K4
N4
T4

W4

Y4
U9
H9

GND

C51

GND
GND

6 OF 6

GND
GND

GND

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

PE_GND
PE_GND
PE_GND
PE_GND
PE_GND
PE_GND
PE_GND
PE_GND
PE_GND
PE_GND
PE_GND

C51G_PBGA_468

PE_GND
PE_GND
PE_GND
PE_GND
PE_GND
PE_GND
PE_GND
PE_GND
PE_GND
PE_GND
PE_GND

V19

GND

T14

GND

C20

GND

R17

GND

AB14

GND

U12

GND

G13

GND

Y16

GND

H21

GND

C22

GND

AB6

GND

F22

GND

L22

GND

R22

GND

V22

GND

AA22

GND

A23

GND

AA23

GND

AA24

GND

L11

GND

M11

GND

N11

GND

P11

GND

M12

GND

N12

GND

P12

GND

M13

GND

N13

GND

P13

GND

M14

GND

N14

GND

P14

GND

L12

GND

K6
M6
P6
T6
W6
W8
H8
K8
V6
F4
V8

C51 DECOUPLING

2P5V_PWR7,13,14,38

1P2VPLL_PWR13,14

1P2VPEA_PWR

+1.2V_HT

+3.3V

+1.2V

1UF 16V 0805 Y5VC146

1UF 16V 0805 Y5VC167

1UF 16V 0805 Y5VBC71
1UF 16V 0805 Y5VBC72
1UF 10V Y5VBC70

1UF 10V Y5VBC69

1UF 10V Y5VBC57
1UF 10V Y5VC135
1UF 10V Y5VBC54
1UF 10V Y5VC144

0.1UF 25V Y5VC244

1UF 16V 0805 Y5V /NIBC66
1UF 16V 0805 Y5VBC63

1UF 10V Y5V /NIBC64
1UF 10V Y5VC166

1UF 10V Y5VBC52

PLACE ON BACK SIDE
CENTER OF CHIPSET

+1.2V

1UF 16V 0805 Y5VBC59
1UF 16V 0805 Y5VBC61
1UF 10V Y5VBC62

Title

C51 (5&6) OF 6

Size Document Number Rev

Custom

5

4

3

2

Date: Sheet of

CRU51-M2

1

1.3

15 39Friday, July 07, 2006

PDF created with pdfFactory Pro trial version www.pdffactory.com

5

D D

4

3

2

1

RN51

1 2
3 4
5 6
7 8

R154 33

PCI_AD[31..0]
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
PCI_C/BE_[3..0]
PCI_C/BE_0
PCI_C/BE_1
PCI_C/BE_2
PCI_C/BE_3

PCI_FRAME_
PCI_IRDY_
PCI_TRDY_
PCI_STOP_
PCI_DEVSEL_
PCI_PAR
PCI_PERR_
PCI_SERR_
PCI_PME_
PCI_CLKRUN_

PCI_RESET0_
PCI_RESET1_
PCI_RESET2
PCI_RESET3_
LPC_RESET_

33 8P4R

PCI_AD[31..0]20

PCI_C/BE_[3..0]20

PCI_FRAME_20
PCI_IRDY_20
PCI_TRDY_20
PCI_STOP_20
PCI_DEVSEL_20
PCI_PAR20
PCI_PERR_20
PCI_SERR_20

+3.3V

PCI_PME_20
PCI_CLKRUN_20

TP_PCI_RESET1

LPCRST_FLASH_34
PCIRST_SLOT2_20
PCIRST_IDE_23
PCIRST_SLOT1_20

LPCRST_SIO_33

3

JTAG_TCK

JTAG_TDI
JTAG_TDO
JTAG_TMS

AA1
Y1
AA3
W5
U5
T5
R5
P5

AA2
Y2
AA4
W6
U6
T6
R6
P6

V5
V6

N5
N6

AC1
AC2

25MHZ_R

Y5
AD2
AE1

J6

TERM_GND

K6
H22

H21
H23
D26
F25

HTMCP_STOP_
HTMCP_RST_
HTMCP_PWRGD
HTMCP_REQ_

HTMCP_UP[7..0]
HTMCP_UP0
HTMCP_UP1
HTMCP_UP2
HTMCP_UP3
HTMCP_UP4
HTMCP_UP5
HTMCP_UP6
HTMCP_UP7
HTMCP_UP_[7..0]
HTMCP_UP_0
HTMCP_UP_1
HTMCP_UP_2
HTMCP_UP_3
HTMCP_UP_4
HTMCP_UP_5
HTMCP_UP_6
HTMCP_UP_7

HTMCP_UPCLK0
HTMCP_UPCLK0_

HTMCP_UPCNTL
HTMCP_UPCNTL_

MCPOUT_200MHZ
MCPOUT_200MHZ_

R121 22

HTMCP_PWRGD_L
HTMCP_RST_

R115 562 1%

MCP51_TCK
MCP51_TDI

MCP51_TMS
MCP51_TRST_

MCP51_TDI
MCP51_TMS
MCP51_TCK
MCP51_TRST_

HTMCP_PWRGDHTMCP_PWRGD_L

R118 1.5K 1% /NI

HTMCP_UP[7..0] 13

HTMCP_UP_[7..0] 13

HTMCP_UPCLK0 13
HTMCP_UPCLK0_ 13

HTMCP_UPCNTL 13
HTMCP_UPCNTL_ 13

MCPOUT_200MHZ 13
MCPOUT_200MHZ_ 13

MCPOUT_25MHZ 13

HTMCP_RST_ 13
CPU_THERMTRIP_ 7

RN57

10K 8P4R

1 2
3 4
5 6
7 8

RN35

1K 8P4R

1 2
3 4
5 6
7 8

HTMCP_PWRGD 13

+3.3V

+3.3V

HTMCP_REQ_13

HTMCP_STOP_13

HT_VLD35
CPU_VLD31

+1.8V_SUS

HTVDD_EN38
CPUVDD_EN31

CPUVDD_EN31

+3.3V_DUAL

+3.3V_DUAL

MEM_VLD35

+1.5V

HTMCP_DWN[7..0]
HTMCP_DWN0
HTMCP_DWN1
HTMCP_DWN2
HTMCP_DWN3
HTMCP_DWN4
HTMCP_DWN5
HTMCP_DWN6
HTMCP_DWN7
HTMCP_DWN_[7..0]
HTMCP_DWN_0
HTMCP_DWN_1
HTMCP_DWN_2
HTMCP_DWN_3
HTMCP_DWN_4
HTMCP_DWN_5
HTMCP_DWN_6
HTMCP_DWN_7

HTMCP_DWNCLK0
HTMCP_DWNCLK0_

HTMCP_DWNCNTL
HTMCP_DWNCNTL_

HTMCP_REQ_
HTMCP_STOP_

R120 150 1%
R119 49.9 1%

HT_VLD
CPU_VLD

HTVDD_EN
CPUVDD_EN

+3.3V_PLL_CPU_HT

CPUVDD_EN

R16 10K 1%

HTMCP_DWN[7..0]13

HTMCP_DWN_[7..0]13

C C

B B

HTMCP_DWNCLK013

HTMCP_DWNCLK0_13

HTMCP_DWNCNTL13

HTMCP_DWNCNTL_13

FB19

+3.3V

BEAD 60 0805 1A

M1
N1
R1

U1

M2
N2
R2

U2

W1
W2

AD1

AA5
AB1

AB2
F22

N26

MEM_VLD

M24

F23

N25

M6
M5

C210

BC92
1UF 10V Y5V

1UF 16V 0805 Y5V

MEM_VLD

U10A

K1

HT_MCP_RXD+0

L1

HT_MCP_RXD+1
HT_MCP_RXD+2
HT_MCP_RXD+3
HT_MCP_RXD+4

T1

HT_MCP_RXD+5
HT_MCP_RXD+6

V1

HT_MCP_RXD+7

K2

HT_MCP_RXD-0

L2

HT_MCP_RXD-1
HT_MCP_RXD-2
HT_MCP_RXD-3
HT_MCP_RXD-4

T2

HT_MCP_RXD-5
HT_MCP_RXD-6

V2

HT_MCP_RXD-7

P1

HT_MCP_RX_CLK+

P2

HT_MCP_RX_CLK­HT_MCP_RXCTL+

HT_MCP_RXCTL­HT_MCP_REQ*

HT_MCP_STOP*
HT_MCP_COMP_GND1

HT_MCP_COMP_GND2
HT_VLD

CPU_VLD
MEM_VLD
HTVDD_EN
CPUVDD_EN

+1.5V_PLL_CPU_HT
+3.3V_PLL_CPU_HT

HT_MCP_TXD+0

MCP51

HT_MCP_TXD+1
HT_MCP_TXD+2

1 OF 7

HT_MCP_TXD+3
HT_MCP_TXD+4

HT

HT_MCP_TXD+5
HT_MCP_TXD+6
HT_MCP_TXD+7

HT_MCP_TXD-0
HT_MCP_TXD-1
HT_MCP_TXD-2
HT_MCP_TXD-3
HT_MCP_TXD-4
HT_MCP_TXD-5
HT_MCP_TXD-6
HT_MCP_TXD-7

HT_MCP_TX_CLK+
HT_MCP_TX_CLK-

HT_MCP_TXCTL+

HT_MCP_TXCTL-

CLKOUT_200MHZ+
CLKOUT_200MHZ-

CLKOUT_25MHZ

HT_MCP_PWRGD

THERMTRIP*/GPIO

CLK200MHZ_TERM_GND

MCP51G_PBGA_508

HT_MCP_RST*

JTAG_TRST*

FOR A03 CHIP

A A

5

4

LPC_RESET_
PCI_RESET1_
PCI_RESET3_
PCI_RESET0_

LPC_RESET_

U10B

AF19
AB21

AC19

AA20
AA19
AF20
AE19
AE20
AB20
AB19
AA18
AB18
AE18
AF18

AC17

AA17
AB15
AF15
AE15
AF14
AE14
AA14
AB14

AC13

AB13
AE13
AA12
AF13
AB12
AF12
AE12
AF11

AD19

AB17
AA15
AA13

AC15
AD15

AB16
AE16
AA16
AE17
AF16
AF17

AD11

AF25
AE25

AD24

AE26

W22

L26

MCP51G_PBGA_508

PCI_AD0

MCP51

PCI_AD1
PCI_AD2

2 OF 7

PCI_AD3
PCI_AD4

PCI

PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

PCI_CBE*0
PCI_CBE*1
PCI_CBE*2
PCI_CBE*3

PCI_FRAME*
PCI_IRDY*
PCI_TRDY*
PCI_STOP*
PCI_DEVSEL*
PCI_PAR
PCI_PERR*/GPIO
PCI_SERR*
PCI_PME*/GPIO
PCI_CLKRUN*/GPIO

PCI_RESET*0
PCI_RESET*1
PCI_RESET*2
PCI_RESET*3
LPC_RESET*4

PCI_REQ*0
PCI_REQ*1

PCI_REQ*2
PCI_REQ*3/GPIO
PCI_REQ*4/GPIO

PCI_GNT*0

PCI_GNT*1

PCI_GNT*2
PCI_GNT*3/GPIO
PCI_GNT*4/GPIO

PCI_TNTW*

PCI_TNTX*
PCI_TNTY*
PCI_TNTZ*

PCI_CLK0
PCI_CLK1
PCI_CLK2
PCI_CLK3
PCI_CLK4

PCI_CLKIN

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

LPC_FRAME*

LPC_DRQ0*

LPC_DRQ1*/LPC_CS*

LPC_SERIRQ

LPC_PWRDWN*/GPIO

LPC_CLK0
LPC_CLK1

2

PCI_REQ_0

AA22

PCI_REQ_1

AE22

PCI_REQ_2

AF21

PCI_REQ_3

AF22

PCI_REQ_4

AE23

PCI_GNT_0

AE21

PCI_GNT_1

AC21

PCI_GNT_2

AA21

PCI_GNT_3

AB24

PCI_GNT_4

AB22

PCI_INTW_

AE11

PCI_INTX_

AB11

PCI_INTY_

AC11

PCI_INTZ_

AA11

PCI_CLK0

AE24

PCI_CLK1

AF24
AD23
AF23
AB23
AC23

PCI_CLKSLOT1
PCI_CLKSLOT2
PCI_CLKIN

LPC_AD[3..0]
LPC_AD0

K24

LPC_AD1

H26

LPC_AD2

H25

LPC_AD3

K22

LPC_FRAME_

G25

LPC_DRQ0_

K21

LPC_DRQ1_

K23

LPC_SERIRQ

L22

TP_LPCPWRDWN_

H24

LPC_CLK0

F26

LPC_CLK1

G26

Title

Size Document Number Rev

Date: Sheet of

RN45

PCI_CLK4
PCI_CLKIN

R165 8.2K

R161 22

R160 100 1%
10P 50V NPOC258
10P 50V NPOC259

EMI

MCP51G (1&2) OF 7

Custom

PCI_REQ_0 20
PCI_REQ_1 20
PCI_REQ_2 20
PCI_REQ_3 20
PCI_REQ_4 20

PCI_GNT_0 20
PCI_GNT_1 20
PCI_GNT_2 20
PCI_GNT_3 20
PCI_GNT_4 20

PCI_INTW_ 20
PCI_INTX_ 20
PCI_INTY_ 20
PCI_INTZ_ 20

1 2

PCI_CLKSLOT120

3 4

PCI_CLKSLOT220

5 6
7 8

22 8P4R
10P 50V NPO /NIC243
10P 50V NPO /NIC235
10P 50V NPO /NIC233

LPC_AD[3..0] 33,34

LPC_FRAME_ 33,34
LPC_DRQ0_ 33

+3.3V

LPC_SERIRQ 33

TP_LPCPWRDWN_1

LPCCLK_SIO 33
LPCCLK_FLASH 34

CRU51-M2

FOR EMI

1

16 39Friday, July 07, 2006

1.3

PDF created with pdfFactory Pro trial version www.pdffactory.com

5

4

3

2

1

D D

C C

B B

A A

JSATA1

H1
1

SATA_A0_TX_P_C

2

SATA_A0_TX_N_C

3
4

SATA_A0_RX_N_C

5

SATA_A0_RX_P_C

6
7
H2

SATA CONNECTOR
JSATA2

H1
1

SATA_A1_TX_P_C

2

SATA_A1_TX_N_C

3
4

SATA_A1_RX_N_C

5

SATA_A1_RX_P_C

6
7
H2

SATA CONNECTOR

0.01UF 50V X7RC234

0.01UF 50V X7RC237

0.01UF 50V X7RC232

0.01UF 50V X7RC226

0.01UF 50V X7RC220

0.01UF 50V X7RC224

0.01UF 50V X7RC219

0.01UF 50V X7RC218

PLACE CAPS NEAR CONN

SATA_HDLED_21

TP_SATA_TESTB1

BR4 2.49K 1%

FB23

+1.5V

0 0805
BC91

0.1UF 25V Y5V /NI

+3.3V_PLL_SP_SS18

+1.5V

FB24 0 0805

+3.3V

SATA_TERMN

C248

1UF 16V 0805 Y5V

C250

10UF 10V 0805 Y5V

U10C

B20

SATA_A0_TX+

A20

SATA_A0_TX-

A19

SATA_A0_RX-

B19

SATA_A0_RX+

B18

SATA_A1_TX+

A18

SATA_A1_TX-

A17

SATA_A1_RX-

B17

SATA_A1_RX+

B15

SATA_B0_TX+

A15

SATA_B0_TX-

A16

SATA_B0_RX-

B16

SATA_B0_RX+

B13

SATA_B1_TX+

A13

SATA_B1_TX-

A14

SATA_B1_RX-

B14

SATA_B1_RX+

C20

SATA_LED*/GPIO

D14

SATA_TSTCLK+

C14

SATA_TSTCLK-

F13

SATA_TEST

F14

SATA_TERM+

E14

SATA_TERM-

F18

+1.5V_PLL_SP_VDD

F19

+1.5V_PLL_SP_SS

D20

+3.3V_PLL_SP_SS

MCP51G_PBGA_508

MCP51

3 OF 7
IDE

SATA

IDE_DATA_P10
IDE_DATA_P11
IDE_DATA_P12
IDE_DATA_P13
IDE_DATA_P14
IDE_DATA_P15

IDE_DATA_S10
IDE_DATA_S11
IDE_DATA_S12
IDE_DATA_S13
IDE_DATA_S14
IDE_DATA_S15

CABLE_DET_S/GPIO

IDE_COMP_3P3

IDE_COMP_GND

IDE_DATA_P0
IDE_DATA_P1
IDE_DATA_P2
IDE_DATA_P3
IDE_DATA_P4
IDE_DATA_P5
IDE_DATA_P6
IDE_DATA_P7
IDE_DATA_P8
IDE_DATA_P9

IDE_ADD_P0
IDE_ADD_P1
IDE_ADD_P2

IDE_CS1_P*
IDE_CS3_P*

IDE_DACK_P*

IDE_IOW_P*
IDE_INTR_P

IDE_DREQ_P

IDE_IOR_P*

IDE_IORDY_P

CBLE_DET_P

IDE_DATA_S0
IDE_DATA_S1
IDE_DATA_S2
IDE_DATA_S3
IDE_DATA_S4
IDE_DATA_S5
IDE_DATA_S6
IDE_DATA_S7
IDE_DATA_S8
IDE_DATA_S9

IDE_ADD_S0
IDE_ADD_S1
IDE_ADD_S2

IDE_CS1_S*
IDE_CS3_S*

IDE_DACK_S*

IDE_IOW_S*
IDE_INTR_S

IDE_DREQ_S

IDE_IOR_S*

IDE_RDY_S

SATA_A0_TX_P
SATA_A0_TX_N

SATA_A0_RX_N IDE_PDD3
SATA_A0_RX_P

SATA_A1_TX_P
SATA_A1_TX_N

SATA_A1_RX_N
SATA_A1_RX_P

SATA_HDLED_
TP_SATA_TSTCLK_P
TP_SATA_TSTCLK_N

TP_SATA_TEST

SATA_TERMP

+1.5V_PLL_SP_VDD

+3.3V_PLL_SP_SS

F8
D8
A9
E9
A10
E10
C10
E11
F11
D10
F10
B10
F9
B9
E8
A8

A6
D6
B6

A5
B5
B7
F7
E6
B8
E7
A7
C6

E4
D1
D4
C2
B2
C3
A3
A4
B4
B3
A2
B1
C1
D2
E3
E5

G4
G6
G2

G1
G3
F5
E1
F6
E2
F2
F1
G5

IDE_COMP_3P3V

B11

IDE_COMP_GND

A11

IDE_PDD[15..0]
IDE_PDD0
IDE_PDD1
IDE_PDD2

IDE_PDD4
IDE_PDD5
IDE_PDD6
IDE_PDD7
IDE_PDD8
IDE_PDD9
IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15

IDE_ADDR_P0
IDE_ADDR_P1
IDE_ADDR_P2

IDE_CS1_P_
IDE_CS3_P_
IDE_DACK_P_
IDE_IOW_P_
IDE_INTR_P
IDE_DREQ_P
IDE_IOR_P_
IDE_IORDY_P
CBLE_DET_P
IDE_SDD[15..0]
IDE_SDD0
IDE_SDD1
IDE_SDD2
IDE_SDD3
IDE_SDD4
IDE_SDD5
IDE_SDD6
IDE_SDD7
IDE_SDD8
IDE_SDD9
IDE_SDD10
IDE_SDD11
IDE_SDD12
IDE_SDD13
IDE_SDD14
IDE_SDD15

IDE_ADDR_S0
IDE_ADDR_S1
IDE_ADDR_S2

IDE_CS1_S_
IDE_CS3_S_
IDE_DACK_S_
IDE_IOW_S_
IDE_INTR_S
IDE_DREQ_S
IDE_IOR_S_
IDE_IORDY_S
CBLE_DET_S

IDE_PDD[15..0] 23

IDE_ADDR_P0 23
IDE_ADDR_P1 23
IDE_ADDR_P2 23

IDE_CS1_P_ 23
IDE_CS3_P_ 23
IDE_DACK_P_ 23
IDE_IOW_P_ 23
IDE_INTR_P 23
IDE_DREQ_P 23
IDE_IOR_P_ 23
IDE_IORDY_P 23
CBLE_DET_P 23
IDE_SDD[15..0] 23

IDE_ADDR_S0 23
IDE_ADDR_S1 23
IDE_ADDR_S2 23

IDE_CS1_S_ 23
IDE_CS3_S_ 23
IDE_DACK_S_ 23
IDE_IOW_S_ 23
IDE_INTR_S 23
IDE_DREQ_S 23
IDE_IOR_S_ 23
IDE_IORDY_S 23
CBLE_DET_S 23

R134 120
R130 120

+3.3V

Title

MCP51 (3) OF 7

Size Document Number Rev

Custom

5

4

3

2

Date: Sheet of

CRU51-M2

1

1.3

17 39Tuesday, October 17, 2006

PDF created with pdfFactory Pro trial version www.pdffactory.com

5

+3.3V_DUAL

R168

AC_RST*

10K 1% /NI

1 = *RGMII

AC_RST_

0 = MII
SPDIF0

R169

(SIO CLK)
1 = 24MHZ

10K 1%

HEADER 1X3

TP_SLP_DEEP_1

1

2

JCMOS1

3

FB25
BEAD 60 0805 1A

0 = *14.318MHZ
* = DEFAULT

AUD_14MHZ_IN29

AC_BITCLK29
AC_SDOUT29
AC_SDIN_029

AC_RST_29
AC_SYNC29

DDC_CLK26
DDC_DATA26

VCORE037
VCORE137
VDIMM037

RGMII_RESET_36

VDIMM137

+3.3V_DUAL

+3.3V_PLL_SP_SS17

+1.5V

EMI

D D

RN64

SPDIF

1 2

+3.3V

C C

+3.3V_DUAL

B B

CLEAR CMOS CONTROL
1-2

CMOS CLEAR
JUMPER

3 4
5 6
7 8

10K 8P4R

SPDIFO29,30

R170 10K 1%
R174 10K 1%
R193 10K 1%

+3.3V_VBAT25,33

NORMAL
CLEAR CMOS2-3

AC_SDATA_IN2
AC_SDATA_IN1

TP_CPUVID5
LID_
LLB_

R158 49.9 1%

+3.3V

AC_BITCLK

C5
10P 50V NPO

AUD_14MHZ_IN
AC_BITCLK
AC_SDOUT
AC_SDIN_0
AC_SDATA_IN1
AC_SDATA_IN2

AC_RST_
AC_SYNC
SPDIF

DDC_CLK
DDC_DATA

RGMII_RESET_

FLASH_RECOVERY_

TP_CPUVID5
LID_

TP_SLP_DEEP_
LLB_
RTC_RST_

+3.3V_PLL_SP_SS

+3.3V_PLL_USB_CORE

C256

1UF 16V 0805 Y5V

USB_1
USB_1_
USB_0
USB_0_
USB_3_
USB_3
USB_2_
USB_2
USB_5_
USB_5
USB_4_
USB_4
USB_6
USB_6_
USB_7
USB_7_

4

R22
U26

T25

R26

T24

U21
U25
R21

T26
AE10
AF10
AA10
AB10

AF9

C24
D24
C25

J4
J3
J5

AE2

K5

J2
J1

AC9

AB9

AA9

P24

P25

P22

P26

R25

P23

B25

B24

E22

G22

A25

B22

A22

Y21

AD26

BC94

0.1UF 25V Y5V

1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8

FOR EMI

U10D

AC97_CLK
AC_BITCLK
AC_SDATA_OUT0/GPIO
AC_SDATA_IN0/GPIO
AC_SDATA_IN1/GPIO
AC_SDATA_IN2/GPIO

AC_RESET*
AC_SYNC/GPIO
SPDIF0/GPIO

DDC_CLK0/GPIO
DDC_DATA0/GPIO
DDC_CLK1/GPIO
DDC_DATA1/GPIO
HPLUG_DET0/GPIO
LCD_BKL_CTL/GPIO
LCD_BKL_PWR/GPIO
LCD_BKL_ON/GPIO
GPIO_1/SLAVE_READY
GPIO_2/CPU_SLP*
GPIO_3/CPU_CLKRUN*
GPIO_4/AGPSTP*/SUS_STAT*
GPIO_5/SYS_SHUTDOWN*
GPIO_6/NFERR*/SYS_PERR*
GPIO_7/FERR*/SYS_SERR*
GPIO_8/CR_VID0
GPIO_9/CR_VID1
GPIO_10/CR_VID2

GPIO_11/CPU_VID0
GPIO_12/CPU_VID1
GPIO_13/CPU_VID2
GPIO_14/CPU_VID3
GPIO_15/CPU_VID4

GPIO_16/CPU_VID5
LID*/GPIO

SLP_DEEP*
V3P3_DEEP
LLB*

RTC_RST*
+1.5V_PLL_LEG

+3.3V_PLL_LEG
+1.5V_PLL_USB

+3.3V_PLL_USB

MCP51G_PBGA_508

RN53
15K 8P4R

RN55
15K 8P4R

RN56
15K 8P4R

RN54
15K 8P4R

MCP51

4 OF 7
USB
AC97
GPIO

USB+0

USB-0

USB+1

USB-1

USB+2

USB-2

USB+3

USB-3

USB+4

USB-4

USB+5

USB-5

USB+6

USB-6

USB+7

USB-7

USB_OC0*/GPIO
USB_OC1*/GPIO
USB_OC2*/GPIO
USB_OC3*/GPIO

USB_RBIAS_GND

A20GATE/GPIO

INTRUDER*

EXT_SMI*/GPIO

RI*/GPIO

SPKR

PWRBTN*

SIO_PME*/GPIO

KBRDRSTIN*/GPIO

PE_WAKE*

SMB_CLK0/GPIO

SMB_DATA0/GPIO

SMB_CLK1/GPIO

SMB_DATA1/GPIO

SMB_ALERT*/GPIO

+3.3V_VBAT

BUF_SIO_CLK

SUS_CLK/GPIO

THERM*/GPIO

RSTBTN*

SLP_S5*
SLP_S3*

PWRGD_SB

PWRGD

FANRPM/GPIO
FANCTL0/GPIO
FANCTL1/GPIO

TEST_MODE_EN

AC26
AC25
AB26
AB25
AA26
AA25
Y26
Y25
W26
W25
V24
V23
V26
V25
T22
T23

Y24
Y23
U22
V22
AD25

J22
A24
M26
M25
E26
D23
M23
J21
AC3
H1
H2
M21
L25
M22
A23
J26
N21
K25
F21

C26
F24
B26
N22
L21
J25
K26
D25

+3.3V

3

USB_0
USB_0_
USB_1
USB_1_
USB_2
USB_2_
USB_3
USB_3_
USB_4
USB_4_
USB_5
USB_5_
USB_6
USB_6_
USB_7
USB_7_

USB_BKPNL_3_2_OC_
USB_BKPNL_5_4_OC_
USB_FNTPNL_7_6_OC_
USB_FNTPNL_1_0_OC_
USB_GND

R159 732 1%

A20GATE
INTRUDER_
SLEEPBTNJ
SER_RI_
SPEAKER
PWBTOUT_
IO_PME_
SIO_KBRST_
PE_WAKE_
SMB_MEM_SCL
SMB_MEM_SDA
SMB_SCL
SMB_SDA
SMB_ALERT_
+3.3V_VBAT
BUF_SIO_CLK_R
SUS_CLK_R
CHIP_THERM_
FP_RESET_

SLP_S5_
SLP_S3_
PWRGD_SB
MCP51_PWRGD
CPUFAN_TACH

CPUFAN_CNTL

SYSFAN_CNTL
SB_TEST

R164 1K 1%

USB_0 27
USB_0_ 27
USB_1 27
USB_1_ 27
USB_2 27
USB_2_ 27
USB_3 27
USB_3_ 27
USB_4 27
USB_4_ 27
USB_5 27
USB_5_ 27
USB_6 27
USB_6_ 27
USB_7 27

RN49

USB_7_ 27

1 2
3 4
5 6
7 8

4.7K 8P4R

A20GATE 33
SLEEPBTNJ 21

SER_RI_ 28FLASH_RECOVERY_34
SPEAKER 21
PWBTOUT_ 33
IO_PME_ 33
SIO_KBRST_ 33

CHIP_THERM_ 33
FP_RESET_ 21

SLP_S5_ 32
SLP_S3_ 33
PWRGD_SB 35
MCP51_PWRGD 7,35

SPEAKER

+3.3V

+3.3V_DUAL

+3.3V_DUAL

R114
10K 1%

R156
1K 1% /NI

R155
1K 1%

+3.3V_DUAL

R173

4.7K

+3.3V

R117

2.7K

C261
10P 50V NPO /NI

R172 10K 1% /NI
R162 10K 1%

CHIP_THERM_

2

SLEEPBTNJ

1 2

R113

3 4
5 6

2.7K

7 8

R163 22
R171 22 /NI

C262
10P 50V NPO /NI

+3.3V

R166

4.7K

+3.3V_VBAT25,33

RN63

2.7K 8P4R

1

INTRUDER_

R157 1M

12

JCI1
HEADER 1X2 /NI

+3.3V_DUAL

PE_WAKE_ 22
SMB_MEM_SCL 11,12
SMB_MEM_SDA 11,12
SMB_SCL 20,22
SMB_SDA 20,22

+3.3V_VBAT 25,33
BUF_SIO_CLK 33
SUSCLK 33

SUSCLK

C249

1 = SLAVE

1UF 10V Y5V

0 = *NORMAL

+3.3V_DUAL+1.5V

* = DEFAULT

A A

Title

MCP51 (4) OF 7

Size Document Number Rev

Custom

5

4

3

2

Date: Sheet of

CRU51-M2

1

1.3

18 39Tuesday, June 12, 2007

PDF created with pdfFactory Pro trial version www.pdffactory.com

5

4

3

2

1

D D

C C

B B

A A

RGMII_TXD036
RGMII_TXD136
RGMII_TXD236
RGMII_TXD336
RGMII_TXCLK36
RGMII_TXCTL36

+3.3V_DUAL

R125 1K 1%
R126 1K 1%

0.1UF 25V Y5VC217

+3.3V_DUAL

+3.3V_DUAL

BEAD 60 0805 1A

+3.3V_DUAL

+

CT26
100UF 16V 5X11 2mm /NI

Q25

I
O
A

AZ1117H-ADJ SOT-223

Vout=Vref (1.25V) X ( 1+R2/R1 )
=1.5V

USE 10/100-->R1-->22

R79 22

RGMII_RXD0

RGMII_RXD036

RGMII_RXD1

RGMII_RXD136

RGMII_RXD2

RGMII_RXD236

RGMII_RXD3

RGMII_RXD336

RGMII_RXCLK

RGMII_RXCLK36

RGMII_RXCTL

RGMII_RXCTL36

RGMII_VREF
RGMII_MDC

RGMII_MDC36

RGMII_MDIO

RGMII_MDIO36

MII_RXER36

MII_COL36
MII_CRS36

R127 10K 1%

BUF_25MHZ_R

R124 22

BUF_25M36

+1.2V_DUAL

+3.3V_PLL_MAC_DUAL XTALOUT_RTC

C212

1UF 16V 0805 Y5V

+1.5V_DUAL

+1.5V_DUAL

+1.5V_DUAL @ 145MA AMPS MAX

R111

R1

100 1%

+

CT28
100UF 16V 5X11 2mm

R110

24.9 1%

R2

5

U10E

AE7

RGMII_TD0/MII_TD0

AF6

RGMII_TD1/MII_TD1

AB6

RGMII_TD2/MII_TD2

AA6

RGMII_TD3/MII_TD3

AA7

R1

RGMII_TXC/MII_TXCLK

AB7

RGMII_TX_CTL/MII_TXEN

AF7

RGMII_RD0/MII_RXD0

AF8

RGMII_RD0/MII_RXD1

AD7

RGMII_RD0/MII_RXD2

AB8

RGMII_RD0/MII_RXD3

AC7

RGMII_RXC/MII_RXCLK

AE8

RGMII_RX_CTL/MII_RXDV

AF4

MII_VREF

AF5

MII_MDC

AE6

MII_MDIO

AD3

MII_RXER/GPIO

AC4

MII_COL

AF2

MII_CRS

AE5

MII_PWRDWN/GPIO

AA8

MII_INTR/GPIO

AC5

BUF_25MHZ

AE4

+1.2V_PLL_MAC_DUAL

AB5

+3.3V_PLL_MAC_DUAL

MCP51G_PBGA_508

C213

1UF 16V 0805 Y5V

R122 24.9 1%

R123 100 1%

R1 +1.5V

R2

100

20

+1.2V_DUAL

+1.5V

MCP51

5 OF 7
LAN

CLOCK

4

XTALIN

XTALOUT

XTALIN_RTC

XTALOUT_RTC

+1.2V

+1.5V_DUAL

E19

NC

D12

NC

E12

NC

E25

NC

AE9

NC

XTALIN

E21

XTALOUT

D22

XTALIN_RTC

C22
B23

U17
U16
U15
U12
U11
U10

T17

T10
R17
R10
M17
M10

L17

L10
K17
K16
K15
K12
K11
K10

U3
R3
N3

L3

W3

AE3

AF3

C211

0.1UF 25V Y5V

U10F

+1.2V
+1.2V

MCP51

+1.2V
+1.2V

6 OF 7

+1.2V
+1.2V

PWR

+1.2V
+1.2V
+1.2V
+1.2V
+1.2V
+1.2V
+1.2V
+1.2V
+1.2V
+1.2V
+1.2V
+1.2V

+3.3V_USB_DUAL

+1.2V

+3.3V_USB_DUAL

+1.2V
+1.2V_HT

+1.2V_HT
+1.2V_HT
+1.2V_HT
+1.2V_HT

+1.2_DUAL
+1.2_DUAL

MCP51G_PBGA_508

X1

25MHZ 20PF 30PPM

C253

15P 50V NPO

X2

32.768KHZ 12.5PF 20PPMFB20

C257

15P 50V NPO

+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V

+3.3V_DUAL
+3.3V_DUAL
+3.3V_DUAL
+3.3V_DUAL

+1.5V_SP_A
+1.5V_SP_A
+1.5V_SP_A
+1.5V_SP_A

+1.5V_SP_D
+1.5V_SP_D

C254

15P 50V NPO

C260

15P 50V NPO

+5V
+5V

Y22
F12

AD21
AD17
AD13
AD9
AD5
C12
C8
C4

Y6
T21
P21
G21

W21
V21

F17
E17
F16
E16

E15
F15

BR5 100 1%
BR3 100 1%

+3.3V

3

U10G

AF26

GND

AF1

GND

AD22

GND

AD20

GND

AD18

GND

AD16

GND

AD14

GND

AD12

GND

AD10

GND

AD8

GND

AD6

GND

AD4

GND

AC24

GND

AB3

GND

AA24

GND

Y3

GND

W24

GND

V3

GND

U24

GND

U14

GND

U13

GND

T16

GND

T15

GND

T14

GND

T13

GND

T12

GND

T11

GND

T3

GND

R24

GND

R16

GND

R15

GND

R14

GND

R13

GND

R12

GND

R11

GND

P17

GND

P16

GND

P15

GND

P14

GND

P13

GND

P12

GND

P11

GND

P10

GND

P3

GND

N24

GND

N17

GND

F20

SATA_GND

E18

SATA_GND

D18

SATA_GND

D16

SATA_GND

E20

SATA_GND

C18

SATA_GND

C16

SATA_GND

B21

SATA_GND

A21

SATA_GND

MCP51G_PBGA_508

+5V

C209

C16

1UF 10V Y5V

0.1UF 25V Y5V

BC95

BC87

1UF 16V 0805 Y5V

0.1UF 25V Y5V /NI

MCP51

7 OF 7
GND

+3.3V_DUAL

BC96

0.1UF 25V Y5V

+1.5V

BC93

0.1UF 25V Y5V

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

SATA_GND
SATA_GND
SATA_GND
SATA_GND
SATA_GND
SATA_GND
SATA_GND
SATA_GND

+1.5V_SP_A

BC88

C222
1UF 16V 0805 Y5V

1UF 10V Y5V

N16
N15
N14
N13
N12
N11
N10
M16
M15
M14
M13
M12
M11
M3
L24
L16
L15
L14
L13
L12
L11
K14
K13
K3
J24
H3
G24
F3
E24
D3
C23
C11
C9
C7
C5
A26
A1
H5
H6
U4
R4
N4
L4
W4
L5
L6

C21
C19
C17
C15
C13
E13
B12
A12

C223

0.1UF 25V Y5V /NI

TOP SIDE CAP BACK SIDE CAP

0.1UF 25V Y5V /NIC176

+3.3V

0.1UF 25V Y5VBC97

0.1UF 25V Y5VBC81

0.1UF 25V Y5VBC76

TOP SIDE CAP

TOP SIDE CAP

+5V

0.1UF 25V Y5V /NIBC84
1UF 10V Y5VBC89

+3.3V

+1.5V

1A

R133

R1

1K 1%

+

CT30

100UF 16V 5X11 2mm
R132
200 1%

R2

Vout=Vref (1.25V) X ( 1+R2/R1 )
=1.5V

+1.5V

Title

Size Document Number Rev

Custom

Date: Sheet of

Q27

AZ1117H-ADJ SOT-223

FB22
BEAD 60 0805 1A

C221
1UF 10V Y5V

+

CT29
100UF 16V 5X11 2mm /NI

I
O
A

BC86
1UF 10V Y5V

2

1UF 16V 0805 Y5VBC90

+1.5V

1UF 10V Y5VBC77

BACK SIDE CAP

+1.2V

0.1UF 25V Y5VBC730.1UF 25V Y5VBC75

0.1UF 25V Y5VBC85

0.1UF 25V Y5VBC74

0.1UF 25V Y5VBC83

0.1UF 25V Y5VBC78

0.1UF 25V Y5VBC80

0.1UF 25V Y5VBC82

0.1UF 25V Y5VBC79

1.5V_SP_A 440mA

1.5V_SP_D 164mA

1.5V_PLL_SP_DVDD 20mA

1.5V_PLL_SP_AVDD 160mA

1.5V_PLL_CPU_HT 71mA

1.5V_PLL_SP_SS 10mA

1.5V_PLL_LEG 4mA

1.5V_PLL_USB_CORE 16mA

MCP51 (5&6&7) OF 7

CRU51-M2

1.3

19 39Friday, July 07, 2006

1

PDF created with pdfFactory Pro trial version www.pdffactory.com

5

4

3

2

1

+5V -12V+3.3V +3.3V+5V+12V +5V+12V +3.3V-12V+3.3V +5V

PCI1
PCI SLOT 120PIN U

B1

-12V

B2

TCK

B3

GND

B4

TDO

B5

5V

D D

C C

B B

A A

PCI_INTZ_16
PCI_INTX_16

PCI_CLKSLOT116

PCI_REQ_1
PCI_AD31

PCI_AD29
PCI_AD27

PCI_AD25
PCI_C/BE_3

PCI_AD23
PCI_AD21

PCI_AD19
PCI_AD17

PCI_C/BE_2

PCI_IRDY_16

PCI_DEVSEL_16

PCI_LOCK_

PCI_PERR_16

PCI_SERR_16

PCI_C/BE_1
PCI_AD14

PCI_AD12
PCI_AD10

PCI_AD8
PCI_AD7

PCI_AD5
PCI_AD3

PCI_AD1
PCI_ACK64_

5

B6

5V

B7

INTB_L

B8

INTD_L

B9

PRSNT1_L

B10

RSRVD

B11

PRSNT2_L

B12

GND

B13

GND

B14

RSRVD

B15

GND

B16

CLK

B17

GND

B18

REQ_L

B19

+Vio

B20

AD31

B21

AD29

B22

GND

B23

AD27

B24

AD25

B25

3.3V

B26

C/BE3_L

B27

AD23

B28

GND

B29

AD21

B30

AD19

B31

3.3V

B32

AD17

B33

C/BE2_L

B34

GND

B35

IRDY_L

B36

3.3V

B37

DEVSEL_L

B38

GND

B39

LOCK_L

B40

PERR_L

B41

3.3V

B42

SERR_L

B43

3.3V

B44

C/BE1_L

B45

AD14

B46

GND

B47

AD12

B48

AD10

B49

M66EN

B50

5V KEY

B51

5V KEY

B52

AD8

B53

AD7

B54

3.3V

B55

AD5

B56

AD3

B57

GND

B58

AD1

B59

+Vio

B60

ACK64_L

B61

5V

B62

5V

PCI_SERR_

PCI_SERR_16

PCI_PERR_

PCI_PERR_16

PCI_LOCK_
PCI_STOP_

PCI_STOP_16

PCI_DEVSEL_

PCI_DEVSEL_16

PCI_TRDY_

PCI_TRDY_16

PCI_IRDY_

PCI_IRDY_16

PCI_FRAME_

PCI_FRAME_16

PCI_ACK64_
PCI_REQ64A_
PCI_REQ64B_

PCI_REQ_0

PCI_REQ_016

PCI_REQ_2

PCI_REQ_216

PCI_REQ_1

PCI_REQ_116

PCI_INTY_

PCI_INTY_16

PCI_REQ_4

PCI_REQ_416

PCI_INTW_

PCI_INTW_16

PCI_CLKRUN_

PCI_CLKRUN_16

PCI_PME_

PCI_PME_16

PCI_INTX_

PCI_INTX_16

PCI_REQ_3

PCI_REQ_316

PCI_INTZ_

PCI_INTZ_16
PCI_GNT_316
PCI_GNT_016
PCI_GNT_116
PCI_GNT_216
PCI_GNT_416

BR7

TRST_L

INTA_L

INTC_L
RSRVD
RSRVD

RSRVD

RST_L
GNT_L

RSRVD

FRAME_L

TRDY_L
STOP_L

SDONE

SBO_L

5V KEY
5V KEY

C/BE0_L

REQ64_L

1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8

IDSEL

A1
A2

+12V

A3

TMS

A4

TDI

A5

5V

A6
A7
A8

5V

A9
A10

+Vio

A11
A12

GND

A13

GND

A14
A15
A16

+Vio

A17
A18

GND

A19
A20

AD30

A21

3.3V

A22

AD28

A23

AD26

A24

GND

A25

AD24

A26
A27

3.3V

A28

AD22

A29

AD20

A30

GND

A31

AD18

A32

AD16

A33

3.3V

A34
A35

GND

A36
A37

GND

A38
A39

3.3V

A40
A41
A42

GND

A43

PAR

A44

AD15

A45

3.3V

A46

AD13

A47

AD11

A48

GND

A49

AD9

A50
A51
A52
A53

3.3V

A54

AD6

A55

AD4

A56

GND

A57

AD2

A58

AD0

A59

+Vio

A60
A61

5V

A62

5V

+3.3V

8.2K /NI

+3.3V_DUAL +3.3V_DUAL

RN42

8.2K 8P4R

RN41

8.2K 8P4R

RN39

8.2K 8P4R

RN46

8.2K 8P4R

RN43

8.2K 8P4R

+3.3V_DUAL

RN44

8.2K 8P4R

RN40

8.2K 8P4R /NI

+3.3V

PCI_GNT_1
PCI_PME_

PCI_AD30
PCI_AD28

PCI_AD26
PCI_AD24

PCI_AD22
PCI_AD22

PCI_AD20
PCI_AD18

PCI_AD16

PCI_AD15
PCI_AD13

PCI_AD11
PCI_AD9

PCI_C/BE_0
PCI_AD6

PCI_AD4
PCI_AD2

PCI_AD0
PCI_REQ64A_

4

PCI_INTY_ 16
PCI_INTW_ 16

PCI_PME_ 16

C228

0.1UF 25V Y5V /NI

PCI_FRAME_ 16
PCI_TRDY_ 16
PCI_STOP_ 16
SMB_SCL 18,22

SMB_SDA 18,22
PCI_PAR 16

PCI_AD[31..0] 16
PCI_C/BE_[3..0] 16

PCIRST_SLOT1_16

PCICLK PCI_CLKSLOT2
INTR
IDSEL

PCI_INTX_16

PCI_INTZ_16

PCI_CLKSLOT216

PCI_REQ_2
PCI_AD31

PCI_AD29
PCI_AD27

PCI_AD25
PCI_C/BE_3

PCI_AD23
PCI_AD21

PCI_AD19
PCI_AD17

PCI_C/BE_2

PCI_IRDY_16

PCI_DEVSEL_16

PCI_LOCK_

PCI_PERR_16

PCI_SERR_16

PCI_C/BE_1
PCI_AD14

PCI_AD12
PCI_AD10

PCI_AD8
PCI_AD7

PCI_AD5
PCI_AD3

PCI_AD1
PCI_ACK64_

PCI SLOT 1PCI SLOT 2

PCI_CLKSLOT1
PCI_INTY* PCI_INTW*
PCI_AD22 PCI_AD24

3

PCI2
PCI SLOT 120PIN U

B1

-12V

B2

TCK

B3

GND

B4

TDO

B5

5V

B6

5V

B7

INTB_L

B8

INTD_L

B9

PRSNT1_L

B10

RSRVD

B11

PRSNT2_L

B12

GND

B13

GND

B14

RSRVD

B15

GND

B16

CLK

B17

GND

B18

REQ_L

B19

+Vio

B20

AD31

B21

AD29

B22

GND

B23

AD27

B24

AD25

B25

3.3V

B26

C/BE3_L

B27

AD23

B28

GND

B29

AD21

B30

AD19

B31

3.3V

B32

AD17

B33

C/BE2_L

B34

GND

B35

IRDY_L

B36

3.3V

B37

DEVSEL_L

B38

GND

B39

LOCK_L

B40

PERR_L

B41

3.3V

B42

SERR_L

B43

3.3V

B44

C/BE1_L

B45

AD14

B46

GND

B47

AD12

B48

AD10

B49

M66EN

B50

5V KEY

B51

5V KEY

B52

AD8

B53

AD7

B54

3.3V

B55

AD5

B56

AD3

B57

GND

B58

AD1

B59

+Vio

B60

ACK64_L

B61

5V

B62

5V

TRST_L

INTC_L
RSRVD
RSRVD

RSRVD

RSRVD

FRAME_L

TRDY_L
STOP_L

SDONE

5V KEY
5V KEY

C/BE0_L

REQ64_L

INTA_L

RST_L
GNT_L

IDSEL

SBO_L

A1
A2

+12V

A3

TMS

A4

TDI

A5

5V

A6
A7
A8

5V

A9
A10

+Vio

A11
A12

GND

A13

GND

A14
A15
A16

+Vio

A17
A18

GND

A19
A20

AD30

A21

3.3V

A22

AD28

A23

AD26

A24

GND

A25

AD24

A26
A27

3.3V

A28

AD22

A29

AD20

A30

GND

A31

AD18

A32

AD16

A33

3.3V

A34
A35

GND

A36
A37

GND

A38
A39

3.3V

A40
A41
A42

GND

A43

PAR

A44

AD15

A45

3.3V

A46

AD13

A47

AD11

A48

GND

A49

AD9

A50
A51
A52
A53

3.3V

A54

AD6

A55

AD4

A56

GND

A57

AD2

A58

AD0

A59

+Vio

A60
A61

5V

A62

5V

PCI_GNT_2
PCI_PME_

PCI_AD30
PCI_AD28

PCI_AD26
PCI_AD24

PCI_AD24
PCI_AD22

PCI_AD20
PCI_AD18

PCI_AD16

PCI_AD15
PCI_AD13

PCI_AD11
PCI_AD9

PCI_C/BE_0
PCI_AD6

PCI_AD4
PCI_AD2

PCI_AD0
PCI_REQ64B_

2

PCI_INTW_ 16
PCI_INTY_ 16

PCIRST_SLOT2_16

PCI_PME_ 16

PCI_FRAME_ 16
PCI_TRDY_ 16
PCI_STOP_ 16
SMB_SCL 18,22

SMB_SDA 18,22
PCI_PAR 16

CT31 1000UF 6.3V 8X12

+3.3V

+5V

+12V

1UF 16V 0805 Y5V /NIC227
1UF 16V 0805 Y5V /NIC240
1UF 16V 0805 Y5V /NIC238

0.01UF 50V X7R /NIC245

0.1UF 25V Y5V /NIC230
1000P 50V X7R /NIC239

FOR EMI

CT24 100UF 16V 5X11 2mm /NI

1UF 16V 0805 Y5V /NIC242
1UF 16V 0805 Y5V /NIC214

0.1UF 25V Y5VC215

0.1UF 25V Y5V /NIC246

0.1UF 25V Y5V /NIC236

0.1UF 25V Y5V /NIC241

CT25 100UF 16V 5X11 2mm /NI

Title

PCI SLOT 1&2

Size Document Number Rev

Custom

Date: Sheet of

CRU51-M2

1.3

20 39Tuesday, October 17, 2006

1

PDF created with pdfFactory Pro trial version www.pdffactory.com

5

D D

4

3

2

1

ECB

123456

EMI

+5V

78

SPK_VCC
CRNT_LMT_HDDLED1
HDD_LED-

4

SPK_DAT

JPANEL1
HEADER 2X8 N_P11 /NI

1

9

2

10
3
4

12
5

13
6

14
7

15
8

16

FPR5 33

FPR6
56

FPQ4

2N3904 SOT23

FPR3 10K 1%

FPRN1

1 2
3 4
5 6
7 8

10K 8P4R

FPD3 1N4148 SMD

AK

FPD2 1N4148 SMD

AK

FPD1 1N4148 SMD

AK

FPR7 33

SPK1

FPRN4
100 8P4R

+5V_STBY

SPEAKER

SPEAKER18

+3.3V

C C

+3.3V TO +3.3V_DUAL FOR VER:0.94

B B

A A

IDEACTPJ23

IDEACTSJ23

SATA_HDLED_17

FPR4 10K 1%

+3.3V_DUAL

FP_RESET_18

5

FP_8_10
FP_12

EMI

+3.3V_DUAL

FPC1
1UF 10V Y5V

SLEEPBTNJ 18

EMIEMI

FPR2
22K

PWRBTN_ 33

3

FPRN3

1 2
3 4
5 6
7 8

2N3904 SOT23

270 8P4R

+5V_STBY

FPQ5

1 2
3 4
5 6
7 8

FPQ1

E

C

ECB

FPRN2

2.2K 8P4R

FPQ3
2N3904 SOT23

Title

Size Document Number Rev

Custom

Date: Sheet of

B

2N3906 SOT23

SEL_LED_PWR

BASE_PNP_TR

FPR1 2.2K

+5V_STBY

ECB

FPR8 10K 1%

+1.8V_SUS

FRONT PANEL HEADER

CRU51-M2

ACPI_LED 33

1

1.3

21 39Friday, July 07, 2006

+5V

FP_12

ECB

FPQ6
2N3904 SOT23

2

ECB

FPQ2
2N3904 SOT23

FP_8_10

Stuffed, if w/

STR

Stuffed, if w/o

STR

PDF created with pdfFactory Pro trial version www.pdffactory.com

5

SMB_SCL18,20
SMB_SDA18,20

D D

C C

B B

PE_WAKE_18

PE0_PRSNT_14

+3.3V

PE0_OUT[15..0]14
PE0_OUT_[15..0]14

PE0_OUT0

R93 10K 1%

PE0_OUT1
PE0_OUT_1

PE0_OUT2
PE0_OUT_2

PE0_OUT3
PE0_OUT_3

PE0_OUT4
PE0_OUT_4

PE0_OUT_5

PE0_OUT6
PE0_OUT_6

PE0_OUT7
PE0_OUT_7

PE0_OUT8
PE0_OUT_8

PE0_OUT9
PE0_OUT_9

PE0_OUT10
PE0_OUT_10

PE0_OUT11
PE0_OUT_11

PE0_OUT12
PE0_OUT_12

PE0_OUT13

PE0_OUT14
PE0_OUT_14

PE0_OUT15
PE0_OUT_15

PE_TRST_

R109 10K 1%

C178
C177

C179
C180

C181
C182

C183
C184

C185
C186

C187
C188

C189
C190

C191
C192

C193
C194

C195
C196

C197
C198

C199
C200

C201
C202

C203
C204

C205
C206

C207
C208

0.1UF 25V Y5V

PE0TX_0+
PE0TX_0-PE0_OUT_0

0.1UF 25V Y5V

0.1UF 25V Y5V

PE0TX_1+
PE0TX_1-

0.1UF 25V Y5V

0.1UF 25V Y5V

PE0TX_2+
PE0TX_2-

0.1UF 25V Y5V

0.1UF 25V Y5V

PE0TX_3+
PE0TX_3-

0.1UF 25V Y5V

0.1UF 25V Y5V

PE0TX_4+
PE0TX_4-

0.1UF 25V Y5V

0.1UF 25V Y5V

PE0TX_5+PE0_OUT5
PE0TX_5-

0.1UF 25V Y5V

0.1UF 25V Y5V

PE0TX_6+
PE0TX_6-

0.1UF 25V Y5V

0.1UF 25V Y5V

PE0TX_7+
PE0TX_7-

0.1UF 25V Y5V

0.1UF 25V Y5V

PE0TX_8+
PE0TX_8-

0.1UF 25V Y5V

0.1UF 25V Y5V

PE0TX_9+
PE0TX_9-

0.1UF 25V Y5V

0.1UF 25V Y5V

PE0TX_10+
PE0TX_10-

0.1UF 25V Y5V

0.1UF 25V Y5V

PE0TX_11+
PE0TX_11-

0.1UF 25V Y5V

0.1UF 25V Y5V

PE0TX_12+
PE0TX_12-

0.1UF 25V Y5V

0.1UF 25V Y5V

PE0TX_13+
PE0TX_13-PE0_OUT_13

0.1UF 25V Y5V

0.1UF 25V Y5V

PE0TX_14+
PE0TX_14-

0.1UF 25V Y5V

0.1UF 25V Y5V

PE0TX_15+
PE0TX_15-

0.1UF 25V Y5V

PCI-EX16

+3.3V

+12V

PCI_Express_x16

B1

+12V

B2

+12V

B3

RSVD1

B4

GND

B5

SMCLK

B6

SMDAT

B7

GND

B8

+3.3

B9

JTAG1

B10

3.3VAUX

B11

WAKE#

Mechanical Key

B12

RSVD2

B13

GND

B14

PETP0

B15

PETN0

B16

GND

B17

PRSNT2#1

B18

GND

End of the x1 Connector

B19

PETP1

B20

PETN1

B21

GND

B22

GND

B23

PETP2

B24

PETN2

B25

GND

B26

GND

B27

PETP3

B28

PETN3

B29

GND

B30

RSVD3

B31

PRSNT2#2

B32

GND

End of the x4 Connector

B33

PETP4

B34

PETN4

B35

GND

B36

GND

B37

PETP5

B38

PETN5

B39

GND

B40

GND

B41

PETP6

B42

PETN6

B43

GND

B44

GND

B45

PETP7

B46

PETN7

B47

GND

B48

PRSNT2#3

B49

GND

End of the x8 Connector

B50

PETP8

B51

PETN8

B52

GND

B53

GND

B54

PETP9

B55

PETN9

B56

GND

B57

GND

B58

PETP10

B59

PETN10

B60

GND

B61

GND

B62

PETP11

B63

PETN11

B64

GND

B65

GND

B66

PETP12

B67

PETN12

B68

GND

B69

GND

B70

PETP13

B71

PETN13

B72

GND

B73

GND

B74

PETP14

B75

PETN14

B76

GND

B77

GND

B78

PETP15

B79

PETN15

B80

GND

B81

PRSNT2#4

B82

RSVD4

End of the x16 Connector

3GPIOX16

PRSNT1#

JTAG2
JTAG3
JTAG4
JTAG5

PERST#

REFCLK+
REFCLK-

PERP0
PERN0

RSVD5
PERP1

PERN1

PERP2
PERN2

PERP3
PERN3

RSVD6
RSVD7
PERP4

PERN4

PERP5
PERN5

PERP6
PERN6

PERP7
PERN7

RSVD8
PERP8

PERN8

PERP9
PERN9

PERP10
PERN10

PERP11
PERN11

PERP12
PERN12

PERP13
PERN13

PERP14
PERP14

PERP15
PERN15

4

+12V

A1
A2

+12V

A3

+12V

A4

GND

A5
A6
A7
A8
A9

+3.3V

A10

+3.3V

A11

A12

GND

A13
A14
A15

GND

A16
A17
A18

GND

A19
A20

GND

A21
A22
A23

GND

A24

GND

A25
A26
A27

GND

A28

GND

A29
A30
A31

GND

A32
A33

A34

GND

A35
A36
A37

GND

A38

GND

A39
A40
A41

GND

A42

GND

A43
A44
A45

GND

A46

GND

A47
A48
A49

GND

A50
A51

GND

A52
A53
A54

GND

A55

GND

A56
A57
A58

GND

A59

GND

A60
A61
A62

GND

A63

GND

A64
A65
A66

GND

A67

GND

A68
A69
A70

GND

A71

GND

A72
A73
A74

GND

A75

GND

A76
A77
A78

GND

A79

GND

A80
A81
A82

GND

PE_TCK
PE_TDI

PE_TMS

PE_RESET_ 14

PE0_REFCLK 14
PE0_REFCLK_ 14

PE0_IN0 14
PE0_IN_0 14

PE0_IN1 14
PE0_IN_1 14

PE0_IN2 14
PE0_IN_2 14

PE0_IN3 14
PE0_IN_3 14

PE0_IN4 14
PE0_IN_4 14

PE0_IN5 14
PE0_IN_5 14

PE0_IN6 14
PE0_IN_6 14

PE0_IN7 14
PE0_IN_7 14

PE0_IN8 14
PE0_IN_8 14

PE0_IN9 14
PE0_IN_9 14

PE0_IN10 14
PE0_IN_10 14

PE0_IN11 14
PE0_IN_11 14

PE0_IN12 14
PE0_IN_12 14

PE0_IN13 14
PE0_IN_13 14

PE0_IN14 14
PE0_IN_14 14

PE0_IN15 14
PE0_IN_15 14

RN34

1 2
3 4
5 6
7 8

10K 8P4R

+3.3V

3

SMB_SCL18,20
SMB_SDA18,20

PE_WAKE_18

PE1_OUT14
PE1_OUT_14

PE1_PRSNT_14

+3.3V

+12V Change to +12V_P

+3.3V_DUAL+3.3V_DUAL

PE_TRST_1

R103 10K 1%

0.1UF 25V Y5V
C172
C173

0.1UF 25V Y5V

R104 10K 1%

CT21 100UF 16V 5X11 2mm

+12V

+3.3V+3.3V

PCI-EX1_1

+12V +12V

PCI_Express_x1

B1

+12V1

B2

+12V2

B3

RSVD1

B4

GND

B5

SMCLK

B6

SMDAT

B7

GND

B8

+3.3V1

B9

JTAG1

B10

3.3VAUX

B11

WAKE#

Mechanical Key

B12

RSVD2

B13

PE1TX_1+
PE1TX_1-

GND

B14

PETP0

B15

PETN0

B16

GND

B17

PRSNT2#

B18

GND

End of the x1 Connector

3GPIOX1

1UF 16V 0805 Y5VC174

PRSNT1#

JTAG2
JTAG3
JTAG4
JTAG5
+3.3V2
+3.3V3

PERST#

REFCLK+

REFCLK-

PERP0
PERN0

+12V3
+12V4

2

+3.3V

A1
A2
A3
A4

GND

GND

GND

GND

PE_TCK1

A5

PE_TDI1

A6
A7
A8
A9
A10
A11

A12
A13
A14
A15
A16
A17
A18

PE_RESET_ 14

PE1_REFCLK 14
PE1_REFCLK_14

PE1_IN 14
PE1_IN_ 14

PE_TMS1
PE_TDI1
PE_TCK1PE_TMS1

RN33

1 2
3 4
5 6
7 8

10K 8P4R

1

+3.3V

A A

Title

PCIEXPRESS

Size Document Number Rev

Custom

5

4

3

2

Date: Sheet of

CRU51-M2

1

1.3

22 39Tuesday, October 17, 2006

PDF created with pdfFactory Pro trial version www.pdffactory.com

5

4

3

2

1

IDE_PDD[15..0]17

PCIRST_IDE_16

IDE_PDD7
IDE_PDD6

D D

IDE_DREQ_P17
IDE_IOW_P_17

IDE_IOR_P_17

IDE_IORDY_P17
IDE_DACK_P_17
IDE_INTR_P17
IDE_ADDR_P117
IDE_ADDR_P017

IDE_CS1_P_17

IDEACTPJ21

IDE_CS3_P_17

C C

B B

IDE_ADDR_P217

IDE_SDD[15..0]17

IDE_DREQ_S17
IDE_IOW_S_17

IDE_IOR_S_17

IDE_IORDY_S17
IDE_DACK_S_17
IDE_INTR_S17
IDE_ADDR_S117
IDE_ADDR_S017

IDE_CS1_S_17

IDEACTSJ21

IDE_CS3_S_17

IDE_ADDR_S217

IDE_PDD5
IDE_PDD4
IDE_PDD3
IDE_PDD2
IDE_PDD1
IDE_PDD0

R61 4.7K

+3.3V

+3.3V

PCIRST_IDE_16

IDE_SDD7
IDE_SDD6
IDE_SDD5
IDE_SDD4
IDE_SDD3
IDE_SDD2
IDE_SDD1
IDE_SDD0

+3.3V

R62 4.7K

+3.3V

IDE_SDD7
IDE_PDD7
IDE_INTR_S
IDE_INTR_P

R63

5.6K

R64

5.6K

RN30

1 2
3 4
5 6
7 8

10K 8P4R

IDE1
BOX 2X20 N20 B

1

RESET
DD7
DD6
DD5
DD4
DD3
DD2
DD1
DD0
GND
DMARQ
DIOW
DIOR
IORDY
DMACK
INTRQ
DA1
DA0
CS0
DASP

PDIAG

GND

DD8

DD9
DD10
DD11
DD12
DD13
DD14
DD15

NC
GND
GND
GND

CSEL

GND

NC

DA2
CS1

GND

3
5
7

9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

PRIMARY IDE

IDE2
BOX 2X20 N20 Y

1

RESET
DD7
DD6
DD5
DD4
DD3
DD2
DD1
DD0
GND
DMARQ
DIOW
DIOR
IORDY
DMACK
INTRQ
DA1
DA0
CS0
DASP

PDIAG

GND

DD8

DD9
DD10
DD11
DD12
DD13
DD14
DD15

NC
GND
GND
GND

CSEL

GND

NC

DA2
CS1

GND

3
5
7

9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

SECONDARY IDE

2

IDE_PDD8

4

IDE_PDD9

6

IDE_PDD10

8

IDE_PDD11

10

IDE_PDD12

12

IDE_PDD13

14

IDE_PDD14

16

IDE_PDD15

18
20
22
24
26
28
30
32
34
36
38
40

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

IDE_SDD8
IDE_SDD9
IDE_SDD10
IDE_SDD11
IDE_SDD12
IDE_SDD13
IDE_SDD14
IDE_SDD15

R57
15K

R60
15K

CBLE_DET_P 17

CBLE_DET_S 17

A A

Title

IDE CONNECTORS

Size Document Number Rev

Custom

5

4

3

2

Date: Sheet of

CRU51-M2

1

1.3

23 39Friday, July 07, 2006

PDF created with pdfFactory Pro trial version www.pdffactory.com

5

4

3

2

1

POWER CONN DECOUPING

MH1

PAD200-8 /NI

1

5

2

6

3

7

(NPTH)

4

8

D D

C C

B B

A A

9

MH3
PAD200-8 /NI

1

5

2

6

3

7

(NPTH)

4

8

9

MH5
PAD200-8 /NI

1

5

2

6

3

7

(NPTH)

4

8

9

Impedance Testing Coupon

+3.3V

JP1

NC1

1
2

HEADER 1X2 D 150 /NI

JP2

1

NC2

2

HEADER 1X2 D 150 /NI

NC3
NC4

+5V

NC5
NC6

5

1
2
3
4

1
2
3
4

U6

CP1
CP2
CP3
CP4
CP5
CP6
CP7
CP8
CP9
CP10

MATXCUT /NI

(NPTH)

9

(NPTH)

9

MH4

PAD200-8 /NI

5
6
7
8

MH2
PAD200-8 /NI

5
6
7
8

AUD_GND29,30

MH6

PAD200-8 /NI

1
2
3

(NPTH)

4

9

PS_ON_33

SLP_S3_18,33

+5V +12V +5V

R1005

4.7K

FAN_CTL133

R1006 100 1%

WAFER 1X4 2.54MM

5
6
7
8

JCFAN1

JCFANA

WAFER 1X3 /NI

4

V1.1

4
3
2
1

3
2
1

+5V_STBY

R30
10K 1%

-5V

R7
10K 1%

R1 1K 1%

D9 SS12/5817 SMA /NI
R1007 4.7K /NI

C58
470P 50V X7R

C40

0.1UF 25V Y5V

R1

R2

C71

0.1UF 25V Y5V

FAN1 33

R1008
22K /NI

JNFAN1

3
2
1

WAFER 1X3 /NI

JSFAN1

3
2
1

WAFER 1X3

POWER
CONNECTOR

+3.3V +5V+5V +5V_STBY +12V-12V

JATXPWR1

1

13

3.3V

3.3V

2

14

3.3V

-12V

3

15

GND

GND

4

16

5V

PSON

5

17

GND

GND

6

18

5V

GND

7

19

GND

GND

8

20

POK

NC

9

21

5VSB

5V

10

22

12V

5V

11

23

12V

12

24

DET5VGND

POWER CONN ATX 24P

CPU

R1->10K 1% R2-->1K 1% R3-->/NI
R1-> /NI ADD R2-->27K R3-->22KR3

+5V

R86
10K 1% /NI

R87 1K 1% /NI

+12V

+12V Change to +12V_P

+5V

R176
10K 1%

R182 1K 1%

3

SYSTEM

FAN2 33

+12V

C36

C37

0.1UF 25V Y5V

0.1UF 25V Y5V

EMI

FAN3 33

+5V_STBY

R33
10K 1%

C42
470P 50V X7R

+5V_STBY

1.0

PWRGD_PS 32,35

2

+3.3V+5V

0.1UF 25V Y5VC216

0.1UF 25V Y5VC17

LED_DIMM

Title

ATX POWER & FAN CONTROL

Size Document Number Rev

Custom

Date: Sheet of

CRU51-M2

1

24 39Friday, July 07, 2006

1.3

PDF created with pdfFactory Pro trial version www.pdffactory.com

5

4

3

2

1

D D

FLOPPY
CONNECTOR

FDD1

1
3 4

7 8
91110

13 14
17 18

19 20
21
23
25
27
29
31
33

BOX 2X17 N5 W

JKBMS1
MINI DIN CONN PC99

1
2
3
4
5
6
7
8

9
10
11
12

MTH'S

G1G2G3G4G5

VBATREF

D7

A

K

BAT54C SOT23

KA

C255
1UF 10V Y5V

C252
1UF 16V 0805 Y5V

+3.3V_VBAT 18,33

KB_FB_VCC5L

1 2
3 4

2.2K 8P4R

5 6
7 8

KDAT

KDAT33

KCLK

KCLK33

MDAT

MDAT33

MCLK FB_MCLK

MCLK33

FB3

BEAD 60 0805 1A

FB4

BEAD 60 0805 1A

FB5

BEAD 60 0805 1A

FB6

BEAD 60 0805 1A

KEYBOARD & MOUSE

BEAD 60 0805 1AFB2

FB_KDAT

FB_KCLK
FB_MDAT

C9
47P 50V NPO

FOR EMI

C3

0.1UF 25V Y5VRN1

FOR EMI

C8
47P 50V NPO

KB_FB_VCC5KB_FB_VCC5L

C7

47P 50V NPO

C6

47P 50V NPO

+3.3V_STBY

R152 1K 1%

BAT1
BATTERY HOLDER-1

C C

B B

2
6

12
1615

22
24
26
28
30
32
34

+5V

R153
150

C80

0.1UF 25V Y5V /NI

RN47
150 8P4R

1 2

3 4

5 6

7 8

FRWC- 33

FINDEX- 33
FMOA- 33
FDSB- 33
FDSA- 33
FMOB- 33
FDIR- 33
FSTEP- 33
FWD- 33
FWEN- 33
FTRAK0- 33
FWP- 33
FRDATA- 33
FHEAD- 33
FDSKCHG- 33

Data Switch solution

A A

Title

FLOOY ,KEYBOARD & MOUSE ,CMOS CLEAR

Size Document Number Rev

Custom

5

4

3

2

Date: Sheet of

CRU51-M2

1

1.3

25 39Tuesday, November 28, 2006

PDF created with pdfFactory Pro trial version www.pdffactory.com

A

DAC_HSYNC14

DAC_VSYNC14

4 4

DAC_HSYNC14

DAC_VSYNC14

DAC_RED14

DAC_GREEN14

DDC_DATA18

DAC_BLUE14

DDC_CLK18

3 3

2 2

U2B

147

SN74ACT08

4
5

R44

R42

150

150

150

R1027

0 /NI

R1028

0 /NI

U2A
SN74ACT08

6

+3.3V

B

+5V

147

1
2

3

R41 22

R39 22

R47 33

R45 33

+5V +5V

R46

2.2K

R48

2.2K

+5V

C

INDUCTOR 68NH 300MA 0805FB11

INDUCTOR 68NH 300MA 0805FB10

INDUCTOR 68NH 300MA 0805FB9

C98

C87

100P 50V NPO

FB1

47P 50V NPO

0 0805

FOR EMI

FOR EMI

C84

47P 50V NPO

+5V

C104

100P 50V NPO

D

PS1

POLY FUSE 1.1A

C93R43
33P 50V NPO

BEAD 60 0805 1AFB8

JVGA1
VGA CONN PC99 SHORT

MONRED_A

MONGREEN_A
MONSDA_A

MONBLUE_A
MONHSYNC_A
DDCPOWER_A

MONVSYNC_A

MONSCL_A

C89

C91

C97

33P 50V NPO

33P 50V NPO

470P 50V X7R /NI

FOR EMI

FB7

0 0805

FOR EMI FOR EMI

C62R38 0 0805 /NI

0.1UF 25V Y5V

6
1

11

7
2

12

8
3

13

9

4
14
10

5
15

G1

G2

VGA CONNECTOR

+5V

C78

0.1UF 25V Y5V

E

1 1

Title

VGA CONNECTOR

Size Document Number Rev

Custom

A

B

C

D

Date: Sheet of

CRU51-M2

E

1.3

26 39Friday, July 07, 2006

PDF created with pdfFactory Pro trial version www.pdffactory.com

5

4

3

2

1

KB_FB_VCC5L

D D

C C

B B

USB

R49

FOR EMI

1UF 10V Y5V

UST4­UST4+
UST5­UST5+

C127
10P 50V NPO

FB12 0 0805

USB_5_18

USB_518

USB_4_18

USB_418

USB_418

USB_4_18
USB_518
USB_5_18

+5V

EMI

C283

0.1UF 25V Y5V

UST7­UST7+ UST6+

C265

C263
10P 50V NPO /NI

10P 50V NPO /NI

C129
10P 50V NPO

1 2
3 4
5 6
7 8

R177
0 0805 /NI

1
3 4
5 6
7 8

HEADER 2X5 N9 W

C121

10P 50V NPO

RN20

10 8P4R

PS3
POLY FUSE 1.1A

USBPWR

JUSB2

2

10

R52

0 0805 /NI

C124
10P 50V NPO

1

2

3

1

+5V

JUSBV1

C123

HEADER 1X3

2

PS2

3

POLY FUSE 1.1A

USB_PWR

C119

0.1UF 25V Y5V

JUSB1

G3 G1

1
2
3
4

G4 G2

USB CONN

UST5-

UST5+
UST4-

UST4+

FOR EMI FOR EMI

UST4+
UST4­UST5+
UST5-

+5V

JUSBV2

HEADER 1X3

+5V_STBY

C276

0.1UF 25V Y5V

C268
10P 50V NPO /NI

+5V_STBY

5
6
7
8

USB_3_18

USB_318

USB_218

USB_2_18

USB_2_18
USB_218
USB_318

USB_3_18

UST6-

C272
10P 50V NPO /NI

FOR EMI

0.1UF 25V Y5V

UST0­UST0+

RN26

1 2
3 4
5 6
7 8

10 8P4R

C264

C266

10P 50V NPO /NI

10P 50V NPO /NI

UST3­UST3+

UST2­UST2+

FOR EMIFOR EMI

1
3 4
5 6
7 8

C136

C138

10P 50V NPO

10P 50V NPO

UST3-

UST3+
UST2+

UST2-

UST2­UST2+
UST3+
UST3-

JUSB3

2

10

HEADER 2X5 N9 W

USB LAN

C143

10P 50V NPO

USB_018

USB_0_18

USB_1_18

USB_118
USB_1_18
USB_018

USB_0_18

C120

0.1UF 25V Y5V

CT8

C141
10P 50V NPO

100UF 16V 5X11 2mm

C270

0.1UF 25V Y5V

CT32

C267

100UF 16V 5X11 2mm

10P 50V NPO /NI

B1
B2
B3
B4

A1
A2
A3
A4

RN61

1 2
3 4
5 6
7 8

0 8P4R /NI

UST1­UST1+

C271

10P 50V NPO /NI

JUSBLAN1A

VCC0
DATA0­DATA0+
GND0

VCC1
DATA1­DATA1+
GND1

RJ45USBA CONN

UST1+
UST1­UST0+
UST0-

C158

0.1UF 25V Y5V

G3

GND2

FOR EMI NEAR JCDIN1 USB_2 SIGNAL VIA

G4

GND3

G5

GND4

G6

GND5

UST0+

USB_718

UST0-

USB_7_18

UST1+

USB_618USB_118

UST1-

USB_6_18

USB_618
USB_6_18
USB_718

USB_7_18

+5V

FOR EMI NEAR C172 USB SIGNAL VIA

C27

0.1UF 25V Y5V

UST7+

UST7­UST6+

UST6+
UST6­UST7+
UST7-

UST6-

RN60

1 2
3 4
5 6
7 8

0 8P4R /NI

A A

Title

USB INTERFACE

Size Document Number Rev

Custom

5

4

3

2

Date: Sheet of

CRU51-M2

1

1.3

27 39Tuesday, October 17, 2006

PDF created with pdfFactory Pro trial version www.pdffactory.com

5

D D

C C

+3.3V_STBY

RN59

10K 8P4R

1 2

3 4

5 6

SER_RI_18

7 8

E C

Q29
2N3904 SOT23

D8 1N4148 SMD

B

COM1

+5V +12V

U9

20

VCC

DCD1#33
DSR1#33

RTS1#33

SOUTA33
CTS1#33
DTR1#33

B B

19

ROUT1

18

ROUT2

17

SINA33

RI1#33

ROUT3

16

DIN1

15

DIN2

14

ROUT4

13

DIN3

12

ROUT5

ST75185CTR TSSOP

DOUT1
DOUT2

DOUT3

1

V+

2

RIN1

3

RIN2

4

RIN3

5
6
7

RIN4

8
9

RIN5

1011

V-GND

-12V

4

-XRI1

WAKE ON LAN

RIN1
RIN2
RIN3
DOUT1
DOUT2
RIN4
DOUT3

-XRI1

C39 220P 50V X7R /NI
C41 220P 50V X7R /NI
C51 220P 50V X7R /NI
C49 220P 50V X7R /NI
C50 220P 50V X7R /NI
C47 220P 50V X7R /NI
C48 220P 50V X7R /NI
C46 220P 50V X7R /NI

JCOM1
D CONN 9PIN PC99

1
6
2
7

G2
3
8

G1
4
9
5

COM PORT

3

LPT

+5V

PARALLEL - CONNECTOR

RN50 33 8P4R

1 2
3 4
5 6
7 8

RN58 33 8P4R

1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8

RN48 33 8P4R

PRD3
PRD2
PRD1
PRD0

PRD7
PRD6
PRD5
PRD4

-STB
AFD

-INIT

-SLIN

EEROR#33

ACK#33

BUSY33

PE33

SLCT33

P_PRD3

PD333

P_PRD2

PD233

P_PRD1

PD133

P_PRD0

PD033

P_PRD7

PD733

P_PRD6

PD633

P_PRD5

PD533

P_PRD4

PD433

P_-STB

STB#33

P_-AFD

ALF#33

P_-INIT

INIT#33

P_-SLIN

SLCTIN#33

1N4148 SMD

FOR EMI

2

D6

FOR EMI

1

RN37

RN62

RN52

RN38

R128

2.2K 8P4R

2.2K

2.2K 8P4R

246

135

2.2K 8P4R

246

246

8

8

135

135

7

7

PRD1

-SLIN

PRD4

PRD5

PRD6

PRD3

Ver091 Update

2.2K 8P4R

246

8

8

135

7

7

-STB
AFD
PRD0
P_-ERR
PRD1

-INIT
PRD2

-SLIN
PRD3

PRD4
PRD5
PRD6
PRD7
P_-ACK
P_BUSY
P_PE
P_SLCT

-INIT

P_-ERR

PRD2

AFD

-STB

PRD0

-STB
PRD0
PRD1
PRD2
PRD3
PRD4
PRD5
PRD6
PRD7
P_-ACK
P_BUSY
P_PE
P_SLCT

JPRNT1

HEADER 2X13 N26

1 2
3 4
5 6
7 8
9 10

11 12
13 14
15 16
17 18
19 20
21 22
23 24
25

AFD
P_-ERR

-INIT

-SLIN

A A

Title

SERIAL & PARALLEL

Size Document Number Rev

Custom

5

4

3

2

Date: Sheet of

CRU51-M2

1

1.3

28 39Friday, July 07, 2006

PDF created with pdfFactory Pro trial version www.pdffactory.com

5

4

3

2

1

CD_L
CD_G

CD_R

+

VCC5_AUD

AC15 1UF 16V 0805 Y5V

LINE1-R
LINE1-L

MIC1-R
MIC1-L

CD-R

CD-GND

CD-L

FOR EMI

AC21
10P 50V NPO

AC281UF 10V Y5V
AC261UF 10V Y5V

VOFR
VOCR
VOBR

AC191UF 10V Y5V

AU1

24
23
22
21
20
19
18
17
16
15
14
13

CODEC ALC655

2 1

AC_BITCLK

AC_SDOUT

3

PORT_D_R 30
PORT_D_L 30

STR_MIC_L 30
STR_MIC_R 30

AUD_GND 24,30

AUD_GND 24,30

AC20
1000P 50V X7R

SIDE_SURR_R
SIDE_SURR_L

AC22
1000P 50V X7R

LINE IN

AC8 1UF 10V Y5V
AC9 1UF 10V Y5V
AC10 1UF 10V Y5V
AC11 1UF 10V Y5V

MIC-IN

AC12 1UF 10V Y5V
AC13 1UF 10V Y5V
AC14 1UF 10V Y5V

BASS/CENTER(850)

+3.3V

AC_RST_ 18

AC_SYNC 18

AC_SDIN_0 18

AC_BITCLK 18

AC_SDOUT 18

CD_R
CD_G
CD_L

CD in connectorFRONT OUT

Verfout bias for stereo microphone.

AD1

A K

1N4148 SMD

AD2

A K

1N4148 SMD

Verfout bias for backpanel microphone.

PORT_B_R30
PORT_B_L30

PORT_C_R 30
PORT_C_L 30
PORT_B_R 30
PORT_B_L 30

PORT_H_R
PORT_H_L

2

1 2
3 4
5 6
7 8

AUD_GND 24,30

ARN2

5.6K 8P4R

Reserve to fine tune accuracy of
Jack Sensing

D D

STR MIC--->FRONT PANEL

AC23 1UF 10V Y5V

C C

VCC5_AUD

AC25

0.1UF 25V Y5V

AUD_GND24,30

SURR-OUT-L

SURR-OUT(850)

SURR-OUT-R

CENTER-OUT

B B

SPDIFO30

A A

5

LEF-OUT

BASS/CENTER(850)

VCC5_AUD

AUD_GND24,30

+3.3V

AR6 10 AL8 0 0805

AUD_14MHZ_IN18

+

+

AC30 100UF 16V 6.3X5 2.5mm

AC29 100UF 16V 6.3X5 2.5mm

AR3 1M /NI

36

FRONT-L

FRONT-R

37

LINE1-VREFO-R

38
39
40
41
42
43
44
45
46
47
48

1UF 10V Y5V

4

Sense B/FMIC1

AVDD2
SURR-L
JDREF/NC/JD3
SURR-R
AVSS2
CEN
LFE
SurrBack-L/GPIO0
SurrBack-R/XTLSEL
SPDIFI/EAPD
SPDIFO

DVDD1

GPIO0/XTLI

GPIO1/XTLO

1234567891011

AC24

+

AC6 0.1UF 25V Y5V

AC16 0.1UF 25V Y5V

AC17 1UF 16V 0805 Y5V

2526272829303132333435

VREF

AVDD1

AVSS1

MIC1-VREFO-R/FMIC2

SDATA-OUT

LINE2-VREFO/JD4

MIC2-VREFO/AFILT2

BIT-CLK

DVSS2

AC18

1UF 10V Y5V

+5V

C284

0.1UF 25V Y5V

MIC1-VREFO-L

LINE1-VREFO-L/AFILT1

SDATA-IN

DVDD2

SYNC

AR4 22

AR5 22

MIC2-R/JD1
MIC2-L/JD2

LINE2-R/AUX-R

LINE2-L/AUX-L

Sense A/Phone

RESET#

PCBEEP

12

AC_RST_
AC_SYNC
AC_SDIN_0

DCVOL/VREFO2

DVSS1

EMI

JCDIN1

L

1
2

GND
GND

3
4

R

WAFER 1X4 BLACK

123456

78

ARN1
47K 8P4R

AUD_GND 24,30

VCC5_AUD

ARN3

1 2

AUD_GND 24,30

3 4
5 6

STR_MIC_R 30

7 8

STR_MIC_L 30

4.7K 8P4R

VOBR

AK
AK

AUDIO CODEC

VOBR

CRU51-M2

29 39Friday, July 07, 2006

1

AD3 1N4148 SMD
AD4 1N4148 SMD

Title

Size Document Number Rev

Custom

Date: Sheet of

1.3

PDF created with pdfFactory Pro trial version www.pdffactory.com

5

4

3

2

1

LINE-IN

LINE_IN_L

JAUDIO1D

D D

AUDIO JACK 3L

LINE_IN_L_C

32
33
34

LINE_IN_R_C

35
1

LINE_IN_R

AL1 BEAD 60 0805 1A

AUD_GND 24,29

LINE-OUT

JAUDIO1C

AUDIO JACK 3L

MIC-IN

JAUDIO1B

AUDIO JACK 3L

C C

CONN_GND

AUDIO ANALOG POWER

AU2

78L05 TO-92

+12V

B B

12

AC31

0.1UF 25V Y5V

FOR EMI

IGO

1
2

ACT1
100UF 16V 6.3X5 2.5mm

+

-

VCC5_AUD

12

AC27

0.1UF 25V Y5V

AUD_GND 24,29

SPK_L_C SPK_L

22
23
24

SPK_R_C SPK_R

25
1

MIC1-L

2
3
4

MIC1-R

5
1

FOR EMI

STR_MIC_R29

AC1

AC2

100P 50V NPO /NI

100P 50V NPO /NI

IO_GND

AC3
100P 50V NPO /NI

AC5
100P 50V NPO /NI

2 1

AL2 0 0805

2 1

AL3 0 0805

STR_MIC_L
STR_MIC_R
SPK_R

LINE_IN_R
LINE_IN_L

Rear Panel

FOR EMI

2 1

AL7 0 0805

2 1

AL6 0 0805

AC4
100P 50V NPO /NI

2 1

AL4 0 0805

2 1

AL5 0 0805

AC7

100P 50V NPO /NI

PORT_B_L

VCC5_AUD

JFAUDIO1

1 2
3 4
5 6
7
9 10

111312

14

HEADER 2X7 N8

(Optional Rear Audio Panel)

PORT_B_R

SPK_R_C
SPK_L_CSPK_L

LINE_IN_R_C
LINE_IN_L_C

AUD_GND 24,29

AUD_GND 24,29

PORT_B_L 29

PORT_B_R 29

AUD_GND 24,29

AUD_GND 24,29STR_MIC_L29

PORT_C_L 29

PORT_C_R 29

PORT_D_L 29

PORT_D_R 29

IO_GND

H1

2 1

AR2 0 0805

2 1

AR7 0 0805

2 1

AR1 0 0805

FOR EMI

G2

JAUDIO1A

G2

G3

G4 G5

AUDIO JACK 3L

G4

G1

G1

G3

IO_GND

AUD_GND 24,29

AUD_GND 24,29

+5V

BEAD 60 0805 1A

2 1

A A

AL9

1UF 16V 0805 Y5V

5

JSPDIF_OUT1

1

2

SPDIFO 29

3

WAFER 1X3 BLACK

AC32

Title

AUDIO PORT

Size Document Number Rev

Custom

4

3

2

Date: Sheet of

CRU51-M2

1

1.3

30 39Friday, July 07, 2006

PDF created with pdfFactory Pro trial version www.pdffactory.com

5

D D

VID_OUT47
VID_OUT37
VID_OUT27
VID_OUT17
VID_OUT07

CPU_VLD16

CPUVDD_EN16

C C

CPU_CORE_FB7

CPU_CORE_FB_7

Over Voltage Controller :

B B

A A

Vout=VCOREFB+ X ( 1+PR19 / RB )

+V_CPU

PR29
51 1%

PR3
51 1%

+3.3V

+12V

Change Value

PR4

5.6K

Change Value

PR27 100 1%

+5V

PC20

0.01UF 50V X7R

PR22
10K 1%

1000P 50V X7R /NIPC5

PC2

+3.3V

0.1UF 25V Y5VPC16

0.1UF 25V Y5VPC15

PC7
4700P 50V X7R

470P 50V X7RPC6

Change Value

PR6 1K 1%

OVL

OVL37

PR14 150K /NI
PR12 47K /NI

OFFSET

-10mV

PR18
249K 1%

PR9 10K 1%

0.01UF 50V X7R /NI

PR2
10K 1%
PC3

0.1UF 25V Y5V

4

SS12/5817 SMA /NI

PC12

0.01UF 50V X7R

PC4

PR19 30K 1%
PR17 30K 1%
PR1 30K 1%

38
39
40

1
2

3
35
37

8

9

10

12

11

6

36

5

4
13

14

15
16

PD1

PU1
ISL6566CR

VID4
VID3
VID2
VID1
VID0
DACSEL/VID5
PGOOD
ENLL

COMP

FB

VDIFF

VSEN

RGND

OFST

FS
REF

VRM10
OCSET

ICOMP

ISUM
IREF

+5V

PR13

4.7 0805

7

PVCC1

VCC

BOOT1

UGATE1

PHASE1

LGATE1

PVCC2
BOOT2

UGATE2

PHASE2

LGATE2

PVCC3
BOOT3

UGATE3

PHASE3

LGATE3

GND

41

BOTTOM PAD
CONNECT TO GND
THROUGH 10vias

1UF 16V 0805 Y5VPC9

ISEN1

ISEN2

ISEN3

33

PR24 2.7 0805

30

31

29

PR21 1.8K

32
34

PR26 0 0805

24

PR15 2.7 0805

26

27

28

PR11 1.8K

25

PR31 0 08051000P 50V X7R /NI

23

18
21

PR8 2.7 0805

20

22

PR10 1.8K

19

PR20 0 0805

17

3

+12V

+12V

+12V

ISL6566CR FOR K8 939 POWER CKT

PR23

4.7 0805

PR7

4.7 0805

PR5

4.7 0805

PC17

0.1UF 25V Y5V
PR30 2.7 0805

R36 10K 1%

PC13

0.1UF 25V Y5V
PR33 2.7 0805

R40 10K 1%

PC8

0.1UF 25V Y5V
PR25 2.7 0805

R22 10K 1%

1UF 16V 0805 Y5VPC14

PQ4
FDD8880 TO252

PQ3

FDD8880 TO252

1UF 16V 0805 Y5VPC10

PQ6
FDD8880 TO252

PQ5

FDD8880 TO252

1UF 16V 0805 Y5VPC1

PQ2
FDD8880 TO252

PQ1

FDD8880 TO252

VIN

DS

PC23
1UF 16V 0805 Y5V

G

DS

G

VIN

DS

G

DS

G

VIN

DS

G

DS

G

PR28

2.7 0805

PC19
1000P 50V X7R

PC21
1UF 16V 0805 Y5V

PR32

2.7 0805

PC22
1000P 50V X7R

PC18
1UF 16V 0805 Y5V

PR16

2.7 0805

PC11
1000P 50V X7R

+12V_P

PL4 INDUCTOR 1.0UH

+

PC25

PCT9
100UF 16V 5X11 2mm /NI

1UF 16V 0805 Y5V

PL2
INDUCTOP 1UH 28A

PL3

INDUCTOP 1UH 28A

PL1

INDUCTOP 1UH 28A

2

PCT7

PCT8

+

+

1500UF 16V 10X20X5 LR O

1500UF 16V 10X20X5 LR O

PCT5

+

3300UF 6.3V 10X25X5 LR O

+V_CPU

PCT3

+

3300UF 6.3V 10X25X5 LR O

+5V

PCT2

PC24

+

1UF 16V 0805 Y5V

1500UF 16V 10X20X5 LR O

PCT6

PCT1

+

+

3300UF 6.3V 10X25X5 LR O

3300UF 6.3V 10X25X5 LR O

+12V_P

JATXPWR2

1
2 3
5 6

POWER CONN ATX12V 2X2

C38

0.1UF 25V Y5V

VIN

+V_CPU

0.8V~1.55V/80A

PCT4

+

3300UF 6.3V 10X25X5 LR O

4

1

4
2 3
H1 H2

1

FOR EMI NEAR JATXPWR2 LEFT

Title

VCORE POWER SUPPLY

Size Document Number Rev

Custom

5

4

3

2

Date: Sheet of

CRU51-M2

1

1.3

31 39Tuesday, September 26, 2006

PDF created with pdfFactory Pro trial version www.pdffactory.com

5

D D

PWRGD_PS24,35

C C

B B

R37 4.7K

+5V_STBY

4

MEM_VDD
MEM_STR

+12V

R19 4.7K

R29
10K 1%

DS

Q14
2N7002 SOT23G

R1014 4.7K

C

Q13

B

2N3904 SOT23

E

RT9202/RT9214NC

SLP_S5_18

RT9202NC/RT9214

R1019
15K /NI

R1021
20K /NI
C291

4700P 50V X7R /NI

钡 癬ノ GND

VIA

R15 4.7K

Q38
NDS352AP SOT23 /NI

R1018 15K

7

COMP

C290
15P 50V NPO /NI

+5V_DUAL

G

C4
10UF 10V 0805 Y5V /NI

+5V

G

D S

DS

G

+5V_STBY

+5V_DUAL

L3
RH TYPE BEAD

C287

1UF 16V 0805 Y5V

5

VCC

GND

RT9214 SOP8

3

R3
1K 1%

R11 10K 1%

DS

C1
1UF 16V 0805 Y5V /NI

Q5
NDS351N SOT23

3

Q12
FDD8880 TO252

+5V_DUAL

DS

G

Q39
NDS352AP SOT23 /NI

R1017 2.7 0805

U12

1

BOOT

2

UGATE

8

PHASE

46

LGATEFB

C2
10UF 10V 0805 Y5V

D13
SS12/5817 SMA

VIN_5V_DDR2

FDD8880 TO252

R1020 2.7 0805
R1022 10

R1023 2.7 0805

FDD8880 TO252

Q6
2N3904 SOT23

CT3

+

100UF 16V 5X11 2mm

Q9

Q10

D14

AK

SS12/5817 SMA

C289

0.1UF 25V Y5V

L4

R1024

2.7 0805

C292
1000P 50V X7R

+

CT34

C288
1UF 10V Y5V /NI

1000UF 6.3V 8X12

INDUCTOR 1UH D

+

CT1
1000UF 6.3V 8X12

+

CT2
1000UF 6.3V 8X12

2

+1.8V_SUS

R1025

R1

442 1%

DDR2 CORE

Vout=0.8(1+R1/R2)----for RT9202

R1026

R1 , R2

309 1%

R2

CONNECT FEEDBACK
NEAR LOAD

VOUT=VREF X(1+R1/R2)=1.953V

JDDRII_22V

1
2
3

HEADER 1X3

R1029

1.15K 1%

1-2 : GPIO CONTROL
R3=1.15K

R3

ぃ璶匡禬筁

+1.8VDIMM_FB37

K ohm

+1.8V_SUS

1

+

CT9
1000UF 6.3V 8X12

+5V_STBY +1.8V_SUS

C145

1UF 16V 0805 Y5V

C285

3

0.1UF 25V Y5V

4

Ref

U3

RT9173BCL5

6

VCTL

VCTL

A A

VTT_MEM

1

Vin

5

VOUT

GND

78

2

5

+

CT6

+0.9V_SUS

1000UF 6.3V 8X12

+

+

+

123456

CT7

CT14

CT5
100UF 16V 5X11 2mm /NIRN23

100UF 16V 5X11 2mm

2.2K 8P4R

1000UF 6.3V 8X12

4

+0.9V_SUS

+V_CPU

C56

0.1UF 25V Y5V

3

+0.9V_SUS

BC12

C106

0.1UF 25V Y5V

C70

0.1UF 25V Y5V

2

C64100UF 6.3V D TAN /NI

0.1UF 25V Y5V

C54

0.1UF 25V Y5V

C122

Title

0.1UF 25V Y5V

+1.8V_SUS

PLL DELAY / PWRGD / MEM VREG

Size Document Number Rev

C

Date: Sheet of

CRU51-M2

1

32 39Thursday, June 14, 2007

1.3

PDF created with pdfFactory Pro trial version www.pdffactory.com

5

FAN324
FAN124
FAN224

KA

KA

A

K

A

D D

GP35: To generate an
event for the function
THERMAL SHUTDOWN

CHIP_THERM_18

C C

51K P/U is
necessaried
on IX version
LPC I/O

LPCRST_SIO_16

LPC_DRQ0_16

B B

A A

D10

+5V

BAV99 SOT23

To CK8-04

+5V_STBY

5

D11
BAV99 SOT23

+3.3V

+3.3V

+3.3V

K

LPCRST_SIO_
LPC_DRQ0_

KA

A

K

D12
BAV99 SOT23 /NI

FAN124

FAN_CTL124

FAN224

FAN324

R183 10K 1%

LPC_PD#

LPC_SERIRQ16
LPC_FRAME_16,34

LPC_AD016,34
LPC_AD116,34
LPC_AD216,34

LPC_AD316,34
SIO_KBRST_18
A20GATE18

LPCCLK_SIO16

BUF_SIO_CLK18

RN68

LPC_PD#

1 2

LPC_DRQ0_

3 4

SUSCLK

5 6

ACPI_LED

7 8

4.7K 8P4R
RN65

LPC_AD0

1 2

LPC_AD1

3 4

LPC_AD2

5 6

LPC_AD3

7 8

8.2K 8P4R

KBC'S ROM:1/BUILT IN,0/EXT.

8716-->R6-->ADD 680 R8-->4.7K /NI
8712-->R6-->680 /NI R8-->ADD 4.7K

+5V

+5V

LPC_SERIRQ
LPC_FRAME_
LPC_AD0

LPC_AD1
LPC_AD2
LPC_AD3
SIO_KBRST_
A20GATE
LPCCLK_SIO

BUF_SIO_CLK

24
MHz

4

R190 4.7K

+5V

R191 4.7K

R8

DCD1#28

RI1#28

CTS1#28

DTR1#28

RTS1#28
DSR1#28
SOUTA28
SINA28

R6

R1015 680 /NI

124

125

126

127

128

RI2#

1

DTR2#

2

RTS2#

3

DSR2#

4

VCC

5

SOUT2

6

SIN2

7

FAN_TAC1

8

FAN_CTL1

9

FAN_TAC2/GP52

10

FAN_CTL2/GP51

11

FAN_TAC3/GP37

12

FAN_CTL3/GP36

13

WTI#/GP35

14

VID4/GP34

15

GNDD

16

VID3/GP33

17

VID2/GP32

18

VID1/GP31

19

VID0/GP30

20

JSBB2/GP27

21

JSBB1/GP26

22

JSBCY/GP25

23

JSBCX/GP24

24

JSAB2/GP23

25

JSAB1/GP22

26

JSACY/GP21

27

JSACX/GP20

28

MIDI_OUT/GP17

29

MIDI_IN/GP16

30

CIRTX/GP15 [PU51K]

31

SCRRST/GP14

32

SCRFET#/GP13

33

SCRIO/GP12

34

SCRCLK/GP11

35

VCC

36

LPCPD#

37

LRESET#

38

LDRQ#

+3.3V

R186 10K 1%

R181

R187

56K

10K 1% /NI

R9

+3.3V

8716 : R9-->10K R10-->0 R11-->56K /NI
8712 : R9-->10K /NI R10-->10K R11-->56K

SIN1

CTS2#

DCD2#

LAD1

LAD0

SERIRQ

LFRAME

434241

394045464748495051525354555657585960616263

R10

R188 10K 1%
R175 10K 1%

R11

R1016

R189

10K 1% /NI

56K

F0R 3.3V OUTPUT

+3.3V

SUSCLK

SUSCLK18

4

3

PDR7

PD7 28

PDR6

PD6 28

PDR5

PD5 28

PDR4

PD4 28

PDR3

PD3 28

PDR2

PD2 28

PDR1

PD1 28

PDR0

PD0 28
STB# 28
ALF# 28
EEROR# 28
INIT# 28
SLCTIN# 28
ACK# 28
BUSY 28
PE 28
SLCT 28

U11

GNDD

BUSY
SLCT

VREF

GNDA

VCCH

PE

VCC
VIN0
VIN1
VIN2
VIN3
VIN4
VIN5
VIN6
VIN7

VBAT

8716 : R1-->BEAD 60 0805 1A
8716 : C1-->1UF

8712 : R1-->0 0805

102

8712 : C1-->1UF /NI

101
100
99

R1009 0 0805

VIN0

98

VIN1

97

VIN2

96

VIN3

95

VIN4

94

VIN5

93

VIN6

92

VIN7

91

VREF

90
89
88
87
86
85

SMB_ALLERT_

84
83
82
81
80
79
78

FOR BIOS SOLUTION

77
76

IO_PWIN

75
74

IO_PME_

73

IO_POUT

72
71
70
69

R148 1M

68
67
66
65

+

CT33
100UF 16V 5X11 2mm

FDSKCHG- 25
FWP- 25
FINDEX- 25
FTRAK0- 25
FRDATA- 25
FWEN- 25
FHEAD- 25
FSTEP- 25
FDIR- 25
FWD- 25
FDSB- 25
FDSA- 25
FMOB- 25
FMOA- 25
FRWC- 25

1UF 10V Y5V /NIC281

VIN0 34
VIN1 34
VIN2 34
VIN3 34
VIN4 34
VIN5 34
VIN6 34

R145 4.7K

C251

0.1UF 25V Y5V

R1010 10

C277

0.1UF 25V Y5V

123

RI1#

CTS1#

DTR1#

RTS1#

DSR1#

SOUT1

LAD2

LAD3

KRST#

GA20

PCICLK

CLKRUN#/GP50

44

DCD1#

CLKIN

PD0

PD1

PD2

PD3

PD4

PD5

PD6

PD7

GNDD

GNDD

DENSEL#

MTRA#

STB#

MTRB#

DRVA#

DRVB#

WDATA#

DIR#

STEP#

HDSEL#

INIT#

AFD#

ACK#

ERR#

SLIN#

TMPIN1
TMPIN2

[5VSB PWR WELL] CIRRX/GP55

[5VSB PWR WELL] SCRPRES#/GP10

[5VSB PWR WELL] SCLK/GP40
[5VSB PWR WELL] SDAT/GP41

[5VSB PWR WELL] RING#/GP53

[5VSB PWR WELL] PSON#/GP42

[5VSB PWR WELL] PANSWH#/GP43

[5VSB PWR WELL] PME#/GP54

[5VSB PWR WELL] PWRON#GP44

[VBAT/5VSB PWR WELL] ] COPEN#

WGATE#

RDATA#

TRK0#

TMPIN3

[5VSB PWR WELL] MCLK
[5VSB PWR WELL] MDAT
[5VSB PWR WELL] KCLK
[5VSB PWR WELL] KDAT

[5VSB PWR WELL] PSIN/GP45
[5VSB PWR WELL] IRRX/GP46

IRTX/GP47
DSKCHG#

INDEX#

WPT#

IT8712FIX

64

3

103

104

105

106

107

108

109

110

111

112

113

114

115

116

117

118

119

120

121

122

C1
R1

+5V

MCLK 25
MDAT 25
KCLK 25
KDAT 25

+3.3V_VBAT 18,25

+5V_STBY

SMB_ALLERT_

C225
1UF 10V Y5V

+5V_STBY

2

C279

0.1UF 25V Y5V

NO USE FUNCTION ADD R4 R5-->10K

VIN3

R1003 10K 1% /NI

VIN7

R1004 10K 1% /NI

R4
R5

8716-->R7-->30K /NI
8712-->R7-->ADD 30K
R7

R149
30K 1%

From CPU

Routed by differential

C231
3900P 50V X7R

C2

8716-->C2-->ADD 2200P
8712-->C2-->ADD 3900P

+3.3V_DUAL

R144

4.7K

R143 10K 1%

R146 33

R147 33

C229

R1011

470P 50V X7R /NI

22K

R142 4.7K

+5V_STBY

2

1

+5V

+5V

CPU_THERMDA 7
CPU_THERMDC 7,34

FB21

BEAD 60 0805 1A

GP55: To provide BIOS
Write Protection
Function (Boot Block
Lock).

FWH_TBL_ 34

To POWER LED
circuit

ACPI_LED 21

+3.3V_DUAL

GP54: To generate an
event for the function
SLEEP BUTTON, POWER
ON BY
KB/MOUSE,RING-IN

IO_PME_ 18

To Power Supplier

PS_ON_ 24

From Power Button

PWRBTN_ 21

To SB

PWBTOUT_ 18

From SB

SLP_S3_ 18

Title

LPC SUPER I/O IT8712F

Size Document Number Rev

Custom

Date: Sheet of

CRU51-M2

1

33 39Friday, July 07, 2006

1.3

PDF created with pdfFactory Pro trial version www.pdffactory.com

5

D D

LPC_AD[3..0]16,33

LPC_FRAME_16,33

LPCCLK_FLASH16

LPCRST_FLASH_16

FWH_TBL_33

BIOS PROTECT

FWH_WP_
FWH_TBL_
FLASH_INIT

FUNCTION

C C

+3.3V

RN32 4.7K 8P4R

1 2
3 4
5 6
7 8

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

ADD SOCKET TO (BOM) MOTHERBOARD

FWH_WP_
FWH_TBL_

4

ROM1

4MB
FLASH

13

NC1

LAD0

14

LAD1

NC2

15

LAD2

NC3

17

LAD3

NC4

23 24

FRAME* INIT*

31

RES1

LCLK

RES2

2

RESET*

RES3
RES4

7

WP*

VDD1
VDD2

8

TBL*

GPI0

29

GPI1

MODE

28

GPI2

CS*

16

GPI3

GND

GPI4

ID0
ID1
ID2
ID3

W49F002UP12B

PLCC SOCKET 32PIN

3

1
22
26
27

FLASH_INIT

18
19
20
21

25
32

6
5
4
3
30

12
11
10
9

+3.3V

Voltage Sensing

+V_CPU +1.2V +3.3V +5V

R129
10K 1%

VIN033
VIN133
VIN233
VIN333
VIN433
VIN533
VIN633

R135
10K 1%

R136
10K 1%

2

R137

6.65K 1%

+12V +5V_STBY+1.2V_HT

+1.8V_SUS

R131

R140

30K 1%

10K 1%

R139

R138

10K 1%

10K 1%

R141
10K 1%

1

RECOVERY HEADER

JUMPER REMOVED

B B

A A

5

FLASH_RECOVERY_18

NORMALJUMPER 1-2

RECOVERY

4

FLASH_RECOVERY_

+3.3V

R112
1K 1% /NI

R116
10K 1%

3

CPU_THERMDC7,33

hardware monitor

2

Title

FLASH ROM & H/W MON

Size Document Number Rev

Custom

Date: Sheet of

CRU51-M2

1

34 39Friday, July 07, 2006

1.3

PDF created with pdfFactory Pro trial version www.pdffactory.com

5

D D

C C

+1.8V_SUS

R178 15K

MEM_VLD_RC

C275
10UF 10V 0805 Y5V /NI

+5V_STBY

4

R194

8.2K

G

Q31
2N3904 SOT23

ECB

+3.3V_DUAL

DS

BR6
15K

MEM_VLD

Q30
2N7002 SOT23

MEM_VLD 16

C273

0.1UF 25V Y5V /NI

3

MCP51_PWRGD

C247

0.1UF 25V Y5V /NI

PWRGD_PS

PWRGD_PS24,32

R150 5.1K

R151
10K 1%

MCP51_PWRGD 7,18

2

1

+3.3V_DUAL

R185
10K 1%

ECB

Q36
2N3904 SOT23

4

R192
10K 1%

HT_VLD

HT_VLD 16

C280

DS

0.1UF 25V Y5V /NI
Q37
2N7002 SOT23G

POWER SEQUENCING

+5V_STBY

R184 15K

+3.3V_DUAL

+

CT27
1000UF 6.3V 8X12

3

PWRGD_Q1

C278
10UF 10V 0805 Y5V

+5V_STBY

F0R BOOT UP

B B

+1.2V_HT

A A

5

R180 6.34K 1%

HT_BASE

C274

0.1UF 25V Y5V

+5V_STBY

+3.3V_DUAL

R167
15K

PWRGD_SB

PWRGD_SB 18

C269
10UF 10V 0805 Y5V /NI

R179

8.2K

DS

Q32
2N7002 SOT23G

Q35
2N3904 SOT23

ECB

2

Title

POWER SEQUENCING

Size Document Number Rev

Custom

Date: Sheet of

CRU51-M2

1

35 39Friday, July 07, 2006

1.3

PDF created with pdfFactory Pro trial version www.pdffactory.com

5

4

3

2

1

RGMII_RXD319
RGMII_RXD219
RGMII_RXD119
RGMII_RXD019

D D

C C

R279 is reserved for
8201CL/CP LED Mode
Change to compatible
with BL

R280 is reserved for
ensuring 8201BL/CL/CP

B B

A A

latch to UTP Mode.

R281 is reserved for
ensuring 8201CL/CP
latch to normal
operation mode.

RGMII_MDC19
RGMII_MDIO19
RGMII_TXD019
RGMII_TXD119
RGMII_TXD219
RGMII_TXD319
RGMII_TXCTL19

RGMII_TXCLK19

RGMII_RXCTL19

RGMII_RXCLK19

MII_COL19

MII_CRS19
MII_RXER19
BUF_25M19

LINK_LED

D4
1N4148 SMD

AVDD1

C139

0.1UF 25V Y5V

RESETT
RGMII_MDIO

RXD3
RXD2
RXD1
RXD0

U4

RGMII_MDC

25

RXD0
RXD1
RXD2
RXD3

26

22
21
20
19
18
16

23
24
46
47

10
12
13
15

14
11

17

1 2
3 4
5 6
7 8

AVDD2

C137

0.1UF 25V Y5V

R70 1.5K 1%

MDC
MDIO

6

TXD0

5

TXD1

4

TXD2

3

TXD3

2

TXEN

7

TXC
RXDV
RXD0
RXD1
RXD2
RXD3

RTL8201

RXC

1

COL
CRS
RXER/FXEN
X1
X2

9

LED0/PHYAD0
LED1/PHYAD1
LED2/PHYAD2
LED3/PHYAD3
LED4/PHYAD4

8

PWFBIN
DVDD33

DGND
DGND

RTL8201CL TQFP48

PHY address set to 00001h

AVDD2

RN29

5.6K 8P4R

AVDD2

C152

0.1UF 25V Y5V

FOR EMI

AVDD2

F0R REST

RGMII_MDIO
RGMII_TXD0
RGMII_TXD1
RGMII_TXD2
RGMII_TXD3
RGMII_TXCTL

R75 22

MII_COL
MII_CRS
MII_RXER

LINK_LED
LED1
LED2
SPEED_LED
LED3

PWFBIN
AVDD2 LDPS

MII_COL
MII_RXER
MII_CRS

SPEED_LED
LED3
LED2
LED1

PWFBOUT

AVDD33
DVDD33

TPRX+

RTSET

ISOLATE

SPEED

DUPLEX

MII/SNIB/RTT3

RESETB

AVDD2

32
36
48

29

AGND

35

AGND

45

DGND

27

NC

31
30

TPRX-

33

TPTX-

34

TPTX+

28
43
40

RPTR

39
38
37

ANE

41

LDPS

44
42

C150

C142
1UF 16V 0805 Y5V /NI

0.1UF 25V Y5V

+5V

PWFBOUT
AVDD1
AVDD2

RXIN+
RXIN-

TXD­TXD+

RTL8201BL:R14-->5.9K 1%
RTL8201CL:R14-->2K 1%

R69 2K 1%

ISOLATE
RPTR
SPEED
DUPLEX
ANE

F0R REST

MII_L

RESETT

RN27

SPEED
DUPLEX
ANE
LINK_LED

MII_L
ISOLATE
LDPS
RPTR

Q19

AZ1117H-ADJ SOT-223

5.6K 8P4R

1 2
3 4
5 6
7 8

1 2

RN28

3 4

5.6K 8P4R

5 6
7 8

+5V_STBY

+3.3V_STBY

+

CT20
100UF 16V 5X11 2mm /NI

Vout=Vref (1.25V) X ( 1+R2/R1 )
=3.3V

R101

R1

I
O
A

R106
330 1%

R2

RGMII_RESET_ 18

AVDD2

+3.3V_DUAL

200 1%

+

RTL8201BL : R6(NC); C10(NC)
RTL8201CL/CP : R6(0 ohm); C10(0.1uF)

PWFBOUT

0.1UF 25V Y5VC155

TXD+
TXD­RXIN+
RXIN-

R68

R65

51 1%

R66

R67

51 1%

51 1%

51 1%

C133

C134

0.1UF 25V Y5V

0.1UF 25V Y5V

NEAR CONNECTOR

NEAR PHY

AVDD2

AVDD2

AVDD2

CT17
100UF 16V 5X11 2mm

AVDD2

PWFBIN

+3.3V_STBY

FB13

BEAD 60 0805 1A

C157

0.1UF 25V Y5V /NI

FB16

BEAD 60 0805 1A

C156

0.1UF 25V Y5V

EMI

JUSBLAN1B

1
2
3
4
5
6
7
8 G8
9

10

RJ45USBA CONN

RTL8201BL : R19(NC)
RTL8201CL/CP : R19(0 ohm)

AVDD1

PWFBOUT

C140

0.1UF 25V Y5V

EMI

FB15
BEAD 60 0805 1A

C148

C153
1UF 16V 0805 Y5V

0.1UF 25V Y5V

+5V

C286

0.1UF 25V Y5V

TCT

GLED-

TX0+

GLED+

TX0-

YLED-

TX1+

YLED+

TX1­TX2+
TX2­TX3+ GND
TX3­RCT

PWFBOUT

0.1UF 25V Y5V C131

CT11
100UF 16V 5X11 2mm

AVDD2

LINK_LED

11

RN22 330 8P4R

12
13
14

G1

GND

G2

GND

G7

GND

1 2
3 4
5 6
7 8

SPEED_LED

AVDD2

FOR EMI NEAR C165

5

4

3

2

Title

LAN (RTL8100B)

Size Document Number Rev

Custom

Date: Sheet of

CRU51-M2

1

36 39Friday, July 07, 2006

1.3

PDF created with pdfFactory Pro trial version www.pdffactory.com

5

D D

4

K8_VID47,31

K8_VID37,31
K8_VID27,31
K8_VID17,31
K8_VID07,31

3

VID_OUT4 7,31

VID_OUT3 7,31
VID_OUT2 7,31
VID_OUT1 7,31
VID_OUT0 7,31

2

DIMM0
GPIO 3

Dimm over volgate

1

Default 1

2.72V

0
1

2.82V 0
0

2.93V

1

DIMM1
GPIO 4

1

0

Q3
BT2222A SOT23

ECB

Q34
2N3904 SOT23

Q1
BT2222A SOT23

ECB

Q26
2N3904 SOT23

R4 6.34K 1%

ECB

NEAR +2.6V

R6 3K 1%

ECB

C C

+5V_STBY

RN36

7 8
5 6
3 4
1 2

1K 8P4R

B B

RN67

7 8

VDIMM118

5 6

VDIMM018

3 4

VCORE018

1 2

VCORE118

10K 8P4R

+5V_STBY

RN66

7 8

VCORE118

5 6

VCORE018

3 4

VDIMM018

1 2

VDIMM118

10K 8P4R

Q7
BT2222A SOT23

ECB

Q33
2N3904 SOT23

Q2
BT2222A SOT23

ECB

Q28
2N3904 SOT23

+1.8VDIMM_FB32

R13

3.48K 1%

ECB

OVL 31

R5

1.5K 1%

ECB

VDIMM0

+1.8VDIMM_FB

Default

1

1.944V

2.00V

0

12.045V

2.100V

0

VCORE0

VCORE_OVL

Default

1

1.550V

0

1.602V 1

1.653V

1

1.705V

0

VCORE1

VDIMM1

1

0

0

1

1

0

0

NEAR PWM

A A

Title

OVER VOLTAGE

Size Document Number Rev

C

5

4

3

2

Date: Sheet of

CRU51-M2

1

37 39Monday, October 16, 2006

1.3

PDF created with pdfFactory Pro trial version www.pdffactory.com

5

4

3

2

1

CK51 CORE

D D

RT9202NC/RT9214

R96

5

15K /NI

R81
20K /NI
C161

4700P 50V X7R /NI

钡 癬ノ

VIA

2N3904 SOT23

RT9202/RT9214NC

C C

B B

A A

+

CT23
100UF 16V 5X11 2mm

R98 15K

C164

1UF 16V 0805 Y5V

7

COMP

C163
15P 50V NPO /NI

GND

C

Q23

E

B

+5V

C_ENBL2

R90 2.7 0805

L2
RH TYPE BEAD

U7

5

BOOT

VCC

UGATE
PHASE

LGATEFB

GND

RT9214 SOP8

3

2N3904 SOT23

+1.2V
+1.25V
+1.3V
+1.35V

Q24

VIN_5V

Q17

FDD8880 TO252

1
2

R82 2.7 0805
R94 10

8

R97 2.7 0805

46

+3.3V_DUAL

C

E

R108

10K 1%

FDD8880 TO252

R107 4.7K

B

OV_HT0 OV_HT1+1.2V_HT

1 1
0
1 0
0 0

Q18

Vout=1.22X(1+R1/R2)

4

D5

AK

SS12/5817 SMA

C170
1UF 10V Y5V /NI

C168

0.1UF 25V Y5V

L1

R95

2.7 0805

C169
1000P 50V X7R

+3.3V

ADD AN ENABLE CKT - LOW IS OFF

3.3V MUST BE PWR ON BEFOR 5V
OR SOFT START WILL NOT WORK.

1

+

CT19
1000UF 6.3V 8X12

INDUCTOR 1UH D

+

CT16
1000UF 6.3V 8X12

HT

+1.2V

+1.2V @ 10A AMPS MAX

R85

+

R1

CT22

110 1%

1000UF 6.3V 8X12

R83
200 1%

R2

2N7002 SOT23

REF_2.5V

+12V Change to +12V_P

R88
680

R89
590 1%

Vout=V1=1.22V

R2

3

+1.2V

+

CT18
100UF 16V 5X11 2mm

Vout=0.8(1+R1/R2)----for RT9202
R1 , R2

Q21

+2.5V

DS

2N3904 SOT23

V1

ぃ璶匡禬筁

+1.24V
+1.27V
+1.32V
+1.36V

+12V

2P5V_PWR 7,13,14,15

G

C

Q20

E

+12V

411

10

+

9

-

U8C
LM324 SO14

R1

R91

5.1K

B

C165

0.1UF 25V Y5V

8

OV_CHIP0 OV_CHIP1CORE VOLTAGE

R99 4.7K

2N3904 SOT23

+3.3V

G

K ohm

1 1
0
1 0
0 0

+5V

C

E

DS

Q15
FDD8880 TO252

+1.2V_HT

+

CT10

1000UF 6.3V 8X12

+1.2V_HT

BC51
1UF 10V Y5V

1

R100

5.1K

C171
1UF 10V Y5V /NI

2

R102 10K 1%Q22

B

+

CT12
1000UF 6.3V 8X12

HT

+1.2V_HT @ 850MA AMPS
MAX

HTVDD_EN 16

C175
1UF 10V Y5V /NI

Title

C51 CORE

Size Document Number Rev

Custom

Date: Sheet of

CRU51-M2

1

38 39Friday, July 07, 2006

1.3

PDF created with pdfFactory Pro trial version www.pdffactory.com

5

4

3

2

1

JUSBV1(1_2)

D D

C C

B B

JUMPER 2P R

JUSBV2(1_2)
JUMPER 2P R

JFAUDIO1(5_6)
JUMPER 2P B

JFAUDIO1(9_10)
JUMPER 2P B

JFAUDIO1(11_12)
JUMPER 2P B

JFAUDIO1(13_14)
JUMPER 2P B

JCMOS1(1_2)
JUMPER 2P B

JDDRII_22V(1_2)
JUMPER 2P R

(BAT1)

筿

3V BATTERY SONY

(ROM1)

FLASH ROM

PLCC 4M LPC
(CPU1)

AM2RM

(U5)

爵床荐

SBNP SMALL P

(U10)

玭爵床荐

PCB

CRU51-M2 1.3
(PCB)

POLON 245x220

New JPANEL1
JPANEL1 2*11

JPANEL1(9_10)
HEADER 1X2

JPANEL1(11_14)
PLED

JPANEL1(1_4)

PCB

獁粗

SPK

JPANEL1(5_6)

HLED

JPANEL1(15_16)
HEADER 1X2

JPANEL1(7_8)
RST

SBNP SMALL

A A

Title

<Title>

Size Document Number Rev

CRU51-M2 1.3

A

5

4

3

Date: Sheet of

2

39 39Friday, July 14, 2006

1

PDF created with pdfFactory Pro trial version www.pdffactory.com