GE MiCOM P40 Agile, MiCOM P143 Agile, MiCOM P144 Agile, MiCOM P141 Agile, MiCOM P145 Agile Technical Manual
...
GE Energy Connections
Grid Solutions
MiCOM P40 Agile
P141, P142, P143, P144, P145
Technical Manual
Feeder Management IED
Hardware Version: J
Software Version: 52
Publication Reference: P14xEd1-TM-EN-1
Contents
Chapter 1 Introduction 1
1 Chapter Overview 3
2 Foreword 4
2.1 Target Audience 4
2.2 Typographical Conventions 4
2.3 Nomenclature 5
3 Product Scope 6
3.1 Ordering Options 6
4 Features and Functions 7
4.1 Protection Functions 7
4.2 Control Functions 8
4.3 Measurement Functions 8
4.4 Communication Functions 8
5 Compliance 10
6 Functional Overview 11
Chapter 2 Safety Information 13
1 Chapter Overview 15
2 Health and Safety 16
3 Symbols 17
4 Installation, Commissioning and Servicing 18
4.1 Lifting Hazards 18
4.2 Electrical Hazards 18
4.3 UL/CSA/CUL Requirements 19
4.4 Fusing Requirements 19
4.5 Equipment Connections 20
4.6 Protection Class 1 Equipment Requirements 20
4.7 Pre-energisation Checklist 21
4.8 Peripheral Circuitry 21
4.9 Upgrading/Servicing 22
5 Decommissioning and Disposal 23
6 Regulatory Compliance 24
6.1 EMC Compliance: 2014/30/EU 24
6.2 LVD Compliance: 2014/35/EU 24
6.3 R&TTE Compliance: 2014/53/EU 24
6.4 UL/CUL Compliance 24
6.5 ATEX Compliance: 2014/34/EU 24
Chapter 3 Hardware Design 27
1 Chapter Overview 29
2 Hardware Architecture 30
3 Mechanical Implementation 31
3.1 Housing Variants 31
3.2 List of Boards 32
4 Front Panel 33
4.1 Front Panel 33
4.1.1 Front Panel Compartments 33
4.1.2 HMI Panel 34
4.1.3 Front Serial Port (SK1) 34
4.1.4 Front Parallel Port (SK2) 35
4.1.5 Fixed Function LEDs 35
4.1.6 Function Keys 35
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4.1.7 Programable LEDs 36
5 Rear Panel 37
6 Boards and Modules 39
6.1 PCBs 39
6.2 Subassemblies 39
6.3 Main Processor Board 40
6.4 Power Supply Board 41
6.4.1 Watchdog 43
6.4.2 Rear Serial Port 44
6.5 Input Module - 1 Transformer Board 45
6.5.1 Input Module Circuit Description 46
6.5.2 Transformer Board 47
6.5.3 Input Board 48
6.6 Standard Output Relay Board 49
6.7 IRIG-B Board 50
6.8 Fibre Optic Board 51
6.9 Rear Communication Board 52
6.10 Ethernet Board 52
6.11 Redundant Ethernet Board 54
Chapter 4 Software Design 57
1 Chapter Overview 59
2 Sofware Design Overview 60
3 System Level Software 61
3.1 Real Time Operating System 61
3.2 System Services Software 61
3.3 Self-Diagnostic Software 61
3.4 Startup Self-Testing 61
3.4.1 System Boot 61
3.4.2 System Level Software Initialisation 62
3.4.3 Platform Software Initialisation and Monitoring 62
3.5 Continuous Self-Testing 62
4 Platform Software 63
4.1 Record Logging 63
4.2 Settings Database 63
4.3 Interfaces 63
5 Protection and Control Functions 64
5.1 Acquisition of Samples 64
5.2 Frequency Tracking 64
5.3 Direct Use of Sample Values 64
5.4 Fourier Signal Processing 64
5.5 Programmable Scheme Logic 65
5.6 Event Recording 66
5.7 Disturbance Recorder 66
5.8 Fault Locator 66
5.9 Function Key Interface 66
Chapter 5 Configuration 67
1 Chapter Overview 69
2 Settings Application Software 70
3 Using the HMI Panel 71
3.1 Navigating the HMI Panel 72
3.2 Getting Started 72
3.3 Default Display 73
3.4 Default Display Navigation 74
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3.5 Password Entry 75
3.6 Processing Alarms and Records 75
3.7 Menu Structure 76
3.8 Changing the Settings 77
3.9 Direct Access (The Hotkey menu) 78
3.9.1 Setting Group Selection Using Hotkeys 78
3.9.2 Control Inputs 78
3.9.3 Circuit Breaker Control 79
3.10 Function Keys 79
4 Date and Time Configuration 81
4.1 Using an SNTP Signal 81
4.2 Using an IRIG-B Signal 81
4.3 Using an IEEE 1588 PTP Signal 81
4.4 Without a Timing Source Signal 82
4.5 Time Zone Compensation 82
4.6 Daylight Saving Time Compensation 83
5 Settings Group Selection 84
Chapter 6 Current Protection Functions 85
1 Chapter Overview 87
2 Overcurrent Protection Principles 88
2.1 IDMT Characteristics 88
2.1.1 IEC 60255 IDMT Curves 89
2.1.2 European Standards 91
2.1.3 North American Standards 92
2.1.4 IEC and IEEE Inverse Curves 94
2.1.5 Differences Between the North american and European Standards 95
2.1.6 Programmable Curves 95
2.2 Principles of Implementation 95
2.2.1 Timer Hold Facility 96
3 Phase Overcurrent Protection 98
3.1 Phase Overcurrent Protection Implementation 98
3.2 Non-Directional Overcurrent Logic 99
3.3 Directional Element 100
3.3.1 Directional Overcurrent Logic 101
3.4 Application Notes 102
3.4.1 Parallel Feeders 102
3.4.2 Ring Main Arrangements 103
3.4.3 Setting Guidelines 103
3.4.4 Setting Guidelines (Directional Element) 104
4 Voltage Dependent Overcurrent Element 105
4.1 Voltage Dependent Overcurrent Protection Implementation 105
4.1.1 Voltage Controlled Overcurrent Protection 105
4.1.2 Voltage Restrained Overcurrent Protection 106
4.2 Voltage Dependent Overcurrent Logic 107
4.3 Application Notes 107
4.3.1 Setting Guidelines 107
5 Current Setting Threshold Selection 109
6 Cold Load Pickup 110
6.1 Implementation 110
6.2 CLP Logic 111
6.3 Application Notes 111
6.3.1 CLP for Resistive Loads 111
6.3.2 CLP for Motor Feeders 111
6.3.3 CLP for Switch Onto Fault Conditions 112
7 Selective Logic 113
7.1 Selective Logic Implementation 113
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7.2 Selective Logic Diagram 113
8 Timer Setting Selection 115
9 Negative Sequence Overcurrent Protection 116
9.1 Negative Sequence Overcurrent Protection Implementation 116
9.2 Non-Directional Negative Sequence Overcurrent Logic 117
9.3 Composite Earth Fault Start Logic 117
9.4 Directional Element 117
9.4.1 Directional Negative Sequence Overcurrent Logic 118
9.5 Application Notes 118
9.5.1 Setting Guidelines (Current Threshold) 118
9.5.2 Setting Guidelines (Time Delay) 119
9.5.3 Setting Guidelines (Directional element) 119
10 Earth Fault Protection 120
10.1 Earth Fault Protection Elements 120
10.2 Non-directional Earth Fault Logic 121
10.3 IDG Curve 121
10.4 Directional Element 122
10.4.1 Residual Voltage Polarisation 122
10.4.2 Negative Sequence Polarisation 123
10.5 Application Notes 124
10.5.1 Setting Guidelines (Directional Element) 124
10.5.2 Peterson Coil Earthed Systems 124
10.5.3 Setting Guidelines (Compensated networks) 128
11 Sensitive Earth Fault Protection 130
11.1 SEF Protection Implementation 130
11.2 Non-directional SEF Logic 130
11.3 SEF Any Start Logic 131
11.4 EPATR B Curve 131
11.5 Directional Element 132
11.5.1 Wattmetric Characteristic 133
11.5.2 Icos phi / Isin phi characteristic 134
11.5.3 Directional SEF Logic 135
11.6 Application Notes 136
11.6.1 Insulated Systems 136
11.6.2 Setting Guidelines (Insulated Systems) 137
12 Thermal Overload Protection 139
12.1 Single Time Constant Characteristic 139
12.2 Dual Time Constant Characteristic 139
12.3 Thermal Overload Protection Implementation 140
12.4 Thermal Overload Protection Logic 140
12.5 Application Notes 140
12.5.1 Setting Guidelines for Dual Time Constant Characteristic 140
12.5.2 Setting Guidelines for Single Time Constant Characteristic 142
13 Broken Conductor Protection 144
13.1 Broken Conductor Protection Implementation 144
13.2 Broken Conductor Protection Logic 144
13.3 Application Notes 144
13.3.1 Setting Guidelines 144
14 Blocked Overcurrent Protection 146
14.1 Blocked Overcurrent Implementation 146
14.2 Blocked Overcurrent Logic 146
14.3 Blocked Earth Fault Logic 146
14.4 Application Notes 147
14.4.1 Busbar Blocking Scheme 147
15 Second Harmonic Blocking 149
15.1 Second Harmonic Blocking Implementation 149
15.2 Second Harmonic Blocking Logic (POC Input) 150
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15.3 Second Harmonic Blocking Logic (SEF Input) 151
15.4 Application Notes 151
15.4.1 Setting Guidelines 151
16 Load Blinders 152
16.1 Load Blinder Implementation 152
16.2 Load Blinder Logic 153
17 Neutral Admittance Protection 156
17.1 Neutral Admittance Operation 156
17.2 Conductance Operation 156
17.3 Susceptance Operation 157
18 Busbar Protection 159
18.1 Buswire Supervision 160
Chapter 7 Restricted Earth Fault Protection 161
1 Chapter Overview 163
2 REF Protection Principles 164
2.1 Resistance-Earthed Star Windings 165
2.2 Solidly-Earthed Star Windings 165
2.3 Through Fault Stability 166
2.4 Restricted Earth Fault Types 166
2.4.1 Low Impedance REF Principle 167
2.4.2 High Impedance REF Principle 168
3 Restricted Earth Fault Protection Implementation 171
3.1 Restricted Earth Fault Protection Implementation 171
3.2 Low Impedance REF 171
3.2.1 Setting the Bias Characteristic 171
3.2.2 Delayed Bias 172
3.2.3 Transient Bias 172
3.3 High Impedance REF 172
3.3.1 High Impedance REF Calculation Principles 173
4 Application Notes 174
4.1 Star Winding Resistance Earthed 174
4.2 Low Impedance REF Protection Application 175
4.2.1 Setting Guidelines for Biased Operation 175
4.2.2 Low Impedance REF Scaling Factor 175
4.2.3 Parameter Calculations 176
4.3 High Impedance REF Protection Application 177
4.3.1 High Impedance REF Operating Modes 177
4.3.2 Setting Guidelines for High Impedance Operation 178
Chapter 8 CB Fail Protection 181
1 Chapter Overview 183
2 Circuit Breaker Fail Protection 184
3 Circuit Breaker Fail Implementation 185
3.1 Circuit Breaker Fail Timers 185
3.2 Zero Crossing Detection 185
4 Circuit Breaker Fail Logic 187
5 Undercurrent and ZCD Logic for CB Fail 190
6 CB Fail SEF Protection Logic 191
7 CB Fail Non Current Protection Logic 192
8 Circuit Breaker Mapping 193
9 Application Notes 194
9.1 Reset Mechanisms for CB Fail Timers 194
9.2 Setting Guidelines (CB fail Timer) 194
9.3 Setting Guidelines (Undercurrent) 195
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Chapter 9 Current Transformer Requirements 197
1 Chapter Overview 199
2 CT requirements 200
2.1 Phase Overcurrent Protection 200
2.1.1 Directional Elements 200
2.1.2 Non-directional Elements 200
2.2 Earth Fault Protection 201
2.2.1 Directional Elements 201
2.2.2 Non-directional Elements 201
2.3 SEF Protection (Residually Connected) 201
2.3.1 Directional Elements 201
2.3.2 Non-directional Elements 201
2.4 SEF Protection (Core-Balanced CT) 202
2.4.1 Directional Elements 202
2.4.2 Non-directional Elements 202
2.5 Low Impedance REF Protection 202
2.6 High Impedance REF Protection 202
2.7 High Impedance Busbar Protection 203
2.8 Use of Metrosil Non-linear Resistors 203
2.9 Use of ANSI C-class CTs 205
Chapter 10 Voltage Protection Functions 207
1 Chapter Overview 209
2 Undervoltage Protection 210
2.1 Undervoltage Protection Implementation 210
2.2 Undervoltage Protection Logic 211
2.3 Application Notes 212
2.3.1 Undervoltage Setting Guidelines 212
3 Overvoltage Protection 213
3.1 Overvoltage Protection Implementation 213
3.2 Overvoltage Protection Logic 214
3.3 Application Notes 215
3.3.1 Overvoltage Setting Guidelines 215
4 Rate of Change of Voltage Protection 216
4.1 Rate of Change of Voltage Protection Implementation 216
4.2 Rate of Change of Voltage Logic 216
5 Residual Overvoltage Protection 218
5.1 Residual Overvoltage Protection Implementation 218
5.2 Residual Overvoltage Logic 219
5.3 Application Notes 219
5.3.1 Calculation for Solidly Earthed Systems 219
5.3.2 Calculation for Impedance Earthed Systems 220
5.3.3 Neutral Voltage Displacement (Nvd) Protection Applied To Condenser Bushings (Capacitor Cones) 221
5.3.4 Setting Guidelines 227
6 Negative Sequence Overvoltage Protection 228
6.1 Negative Sequence Overvoltage Implementation 228
6.2 Negative Sequence Overvoltage Logic 228
6.3 Application Notes 228
6.3.1 Setting Guidelines 228
7 Sensitive Overvoltage Supervision 230
7.1 Sensitive Overvoltage Implementation 230
7.1.1 Sensitive Overvoltage Filter Mode 230
7.2 Sensitive Overvoltage Logic 231
7.2.1 Sensitive Overvoltage Operation Logic 231
7.2.2 Sensitive Overvoltage Filter Mode Logic 232
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7.2.3 Sensitive Overvoltage Blocking Logic 232
Chapter 11 Frequency Protection Functions 233
1 Chapter Overview 235
2 Frequency Protection Overview 236
2.1 Frequency Protection Implementation 236
3 Underfrequency Protection 238
3.1 Underfrequency Protection Implementation 238
3.2 Underfrequency Protection Logic 238
3.3 Application Notes 239
3.3.1 Setting Guidelines 239
4 Overfrequency Protection 240
4.1 Overfrequency Protection Implementation 240
4.2 Overfrequency Protection Logic 240
4.3 Application Notes 241
4.3.1 Setting Guidelines 241
5 Independent R.O.C.O.F Protection 242
5.1 Indepenent R.O.C.O.F Protection Implementation 242
5.2 Independent R.O.C.O.F Protection Logic 243
5.3 Application Notes 243
5.3.1 Setting Guidelines 243
6 Frequency-supervised R.O.C.O.F Protection 245
6.1 Frequency-supervised R.O.C.O.F Implementation 245
6.2 Frequency-supervised R.O.C.O.F Logic 246
6.3 Application Notes 246
6.3.1 Frequency-Supervised R.O.C.O.F Example 246
6.3.2 Setting Guidelines 247
7 Average Rate of Change of Frequency Protection 248
7.1 Average R.O.C.O.F Protection Implementation 248
7.2 Average R.O.C.O.F Logic 249
7.3 Application Notes 249
7.3.1 Setting Guidelines 249
8 Load Shedding and Restoration 251
8.1 Load Restoration Implementation 251
8.2 Holding Band 251
8.3 Load Restoration Logic 254
8.4 Application Notes 254
8.4.1 Setting Guidelines 254
Chapter 12 Power Protection Functions 257
1 Chapter Overview 259
2 Overpower Protection 260
2.1 Overpower Protection Implementation 260
2.2 Overpower Logic 261
2.3 Application Notes 261
2.3.1 Forward Overpower Setting Guidelines 261
2.3.2 Reverse Power Considerations 261
2.3.3 Reverse Overpower Setting Guidelines 262
3 Underpower Protection 263
3.1 Underpower Protection Implementation 263
3.2 Underpower Logic 264
3.3 Application Notes 264
3.3.1 Low Forward Power Considerations 264
3.3.2 Low Forward Power Setting Guidelines 264
4 Sensitive Power Protection 266
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4.1 Sensitive Power Protection Implementation 266
4.2 Sensitive Power Measurements 266
4.3 Sensitive Power Logic 267
4.4 Application Notes 267
4.4.1 Sensitive Power Calculation 267
4.4.2 Sensitive Power Setting Guidelines 269
5 Transient Earth Fault Detection 270
5.1 Transient Earth Fault Detection Implementation 271
5.1.1 Transient Earth Fault Detector 271
5.1.2 Fault Type Detector 271
5.1.3 Direction Detector 271
5.2 Transient Earth Fault Detection Logic 272
5.2.1 Transient Earth Fault Detection Logic Overview 272
5.2.2 Fault Type Detector Logic 273
5.2.3 Direction Detector Logic - Standard Mode 273
5.2.4 Transient Earth Fault Detection Output Alarm Logic 273
Chapter 13 Autoreclose 275
1 Chapter Overview 277
2 Introduction to 3-phase Autoreclose 278
3 Implementation 279
4 Autoreclose Function Inputs 280
4.1 CB Healthy 280
4.2 Block AR 280
4.3 Reset Lockout 280
4.4 AR Auto Mode 280
4.5 Auto Mode 280
4.6 LiveLine Mode 280
4.7 Telecontrol Mode 280
4.8 Circuits OK 280
4.9 AR Sys Checks OK (403) 281
4.10 Ext AR Prot Trip (External AR Protection Trip) 281
4.11 Ext AR Prot Start (External AR Protection Start) 281
4.12 DAR Complete (Delayed Autoreclose Complete) 281
4.13 CB in Service (Circuit Breaker in Service) 281
4.14 AR Restart 281
4.15 DT OK To Start (Dead Time OK to Start) 281
4.16 DeadTime Enabled 282
4.17 AR Init TripTest (Initiate Trip Test) 282
4.18 AR Skip Shot 1 282
4.19 Inh Reclaim Time (Inhibit Reclaim Time) 282
5 Autoreclose Function Outputs 283
5.1 AR In Progress 283
5.2 AR in Progress 1 (DAR In Progress) 283
5.3 Sequence Counter Status DDB signals 283
5.4 Successful Close 283
5.5 AR In Service 283
5.6 Block Main Prot (Block Main Protection) 283
5.7 Block SEF Prot (Block SEF Protection) 283
5.8 Reclose Checks 283
5.9 DeadT In Prog (Dead Time in Progress) 284
5.10 DT Complete (Dead Time Complete) 284
5.11 AR Sync Check (AR Synchronisation Check) 284
5.12 AR SysChecks OK (AR System Checks OK) 284
5.13 Auto Close 284
5.14 Protection Lockt (Protection Lockout) 284
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5.15 Reset Lckout Alm (Reset Lockout Alarm) 284
5.16 Reclaim In Prog 284
5.17 Reclaim Complete 284
6 Autoreclose Function Alarms 285
6.1 AR No Sys Check 285
6.2 AR CB Unhealthy 285
6.3 AR Lockout 285
7 Autoreclose Operation 286
7.1 Operating Modes 287
7.1.1 Four-Position Selector Switch Implementation 287
7.1.2 Operating Mode Selection Logic 289
7.2 Autoreclose Initiation 289
7.2.1 Start Signal Logic 291
7.2.2 Trip Signal Logic 291
7.2.3 Blocking Signal Logic 292
7.2.4 Shots Exceeded Logic 292
7.2.5 AR Initiation Logic 293
7.3 Blocking Instantaneous Protection for Selected Trips 293
7.4 Blocking Instantaneous Protection for Lockouts 295
7.5 Dead Time Control 296
7.5.1 AR CB Close Control 297
7.6 AR System Checks 298
7.7 Reclaim Timer Initiation 299
7.8 Autoreclose Inhibit 300
7.9 Autoreclose Lockout 301
7.10 Sequence Co-ordination 303
7.11 System Checks for First Reclose 304
8 Setting Guidelines 305
8.1 Number of Shots 305
8.2 Dead Timer Setting 305
8.2.1 Stability and Synchronism Requirements 305
8.2.2 Operational Convenience 305
8.2.3 Load Requirements 306
8.2.4 Circuit Breaker 306
8.2.5 Fault De-ionisation Time 306
8.2.6 Protection Reset Time 306
8.3 Reclaim Timer Setting 307
Chapter 14 Monitoring and Control 309
1 Chapter Overview 311
2 Event Records 312
2.1 Event Types 312
2.1.1 Opto-input Events 313
2.1.2 Contact Events 313
2.1.3 Alarm Events 313
2.1.4 Fault Record Events 314
2.1.5 Maintenance Events 314
2.1.6 Protection Events 314
2.1.7 Security Events 315
2.1.8 Platform Events 315
3 Disturbance Recorder 316
4 Measurements 317
4.1 Measured Quantities 317
4.1.1 Measured and Calculated Currents 317
4.1.2 Measured and Calculated Voltages 317
4.1.3 Power and Energy Quantities 317
4.1.4 Demand Values 318
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4.1.5 Frequency Measurements 318
4.1.6 Other Measurements 318
4.2 Measurement Setup 318
4.3 Fault Locator 319
4.3.1 Fault Locator Settings Example 319
4.4 Opto-input Time Stamping 319
5 CB Condition Monitoring 320
5.1 Application Notes 320
5.1.1 Setting the Thresholds for the Total Broken Current 320
5.1.2 Setting the thresholds for the Number of Operations 320
5.1.3 Setting the thresholds for the Operating Time 321
5.1.4 Setting the Thresholds for Excesssive Fault Frequency 321
6 CB State Monitoring 322
6.1 CB State Monitoring Logic 323
7 Circuit Breaker Control 324
7.1 CB Control using the IED Menu 324
7.2 CB Control using the Hotkeys 325
7.3 CB Control using the Function Keys 325
7.4 CB Control using the Opto-inputs 326
7.5 Remote CB Control 326
7.6 CB Control Logic 328
7.7 Synchronisation Check 328
7.8 CB Healthy Check 328
8 Pole Dead Function 329
8.1 Pole Dead Logic 329
9 System Checks 330
9.1 System Checks Implementation 330
9.1.1 VT Connections 330
9.1.2 Voltage Monitoring 330
9.1.3 Check Synchronisation 331
9.1.4 Check Syncronisation Vector Diagram 331
9.1.5 System Split 332
9.2 System Check Logic 333
9.3 System Check PSL 334
9.4 Application Notes 334
9.4.1 Slip Control 334
9.4.2 Use of Check Sync 2 and System Split 335
9.4.3 Predictive Closure of Circuit Breaker 335
9.4.4 Voltage and Phase Angle Correction 335
10 Switch Status and Control 337
10.1 Switch Status Logic 338
10.2 Switch Control Logic 339
Chapter 15 Supervision 341
1 Chapter Overview 343
2 Voltage Transformer Supervision 344
2.1 Loss of One or Two Phase Voltages 344
2.2 Loss of all Three Phase Voltages 344
2.3 Absence of all Three Phase Voltages on Line Energisation 344
2.4 VTS Implementation 345
2.5 VTS Logic 345
2.6 VTS Acceleration Indication Logic 347
3 Current Transformer Supervision 348
3.1 CTS Implementation 348
3.2 CTS Logic 348
3.3 Application Notes 349
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3.3.1 Setting Guidelines 349
4 Trip Circuit Supervision 350
4.1 Trip Circuit Supervision Scheme 1 350
4.1.1 Resistor Values 350
4.1.2 PSL for TCS Scheme 1 351
4.2 Trip Circuit Supervision Scheme 2 351
4.2.1 Resistor Values 352
4.2.2 PSL for TCS Scheme 2 352
4.3 Trip Circuit Supervision Scheme 3 352
4.3.1 Resistor Values 353
4.3.2 PSL for TCS Scheme 3 353
Chapter 16 Digital I/O and PSL Configuration 355
1 Chapter Overview 357
2 Configuring Digital Inputs and Outputs 358
3 Scheme Logic 359
3.1 PSL Editor 360
3.2 PSL Schemes 360
3.3 PSL Scheme Version Control 360
4 Configuring the Opto-Inputs 361
5 Assigning the Output Relays 362
6 Fixed Function LEDs 363
6.1 Trip LED Logic 363
7 Configuring Programmable LEDs 364
8 Function Keys 366
9 Control Inputs 367
Chapter 17 Electrical Teleprotection 369
1 Chapter Overview 371
2 Introduction 372
3 Teleprotection Scheme Principles 373
3.1 Direct Tripping 373
3.2 Permissive Tripping 373
4 Implementation 374
5 Configuration 375
6 Connecting to Electrical InterMiCOM 377
6.1 Short Distance 377
6.2 Long Distance 377
7 Application Notes 378
Chapter 18 Communications 381
1 Chapter Overview 383
2 Communication Interfaces 384
3 Serial Communication 385
3.1 EIA(RS)232 Bus 385
3.2 EIA(RS)485 Bus 385
3.2.1 EIA(RS)485 Biasing Requirements 386
3.3 K-Bus 386
4 Standard Ethernet Communication 388
4.1 Hot-Standby Ethernet Failover 388
5 Redundant Ethernet Communication 389
5.1 Supported Protocols 389
5.2 Parallel Redundancy Protocol 390
5.2.1 PRP Application in the Substation 391
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5.3 High-Availability Seamless Redundancy (HSR) 391
5.3.1 HSR Multicast Topology 391
5.3.2 HSR Unicast Topology 392
5.3.3 HSR Application in the Substation 393
5.4 Rapid Spanning Tree Protocol 394
5.5 Self Healing Protocol 395
5.6 Dual Homing Protocol 396
5.7 Configuring IP Addresses 398
5.7.1 Configuring the IED IP Address 399
5.7.2 Configuring the REB IP Address 399
6 Simple Network Management Protocol (SNMP) 403
6.1 SNMP Management Information Bases 403
6.2 Main Processor MIBS Structure 403
6.3 Redundant Ethernet Board MIB Structure 404
6.4 Accessing the MIB 408
6.5 Main Processor SNMP Configuration 408
7 Data Protocols 410
7.1 Courier 410
7.1.1 Physical Connection and Link Layer 410
7.1.2 Courier Database 411
7.1.3 Settings Categories 411
7.1.4 Setting Changes 411
7.1.5 Event Extraction 411
7.1.6 Disturbance Record Extraction 413
7.1.7 Programmable Scheme Logic Settings 413
7.1.8 Time Synchronisation 413
7.1.9 Courier Configuration 414
7.2 IEC 60870-5-103 415
7.2.1 Physical Connection and Link Layer 415
7.2.2 Initialisation 416
7.2.3 Time Synchronisation 416
7.2.4 Spontaneous Events 416
7.2.5 General Interrogation (GI) 416
7.2.6 Cyclic Measurements 416
7.2.7 Commands 416
7.2.8 Test Mode 417
7.2.9 Disturbance Records 417
7.2.10 Command/Monitor Blocking 417
7.2.11 IEC 60870-5-103 Configuration 417
7.3 DNP 3.0 418
7.3.1 Physical Connection and Link Layer 419
7.3.2 Object 1 Binary Inputs 419
7.3.3 Object 10 Binary Outputs 419
7.3.4 Object 20 Binary Counters 420
7.3.5 Object 30 Analogue Input 420
7.3.6 Object 40 Analogue Output 421
7.3.7 Object 50 Time Synchronisation 421
7.3.8 DNP3 Device Profile 421
7.3.9 DNP3 Configuration 429
7.4 MODBUS 430
7.4.1 Physical Connection and Link Layer 431
7.4.2 MODBUS Functions 431
7.4.3 Response Codes 431
7.4.4 Register Mapping 432
7.4.5 Event Extraction 432
7.4.6 Disturbance Record Extraction 433
7.4.7 Setting Changes 441
7.4.8 Password Protection 441
7.4.9 Protection and Disturbance Recorder Settings 441
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7.4.10 Time Synchronisation 442
7.4.11 Power and Energy Measurement Data Formats 443
7.4.12 MODBUS Configuration 444
7.5 IEC 61850 445
7.5.1 Benefits of IEC 61850 445
7.5.2 IEC 61850 Interoperability 446
7.5.3 The IEC 61850 Data Model 446
7.5.4 IEC 61850 in MiCOM IEDs 447
7.5.5 IEC 61850 Data Model Implementation 447
7.5.6 IEC 61850 Communication Services Implementation 447
7.5.7 IEC 61850 Peer-to-peer (GOOSE) communications 448
7.5.8 Mapping GOOSE Messages to Virtual Inputs 448
7.5.9 Ethernet Functionality 448
7.5.10 IEC 61850 Configuration 448
8 Read Only Mode 450
8.1 IEC 60870-5-103 Protocol Blocking 450
8.2 Courier Protocol Blocking 450
8.3 IEC 61850 Protocol Blocking 451
8.4 Read-Only Settings 451
8.5 Read-Only DDB Signals 451
9 Time Synchronisation 452
9.1 Demodulated IRIG-B 452
9.1.1 IRIG-B Implementation 453
9.2 SNTP 453
9.2.1 Loss of SNTP Server Signal Alarm 453
9.3 IEEE 1588 Precision time Protocol 453
9.3.1 Accuracy and Delay Calculation 453
9.3.2 PTP Domains 454
9.4 Time Synchronsiation using the Communication Protocols 454
Chapter 19 Cyber-Security 455
1 Overview 457
2 The Need for Cyber-Security 458
3 Standards 459
3.1 NERC Compliance 459
3.1.1 CIP 002 460
3.1.2 CIP 003 460
3.1.3 CIP 004 460
3.1.4 CIP 005 460
3.1.5 CIP 006 460
3.1.6 CIP 007 461
3.1.7 CIP 008 461
3.1.8 CIP 009 461
3.2 IEEE 1686-2007 461
4 Cyber-Security Implementation 463
4.1 NERC-Compliant Display 463
4.2 Four-level Access 464
4.2.1 Blank Passwords 465
4.2.2 Password Rules 465
4.2.3 Access Level DDBs 466
4.3 Enhanced Password Security 466
4.3.1 Password Strengthening 466
4.3.2 Password Validation 466
4.3.3 Password Blocking 467
4.4 Password Recovery 468
4.4.1 Password Recovery 468
4.4.2 Password Encryption 469
P14xEd1-TM-EN-1 xiii
Contents P14x
4.5 Disabling Physical Ports 469
4.6 Disabling Logical Ports 469
4.7 Security Events Management 470
4.8 Logging Out 472
Chapter 20 Installation 473
1 Chapter Overview 475
2 Handling the Goods 476
2.1 Receipt of the Goods 476
2.2 Unpacking the Goods 476
2.3 Storing the Goods 476
2.4 Dismantling the Goods 476
3 Mounting the Device 477
3.1 Flush Panel Mounting 477
3.2 Rack Mounting 478
4 Cables and Connectors 480
4.1 Terminal Blocks 480
4.2 Power Supply Connections 481
4.3 Earth Connnection 481
4.4 Current Transformers 481
4.5 Voltage Transformer Connections 482
4.6 Watchdog Connections 482
4.7 EIA(RS)485 and K-Bus Connections 482
4.8 IRIG-B Connection 482
4.9 Opto-input Connections 482
4.10 Output Relay Connections 482
4.11 Ethernet Metallic Connections 483
4.12 Ethernet Fibre Connections 483
4.13 RS232 connection 483
4.14 Download/Monitor Port 483
4.15 GPS Fibre Connection 483
4.16 Fibre Communication Connections 483
5 Case Dimensions 484
5.1 Case Dimensions 40TE 484
5.2 Case Dimensions 60TE 485
5.3 Case Dimensions 80TE 486
Chapter 21 Commissioning Instructions 487
1 Chapter Overview 489
2 General Guidelines 490
3 Commissioning Test Menu 491
3.1 Opto I/P Status Cell (Opto-input Status) 491
3.2 Relay O/P Status Cell (Relay Output Status) 491
3.3 Test Port Status Cell 491
3.4 Monitor Bit 1 to 8 Cells 491
3.5 Test Mode Cell 492
3.6 Test Pattern Cell 492
3.7 Contact Test Cell 492
3.8 Test LEDs Cell 492
3.9 Test Autoreclose Cell 492
3.10 Red and Green LED Status Cells 493
3.11 Using a Monitor Port Test Box 493
4 Commissioning Equipment 494
4.1 Recommended Commissioning Equipment 494
xiv P14xEd1-TM-EN-1
P14x Contents
4.2 Essential Commissioning Equipment 494
4.3 Advisory Test Equipment 495
5 Product Checks 496
5.1 Product Checks with the IED De-energised 496
5.1.1 Visual Inspection 497
5.1.2 Current Transformer Shorting Contacts 497
5.1.3 Insulation 497
5.1.4 External Wiring 497
5.1.5 Watchdog Contacts 498
5.1.6 Power Supply 498
5.2 Product Checks with the IED Energised 498
5.2.1 Watchdog Contacts 498
5.2.2 Test LCD 499
5.2.3 Date and Time 499
5.2.4 Test LEDs 500
5.2.5 Test Alarm and Out-of-Service LEDs 500
5.2.6 Test Trip LED 500
5.2.7 Test User-programmable LEDs 500
5.2.8 Test Opto-inputs 500
5.2.9 Test Output Relays 500
5.2.10 Test Serial Communication Port RP1 501
5.2.11 Test Serial Communication Port RP2 502
5.2.12 Test Ethernet Communication 502
5.3 Secondary Injection Tests 503
5.3.1 Test Current Inputs 503
5.3.2 Test Voltage Inputs 503
6 Setting Checks 505
6.1 Apply Application-specific Settings 505
6.1.1 Transferring Settings from a Settings File 505
6.1.2 Entering settings using the HMI 505
7 Protection Timing Checks 507
7.1 Overcurrent Check 507
7.2 Connecting the Test Circuit 507
7.3 Performing the Test 507
7.4 Check the Operating Time 507
8 Onload Checks 509
8.1 Confirm Current Connections 509
8.2 Confirm Voltage Connections 509
8.3 On-load Directional Test 510
9 Final Checks 511
Chapter 22 Maintenance and Troubleshooting 513
1 Chapter Overview 515
2 Maintenance 516
2.1 Maintenance Checks 516
2.1.1 Alarms 516
2.1.2 Opto-isolators 516
2.1.3 Output Relays 516
2.1.4 Measurement Accuracy 516
2.2 Replacing the Device 517
2.3 Repairing the Device 518
2.4 Removing the front panel 518
2.5 Replacing PCBs 519
2.5.1 Replacing the main processor board 519
2.5.2 Replacement of communications boards 520
2.5.3 Replacement of the input module 521
2.5.4 Replacement of the power supply board 521
P14xEd1-TM-EN-1 xv
Contents P14x
2.5.5 Replacement of the I/O boards 522
2.6 Recalibration 522
2.7 Changing the battery 522
2.7.1 Post Modification Tests 523
2.7.2 Battery Disposal 523
2.8 Cleaning 523
3 Troubleshooting 524
3.1 Self-Diagnostic Software 524
3.2 Power-up Errors 524
3.3 Error Message or Code on Power-up 524
3.4 Out of Service LED on at power-up 525
3.5 Error Code during Operation 526
3.5.1 Backup Battery 526
3.6 Mal-operation during testing 526
3.6.1 Failure of Output Contacts 526
3.6.2 Failure of Opto-inputs 526
3.6.3 Incorrect Analogue Signals 527
3.7 PSL Editor Troubleshooting 527
3.7.1 Diagram Reconstruction 527
3.7.2 PSL Version Check 527
4 Repair and Modification Procedure 528
Chapter 23 Technical Specifications 529
1 Chapter Overview 531
2 Interfaces 532
2.1 Front Serial Port 532
2.2 Download/Monitor Port 532
2.3 Rear Serial Port 1 532
2.4 Fibre Rear Serial Port 1 532
2.5 Rear Serial Port 2 533
2.6 Optional Rear Serial Port (SK5) 533
2.7 IRIG-B (Demodulated) 533
2.8 IRIG-B (Modulated) 533
2.9 Rear Ethernet Port Copper 534
2.10 Rear Ethernet Port Fibre 534
2.10.1 100 Base FX Receiver Characteristics 534
2.10.2 100 Base FX Transmitter Characteristics 535
3 Performance of Current Protection Functions 536
3.1 Transient Overreach and Overshoot 536
3.2 Phase Overcurrent Protection 536
3.2.1 Phase Overcurrent Directional Parameters 536
3.3 Voltage Dependent Overcurrent Protection 536
3.4 Earth Fault Protection 537
3.4.1 Earth Fault Directional Parameters 537
3.5 Sensitive Earth Fault Protection 538
3.5.1 SEF Directional Parameters 538
3.6 Restricted Earth Fault Protection 538
3.7 Negative Sequence Overcurrent Protection 539
3.7.1 NPSOC Directional Parameters 539
3.8 Circuit Breaker Fail and Undercurrent Protection 539
3.9 Broken Conductor Protection 539
3.10 Thermal Overload Protection 539
3.11 Cold Load Pickup Protection 540
3.12 Selective Overcurrent Protection 540
3.13 Voltage Dependent Overcurrent Protection 540
3.14 Neutral Admittance Protection 540
xvi P14xEd1-TM-EN-1
P14x Contents
4 Performance of Voltage Protection Functions 541
4.1 Undervoltage Protection 541
4.2 Overvoltage Protection 541
4.3 Residual Overvoltage Protection 541
4.4 Negative Sequence Voltage Protection 541
4.5 Rate of Change of Voltage Protection 542
5 Performance of Frequency Protection Functions 543
5.1 Basic Overfrequency Protection 543
5.2 Basic Underfrequency Protection 543
5.3 Advanced Overfrequency Protection 543
5.4 Advanced Underfrequency Protection 544
5.5 Supervised Rate of Change of Frequency Protection 544
5.6 Independent Rate of Change of Frequency Protection 544
5.7 Average Rate of Change of Frequency Protection 545
5.8 Load Restoration 545
6 Power Protection Functions 546
6.1 Overpower / Underpower Protection 546
6.2 Sensitive Power Protection 546
7 Performance of Monitoring and Control Functions 547
7.1 Voltage Transformer Supervision 547
7.2 Standard Current Transformer Supervision 547
7.3 CB State and Condition Monitoring 547
7.4 PSL Timers 547
8 Measurements and Recording 548
8.1 General 548
8.2 Disturbance Records 548
8.3 Event, Fault and Maintenance Records 548
8.4 Fault Locator 548
9 Ratings 549
9.1 AC Measuring Inputs 549
9.2 Current Transformer Inputs 549
9.3 Voltage Transformer Inputs 549
9.4 Auxiliary Supply Voltage 549
9.5 Nominal Burden 550
9.6 Power Supply Interruption 550
9.7 Battery Backup 551
10 Input / Output Connections 552
10.1 Isolated Digital Inputs 552
10.2 Nominal Pickup and Reset Thresholds 552
10.3 Standard Output Contacts 552
10.4 High Break Output Contacts 553
10.5 Watchdog Contacts 553
11 Mechanical Specifications 554
11.1 Physical Parameters 554
11.2 Enclosure Protection 554
11.3 Mechanical Robustness 554
11.4 Transit Packaging Performance 554
12 Type Tests 555
12.1 Insulation 555
12.2 Creepage Distances and Clearances 555
12.3 High Voltage (Dielectric) Withstand 555
12.4 Impulse Voltage Withstand Test 555
13 Environmental Conditions 556
13.1 Ambient Temperature Range 556
13.2 Temperature Endurance Test 556
13.3 Ambient Humidity Range 556
P14xEd1-TM-EN-1 xvii
Contents P14x
13.4 Corrosive Environments 556
14 Electromagnetic Compatibility 557
14.1 1 MHz Burst High Frequency Disturbance Test 557
14.2 Damped Oscillatory Test 557
14.3 Immunity to Electrostatic Discharge 557
14.4 Electrical Fast Transient or Burst Requirements 557
14.5 Surge Withstand Capability 557
14.6 Surge Immunity Test 558
14.7 Immunity to Radiated Electromagnetic Energy 558
14.8 Radiated Immunity from Digital Communications 558
14.9 Radiated Immunity from Digital Radio Telephones 558
14.10 Immunity to Conducted Disturbances Induced by Radio Frequency Fields 558
14.11 Magnetic Field Immunity 559
14.12 Conducted Emissions 559
14.13 Radiated Emissions 559
14.14 Power Frequency 559
15 Regulatory Compliance 560
15.1 EMC Compliance: 2014/30/EU 560
15.2 LVD Compliance: 2014/35/EU 560
15.3 R&TTE Compliance: 2014/53/EU 560
15.4 UL/CUL Compliance 560
15.5 ATEX Compliance: 2014/34/EU 560
Appendix A Ordering Options 563
Appendix B Settings and Signals 565
Appendix C Wiring Diagrams 567
xviii P14xEd1-TM-EN-1
Table of Figures
Figure 1: Functional Overview 11
Figure 2: Hardware architecture 30
Figure 3: Exploded view of IED 31
Figure 4: Front panel (60TE) 33
Figure 5: HMI panel 34
Figure 6: Rear view of populated case 37
Figure 7: Terminal block types 38
Figure 8: Rear connection to terminal block 39
Figure 9: Main processor board 40
Figure 10: Power supply board 41
Figure 11: Power supply assembly 42
Figure 12: Power supply terminals 43
Figure 13: Watchdog contact terminals 44
Figure 14: Rear serial port terminals 45
Figure 15: Input module - 1 transformer board 45
Figure 16: Input module schematic 46
Figure 17: Transformer board 47
Figure 18: Input board 48
Figure 19: Standard output relay board - 8 contacts 49
Figure 20: IRIG-B board 50
Figure 21: Fibre optic board 51
Figure 22: Rear communication board 52
Figure 23: Ethernet board 52
Figure 24: Redundant Ethernet board 54
Figure 25: Software Architecture 60
Figure 26: Frequency Response (indicative only) 65
Figure 27: Navigating the HMI 72
Figure 28: Default display navigation 74
Figure 29: IEC 60255 IDMT curves 91
Figure 30: IEC standard and very inverse curves 94
Figure 31: IEC Extremely inverse and IEEE moderate inverse curves 94
Figure 32: IEEE very and extremely inverse curves 95
Figure 33: Principle of protection function implementation 96
Figure 34: Non-directional Overcurrent Logic diagram 99
Figure 35: Directional Overcurrent Logic diagram (Phase A shown only) 101
Figure 36: Typical distribution system using parallel transformers 102
Figure 37: Typical ring main with associated overcurrent protection 103
Figure 38: Modification of current pickup level for voltage controlled overcurrent protection 105
Table of Figures P14x
Figure 39: Modification of current pickup level for voltage restrained overcurrent protection 106
Figure 40: Voltage dependant overcurrent logic (Phase A to phase B) 107
Figure 41: Selecting the current threshold setting 109
Figure 42: Cold Load Pickup logic 111
Figure 43: Selective Logic 113
Figure 44: Selecting the timer settings 115
Figure 45: Negative Sequence Overcurrent logic - non-directional operation 117
Figure 46: Composite Earth Fault Start Logic 117
Figure 47: Negative Sequence Overcurrent logic - directional operation 118
Figure 48: Non-directional EF logic (single stage) 121
Figure 49: IDG Characteristic 122
Figure 50: Directional EF logic with neutral voltage polarization (single stage) 123
Figure 51: Directional Earth Fault logic with negative sequence polarisation (single stage) 124
Figure 52: Current level (amps) at which transient faults are self-extinguishing 125
Figure 53: Earth fault in Petersen Coil earthed system 125
Figure 54: Distribution of currents during a Phase C fault 126
Figure 55: Phasors for a phase C earth fault in a Petersen Coil earthed system 126
Figure 56: Zero sequence network showing residual currents 127
Figure 57: Phase C earth fault in Petersen Coil earthed system: practical case with resistance
esent
pr
e 58: Non-directional SEF logic 130
Figur
128
Figure 59: SEF Any Start Logic 131
Figure 60: EPATR B characteristic shown for TMS = 1.0 132
Figure 61: Types of directional control 132
Figure 62: Resistive components of spill current 133
Figure 63: Operating characteristic for Icos 134
Figure 64: Directional SEF with VN polarisation (single stage) 135
Figure 65: Current distribution in an insulated system with C phase fault 136
Figure 66: Phasor diagrams for insulated system with C phase fault 137
Figure 67: Positioning of core balance current transformers 138
Figure 68: Thermal overload protection logic diagram 140
Figure 69: Spreadsheet calculation for dual time constant thermal characteristic 141
Figure 70: Dual time constant thermal characteristic 141
Figure 71: Broken conductor logic 144
Figure 72: Blocked Overcurrent logic 146
Figure 73: Blocked Earth Fault logic 147
Figure 74: Simple busbar blocking scheme 147
Figure 75: Simple busbar blocking scheme characteristics 148
Figure 76: 2nd Harmonic Blocking Logic (POC Input) 150
Figure 77: 2nd Harmonic Blocking Logic (SEF Input) 151
xx P14xEd1-TM-EN-1
P14x Table of Figures
Figure 78: Load blinder and angle 152
Figure 79: Load Blinder logic 3phase 153
Figure 80: Load Blinder logic phase A 154
Figure 81: Admittance protection 156
Figure 82: Conductance operation 157
Figure 83: Susceptance operation 157
Figure 84: Simplified busbar representation 159
Figure 85: High Impedance differential protection for busbars 160
Figure 86: REF protection for delta side 164
Figure 87: REF protection for star side 164
Figure 88: REF Protection for resistance-earthed systems 165
Figure 89: REF Protection for solidly earthed system 166
Figure 90: Low Impedance REF Connection 167
Figure 91: Three-slope REF bias characteristic 168
Figure 92: High Impedance REF principle 169
Figure 93: High Impedance REF Connection 170
Figure 94: REF bias characteristic 172
Figure 95: Star winding, resistance earthed 174
Figure 96: Percentage of winding protected 175
Figure 97: Low Impedance REF Scaling Factor 176
Figure 98: Hi-Z REF protection for a grounded star winding 177
Figure 99: Hi-Z REF protection for a delta winding 177
Figure 100: Hi-Z REF Protection for autotransformer configuration 178
Figure 101: High Impedance REF for the LV winding 179
Figure 102: Circuit Breaker Fail logic - three phase start 187
Figure 103: Circuit Breaker Fail logic - single phase start 188
Figure 104: Circuit Breaker Fail Trip and Alarm 189
Figure 105: Undercurrent and Zero Crossing Detection Logic for CB Fail 190
Figure 106: CB Fail SEF Protection Logic 191
Figure 107: CB Fail Non Current Protection Logic 192
Figure 108: Circuit Breaker mapping 193
Figure 109: CB Fail timing 195
Figure 110: Undervoltage - single and three phase tripping mode (single stage) 211
Figure 111: Overvoltage - single and three phase tripping mode (single stage) 214
Figure 112: Rate of Change of Voltage protection logic 216
Figure 113: Residual Overvoltage logic 219
Figure 114: Residual voltage for a solidly earthed system 220
Figure 115: Residual voltage for an impedance earthed system 221
Figure 116: Star connected condenser bushings 222
Figure 117: Theoretical earth fault in condenser bushing system 222
P14xEd1-TM-EN-1 xxi
Table of Figures P14x
Figure 118: Condenser bushing system vectors 223
Figure 119: Device connection with resistors and shorting contact 224
Figure 120: Device connection P141/ P142/ P143/ P145 226
Figure 121: Device connection P144 226
Figure 122: Negative Sequence Overvoltage logic 228
Figure 123: Sensitive Overvoltage operation logic 231
Figure 124: Sensitive Overvoltage filter mode logic 232
Figure 125: Sensitive Overvoltage blocking logic 232
Figure 126: Underfrequency logic (single stage) 238
Figure 127: Overfrequency logic (single stage) 240
Figure 128: Power system segregation based upon frequency measurements 241
Figure 129: Independent rate of change of frequency logic (single stage) 243
Figure 130: Frequency-supervised rate of change of frequency logic (single stage) 246
Figure 131: Frequency supervised rate of change of frequency protection 247
Figure 132: Average rate of change of frequency characteristic 248
Figure 133: Average rate of change of frequency logic (single stage) 249
Figure 134: Load restoration with short deviation into holding band 252
Figure 135: Load restoration with long deviation into holding band 253
Figure 136: Load Restoration logic 254
Figure 137: Overpower logic 261
Figure 138: Underpower logic 264
Figure 139: Sensitive Power logic diagram 267
Figure 140: Sensitive Power input vectors 268
Figure 141: Transient Earth Fault Logic Overview 272
Figure 142: Fault Type Detector Logic 273
Figure 143: Direction Detector Logic - Standard Mode 273
Figure 144: TEFD output alarm logic 273
Figure 145: Four-position selector switch implementation 288
Figure 146: Autoreclose mode select logic 289
Figure 147: Start signal logic 291
Figure 148: Trip signal logic 291
Figure 149: Blocking signal logic 292
Figure 150: Shots Exceeded logic 292
Figure 151: AR initiation logic 293
Figure 152: Blocking instantaneous protection for selected trips 294
Figure 153: Blocking instantaneous protection for lockouts 296
Figure 154: Dead Time Control logic 297
Figure 155: AR CB Close Control logic 298
Figure 156: AR System Check logic 299
Figure 157: Reclaim Time logic 300
xxii P14xEd1-TM-EN-1
P14x Table of Figures
Figure 158: AR Initiation inhibit 301
Figure 159: Overall Lockout logic 302
Figure 160: Lockout for protection trip when AR is not available 303
Figure 161: Fault recorder stop conditions 314
Figure 162: CB State Monitoring logic 323
Figure 163: Hotkey menu navigation 325
Figure 164: Default function key PSL 326
Figure 165: Remote Control of Circuit Breaker 327
Figure 166: CB Control logic 328
Figure 167: Pole Dead logic 329
Figure 168: Check Synchronisation vector diagram 332
Figure 169: System Check logic 333
Figure 170: System Check PSL 334
Figure 171: Representation of typical feeder bay 337
Figure 172: Switch Status logic 338
Figure 173: Switch Control logic 339
Figure 174: VTS logic 346
Figure 175: VTS Acceleration Indication Logic 347
Figure 176: CTS logic diagram 348
Figure 177: TCS Scheme 1 350
Figure 178: PSL for TCS Scheme 1 351
Figure 179: TCS Scheme 2 352
Figure 180: PSL for TCS Scheme 2 352
Figure 181: TCS Scheme 3 353
Figure 182: PSL for TCS Scheme 3 353
Figure 183: Scheme Logic Interfaces 359
Figure 184: Trip LED logic 363
Figure 185: Example assignment of InterMiCOM signals within the PSL 376
Figure 186: Direct connection 377
Figure 187: Indirect connection using modems 377
Figure 188: RS485 biasing circuit 386
Figure 189: Remote communication using K-Bus 387
Figure 190: IED attached to separate LANs 390
Figure 191: PRP application in the substation 391
Figure 192: HSR multicast topology 392
Figure 193: HSR unicast topology 393
Figure 194: HSR application in the substation 394
Figure 195: IED attached to redundant Ethernet star or ring circuit 394
Figure 196: IED, bay computer and Ethernet switch with self healing ring facilities 395
Figure 197: Redundant Ethernet ring architecture with IED, bay computer and Ethernet switches 395
P14xEd1-TM-EN-1 xxiii
Table of Figures P14x
Figure 198: Redundant Ethernet ring architecture with IED, bay computer and Ethernet switches
396
after failure
e 199: Dual homing mechanism 397
Figur
Figure 200: Application of Dual Homing Star at substation level 398
Figure 201: IED and REB IP address configuration 399
Figure 202: Control input behaviour 420
Figure 203: Manual selection of a disturbance record 436
Figure 204: Automatic selection of disturbance record - method 1 437
Figure 205: Automatic selection of disturbance record - method 2 438
Figure 206: Configuration file extraction 439
Figure 207: Data file extraction 440
Figure 208: Data model layers in IEC61850 446
Figure 209: GPS Satellite timing signal 452
Figure 210: Timing error using ring or line topology 454
Figure 211: Default display navigation 464
Figure 212: Location of battery isolation strip 477
Figure 213: Rack mounting of products 478
Figure 214: Terminal block types 480
Figure 215: 40TE case dimensions 484
Figure 216: 60TE case dimensions 485
Figure 217: 80TE case dimensions 486
Figure 218: RP1 physical connection 501
Figure 219: Remote communication using K-bus 502
Figure 220: Possible terminal block types 518
Figure 221: Front panel assembly 520
xxiv P14xEd1-TM-EN-1
CHAPTER 1
INTRODUCTION
Chapter 1 - Introduction P14x
2 P14xEd1-TM-EN-1
P14x Chapter 1 - Introduction
1 CHAPTER OVERVIEW
This chapter provides some general information about the technical manual and an introduction to the device(s)
described in this technical manual.
This chapter contains the following sections:
Chapter Overview 3
ord 4
Forew
Product Scope 6
Features and Functions 7
Compliance 10
Functional Overview 11
P14xEd1-TM-EN-1 3
Chapter 1 - Introduction P14x
2 FOREWORD
This technical manual provides a functional and technical description of General Electric's P141, P142, P143, P144,
P145, as well as a compr
assumes that you are already familiar with protection engineering and have experience in this discipline. The
description of principles and theory is limited to that which is necessary to understand the product. For further
details on general protection engineering theory, we refer you to Alstom's publication NPAG, which is available
online or from our contact centre.
We have attempted to make this manual as accurate, comprehensive and user-friendly as possible. However we
cannot guarantee that it is free from errors. Nor can we state that it cannot be improved. We would therefore be
very pleased to hear from you if you discover any errors, or have any suggestions for improvement. Our policy is to
provide the information necessary to help you safely specify, engineer, install, commission, maintain, and
eventually dispose of this product. We consider that this manual provides the necessary information, but if you
consider that more details are needed, please contact us.
All feedback should be sent to our contact centre via the following URL:
www.gegridsolutions.com/contact
ehensive set of instructions for using the device. The level at which this manual is written
2.1 TARGET AUDIENCE
This manual is aimed towards all professionals charged with installing, commissioning, maintaining,
troubleshooting, or operating any of the pr
commissioning personnel as well as engineers who will be responsible for operating the product.
The level at which this manual is written assumes that installation and commissioning engineers have knowledge
of handling electronic equipment. Also, system and protection engineers have a thorough knowledge of protection
systems and associated equipment.
oducts within the specified product range. This includes installation and
2.2 TYPOGRAPHICAL CONVENTIONS
The following typographical conventions are used throughout this manual.
● The names for special keys appear in capital letter
For example: ENTER
● When describing software applications, menu items, buttons, labels etc as they appear on the screen are
written in bold type.
For example: Select Save from the file menu.
● Filenames and paths use the courier font
For example: Example\File.text
● Special terminology is written with leading capitals
For example: Sensitive Earth Fault
● If reference is made to the IED's internal settings and signals database, the menu group heading (column)
text is written in upper case italics
For example: The SYSTEM DATA column
● If reference is made to the IED's internal settings and signals database, the setting cells and DDB signals are
written in bold italics
For example: The Language cell in the SYSTEM DATA column
● If reference is made to the IED's internal settings and signals database, the value of a cell's content is
written in the Courier font
For example: The Language cell in the SYSTEM DATA column contains the value English
s.
4 P14xEd1-TM-EN-1
P14x Chapter 1 - Introduction
2.3 NOMENCLATURE
Due to the technical nature of this manual, many special terms, abbreviations and acronyms are used throughout
the manual. Some of these terms are w
specific terms used by General Electric. The first instance of any acronym or term used in a particular chapter is
explained. In addition, a separate glossary is available on the General Electric website, or from the General Electric
contact centre.
We would like to highlight the following changes of nomenclature however:
● The word 'relay' is no longer used to describe the device itself. Instead, the device is referred to as the 'IED'
(Intelligent Electronic Device), the 'device', or the 'product'. The word 'relay' is used purely to describe the
electromechanical components within the device, i.e. the output relays.
● British English is used throughout this manual.
● The British term 'Earth' is used in favour of the American term 'Ground'.
ell-known industry-specific terms while others may be special product-
P14xEd1-TM-EN-1 5
Chapter 1 - Introduction P14x
3 PRODUCT SCOPE
The P14x range of feeder management IEDs has been designed for all applications where overcurrent and earth
fault protection is r
suitable for solidly-earthed, impedance-earthed, Petersen coil-earthed and isolated systems.
All devices provide an extensive range of protection functions as well as a comprehensive range of additional
features to aid with power system diagnosis and fault analysis.
The P14x range consists of five models; the P141, P142, P143, P144 and P145.
● The P141 is the most basic model providing a cost-effective solution for most applications
● The P142 provides all the functionality of the P141, as well as four-shot three-pole autoreclose functionality.
● The P143 provides all the functionality of the P142, as well as a fourth VT for Check Synchronisation
functionality. Due to its choice of larger case sizes, the P143 can also provide significantly more I/O (optoinputs and relay outputs). Model P also provides switch status and control for disconnectors, load break
switches and earthing switches.
● The P145 provides all the functionality of the P143, but in addition has 10 function keys for integral scheme
or operator control functionality such as circuit breaker control, autoreclose control and remote
communications control. This makes it especially suitable where a complete scheme solution is required.
● The P144 has been designed such that it needs just two two Current Transformer inputs for two phases. The
third phase is derived mathematically inside the IED. It also has a fourth VT input to be used for a measured
neutral voltage (instead of check sync functionality) which makes it suitable for isolated and compensated
systems.
The difference in model variants are summarised below:
equired, from distribution to transmission voltage levels. All devices within the range are
Model P14x
Feature/Variant P141 P142 P143 P144 P145
Case 40TE 40TE 60TE/80TE 40Te 60TE
Number of CT Inputs 5 5 5 4 5
Number of VT inputs 3 3 4 4 4
Optically coupled digital inputs 8 16 48 16 32
Standard relay output contacts 8 15 16 15 32
Function keys 0 0 0 0 10
Check synchronisation N N Y Y Y
Autoreclose N Y Y Y Y
Programmable LEDs (tri-colour) 0 0 0 0 10
3.1 ORDERING OPTIONS
All current models and variants for this product are defined in an interactive spreadsheet called the CORTEC. This is
available on the company w
Alternatively, you can obtain it via the Contact Centre at the following URL:
www.gegridsolutions.com/contact
A copy of the CORTEC is also supplied as a static table in the Appendices of this document. However, it should only
be used for guidance as it provides a snapshot of the interactive data taken at the time of publication.
ebsite.
6 P14xEd1-TM-EN-1
P14x Chapter 1 - Introduction
4 FEATURES AND FUNCTIONS
4.1 PROTECTION FUNCTIONS
The P14x range of devices provides the following protection functions:
ANSI IEC 61850 Protection Function
37 Undercurrent detection (low load)
46 NgcPTOC Negative sequence overcurrent
46BC Broken Conductor
49 ThmPTTR Thermal Overload
50 SOTF Switch onto Fault
50BF RBRF CB Failure
50 OcpPTOC Definite time overcurrent protection
50N EfdPTOC
51 OcpPTOC IDMT overcurrent protection (stages)
51N EfdPTOC Neutral/Ground IDMT overcurrent protection
67 OcpPTOC Directional Phase Overcurrent
67N EfdPTOC Directional Neutral Overcurrent
CLP Cold load pick up
VTS VT supervision
CTS CT supervision
64N RefPDIF Restricted Earth Fault
68 2nd Harmonic Blocking
27 VtpPhsPTUV Undervoltage
47 Negative sequence overvoltage
59 VtpPhsPTOV Overvoltage
59N VtpResPTOV Residual Overvoltage
81O FrqPTOF Overfrequency
81U FrqPTUF Underfrequency
81df/dt Rate of change of frequency (df/dt)
81V DfpPFRC Undervoltage blocking of frequency protection
51V Voltage Controlled Overcurrent
51R Voltage Restrained Overcurrent
25 Check synchronising
32 Phase Directional Power
79 RREC Autor
21FL Fault Locator
81RF DfpPFRC Frequency supervised rate of change of frequency
Earth Fault Definite time overcurrent protection
Measur
ed and Derived (standard EF CT), Derived (SEF CT)
Wattmetric Earth Fault
Sensitive Earth Fault (with SEF CT only)
Programmable curves
Sensitive power
Load Encroachment supervision
(Load Blinder
s)
eclose (3 phases)
P14xEd1-TM-EN-1 7
Chapter 1 - Introduction P14x
ANSI IEC 61850 Protection Function
81RAV DfpPFRC Frequency supervised average rate of change of frequency
81R Load Restoration
Rate of change of voltage (dv/dt)
Blocking scheme
Programmable curves
High Impedance Earth Fault
CB Monitoring
86 Latching output contacts (Lockout)
4.2 CONTROL FUNCTIONS
Feature IEC 61850 ANSI
Watchdog contacts
Read-only mode
Function keys FnkGGIO
Programmable LEDs LedGGIO
Programmable hotkeys
Programmable allocation of digital inputs and outputs
Fully customizable menu texts
Circuit breaker control, status & condition monitoring XCBR 52
CT supervision
VT supervision
Trip circuit and coil supervision
Control inputs PloGGIO1
Power-up diagnostics and continuous self-monitoring
Dual rated 1A and 5A CT inputs
Alternative setting groups (4)
Graphical programmable scheme logic (PSL)
Fault locator RFLO
4.3 MEASUREMENT FUNCTIONS
Measurement Function IEC 61850 ANSI
Measurement of all instantaneous & integrated values
(Exact range of measur
Disturbance recorder for waveform capture – specified in samples per cycle RDRE DFR
Fault Records
Maintenance Records
Event Records / Event logging Event records
Time Stamping of Opto-inputs Yes Yes
ements depend on the device model)
ME
T
4.4 COMMUNICATION FUNCTIONS
The device offers the following communication functions:
8 P14xEd1-TM-EN-1
P14x Chapter 1 - Introduction
Feature ANSI
NERC compliant cyber-security
Front RS232 serial communication port for configuration 16S
Rear serial RS485 communication port for SCADA control 16S
2nd Additional rear serial communication ports for SCADA control and
telepr
otection (fibr
Ethernet communication (optional) 16E
Redundant Ethernet communication (optional) 16E
Courier protocol 16S
IEC 61850 protocol (optional) 16E
IEC 60870-5-103 protocol (optional) 16S
Modbus protocol (optional) 16S
DNP3.0 protocol over serial link (optional) 16S
DNP3.0 protocol over Ethernet (optional) 16E
IRIG-B time synchronisation (optional) CLK
e and copper) (optional)
16S
P14xEd1-TM-EN-1 9
Chapter 1 - Introduction P14x
5 COMPLIANCE
The device has undergone a range of extensive testing and certification processes to ensure and prove
compatibility with all target mark
Specifications chapter.
ets. A detailed description of these criteria can be found in the Technical
10 P14xEd1-TM-EN-1
E00027
InterMiCOM
2nd Remote
Comm. Port
Remote
Comm. Port
Local
Communication
Self Monitoring2nd Harmonic Blocking
Fault Records
Measurements
Disturbance
Record
CTS49SR
YN
ref
Sen
Binary
Input/Output
Always Available
Optical
Feeder Management P14x
(P145 only)
PSL
LEDs
Function
Keys
2579
VTS
50BF47
59N
81U/81O
/81R
27/59
50/51
50N/
51N
67/
67N
67N/67W
/64
59V
46
49
37P/
37N
P14x Chapter 1 - Introduction
6 FUNCTIONAL OVERVIEW
Figure 1: Functional Overview
P14xEd1-TM-EN-1 11
Chapter 1 - Introduction P14x
12 P14xEd1-TM-EN-1
CHAPTER 2
SAFETY INFORMATION
Chapter 2 - Safety Information P14x
14 P14xEd1-TM-EN-1
P14x Chapter 2 - Safety Information
1 CHAPTER OVERVIEW
This chapter provides information about the safe handling of the equipment. The equipment must be properly
installed and handled in order to maintain it in a safe condition and to k
be familiar with information contained in this chapter before unpacking, installing, commissioning, or servicing the
equipment.
This chapter contains the following sections:
Chapter Overview 15
Health and Safety 16
Symbols 17
Installation, Commissioning and Servicing 18
Decommissioning and Disposal 23
Regulatory Compliance 24
eep personnel safe at all times. You must
P14xEd1-TM-EN-1 15
Chapter 2 - Safety Information P14x
2 HEALTH AND SAFETY
Personnel associated with the equipment must be familiar with the contents of this Safety Information.
When electrical equipment is in operation, dangerous v
Improper use of the equipment and failure to observe warning notices will endanger personnel.
Only qualified personnel may work on or operate the equipment. Qualified personnel are individuals who are:
● familiar with the installation, commissioning, and operation of the equipment and the system to which it is
being connected.
● familiar with accepted safety engineering practises and are authorised to energise and de-energise
equipment in the correct manner.
● trained in the care and use of safety apparatus in accordance with safety engineering practises
● trained in emergency procedures (first aid).
The documentation provides instructions for installing, commissioning and operating the equipment. It cannot,
however cover all conceivable circumstances. In the event of questions or problems, do not take any action
without proper authorisation. Please contact your local sales office and request the necessary information.
oltages are present in certain parts of the equipment.
16 P14xEd1-TM-EN-1
P14x Chapter 2 - Safety Information
3 SYMBOLS
Throughout this manual you will come across the following symbols. You will also see these symbols on parts of
the equipment.
Caution:
o equipment documentation. Failure to do so could result in damage to the
Refer t
equipment
Warning:
Risk of electric shock
Note:
The term 'Ear
Earth terminal. Note: This symbol may also be used for a pr
is part of a terminal block or sub-assembly.
Protective conductor (earth) terminal
Instructions on disposal requirements
th' used in this manual is the direct equivalent of the North American term 'Ground'.
otective conductor (earth) terminal if that terminal
P14xEd1-TM-EN-1 17
Chapter 2 - Safety Information P14x
4 INSTALLATION, COMMISSIONING AND SERVICING
4.1 LIFTING HAZARDS
Many injuries are caused by:
● Lifting heavy objects
● Lifting things incorrectly
● Pushing or pulling heavy objects
● Using the same muscles r
Plan carefully, identify any possible hazards and determine how best to move the product. Look at other ways of
moving the load to avoid manual handling. Use the correct lifting techniques and Personal Protective Equipment
(PPE) to reduce the risk of injury.
4.2 ELECTRICAL HAZARDS
epetitively
Caution:
All personnel inv
familiar with the correct working procedures.
Caution:
Consult the equipment documentation before installing, commissioning, or ser
the equipment.
Caution:
Always use the equipment as specified. F
provided by the equipment.
Warning:
Remov
until the electrical power is removed. Take care when there is unlocked access to the
rear of the equipment.
Warning:
Isolate the equipment befor
Warning:
Use a suitable prot
electric shock due to exposed terminals.
al of equipment panels or covers may expose hazardous live parts. Do not touch
olved in installing, commissioning, or servicing this equipment must be
vicing
ailure to do so will jeopardise the protection
e working on the terminal strips.
ective barrier for areas with restricted space, where there is a risk of
Caution:
Disconnect power befor
sensitive electronic circuitry. Take suitable precautions against electrostatic voltage
discharge (ESD) to avoid damage to the equipment.
18 P14xEd1-TM-EN-1
e disassembling. Disassembly of the equipment may expose
P14x Chapter 2 - Safety Information
Caution:
Note:
Contact finger
NEVER look int
meters to determine operation or signal level.
Warning:
Testing may leav
capacitors by rediucing test voltages to zero before disconnecting test leads.
Caution:
Operate the equipment within the specified electrical and envir
Caution:
Before cleaning the equipment
free cloth dampened with clean water.
s of test plugs are normally protected by petroleum jelly, which should not be removed.
o optical fibres or optical output connections. Always use optical power
e capacitors charged to dangerous voltage levels. Discharge
onmental limits.
, ensure that no connections are energised. Use a lint
4.3 UL/CSA/CUL REQUIREMENTS
The information in this section is applicable only to equipment carrying UL/CSA/CUL markings.
Caution:
Equipment int
enclosure, as defined by Underwriters Laboratories (UL).
Caution:
To maintain compliance with UL and CSA/CUL, install the equipment using UL/CSArecognised parts for: cables, protective fuses, fuse holders and circuit breakers,
insulation crimp terminals, and replacement internal batteries.
ended for rack or panel mounting is for use on a f
lat surface of a Type 1
4.4 FUSING REQUIREMENTS
Caution:
Where UL/CSA listing of the equipment is r
CSA Listed fuse must be used for the auxiliary supply. The listed protective fuse type is:
Class J time delay fuse, with a maximum current rating of 15 A and a minimum DC
rating of 250 V dc (for example type AJT15).
equired for external fuse protection, a UL or
Caution:
Where UL/CSA listing of the equipment is not r
fuse type with a maximum current rating of 16 Amps and a minimum dc rating of 250 V
dc may be used for the auxiliary supply (for example Red Spot type NIT or TIA).
For P50 models, use a 1A maximum T-type fuse.
For P60 models, use a 4A maximum T-type fuse.
P14xEd1-TM-EN-1 19
equired, a high rupture capacity (HRC)
Chapter 2 - Safety Information P14x
Caution:
Digital input circuits should be pr
maximum rating of 16 A. for safety reasons, current transformer circuits must never be
fused. Other circuits should be appropriately fused to protect the wire used.
Caution:
CTs must NO
voltages
T be fused since open circuiting them may produce lethal hazardous
otected by a high rupture capacity NIT or TIA fuse with
4.5 EQUIPMENT CONNECTIONS
Warning:
Terminals exposed during installation, commissioning and maintenance may present a
hazardous voltage unless the equipment is electrically isolated.
Caution:
Tighten M4 clamping scr
torque of 1.3 Nm.
Tighten captive screws of terminal blocks to 0.5 Nm minimum and 0.6 Nm maximum.
Caution:
Always use insulated crimp terminations for voltage and current connections.
Caution:
Always use the corr
Caution:
chdog (self-monitoring) contacts are provided to indicate the health of the device
Wat
on some products. We strongly recommend that you hard wire these contacts into the
substation's automation system, for alarm purposes.
ews of heavy duty terminal block connectors to a nominal
ect crimp terminal and tool according to the wire size.
4.6 PROTECTION CLASS 1 EQUIPMENT REQUIREMENTS
Caution:
Earth the equipment with the supplied P
CT (Protective Conductor Terminal).
Caution:
Do not remov
Caution:
The PCT is sometimes used t
after adding or removing such earth connections.
20 P14xEd1-TM-EN-1
e the PCT.
o terminate cable screens. Always check the PCT’s integrity
P14x Chapter 2 - Safety Information
Caution:
Use a locknut or similar mechanism to ensur
Caution:
The recommended minimum P
is 230 V (e.g. Europe) and 3.3 mm² for countries whose mains supply is 110 V (e.g. North
America). This may be superseded by local or country wiring regulations.
For P60 products, the recommended minimum PCT wire size is 6 mm². See product
documentation for details.
Caution:
The PCT connection must have low-inductance and be as short as possible.
Caution:
All connections to the equipment must hav
pre-wired, but not used, should be earthed, or connected to a common grouped
potential.
CT wire size is 2.5 mm² for countries whose mains supply
e the integrity of stud-connected PCTs.
e a defined potential. Connections that are
4.7 PRE-ENERGISATION CHECKLIST
Caution:
Check v
Caution:
Check CT circuit rating (rating label) and int
Caution:
Check prot
Caution:
Check integrity of the P
Caution:
Check voltage and curr
application.
oltage rating/polarity (rating label/equipment documentation).
ective fuse or miniature circuit breaker (MCB) rating.
CT connection.
ent rating of external wiring, ensuring it is appropriate for the
4.8 PERIPHERAL CIRCUITRY
egrity of connections.
Warning:
Do not open the secondary circuit of a live CT since the high voltage produced may be
lethal to personnel and could damage insulation. Short the secondary of the line CT
before opening any connections to it.
P14xEd1-TM-EN-1 21
Chapter 2 - Safety Information P14x
Note:
For most Alstom equipment with ring-t
is automatically shorted if the module is removed. Therefore external shorting of the CTs may not be required. Check the
equipment documentation and wiring diagrams first to see if this applies.
erminal connections, the threaded terminal block for current transformer termination
Caution:
Where ext
ernal components such as resistors or voltage dependent resistors (VDRs) are
used, these may present a risk of electric shock or burns if touched.
Warning:
Tak
e extreme care when using external test blocks and test plugs such as the MMLG,
MMLB and P990, as hazardous voltages may be exposed. Ensure that CT shorting links
are in place before removing test plugs, to avoid potentially lethal voltages.
4.9 UPGRADING/SERVICING
Warning:
Do not insert or withdraw modules, P
CBs or expansion boards from the equipment
while energised, as this may result in damage to the equipment. Hazardous live
voltages would also be exposed, endangering personnel.
Caution:
Internal modules and assemblies can be heavy and may hav
e sharp edges. Take care
when inserting or removing modules into or out of the IED.
22 P14xEd1-TM-EN-1
P14x Chapter 2 - Safety Information
5 DECOMMISSIONING AND DISPOSAL
Caution:
Before decommissioning, complet
of any dc supply). The auxiliary supply input may have capacitors in parallel, which may
still be charged. To avoid electric shock, discharge the capacitors using the external
terminals before decommissioning.
Caution:
Avoid incineration or disposal t
responsible and environmentally friendly manner, and if applicable, in accordance with
country-specific regulations.
ely isolate the equipment power supplies (both poles
o water courses. Dispose of the equipment in a safe,
P14xEd1-TM-EN-1 23
Chapter 2 - Safety Information P14x
6 REGULATORY COMPLIANCE
Compliance with the European Commission Directive on EMC and LVD is demonstrated using a technical file.
6.1 EMC COMPLIANCE: 2014/30/EU
The product specific Declaration of Conformity (DoC) lists the relevant harmonised standard(s) or conformit
assessment used to demonstrate compliance with the EMC directiv
6.2 LVD COMPLIANCE: 2014/35/EU
The product specific Declaration of Conformity (DoC) lists the relevant harmonized standard(s) or conformity
assessment used to demonstrate compliance with the L
Safety related information, such as the installation I overvoltage category, pollution degree and operating
temperature ranges are specified in the Technical Data section of the relevant product documentation and/or on
the product labelling .
VD dir
e.
ective.
Unless otherwise stated in the Technical Data section of the relevant product documentation, the equipment is
intended for indoor use only. Where the equipment is required for use in an outdoor location, it must be mounted
in a specific cabinet or housing to provide the equipment with the appropriate level of protection from the
expected outdoor environment.
6.3 R&TTE COMPLIANCE: 2014/53/EU
Radio and Telecommunications Terminal Equipment (R&TTE) directive 2014/53/EU.
Conformity is demonstrated by compliance to both the EMC directiv
e and the Low Voltage directive, to zero volts.
6.4 UL/CUL COMPLIANCE
If marked with this logo, the product is compliant with the requirements of the Canadian and USA Underwriters
Laboratories.
The relev
ant UL file number and ID is shown on the equipment.
6.5 ATEX COMPLIANCE: 2014/34/EU
Products marked with the 'explosion protection' Ex symbol (shown in the example, below) are compliant with the
ATE
X directive. The product specific Declaration of Conformity (DoC) lists the Notified Body, Type Examination
Certificate, and relevant harmonized standard or conformity assessment used to demonstrate compliance with
the ATEX directive.
The ATEX Equipment Protection level, Equipment group, and Zone definition will be marked on the
product.
For example:
24 P14xEd1-TM-EN-1
P14x Chapter 2 - Safety Information
Where:
'II' Equipment Group: Industrial.
'(2)G' High protection equipment category, for control of equipment in gas atmospheres in Zone 1 and 2.
This equipment (with parentheses mark
ing around the zone number) is not itself suitable for operation
within a potentially explosive atmosphere.
P14xEd1-TM-EN-1 25
Chapter 2 - Safety Information P14x
26 P14xEd1-TM-EN-1
CHAPTER 3
HARDWARE DESIGN
Chapter 3 - Hardware Design P14x
28 P14xEd1-TM-EN-1
P14x Chapter 3 - Hardware Design
1 CHAPTER OVERVIEW
This chapter provides information about the product's hardware design.
This chapter contains the following sections:
Chapter Overview 29
are Architecture 30
Hardw
Mechanical Implementation 31
Front Panel 33
Rear Panel 37
Boards and Modules 39
P14xEd1-TM-EN-1 29
Communications
Analogue Inputs
I/O
I
n
t
e
r
c
o
n
n
e
c
t
i
o
n
Output relay boards
Opto-input boards
CTs
VTs
RS485 modules
Ethernet modules
Keypad
LC
D
LEDs
Front port
Watchdog module
PSU module
Watchdog
co
ntacts
+ LED
Auxiliary
Supply
IRIG-B module
P
r
o
c
e
s
s
o
r
m
o
d
u
l
e
F
r
o
n
t
p
a
n
e
l
H
M
I
Output relay contacts
Digital inputs
Po
wer system currents
Power system voltages
RS485 communication
Time synchronisation
Ethernet communication
V00233
Note: Not all modules are applicable to all products
Memory
Flash memory for settings
Battery-backed SRAM
f
or records
Chapter 3 - Hardware Design P14x
2 HARDWARE ARCHITECTURE
The main components comprising devices based on the Px4x platform are as follows:
● The housing, consisting of a front panel and connections at the r
ear
● The Main processor module consisting of the main CPU (Central Processing Unit), memory and an interface
to the front panel HMI (Human Machine Interface)
● A selection of plug-in boards and modules with presentation at the rear for the power supply,
communication functions, digital I/O, analogue inputs, and time synchronisation connectivity
All boards and modules are connected by a parallel data and address bus, which allows the processor module to
send and receive information to and from the other modules as required. There is also a separate serial data bus
for conveying sampled data from the input module to the CPU. These parallel and serial databuses are shown as a
single interconnection module in the following figure, which shows typical modules and the flow of data between
them.
Figure 2: Hardware architecture
30 P14xEd1-TM-EN-1
P14x Chapter 3 - Hardware Design
3 MECHANICAL IMPLEMENTATION
All products based on the Px4x platform have common hardware architecture. The hardware is modular and
consists of the following main parts:
● Case and terminal blocks
● Boar
● Front panel
The case comprises the housing metalwork and terminal blocks at the rear. The boards fasten into the terminal
blocks and are connected together by a ribbon cable. This ribbon cable connects to the processor in the front
panel.
The following diagram shows an exploded view of a typical product. The diagram shown does not necessarily
represent exactly the product model described in this manual.
ds and modules
Figure 3: Exploded view of IED
3.1 HOUSING VARIANTS
The Px4x range of products are implemented in a range of case sizes. Case dimensions for industrial products
usually follow modular measurement units based on rack sizes. These ar
● 1U = 1.75 inches = 44.45 mm
● 1TE = 0.2 inches = 5.08 mm
The products are available in panel-mount or standalone versions. All products are nominally 4U high. This equates
to 177.8 mm or 7 inches.
The cases are pre-finished steel with a conductive covering of aluminium and zinc. This provides good grounding
at all joints, providing a low resistance path to earth that is essential for performance in the presence of external
noise.
The case width depends on the product type and its hardware options. There are three different case widths for
the described range of products: 40TE, 60TE and 80TE. The case dimensions and compatibility criteria are as
follows:
P14xEd1-TM-EN-1 31
e: U for height and TE for width, where:
Chapter 3 - Hardware Design P14x
Case width (TE) Case width (mm) Case width (inches)
40TE 203.2 8
60TE 304.8 12
80TE 406.4 16
Note:
Not all case sizes are av
ailable for all models.
3.2 LIST OF BOARDS
The product's hardware consists of several modules drawn from a standard range. The exact specification and
number of hardw
product in question will use a selection of the following boards.
Main Processor board – 40TE or smaller Main Processor board – without support for function keys
Main Processor board – 60TE or larger Main Processor board – with support for function keys
Power supply board 24/54V DC Power supply input. Accepts DC voltage between 24V and 54V
Power supply board - 48/125V DC Power supply input. Accepts DC voltage between 48V and 125V
Power supply board 110/250V DC Power supply input. Accepts DC voltage between 110V and 125V
Transformer board Contains the voltage and current transformers
Input board Contains the A/D conversion circuitry
Input board with opto-inputs Contains the A/D conversion circuitry + 8 digital opto-inputs
IRIG-B board - modulated Interface board for modulated IRIG-B timing signal
IRIG-B - demodulated input Interface board for demodulated IRIG-B timing signal
Fibre board Interface board for fibre-based RS485 connection
Fibre + IRIG-B Interface board for fibre-based RS485 connection + demodulated IRIG-B
2nd rear communications board Interface board for RS232 / RS485 connections
2nd rear communications board with IRIG-B input Interface board for RS232 / RS485 + IRIG-B connections
100MhZ Ethernet board Standard 100MHz Ethernet board for LAN connection (fibre + copper)
100MhZ Ethernet board with modulated IRIG-B Standard 100MHz Ethernet board (fibre / copper) + modulated IRIG-B
100MhZ Ethernet board with demodulated IRIG-B Standard 100MHz Ethernet board (fibre / copper)+ demodulated IRIG-B
Redundant Ethernet SHP + modulated IRIG-B Redundant SHP Ethernet board (2 fibre ports) + modulated IRIG-B input
Redundant Ethernet SHP + demodulated IRIG-B Redundant SHP Ethernet board (2 fibre ports) + demodulated IRIG-B input
Redundant Ethernet RSTP + modulated IRIG-B Redundant RSTP Ethernet board (2 fibre ports) + modulated IRIG-B input
Redundant Ethernet RSTP+ demodulated IRIG-B Redundant RSTP Ethernet board (2 fibre ports) + demodulated IRIG-B input
Redundant Ethernet DHP + modulated IRIG-B Redundant DHP Ethernet board (2 fibre ports) + modulated IRIG-B input
Redundant Ethernet DHP + demodulated IRIG-B Redundant DHP Ethernet board (2 fibre ports) + demodulated IRIG-B input
Redundant Ethernet PRP + modulated IRIG-B Redundant PRP Ethernet board (2 fibre ports) + modulated IRIG-B input
Redundant Ethernet PRP + demodulated IRIG-B Redundant PRP Ethernet board (2 fibre ports) + demodulated IRIG-B input
Redundant Ethernet HSR + modulated IRIG-B Redundant HSREthernet board (2 fibre ports) + modulated IRIG-B input
Redundant Ethernet HSR + demodulated IRIG-B Redundant HRSEthernet board (2 fibre ports) + demodulated IRIG-B input
Output relay output board (8 outputs) Standard output relay board with 8 outputs
are modules depends on the model number and variant. Depending on the exact model, the
Board Use
32 P14xEd1-TM-EN-1
P14x Chapter 3 - Hardware Design
4 FRONT PANEL
4.1 FRONT PANEL
Depending on the exact model and chosen options, the product will be housed in either a 40TE, 60TE or 80TE case.
By way of example, the following diagram shows the fr
products based on 40TE and 80TE cases have a lot of commonality and differ only in the number of hotkeys and
user-programmable LEDs. The hinged covers at the top and bottom of the front panel are shown open. An optional
transparent front cover physically protects the front panel.
ont panel of a typical 60TE unit. The front panels of the
Figure 4: Front panel (60TE)
The front panel consists of
● Top and bottom compartments with hinged cover
● LCD display
● Keypad
● 9 pin D-type serial port
● 25 pin D-type parallel port
● Fixed function LEDs
● Function keys and LEDs (60TE and 80TE models)
● Programmable LEDs (60TE and 80TE models)
:
4.1.1 FRONT PANEL COMPARTMENTS
The top compartment contains labels for the:
● Serial number
● Current and v
oltage ratings.
P14xEd1-TM-EN-1 33
V00262
Clear key
Fo
r clearing the last
command
Read key
For viewing larger
blocks of text
Cursor keys
For navigating the
menus
Enter key
For executing the
chosen option
Hot keys
For scrolling through the default display
and for control of setting groups
Function keys
For executing user programmable
functions (not all models)
Monochrome LCD display
3 lines of 16 characters displays
selected option
Chapter 3 - Hardware Design P14x
The bottom compartment contains:
● A compartment for a 1/2 AA size back
up battery (used to back up the real time clock and event, fault, and
disturbance records).
● A 9-pin female D-type front port for an EIA(RS)232 serial connection to a PC.
● A 25-pin female D-type parallel port for monitoring internal signals and downloading software and
language text.
4.1.2 HMI PANEL
The keypad provides full access to the device functionality using a range of menu options. The information is
display
ed on the L
controllable back light.
CD.The LCD is a high resolution monochrome display with 16 characters by 3 lines and
Figure 5: HMI panel
Note:
As the L
CD display has a resolution of 16 characters by 3 lines, some of the information is in a condensed mnemonic form.
4.1.3 FRONT SERIAL PORT (SK1)
The front serial port is a 9-pin female D-type connector, providing RS232 serial data communication. It is situated
under the bottom hinged cover
settings data between the PC and the IED.
The port is intended for temporary connection during testing, installation and commissioning. It is not intended to
be used for permanent SCADA communications. This port supports the Courier communication protocol only.
Courier is a proprietary communication protocol to allow communication with a range of protection equipment,
and between the device and the Windows-based support software package.
This port can be considered as a DCE (Data Communication Equipment) port, so you can connect this port device
to a PC with an EIA(RS)232 serial cable up to 15 m in length.
34 P14xEd1-TM-EN-1
, and is used to communicate with a locally connected PC. It is used to transfer
P14x Chapter 3 - Hardware Design
The inactivity timer for the front port is set to 15 minutes. This controls how long the unit maintains its level of
passwor
d access on the front port. If no messages are received on the front port for 15 minutes, any password
access level that has been enabled is cancelled.
Note:
The front serial port does not support automatic extraction of event and disturbance records, although this data can be
accessed manually.
4.1.3.1 FRONT SERIAL PORT (SK1) CONNECTIONS
The port pin-out follows the standard for Data Communication Equipment (DCE) device with the following pin
connections on a 9-pin connector.
Pin number Description
2 Tx Transmit data
3 Rx Receive data
5 0 V Zero volts common
You must use the correct serial cable, or the communication will not work. A straight-through serial cable is
r
ed, connecting pin 2 to pin 2, pin 3 to pin 3, and pin 5 to pin 5.
equir
Once the physical connection from the unit to the PC is made, the PC’s communication settings must be set to
match those of the IED. The following table shows the unit’s communication settings for the front port.
Protocol Courier
Baud rate 19,200 bps
Courier address 1
Message format 11 bit - 1 start bit, 8 data bits, 1 parity bit (even parity), 1 stop bit
4.1.4 FRONT PARALLEL PORT (SK2)
The front parallel port uses a 25 pin D-type connector. It is used for commissioning, downloading firmware updates
and menu text editing.
4.1.5 FIXED FUNCTION LEDS
Four fixed-function LEDs on the left-hand side of the front panel indicate the following conditions.
● Trip (R
● Alarm (Yellow) flashes when the IED registers an alarm. This may be triggered by a fault, event or
● Out of service (Yellow) is ON when the IED's functions are unavailable.
● Healthy (Green) is ON when the IED is in correct working order, and should be ON at all times. It goes OFF if
ed) switches ON when the IED issues a trip signal. It is r
eset when the associated fault record is
cleared from the front display. Also the trip LED can be configured as self-resetting.
maintenance record. The LED flashes until the alarms have been accepted (read), then changes to
constantly ON. When the alarms are cleared, the LED switches OFF.
the unit’s self-tests show there is an error in the hardware or software. The state of the healthy LED is
reflected by the watchdog contacts at the back of the unit.
4.1.6 FUNCTION KEYS
The programmable function keys are available for custom use for some models.
y default settings associate specific functions to these keys, but by using programmable scheme logic, you
Factor
can change the default functions of these keys to fit specific needs. Adjacent to these function keys are
programmable LEDs, which are usually set to be associated with their respective function keys.
P14xEd1-TM-EN-1 35
Chapter 3 - Hardware Design P14x
4.1.7 PROGRAMABLE LEDS
The device has a number of programmable LEDs, which can be associated with PSL-generated signals. The
pr
ogrammable LEDs for most models ar
programmable LEDs for some models are single-colour (red) only. The single-colour LEDs can be recognised by
virtue of the fact they are large and slightly oval, whereas the tri-colour LEDs are small and round.
e tri-colour and can be set to RED, YELLOW or GREEN. However the
36 P14xEd1-TM-EN-1
P14x Chapter 3 - Hardware Design
5 REAR PANEL
The MiCOM Px40 series uses a modular construction. Most of the internal workings are on boards and modules
which fit into slots. Some of the boards plug into terminal blocks, which ar
However, some boards such as the communications boards have their own connectors. The rear panel consists of
these terminal blocks plus the rears of the communications boards.
The back panel cut-outs and slot allocations vary. This depends on the product, the type of boards and the
terminal blocks needed to populate the case. The following diagram shows a typical rear view of a case populated
with various boards.
e bolted onto the rear of the unit.
Figure 6: Rear view of populated case
Note:
This diagram is just an example and may not show the exact pr
range of available boards, just a typical arrangement.
oduct described in this manual. It also does not show the full
Not all slots are the same size. The slot width depends on the type of board or terminal block. For example, HD
(heavy duty) terminal blocks, as requir
ed for the analogue inputs, require a wider slot size than MD (medium duty)
terminal blocks. The board positions are not generally interchangeable. Each slot is designed to house a particular
type of board. Again, this is model-dependent.
The device may use one or more of the terminal block types shown in the following diagram. The terminal blocks
are fastened to the rear panel with screws.
● Heavy duty (HD) terminal blocks for CT and VT circuits
● Medium duty (MD) terminal blocks for the power supply, opto-inputs, relay outputs and rear
communications port
● RTD/CLIO terminal block for connection to analogue transducers
P14xEd1-TM-EN-1 37
Chapter 3 - Hardware Design P14x
Figure 7: Terminal block types
Note:
Not all pr
types.
oducts use all types of terminal blocks. The product described in this manual may use one or more of the above
38 P14xEd1-TM-EN-1
P14x Chapter 3 - Hardware Design
6 BOARDS AND MODULES
Each product comprises a selection of PCBs (Printed Circuit Boards) and subassemblies, depending on the chosen
configuration.
6.1 PCBS
A PCB typically consists of the components, a front connector for connecting into the main system parallel bus via
a ribbon cable, and an interface to the r
● Directly presented to the outside world (as is the case for communication boards such as Ethernet Boards)
● Presented to a connector, which in turn connects into a terminal block bolted onto the rear of the case (as is
the case for most of the other board types)
ear. This rear interface may be:
Figure 8: Rear connection to terminal block
6.2 SUBASSEMBLIES
A sub-assembly consists of two or more boards bolted together with spacers and connected with electrical
connectors. It may also have other special requirements such as being encased in a metal housing for shielding
against electromagnetic radiation.
Boards are designated by a part number beginning with ZN, whereas pre-assembled sub-assemblies are
designated with a part number beginning with GN. Sub-assemblies, which are put together at the production
stage, do not have a separate part number.
P14xEd1-TM-EN-1 39
Chapter 3 - Hardware Design P14x
The products in the Px40 series typically contain two sub-assemblies:
● The power supply assembly comprising:
○ A pow
○ An output relay board
● The input module comprising:
○ One or more transformer boards, which contains the voltage and current transformers (partially or
○ One or more input boards
○ Metal protective covers for EM (electromagnetic) shielding
The input module is pre-assembled and is therefore assigned a GN number, whereas the power supply module is
assembled at production stage and does not therefore have an individual part number.
er supply board
fully populated)
6.3 MAIN PROCESSOR BOARD
Figure 9: Main processor board
The main processor boar
including the data communication and user interfaces. This is the only board that does not fit into one of the slots.
It resides in the front panel and connects to the rest of the system using an internal ribbon cable.
The LCD and LEDs are mounted on the processor board along with the front panel communication ports.
The memory on the main processor board is split into two categories: volatile and non-volatile. The volatile
memory is fast access SRAM, used by the processor to run the software and store data during calculations. The
non-volatile memory is sub-divided into two groups:
● Flash memory to store software code, text and configuration data including the present setting values.
● Battery-backed SRAM to store disturbance, event, fault and maintenance record data.
There are two board types available depending on the size of the case:
● For models in 40TE cases
● For models in 60TE cases and larger
d performs all calculations and controls the operation of all other modules in the IED,
40 P14xEd1-TM-EN-1
P14x Chapter 3 - Hardware Design
6.4 POWER SUPPLY BOARD
Figure 10: Power supply board
The power supply boar
board can be fitted to the unit. This is specified at the time of order and depends on the magnitude of the supply
voltage that will be connected to it.
There are three board types, which support the following voltage ranges:
● 24/54 V DC
● 48/125 V DC or 40-100V AC
● 110/250 V DC or 100-240V AC
The power supply board connector plugs into a medium duty terminal block. This terminal block is always
positioned on the right hand side of the unit looking from the rear.
The power supply board is usually assembled together with a relay output board to form a complete subassembly,
as shown in the following diagram.
d provides power to the unit. One of three different configurations of the power supply
P14xEd1-TM-EN-1 41
Chapter 3 - Hardware Design P14x
Figure 11: Power supply assembly
The power supply outputs are used to provide isolated power supply rails to the various modules within the unit.
Three voltage levels are used by the unit’s modules:
● 5.1 V for all of the digital circuits
● +/- 16 V for the analogue electronics such as on the input board
● 22 V for driving the output relay coils.
All power supply voltages, including the 0 V earth line, are distributed around the unit by the 64-way ribbon cable.
The power supply board incorporates inrush current limiting. This limits the peak inrush current to approximately
10 A.
Power is applied to pins 1 and 2 of the terminal block, where pin 1 is negative and pin 2 is positive. The pin
numbers are clearly marked on the terminal block as shown in the following diagram.
42 P14xEd1-TM-EN-1
P14x Chapter 3 - Hardware Design
Figure 12: Power supply terminals
6.4.1 WATCHDOG
The Watchdog contacts are also hosted on the power supply board. The Watchdog facility provides two output
r
elay contacts, one normally open and one normally closed. These are used to indicate the health of the device
e driven by the main processor board, which continually monitors the hardware and software when the
and ar
device is in service.
P14xEd1-TM-EN-1 43
Chapter 3 - Hardware Design P14x
Figure 13: Watchdog contact terminals
6.4.2 REAR SERIAL PORT
The rear serial port (RP1) is housed on the power supply board. This is a three-terminal EIA(RS)485 serial
communications por
SCADA communication. The interface supports half-duplex communication and provides optical isolation for the
serial data being transmitted and received.
The physical connectivity is achieved using three screw terminals; two for the signal connection, and the third for
the earth shield of the cable. These are located on pins 16, 17 and 18 of the power supply terminal block, which is
on the far right looking from the rear. The interface can be selected between RS485 and K-bus. When the K-Bus
option is selected, the two signal connections are not polarity conscious.
The polarity independent K-bus can only be used for the Courier data protocol. The polarity conscious MODBUS,
IEC 60870-5-103 and DNP3.0 protocols need RS485.
The following diagram shows the rear serial port. The pin assignments are as follows:
● Pin 16: Earth shield
● Pin 17: Negative signal
● Pin 18: Positive signal
t and is intended for use with a permanently wir
ed connection to a remote control centre for
44 P14xEd1-TM-EN-1
P14x Chapter 3 - Hardware Design
Figure 14: Rear serial port terminals
An additional serial port with D-type pr
esentation is available as an optional board, if required.
6.5 INPUT MODULE - 1 TRANSFORMER BOARD
Figure 15: Input module - 1 transformer board
The input module consists of the main input board coupled together with an instr
instrument transformer board contains the voltage and current transformers, which isolate and scale the
analogue input signals delivered by the system transformers. The input board contains the A/D conversion and
digital processing circuitry, as well as eight digital isolated inputs (opto-inputs).
The boards are connected together physically and electrically. The module is encased in a metal housing for
shielding against electromagnetic interference.
P14xEd1-TM-EN-1 45
ument transformer board. The
V00239
Transformer
bo
ard
Serial
in
terface
Serial Link
Optical
Is
olator
Noise
fi
lter
Optical
Is
olator
Noise
fi
lter
Buffer
8 digital inputs
Parallel Bus
VT
or
C
T
A/D Converter
VT
or
C
T
Chapter 3 - Hardware Design P14x
6.5.1 INPUT MODULE CIRCUIT DESCRIPTION
Figure 16: Input module schematic
A/D Conver
The differential analogue inputs from the CT and VT transformers are presented to the main input board as shown.
Each differential input is first converted to a single input quantity referenced to the input board’s earth potential.
sion
The analogue inputs are sampled and converted to digital, then filtered to remove unwanted properties. The
samples are then passed through a serial interface module which outputs data on the serial sample data bus.
The calibration coefficients are stored in non-volatile memory. These are used by the processor board to correct
for any amplitude or phase errors introduced by the transformers and analogue circuitry.
Opto-isolated inputs
The other function of the input board is to read in the state of the digital inputs. As with the analogue inputs, the
digital inputs must be electrically isolated from the power system. This is achieved by means of the 8 on-board
optical isolators for connection of up to 8 digital signals. The digital signals are passed through an optional noise
filter before being buffered and presented to the unit’s processing boards in the form of a parallel data bus.
This selectable filtering allows the use of a pre-set filter of ½ cycle which renders the input immune to induced
power-system noise on the wiring. Although this method is secure it can be slow, particularly for inter-tripping. This
can be improved by switching off the ½ cycle filter, in which case one of the following methods to reduce ac noise
should be considered.
● Use double pole switching on the input
● Use screened twisted cable on the input circuit
46 P14xEd1-TM-EN-1
P14x Chapter 3 - Hardware Design
The opto-isolated logic inputs can be configured for the nominal battery voltage of the circuit for which they are a
, allowing different voltages for different circuits such as signalling and tripping.
part
Note:
The opto-input circuitry can be provided without the A/D circuitry as a separate board, which can provide supplementary
opto-inputs.
6.5.2 TRANSFORMER BOARD
Figure 17: Transformer board
The transformer board hosts the curr
ent and voltage transformers. These are used to step down the currents and
voltages originating from the power systems' current and voltage transformers to levels that can be used by the
devices' electronic circuitry. In addition to this, the on-board CT and VT transformers provide electrical isolation
between the unit and the power system.
The transformer board is connected physically and electrically to the input board to form a complete input module.
For terminal connections, please refer to the wiring diagrams.
P14xEd1-TM-EN-1 47
Chapter 3 - Hardware Design P14x
6.5.3 INPUT BOARD
Figure 18: Input board
The input board is used to conv
ert the analogue signals delivered by the current and voltage transformers into
digital quantities used by the IED. This input board also has on-board opto-input circuitry, providing eight opticallyisolated digital inputs and associated noise filtering and buffering. These opto-inputs are presented to the user by
means of a MD terminal block, which sits adjacent to the analogue inputs HD terminal block.
The input board is connected physically and electrically to the transformer board to form a complete input module.
The terminal numbers of the opto-inputs are as follows:
Terminal Number Opto-input
Terminal 1 Opto 1 -ve
Terminal 2 Opto 1 +ve
Terminal 3 Opto 2 -ve
Terminal 4 Opto 2 +ve
Terminal 5 Opto 3 -ve
Terminal 6 Opto 3 +ve
Terminal 7 Opto 4 -ve
Terminal 8 Opto 4 +ve
Terminal 9 Opto 5 -ve
Terminal 10 Opto 5 +ve
Terminal 11 Opto 6 -ve
Terminal 12 Opto 6 +ve
Terminal 13 Opto 7 –ve
Terminal 14 Opto 7 +ve
Terminal 15 Opto 8 –ve
Terminal 16 Opto 8 +ve
48 P14xEd1-TM-EN-1
P14x Chapter 3 - Hardware Design
Terminal Number Opto-input
Terminal 17 Common
Terminal 18 Common
6.6 STANDARD OUTPUT RELAY BOARD
Figure 19: Standard output relay board - 8 contacts
This output relay boar
d has 8 relays with 6 Normally Open contacts and 2 Changeover contacts.
The output relay board is provided together with the power supply board as a complete assembly, or
independently for the purposes of relay output expansion.
There are two cut-out locations in the board. These can be removed to allow power supply components to
protrude when coupling the output relay board to the power supply board. If the output relay board is to be used
independently, these cut-out locations remain intact.
The terminal numbers are as follows:
Terminal Number Output Relay
Terminal 1 Relay 1 NO
Terminal 2 Relay 1 NO
Terminal 3 Relay 2 NO
Terminal 4 Relay 2 NO
Terminal 5 Relay 3 NO
Terminal 6 Relay 3 NO
Terminal 7 Relay 4 NO
Terminal 8 Relay 4 NO
Terminal 9 Relay 5 NO
Terminal 10 Relay 5 NO
P14xEd1-TM-EN-1 49
Chapter 3 - Hardware Design P14x
Terminal Number Output Relay
Terminal 11 Relay 6 NO
Terminal 12 Relay 6 NO
Terminal 13 Relay 7 changeover
Terminal 14 Relay 7 changeover
Terminal 15 Relay 7 common
Terminal 16 Relay 8 changeover
Terminal 17 Relay 8 changeover
Terminal 18 Relay 8 common
6.7 IRIG-B BOARD
Figure 20: IRIG-B board
The IRIG-B board can be fitted to pr
ovide an accurate timing reference for the device. The IRIG-B signal is
connected to the board via a BNC connector. The timing information is used to synchronise the IED's internal realtime clock to an accuracy of 1 ms. The internal clock is then used for time tagging events, fault, maintenance and
disturbance records.
IRIG-B interface is available in modulated or demodulated formats.
The IRIG-B facility is provided in combination with other functionality on a number of additional boards, such as:
● Fibre board with IRIG-B
● Second rear communications board with IRIG-B
● Ethernet board with IRIG-B
● Redundant Ethernet board with IRIG-B
There are two types of each of these boards; one type which accepts a modulated IRIG-B input and one type
which accepts a demodulated IRIG-B input.
50 P14xEd1-TM-EN-1
P14x Chapter 3 - Hardware Design
6.8 FIBRE OPTIC BOARD
Figure 21: Fibre optic board
This board pr
compatible protocols (Courier, IEC 60870-5-103, MODBUS and DNP 3.0). It is a fibre-optic alternative to the metallic
RS485 port presented on the power supply terminal block. The metallic and fibre optic ports are mutually exclusive.
The fibre optic port uses BFOC 2.5 ST connectors.
The board comes in two varieties; one with an IRIG-B input and one without:
ovides an interface for communicating with a master station. This communication link can use all
P14xEd1-TM-EN-1 51
Chapter 3 - Hardware Design P14x
6.9 REAR COMMUNICATION BOARD
Figure 22: Rear communication board
The optional communications board containing the secondar
presented on 9 pin D-type connectors. These interfaces are known as SK4 and SK5. Both connectors are female
connectors, but are configured as DTE ports. This means pin 2 is used to transmit information and pin 3 to receive.
SK4 can be used with RS232, RS485 and K-bus. SK5 can only be used with RS232 and is used for electrical
teleprotection. The optional rear communications board and IRIG-B board are mutually exclusive since they use
the same hardware slot. However, the board comes in two varieties; one with an IRIG-B input and one without.
y communication ports provide two serial interfaces
6.10 ETHERNET BOARD
Figure 23: Ethernet board
52 P14xEd1-TM-EN-1
P14x Chapter 3 - Hardware Design
This is a communications board that provides a standard 100-Base Ethernet interface. This board supports one
electrical copper connection and one fibre-pair connection.
e are several variants for this board as follows:
Ther
● 100 Mbps Ethernet board
● 100 Mbps Ethernet with on-board modulated IRIG-B input
● 100 Mbps Ethernet with on-board unmodulated IRIG-B input
Two of the variants provide an IRIG-B interface. IRIG-B provides a timing reference for the unit – one board for
modulated IRIG-B and one for demodulated. The IRIG B signal is connected to the board with a BNC connector.
The Ethernet and other connection details are described below:
IRIG-B Connector
● Centre connection: Signal
● Outer connection: Earth
LEDs
LED Function On Off Flashing
Green Link Link ok Link broken
Yellow Activity Traffic
Optical Fibre Connectors
Connector Function
Rx Receive
Tx Transmit
RJ45connector
Pin Signal name Signal definition
1 TXP Transmit (positive)
2 TXN Transmit (negative)
3 RXP Receive (positive)
4 - Not used
5 - Not used
6 RXN Receive (negative)
7 - Not used
8 - Not used
P14xEd1-TM-EN-1 53
IRIG-B
Pin3
Link Fail
connector
Pin 2
Pin
1
Link channel
A
(green LED)
Activity channel
A (yellow LED)
Link channel B
(green LED)
Activity channel B
(yellow LED)
A
B
C
D
V01009
Chapter 3 - Hardware Design P14x
6.11 REDUNDANT ETHERNET BOARD
Figure 24: Redundant Ethernet board
This board pr
ovides dual redundant Ethernet (supported by two fibre pairs) together with an IRIG-B interface for
timing.
Different board variants are available, depending on the redundancy protocol and the type of IRIG-B signal
(unmodulated or modulated). The available redundancy protocols are:
● SHP (Self healing Protocol)
● RSTP (Rapid Spanning Tree Protocol)
● DHP (Dual Homing Protocol)
● PRP (Parallel Redundancy Protocol)
● HSR (High-availability Seamless Redundancy)
There are several variants for this board as follows:
● 100 Mbps redundant Ethernet running RSTP, with on-board modulated IRIG-B
● 100 Mbps redundant Ethernet running RSTP, with on-board unmodulated IRIG-B
● 100 Mbps redundant Ethernet running SHP, with on-board modulated IRIG-B
● 100 Mbps redundant Ethernet running SHP, with on-board unmodulated IRIG-B
● 100 Mbps redundant Ethernet running DHP, with on-board modulated IRIG-B
● 100 Mbps redundant Ethernet running DHP, with on-board unmodulated IRIG-B
● 100 Mbps redundant Ethernet running PRP, with on-board modulated IRIG-B
● 100 Mbps redundant Ethernet running PRP, with on-board demodulated IRIG-B
● 100 Mbps redundant Ethernet running HSR, with on-board modulated IRIG-B
● 100 Mbps redundant Ethernet running HSR, with on-board demodulated IRIG-B
The Ethernet and other connection details are described below:
54 P14xEd1-TM-EN-1
P14x Chapter 3 - Hardware Design
IRIG-B Connector
● Centre connection: Signal
● Outer connection: Ear
th
Link Fail Connector (Ethernet Board Watchdog Relay)
Pin Closed Open
1-2 Link fail Channel 1 (A) Link ok Channel 1 (A)
2-3 Link fail Channel 2 (B) Link ok Channel 2 (B)
LEDs
LED Function On Off Flashing
Green Link Link ok Link broken
Yellow Activity SHP running PRP, RSTP or DHP traffic
Optical Fibre Connectors (ST)
Connector DHP RSTP SHP PRP
A RXA RX1 RS RXA
B TXA TX1 ES TXA
C RXB RX2 RP RXB
D TXB TX2 EP TXB
RJ45connector
Pin Signal name Signal definition
1 TXP Transmit (positive)
2 TXN Transmit (negative)
3 RXP Receive (positive)
4 - Not used
5 - Not used
6 RXN Receive (negative)
7 - Not used
8 - Not used
P14xEd1-TM-EN-1 55
Chapter 3 - Hardware Design P14x
56 P14xEd1-TM-EN-1
CHAPTER 4
SOFTWARE DESIGN
Chapter 4 - Software Design P14x
58 P14xEd1-TM-EN-1
P14x Chapter 4 - Software Design
1 CHAPTER OVERVIEW
This chapter describes the software design of the IED.
This chapter contains the following sections:
Chapter Overview 59
are Design Overview 60
Sofw
System Level Software 61
Platform Software 63
Protection and Control Functions 64
P14xEd1-TM-EN-1 59
V00300
R
e
c
o
r
d
s
P
r
o
t
e
c
t
i
o
n
a
n
d
c
o
n
t
r
o
l
s
e
t
t
i
n
g
s
Protection and Control Software Layer
Fault locator
task
Disturbance
recorder task
Sampling function
Control of output contacts
and programmable LEDs
Sample data + digital
logic inputs
System Level Software Layer
System services (e.g. device drivers) / Real time operating system / Self-diagnostic software
Control of interfaces to keypad , LCD, LEDs,
front & rear ports.
Self-checking maintenance records
Hardware Device Layer
LEDs / LCD / Keypad / Memory / FPGA
Protection Task
Programmable &
fixed scheme logic
Fourier signal
processing
Protection
algorithms
Supervisor task
Platform Software Layer
Event, fault,
disturbance,
maintenance record
logging
Remote
communications
interfaces
Front panel
interface
(LCD + Keypad)
Local
communications
interfaces
Settings database
Chapter 4 - Software Design P14x
2 SOFWARE DESIGN OVERVIEW
The device software can be conceptually categorized into several elements as follows:
● The system level softw
are
● The platform software
● The protection and control software
These elements are not distinguishable to the user, and the distinction is made purely for the purposes of
explanation. The following figure shows the software architecture.
Figure 25: Software Architecture
The softw
above. Each function is further broken down into a number of separate tasks. These tasks are then run according
to a scheduler. They are run at either a fixed rate or they are event driven. The tasks communicate with each other
as and when required.
ar
e, which executes on the main processor, can be divided into a number of functions as illustrated
60 P14xEd1-TM-EN-1
P14x Chapter 4 - Software Design
3 SYSTEM LEVEL SOFTWARE
3.1 REAL TIME OPERATING SYSTEM
The real-time operating system is used to schedule the processing of the various tasks. This ensures that they are
processed in the time av
controlling the communication between the software tasks, through the use of operating system messages.
3.2 SYSTEM SERVICES SOFTWARE
The system services software provides the layer between the hardware and the higher-level functionality of the
platform softwar
drivers for items such as the LCD display, the keypad and the remote communication ports. It also controls things
like the booting of the processor and the downloading of the processor code into RAM at startup.
e and the protection and control software. For example, the system services software provides
3.3 SELF-DIAGNOSTIC SOFTWARE
The device includes several self-monitoring functions to check the operation of its hardware and software while in
vice. If ther
ser
attempt to resolve the problem by performing a reboot. In this case, the device would be out of service for a short
time, during which the ‘Healthy’ LED on the front of the device is switched OFF and the watchdog contact at the
rear is ON. If the restart fails to resolve the problem, the unit takes itself permanently out of service; the ‘Healthy’
LED stays OFF and watchdog contact stays ON.
e is a problem with the hardware or software, it should be able to detect and report the problem, and
ailable and in the desired order of priority. The operating system also plays a part in
If a problem is detected by the self-monitoring functions, the device attempts to store a maintenance record to
allow the nature of the problem to be communicated to the user.
The self-monitoring is implemented in two stages: firstly a thorough diagnostic check which is performed on bootup, and secondly a continuous self-checking operation, which checks the operation of the critical functions whilst
it is in service.
3.4 STARTUP SELF-TESTING
The self-testing takes a few seconds to complete, during which time the IED's measurement, recording, control,
and protection f
of the unit is switched on. If a problem is detected during the start-up testing, the device remains out of service
until it is manually restored to working order.
The operations that are performed at start-up are:
1. System boot
2. System software initialisation
3. Platform software initialisation and monitoring
3.4.1 SYSTEM BOOT
The integrity of the Flash memory is verified using a checksum before the program code and stored data is loaded
into R
AM for execution by the pr
to that held in the Flash memory to ensure that no errors have occurred in the data transfer and that the two are
the same. The entry point of the software code in RAM is then called. This is the IED's initialisation code.
unctions are unavailable. On a successful start-up and self-test, the ‘health-state’ LED on the front
ocessor. When the loading has been completed, the data held in RAM is compared
P14xEd1-TM-EN-1 61
Chapter 4 - Software Design P14x
3.4.2 SYSTEM LEVEL SOFTWARE INITIALISATION
The initialization process initializes the processor registers and interrupts, starts the watchdog timers (used by the
har
are to determine whether the software is still running), starts the real-time operating system and creates
dw
and starts the supervisor task. In the initialization process the device checks the following:
● The status of the backup battery
● The integrity of the battery-backed SRAM that is used to store event, fault and disturbance records
● The operation of the LCD controller
● The watchdog operation
At the conclusion of the initialization software the supervisor task begins the process of starting the platform
software.
3.4.3 PLATFORM SOFTWARE INITIALISATION AND MONITORING
When starting the platform software, the IED checks the following:
● The integrity of the data held in non-v
● The operation of the real-time clock
● The optional IRIG-B function (if applicable)
● The presence and condition of the input board
● The analog data acquisition system (it does this by sampling the reference voltage)
At the successful conclusion of all of these tests the unit is entered into service and the application software is
started up.
olatile memor
y (using a checksum)
3.5 CONTINUOUS SELF-TESTING
When the IED is in service, it continually checks the operation of the critical parts of its hardware and software. The
checking is carried out by the system ser
functions that are checked are as follows:
● The Flash memory containing all program code and language text is verified by a checksum.
● The code and constant data held in system memory is checked against the corresponding data in Flash
memory to check for data corruption.
● The system memory containing all data other than the code and constant data is verified with a checksum.
● The integrity of the digital signal I/O data from the opto-inputs and the output relay coils is checked by the
data acquisition function every time it is executed.
● The operation of the analog data acquisition system is continuously checked by the acquisition function
every time it is executed. This is done by sampling the reference voltages.
● The operation of the optional Ethernet board is checked by the software on the main processor card. If the
Ethernet board fails to respond an alarm is raised and the card is reset in an attempt to resolve the problem.
● The operation of the optional IRIG-B function is checked by the software that reads the time and date from
the board.
In the event that one of the checks detects an error in any of the subsystems, the platform software is notified and
it attempts to log a maintenance record.
vices software and the results are reported to the platform software. The
If the problem is with the battery status or the IRIG-B board, the device continues in operation. For problems
detected in any other area, the device initiates a shutdown and re-boot, resulting in a period of up to 10 seconds
when the functionality is unavailable.
A restart should clear most problems that may occur. If, however, the diagnostic self-check detects the same
problem that caused the IED to restart, it is clear that the restart has not cleared the problem, and the device takes
itself permanently out of service. This is indicated by the ‘’health-state’ LED on the front of the device, which
switches OFF, and the watchdog contact which switches ON.
62 P14xEd1-TM-EN-1
P14x Chapter 4 - Software Design
4 PLATFORM SOFTWARE
The platform software has three main functions:
● To contr
maintenance records
● To store and maintain a database of all of the settings in non-volatile memory
● To provide the internal interface between the settings database and the user interfaces, using the front
panel interface and the front and rear communication ports
ol the logging of records generated by the protection software, including alarms, events, faults, and
4.1 RECORD LOGGING
The logging function is used to store all alarms, events, faults and maintenance records. The records are stored in
non-volatile memor
out basis (FIFO). These are:
● Alarms
● Event records
● Fault records
● Maintenance records
The logs are maintained such that the oldest record is overwritten with the newest record. The logging function
can be initiated from the protection software. The platform software is responsible for logging a maintenance
record in the event of an IED failure. This includes errors that have been detected by the platform software itself or
errors that are detected by either the system services or the protection software function. See the Monitoring and
Control chapter for further details on record logging.
y to provide a log of what has happened. The IED maintains four types of log on a first in first
4.2 SETTINGS DATABASE
The settings database contains all the settings and data, which are stored in non-volatile memory. The platform
softwar
one time. This is a necessary restriction to avoid conflict between different parts of the software during a setting
change.
Changes to protection settings and disturbance recorder settings, are first written to a temporary location SRAM
memory. This is sometimes called 'Scratchpad' memory. These settings are not written into non-volatile memory
immediately. This is because a batch of such changes should not be activated one by one, but as part of a
complete scheme. Once the complete scheme has been stored in SRAM, the batch of settings can be committed to
the non-volatile memory where they will become active.
e manages the settings database and ensures that only one user interface can modify the settings at any
4.3 INTERFACES
The settings and measurements database must be accessible from all of the interfaces to allow read and modify
ar
operations. The platform softw
display, keypad and all the communications interfaces).
e presents the data in the appropriate format for each of the interfaces (LCD
P14xEd1-TM-EN-1 63
Chapter 4 - Software Design P14x
5 PROTECTION AND CONTROL FUNCTIONS
The protection and control software processes all of the protection elements and measurement functions. To
achieve this it has to communicate with the system ser
own operations.
The protection task software has the highest priority of any of the software tasks in the main processor board. This
ensures the fastest possible protection response.
The protection and control software provides a supervisory task, which controls the start-up of the task and deals
with the exchange of messages between the task and the platform software.
5.1 ACQUISITION OF SAMPLES
After initialization, the protection and control task waits until there are enough samples to process. The acquisition
of samples on the main processor boar
services software.
This sampling function takes samples from the input module and stores them in a two-cycle FIFO buffer. The
sample rate is 24 samples per cycle. This results in a nominal sample rate of 1,200 samples per second for a 50 Hz
system and 1,440 samples per second for a 60 Hz system. However the sample rate is not fixed. It tracks the
power system frequency as described in the next section.
d is controlled by a ‘sampling function’ which is called by the system
vices software, the platform software as well as organise its
5.2 FREQUENCY TRACKING
The device provides a frequency tracking algorithm so that there are always 24 samples per cycle irrespective of
frequency drift within a cer
range, the sample rate reverts to its default rate of 1200 Hz for 50 Hz or 1440 Hz for 60 Hz.
The frequency tracking of the analog input signals is achieved by a recursive Fourier algorithm which is applied to
one of the input signals. It works by detecting a change in the signal’s measured phase angle. The calculated value
of the frequency is used to modify the sample rate being used by the input module, in order to achieve a constant
sample rate per cycle of the power waveform. The value of the tracked frequency is also stored for use by the
protection and control task.
The frequency tracks off any voltage or current in the order VA, VB, VC, IA, IB, IC, down to 10%Vn for voltage and
5%In for current.
tain frequency range (see technical specifications). If the frequency falls outside this
5.3 DIRECT USE OF SAMPLE VALUES
Most of the IED’s protection functionality uses the Fourier components calculated by the device’s signal processing
ar
softw
the sampled values directly.
The disturbance recorder also uses the samples from the input module, in an unprocessed form. This is for
waveform recording and the calculation of true RMS values of current, voltage and power for metering purposes.
In the case of special protection algorithms, using the sampled values directly provides exceptionally fast response
because you do not have to wait for the signal processing task to calculate the fundamental. You can act on the
sampled values immediately.
e. However RMS measurements and some special protection algorithms available in some products use
5.4 FOURIER SIGNAL PROCESSING
When the protection and control task is re-started by the sampling function, it calculates the Fourier components
for the analog signals. Although some protection algorithms use some Fourier
harmonic for magnetizing inrush), most protection functions are based on the Fourier-derived fundamental
components of the measured analog signals. The Fourier components of the input current and voltage signals are
stored in memory so that they can be accessed by all of the protection elements’ algorithms.
64 P14xEd1-TM-EN-1
-derived harmonics (e.g. second
Ideal anti-alias filter response
Real anti-alias filter
response
2 3 4
1
0.2
0.4
0.6
0.8
5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 241
50 Hz 600 Hz
1200 Hz
V00301
Fourier response without
anti-alias filter
Fourier response with
anti-alias filter
Alias frequency
P14x Chapter 4 - Software Design
The Fourier components are calculated using single-cycle Fourier algorithm. This Fourier algorithm always uses
the most recent 24 samples fr
om the 2-cycle buffer.
Most protection algorithms use the fundamental component. In this case, the Fourier algorithm extracts the power
frequency fundamental component from the signal to produce its magnitude and phase angle. This can be
represented in either polar format or rectangular format, depending on the functions and algorithms using it.
The Fourier function acts as a filter, with zero gain at DC and unity gain at the fundamental, but with good
harmonic rejection for all harmonic frequencies up to the nyquist frequency. Frequencies beyond this nyquist
frequency are known as alias frequencies, which are introduced when the sampling frequency becomes less than
twice the frequency component being sampled. However, the Alias frequencies are significantly attenuated by an
anti-aliasing filter (low pass filter), which acts on the analog signals before they are sampled. The ideal cut-off point
of an anti-aliasing low pass filter would be set at:
´
(samples per cycle)
(fundamental frequency)/2
At 24 samples per cycle, this would be nominally 600 Hz for a 50 Hz system, or 720 Hz for a 60 Hz system.
The following figure shows the nominal frequency response of the anti-alias filter and the Fourier filter for a 24-
sample single cycle fourier algorithm acting on the fundamental component:
Figure 26: Frequency Response (indicative only)
5.5 PROGRAMMABLE SCHEME LOGIC
The purpose of the programmable scheme logic (PSL) is to allow you to configure your own protection schemes to
suit your par
flexibility, different PSL is allowed for each of the four setting groups.
The input to the PSL is any combination of the status of the digital input signals from the opto-isolators on the
input board, the outputs of the protection elements such as protection starts and trips, and the outputs of the fixed
protection scheme logic (FSL). The fixed scheme logic provides the standard protection schemes. The PSL consists
of software logic gates and timers. The logic gates can be programmed to perform a range of different logic
functions and can accept any number of inputs. The timers are used either to create a programmable delay,
and/or to condition the logic outputs, such as to create a pulse of fixed duration on the output regardless of the
length of the pulse on the input. The outputs of the PSL are the LEDs on the front panel of the relay and the output
contacts at the rear.
The execution of the PSL logic is event driven. The logic is processed whenever any of its inputs change, for
example as a result of a change in one of the digital input signals or a trip output from a protection element. Also,
only the part of the PSL logic that is affected by the particular input change that has occurred is processed. This
reduces the amount of processing time that is used by the PSL. The protection & control software updates the logic
delay timers and checks for a change in the PSL input signals every time it runs.
ticular application. This is done with programmable logic gates and delay timers. To allow greater
P14xEd1-TM-EN-1 65
Chapter 4 - Software Design P14x
The PSL can be configured to create very complex schemes. Because of this PSL desing is achieved by means of a
PC suppor
Agile, or as a standalone software module.
t package called the PSL Editor. This is available as part of the settings application software MiCOm S1
5.6 EVENT RECORDING
A change in any digital input signal or protection element output signal is used to indicate that an event has taken
place. When this happens, the protection and contr
an event is available to be processed and writes the event data to a fast buffer controlled by the supervisor task.
When the supervisor task receives an event record, it instructs the platform software to create the appropriate log
in non-volatile memory (battery backed-up SRAM). The operation of the record logging to battery backed-up SRAM
is slower than the supervisor buffer. This means that the protection software is not delayed waiting for the records
to be logged by the platform software. However, in the rare case when a large number of records to be logged are
created in a short period of time, it is possible that some will be lost, if the supervisor buffer is full before the
platform software is able to create a new log in battery backed-up SRAM. If this occurs then an event is logged to
indicate this loss of information.
Maintenance records are created in a similar manner, with the supervisor task instructing the platform software to
log a record when it receives a maintenance record message. However, it is possible that a maintenance record
may be triggered by a fatal error in the relay in which case it may not be possible to successfully store a
maintenance record, depending on the nature of the problem.
ol task sends a message to the supervisor task to indicate that
For more information, see the Monitoring and Control chapter.
5.7 DISTURBANCE RECORDER
The disturbance recorder operates as a separate task from the protection and control task. It can record the
wav
eforms of the calibrated analog channels, plus the values of the digital signals. The recording time is user
selectable up to a maximum of 10.5 seconds. The disturbance recorder is supplied with data by the protection and
control task once per cycle, and collates the received data into the required length disturbance record. The
disturbance records can be extracted using application software or the SCADA system, which can also store the
data in COMTRADE format, allowing the use of other packages to view the recorded data.
For more information, see the Monitoring and Control chapter.
5.8 FAULT LOCATOR
The fault locator uses 12 cycles of the analog input signals to calculate the fault location. The result is returned to
the protection and contr
presented in the fault record. When the fault record is complete, including the fault location, the protection and
control task sends a message to the supervisor task to log the fault record.
The Fault Locator is not available on all models.
ol task, which includes it in the fault record. The pre-fault and post-fault voltages are also
5.9 FUNCTION KEY INTERFACE
The function keys interface directly into the PSL as digital input signals. A change of state is only recognized when
ey pr
a k
whether the function key press is executed at the start or the end of a protection task cycle, with the additional
hardware and software scan time included. A function key press can provide a latched (toggled mode) or output
on key press only (normal mode) depending on how it is programmed. It can be configured to individual protection
scheme requirements. The latched state signal for each function key is written to non-volatile memory and read
from non-volatile memory during relay power up thus allowing the function key state to be reinstated after powerup, should power be inadvertently lost.
ess is executed on average for longer than 200 ms. The time to register a change of state depends on
66 P14xEd1-TM-EN-1
CHAPTER 5
CONFIGURATION
Chapter 5 - Configuration P14x
68 P14xEd1-TM-EN-1
P14x Chapter 5 - Configuration
1 CHAPTER OVERVIEW
Each product has different configuration parameters according to the functions it has been designed to perform.
There is, how
Some of the communications setup can only be carried out using the HMI, and cannot be carried out using
settings applications software. This chapter includes concise instructions of how to configure the device,
particularly with respect to the communications setup, as well as a description of the common methodology used
to configure the device in general.
This chapter contains the following sections:
Chapter Overview 69
Settings Application Software 70
Using the HMI Panel 71
Date and Time Configuration 81
Settings Group Selection 84
ever, a common methodology used across the entire product series to set these parameters.
P14xEd1-TM-EN-1 69
Chapter 5 - Configuration P14x
2 SETTINGS APPLICATION SOFTWARE
To configure this device you will need to use the Settings Application Software. The settings application software
used in this range of IEDs is called MiCOM S1 Agile. It is a collection of softw
and managing the IEDs.
Although you can change many settings using the front panel HMI, some of the features cannot be configured
without the Settings Application Software; for example the programmable scheme logic, or IEC61850
communications.
If you do not already have a copy of the Settings Application Software, you can obtain it from General Electric
contact centre.
To configure your product, you will need a data model that matches your product. When you launch the Settings
Application Software, you will be presented with a panel that allows you to invoke the “Data Model Manager”. This
will close the other aspects of the software in order to allow an efficient import of the chosen data model. If you
don’t have, or can’t find, the data model relating to your product, please call the General Electric contact centre.
When you have loaded all the data models you need, you should restart the Settings Application Software and
start to create a model of your system using the “System Explorer” panel.
The software is designed to be intuitive, but help is available in an online help system and also the Settings
Application Software user guide P40-M&CR-SAS-UG-EN-n, where 'Language' is a 2 letter code designating the
language version of the user guide and 'n' is the latest version of the settings application software.
are tools, which is used for setting up
70 P14xEd1-TM-EN-1
P14x Chapter 5 - Configuration
3 USING THE HMI PANEL
Using the HMI, you can:
● Display and modify settings
● View the digital I/O signal status
● Display measur
● Display fault records
● Reset fault and alarm indications
The keypad provides full access to the device functionality using a range of menu options. The information is
displayed on the LCD.
Keys Description Function
ements
Up and down cursor keys
Left and right cursor keys
ENTER key For changing and executing settings
Hotkeys
To change the menu level or change between settings in a
particular column, or changing v
To change default display, change between column
headings, or changing values within a cell
For executing commands and settings for which shortcuts
have been defined
alues within a cell
Cancel key To return to column header from any menu cell
Read key To read alarm messages
Function keys (not all models) For executing user programmable functions
P14xEd1-TM-EN-1 71
V00400
Alarm message
Column 00
System data
Last Column
Default display
op
tion
Default display
op
tion
Default display options
Subsequent column headings
Row 01
La
nguage
Row 01
Subsequent rows Subsequent rows
Vertical cursor keys move
between setting rows
Horizontal cursor
keys move
between values
within a cell
The Cancel key
returns to
column header
C
C
C
Chapter 5 - Configuration P14x
Note:
As the LCD display has a r
esolution of 16 characters by 3 lines, some of the information is in a condensed mnemonic form.
3.1 NAVIGATING THE HMI PANEL
The cursor keys are used to navigate the menus. These keys have an auto-repeat function if held down
continuously. This can be used to speed up both setting value changes and menu navigation. The longer the k
held pressed, the faster the rate of change or movement.
The navigation map below shows how to navigate the menu items.
ey is
Figure 27: Navigating the HMI
3.2 GETTING STARTED
When you first start the IED, it will go through its power up procedure. After a few seconds it will settle down into
one of the top level menus. Ther
● The Alarms menu for when there are alarms present
● The default display menu for when there are no alarms present.
72 P14xEd1-TM-EN-1
e are two menus at this level:
P14x Chapter 5 - Configuration
If there are alarms present, the yellow Alarms LED will be flashing and the menu display will read as follows:
Alarms / Faults
Present
HOTKEY
Even though the device itself should be in full working order when you first start it, an alarm could still be present,
for example, if there is no netw
read the alarm by pressing the 'Read' key.
If the device is fitted with an Ethernet card, you will first need to connect the device to an active Ethernet network
to clear the alarm and get the default display.
ork connection for a device fitted with a network card. If this is the case, you can
ALARMS
NIC Link Fail
If there ar
options.
e other alarms present, these must also be cleared before you can get into the default display menu
3.3 DEFAULT DISPLAY
The HMI contains a range of possible options that you can choose to be the default display. The options available
are:
C Compliant banner
NER
If the device is a cyber-security model, it will provide a NERC-compliant default display. If the device does not
contain the cyber-security option, this display option is not available.
ACCESS ONLY FOR
AUTHORISED USERS
HOTKEY
Date and time
For example:
11:09:15
23 Nov 2011
HOTKEY
Description (user-defined)
For example:
Description
MiCOM P14NB
HOTKEY
P14xEd1-TM-EN-1 73
NERC compliant
ba
nner
V00403
Access Level
System Current
M
e
asurements
System Frequency
System Voltage
Me
asurements
System Power
Me
asurements
Date & Time
Plant Reference
Description
NERC Compliance
Wa
rning
NERC Compliance
Wa
rning
Chapter 5 - Configuration P14x
Plant reference (user-defined)
For example:
Plant Reference
MiCOM
HOTKEY
Access Level
For example:
Access Level
3
HOTKEY
In addition to the above, there are also displays for the system voltages, currents, power and frequency etc.,
depending on the device model.
3.4 DEFAULT DISPLAY NAVIGATION
The following diagram is an example of the default display navigation. In this example, we have used a cybersecure model. This is an example only and may not apply in its entir
available depend on the exact model.
Use the horizontal cursor keys to step through from one display to the next.
ety to all models. The actual display options
Figure 28: Default display navigation
74 P14xEd1-TM-EN-1
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