Application Note
EMC Design Guide
F²MC-16LX Family
© Fujitsu Mikroelektronik GmbH, Microcontroller Application Group
History
10th Oct. 00 NFl V1.0 Initial draft
26th Apr. 01 NFl V1.1 Oscillator circuit added
23rd Aug. 01 NFl V1.2 Recommended layout, power supply routing added
27th Aug. 01 NFl V1.3 Layout rules added
18th Jul. 02 NFl V1.4 Description DeCap added
1
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2
Table of Contents:
1. Introduction 4
2. Rules to create a good Layout 4
3. Crystal Oscillator Circuit 5
4. Power supply routing 6
5. Noise reduction for general IO pins 9
6. Function of certain MCU pins 10
7. EMI Measurement for LX16-family 11
3
1. Introduction
In the following description, the EMC design guide of 16-bit Fujitsu microcontrollers will be
discussed. It describes how external power supply should be connected to the Vcc and Vss
pins and offers some suggestions. An overview of internal supply of MCU is made as well to
have a better understanding of the design. The EMI measurements in the following described
tests are just example measurements. The measured emissions are no data, which are
specified in the DS of the microcontroller series.
During the last designs the EMI of the Fujitsu 16LX microcontroller series could be reduced
step by step. The PLL multiplier circuit allows the usage of low crystal frequency to reduce
high-frequency noise from the oscillator circuit.
The clock tree is mostly the cause of the noise. Therefore the driver capability of clock
buffers is optimised and for one big buffer are used several small clock buffers.
Further countermeasures like using of the MCU flash and core on a base of 3.3V level
reduces the noise level of the package. For the PWM outputs it is possible to use the slew
rate control. This means that the rise and fall time can ease to reduce the harmonics.
The integration of On-chip bypass capacitors reduces the noise ripple on the internal power
supply net so that the broadband noise on the IO pins is improved.
The following description is based on the MB90F540 and 590 series, but the same situation
exists for all current series of the 16LX family, with or without an external bus interface.
2. Rules to create a good Layout
1. Use max. trace-width and min. length to connect VSS and VDD µC-pins to
decoupling capacitors (DeCap)
2. Don’t use stub line to connect the DeCap to µC-pins, let flows the noise current direct
through pads of DeCap
3. Use close ground plane direct below MCU package as shield
4. Use different ground systems for analogue, digital, power-driver and connector
ground
5. Avoid loop current in the ground system, check for ground loops.
6. Use a star point ground below MCU for analogue and digital ground, use a second
star point ground below 5V regulator for MCU, power-driver and connector ground
7. Don't create signal loop on the PCB, minimize trace length
8. Partitioned system into analogue, digital and power-driver section
9. Place series resistor or RC-block for the IO-circuit nearby MCU-pin to reduce the
noise on the signal line.
10. Use a capacitor for each connector pin to reduce the noise of external lines, place
this capacitor close to connector pin
4
3. Crystal Oscillator Circuit
Figure 1 shows the oscillator for the Fujitsu 16-bit family. For best performance, the PCB
layout of this circuit should cover only a very small area. For the layout is recommended a
PCB with two or more layers. Make sure to provide bypass capacitors via shortest distance
from X0, X1 pins, crystal oscillator, and ground lines. The lines of the oscillation circuit should
not cross lines of other circuits.
X1X0
Microcontroller
Oscillator
Figure 1: Principle of the Oscillator circuit
It is necessary to avoid coupling noise into the power supply (pin 81/84) of the clock circuit.
The crystal oscillator has to be connected with short lines to X0/X1 and Vss. Note that pin X1
is the output of inverter. Particularly this track should have a short length.
Decoupling capacitor CB on
the back side of the PCB
Via to system VccVia to ground island
VccVss
Single ground island
on the back side
Connection to
ground layer
B
C
X0 X1
Quartz
Crystal
Decoupling capacitor CB on
the back side of the PCB
VccVss
C2C1
Quartz Crystal package
Connection to
ground layer
has to be grounded
Via to ground island
on the back side
and system ground
CB
X0 X1
SMD
Quartz Crystal
C1 C2
Connection to
ground layer
a) Layout example for a leaded quartz crystal b) Layout example for a SMD quartz crystal
worse layout design, because C1 and C2 better layout design, because C1 and C2
are wrong connected to VSS are connected to Vss and than after with
the system ground
Figure 2: Layout example for oscillator circuit
5
4. Power supply routing
One topic our noise reduction technology is lowering internal power supply voltage on 3V
level to reduce the current flow. Fig. 2 shows the structure of 5V and 3V power supply.
I/O-PORT
FLASH
Vcc
Vcc3
3V Regulator
Vss
Vss
External capacitor
RAM
AVcc AVss
CPU
SCI / TIMER / etc.
A/D+D/A
Figure 3: Structure of power supply for MCU core and IO-Port
Only the right placement and the value of decoupling capacitor (DeCap) guaranty the
function of decoupling capacitors. The high speed current (di/dt) will be supported from
DeCap only. The exactly use of DeCap is important for the noise reduction on the PCB.
VCC
µC
DeCap
GND
a) VCC and GND lead to supply
noise current flows not via
DeCap, DeCap has not effect
DeCap DeCap
VCC
GND
µC
b) GND lead noise to system GND
noise current flows partly via
DeCap, DeCap has hardly effect
VCC
µC
GND
c) GND lead noise to System GND
noise current flows partly via
DeCap, DeCap has hardly effect
VCC
GND
µC
DeCap
VCC
GND
GND
µC
DeCap
VCC
µC
DeCap
GND
d) VCC and GND lead to supply
noise current flows not via
DeCap, DeCap has not effect
e) GND is not short connected to
DeCap. between GND and
DeCap flows a loop current
DeCap has hardly effect
f) DeCap correct connected to µC
and power supply.
high speed current will be
supported from DeCap
Figure 4: The exactly use of the DeCap (decoupling capacitor)
6
The high-speed current (di/dt) will be supported from the decoupling capacitor only.
Therefore use traces with max. width and min. length between Vss/Vcc pin and DeCap.
After DeCap use thin traces to route the trace to the power supply system.
use EMC filter for
µC-supply
short length
max. width
µC
VCC
GND
high Z low Z
C
Figure 5: The noise current flows return over the ground line
The exactly use of decoupling capacitors for the Vcc and Vss pins is the basis to reduce the
noise, but also the return way between load and MCU ground is not neglect.
high-Z
choking coil
I slow
C
min. length
max. width
VCC
VSS
I fast
dt/di
clock
unit
&
core
µC
IO-driver
min. length
max. width
HVCC
HVSS
low-Z
I supply
C
I returnI crossbar
R C
I load
Load
Figure 6: The noise current flows return over the ground line
To ensure an efficient decoupling of the power supply, two capacitors should be placed close
on each Vcc pin. The values of both capacitors should have a relationship of about 1:100.
Typical values are e.g. 100nF (XR7) and 1nF (COG). The accurate value is depended on the
application board, e.g. impedance of PCB or the length of supply lines. However, all of the
DeCaps on the PCB should have the same value.
VDD
Cboard
GND
DeCap C1
Figure 7: The use of several values of DeCaps lead to undefined resonance frequencies,
that’s why all DeCaps should have the same value.
Lboard Lboard
IC1 IC2 ICn
DeCap C2
DeCap Cn
A
f
7
For 2-layer boards should be used a closed ground plane (located directly below the MCU).
ground plane
The Vcc supplies should be taken from the bottom layer.
For 4-layer boards should be used the inside layers for GND and Vcc supplies. In this case,
both layers form additional capacitor (broadband behaviour) for the power supply.
Figure 8 shows an example of a star connection for Vcc supplies on the MCU.
This method of Vcc connection reduces the loop of the Vcc lines around the MCU, thus
reducing noise emission. A variation of this circuit may be needed, if separate filtered supply
voltages are routed to the A/D supplies (pin 34/37).
on top and
botton layer
X1
X0
ground plan
below package
on the top side
Decoupling capacitor CB on
the back side of the PCB
Decoupling capacitor CB on
the back side of the PCB
Connection to
power supply
Vss
Vcc
star point and noise
filter for
Vcc and ground
on the back side
CB
Via to MCU supply
CB
LB
CB
Vcc
Vss
Q
C
CB
C
C
Q
Via to ground island
HVss
CB
HVcc
HVss
Single ground island
on the back side
X0A
C
X1A
and system ground
Decoupling capacitor CB on
the back side of the PCB
CB
VCC3C
CB
CB
AVR+
AVR-
AVss
AVcc
Decoupling capacitor CB on
the back side of the PCB
CB CB
VSS
HVcc
HVss
Figure 8: 16LX family with a subclock or stepper motor driver,
recommended layout for multiple layers PCB
Note: All decoupling capacitors on the Vcc pins should have the same value.
These capacitors should be placed close to the Vcc pin. The Vcc/Vss current should flows
through the pad of the capacitor.
8
5. Noise reduction for general IO pins
To reduce noise, make sure to connect the Vss or Vcc with smoothed power supply,
because the noise on the power supply will also distributed via IO-pin, which is configured as
static low or high output. Figure 9 shows an example to reduce the noise on output lines.
µC
IO-Port
length of trace
Noise
µC
IO-Port
length of trace
Figure 9: Place the series resistor close to IO pin because so will be reduced the noise
of output
Note: To reduce noise, make sure to connect unused input pins to Vss or Vcc (Use pull-down
or pull-up resistor, please check the DS of the microcontroller series).
Also, especially if CMOS Logic is used, floating gates could generate problems regarding high
input currents and latch up.
9
6. Function of certain MCU pins
Pin name Pin no. Function
VCC
23
84
VSS
11
84
C 27 External smooth capacitor for internal 3.3V regulator
AVCC 34 Power supply for the A/D converter
AVSS 37 Power supply for the A/D converter
AVRL 35 Reference voltage input for the A/D converter
AVRH 36 Reference voltage input for the A/D converter
DVCC
HVCC
DVSS
HVSS
X0
X0A
X1
X1A
58
68
53
63
82
80
83
79
Main supply for IO buffer MCU core
close to input the internal 3.3V regulator
close to crystal oscillator
Main supply for IO buffer and MCU core
close to the internal 3.3V regulator
close to crystal oscillator
output, it is used for supply of the MCU core
Note, that this pin leads the most of noise
Power supply for the PWM (high current) outputs, it is not
connected to VCC,
should be connected to extra power supply
Power supply for the PWM (high current) outputs, it is not
connected to VSS,
should be connected to extra power supply
Oscillator input, if not used so shall be connected with
pull-up or pull-down resistor (see please DS)
Oscillator output, the crystal and bypass capacitor must
be connected via shortest distance with X1 pin,
if not used so shall be open
10
7. EMI Measurement for LX16-family
Schirmbox
Spectrum analyzer
0.1-1000MHz
RF probe
Vdd
Vss
10Ai
10Ai
+
Power supply
5V
-
IEEE
Workstation
RS232
Figure 10: Measuring setup
PLL CKSCR Remarks
16 MHz 0xBB default after reset
12 MHz 0xBA
8 MHz 0xB9
4 MHz 0xB8
2 MHz 0xDC PLL disabled
Table 1: CKSC- settings for several PLL frequencies
Port Function I/O-State
port x0 output high
port x1 output low
port x2 output 2 kHz toggling
port x3 input port x4 output high
port x5 output low
port x6 output 2 kHz toggling
port x7 input -
Table 2: I/O port settings for toggle test
Probe Pin Remarks
GND GND common ground
GND1 DVSS oscillator/ext. bus
GND2 VSS I/O-ground
GND3 AVSS analog ground
Table 3: Ground measurement with 1ohm probe
X-TEM
Filter
Ferrit
Filter
11
12
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