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Freescale Semiconductor, Inc.
3/1999
Rev 1.0
MPC8260 PowerQUICC II
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MPC8260-TCOM User’s Manual
MOTOROLA
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MPC8260TCOM User’s Manual PRELIMINARY
0•1 INTRODUCTION
This page provides unpacking instructions, hardware preparation, and installation instructions for the
MPC8260TCOM.
0•2 UNPACKING INSTRUCTIONS
If the shipping carton is damaged upon receipt,
request carrier’s agent be present during
unpacking and inspection of equipment.
Unpack equipment from shipping carton. Refer to packing list and verify that all items are present. Save
packing material for storing and reshipping of equipment.
Freescale Semiconductor, Inc.
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AVOID TOUCHING AREAS OF INTEGRATED
CIRCUITRY; STATIC DISCHARGE CAN
DAMAGE CIRCUITS.
NOTE
CAUTION
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PRELIMINARY MPC8260TCOM User’s Manual
Freescale Semiconductor, Inc.
GENERAL INFORMATION
CHAPTER 1 - GENERAL INFORMATION
1•1 INTRODUCTION
This manual provides general information, preparation for use and installation instructions, operating
instructions, functional description, and support information for the MPC8260TCOM board.
1•2 FEATURES
The main features of the MPC8260TCOM board are as follows:
• Two Fast Ethernet channels connected guilelessly to the Level One LXT970 device.
• The 2 Fast-Ethernet use FCC1 and FCC3.
• Each one of the Fast - Ethernet module can be disable/disable and controlled by SW.
• Two DS3 channels using the TRAN-SWITCH TXC-03401 FRAMER and TRAN-SWITCH TXC20153G DS3 Line Interface Module.
• Each one of the DS3 framer controlled via the MPC8260.
• The 2XDS3 use the TDMA1(DS3_1 FCC2) and TDMA2 (DS3_2 FCC3).
• Each one of the DS3 module can be disable/enable by HW.
• Eight T1 interfaces using MCC1 and MCC2.
• The 8 x T1 use the TOCTL PM4388 as a framer and 2 x PM4314 as a line interface module, both
controlled by the MPC8260.
• Each one of the eight T1 can be independently configured, monitor, isolated and controlled by
SW.
• The TOCTL (PM4388) is controlled by the MPC8260 via the address and data bus.
• The MPC8260TCOM board is powered and controlled by the MPC8260ADS via 2 x 128pin DIN
connectors.
1•3 SPECIFICATIONS
The MPC8260TCOM specifications are given in Table 1-1.
Table 1-1 MPC860SAR-PHY Specifications
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Power requirements (no other boards attached) +5Vdc @ 2 A (typical), 2.5 A (maximum)
Operating temperature 0 degrees to 30 degrees C ambient air temperature
Storage temperature -25 degrees to 85 degrees C
Relative humidity 5% to 90% (non-condensing)
Dimensions
Height
Depth
Thickness
CHARACTERISTICS SPECIFICATIONS
9.17 inches (233 mm)
6.3 inches (160 mm)
0.063 inches (1.6 mm)
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MPC8260TCOM User’s Manual PRELIMINARY
GENERAL INFORMATION
1•4 GENERAL DESCRIPTION
The MPC8260TCOM Board includes the following modules: 8 x T1/E1, 2 x Fast Ethernet, 2 x DS3.
The MPC8260ADS includes the following modules: ATM155 and Fast Ethernet.
Both MPC8260TCOM and MPC8260ADS implements the following network for H/W & S/W development
applications:
ATM155M (FCC1 on MPC8260ADS) + 8 x T1 (MCC1 & MCC2),
ATM155M (FCC1 on MPC8260ADS) + 2 x Fast Ethernet (FCC2 on MPC8260ADS, FCC3),
ATM155M (FCC1 on MPC8260ADS) + 2 x DS3 (TDMa1 to FCC2, TDMa2 to FCC3),
3 x Fast Ethernet (FCC2 on MPC8260ADS, FCC1, FCC3).
NOTE: Some modules share the same GPIO. Care must be taken when configuring each one of the
modules, to prevent a conflict between them. Before operating the board the user should define the modes
of operation and configure the MPC8260 GPIO to the corresponding module.
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Special care must be taken when using the Fast Ethernet interfaces. It do not have a h/w enable
signal, it is configured only through the MII MDC,MDIO signals.
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PRELIMINARY MPC8260TCOM User’s Manual
Freescale Semiconductor, Inc.
GENERAL INFORMATION
1•5 RELATED DOCUMENTATION
The following publications are applicable to the MPC8260TCOM and may provide additional helpful
information.
• MPC8260 Spec.
• MPC-SIERRA TOCTL PM4388. (http://www.pmc-sierra.com/register/toctl.asp#D)
• MPC-SIERRA QDSX PM4314. (http://www.pmc-sierra.com/register/qdsx.asp#D)
• Level-One LXT970 Fast - Ethernet Transceiver. (http://www.level1.com/product/qa/
lxt970qa.html)
• TRAN-SWITCH TXC-03401 DS3 FRAMER. (http://www.transwitch.com/pdh.html#ds3f)
• TRANS-SWITCH TXC20153G DS3 Line Interface Module. (http://www.transwitch.com/
pdh.html#limsn)
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• TRANS-SWITCH TXC020020 DS3 Line Interface Device. (http://www.transwitch.com/pdh.html#)
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1•6 ABBREVIATIONS USED IN THE DOCUMENT
• FCC - Fast serial Communication Controller.
• MCC - Multi Channel Controller.
• FE - Fast Ethernet.
• TOCTL - PMC-Sierra framer PM4388.
• LIU - Line interface module.
• QDSX - PMC-sierra LIU PM4314.
• DS3 - Serial communication of 44.736Mbps.
• DS3F - DS3 Framer.
• TCOM - MPC8260TCOM Board
• GPIO - General Purpose I/O related to the MPC8260 PORTS.
• ADS - MPC8260ADS
• Module - Each one of the options this board can give: 8 x T1, 2 x FE, 2 x DS3.
• CPM - Communication Processor Module.
• SPEC - Engineering Specification document.
1•7 REQUIRED EQUIPMENT
The MPC8260TCOM operates only with the MPC8260ADS.
The equipment required to connect the communication lines to the two cards is described bellow:
• The RJ45 connectors are separated to two groups:
• 8 x E1/T1 circuit connected by a 8 wires cable.
• 2 x Fast Ethernet circuit connected by a 8 wires cable.
• 4 x BNC 75Ω dedicated to 2 x DS3 circuit connected by a BNC cable. (2 - receive, 2 - transmit)
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MPC8260TCOM User’s Manual PRELIMINARY
GENERAL INFORMATION
Freescale Semiconductor, Inc.
FIGURE 1-1 MPC8260TCOM Connections.
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PRELIMINARY MPC8260TCOM User’s Manual
Freescale Semiconductor, Inc.
SOFTWARE AND HARDWARE PREPARATION
CHAPTER 2 - SOFTWARE AND HARDWARE PREPARATION
2•1 SOFTWARE PREPARATION
The TCOM is not a stand alone board. It should be connected to the MPC8260ADS. To select the desired
configuration and ensure proper operation of the MPC8260TCOM board, changes in the MPC8260 GPIO
configuration may be required. The following table describes the different configurations of all the modules
on the board.
NOTE:
The FEmoduleshavenoH/Wprotection.BeforeusingoneoftheFEmodulemakesurethatothermodules
using the same GPIO are disabled. The following table shows the various types of communication
channels that can be implemented by connecting the TCOM & ADS cards.
The I/O are related to the MPC8260.
The dark column are the modules on the ADS.
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Table 2: Ports Function Signals
TDM1
T1
T1
T1
T1
T1
T1
T1
1
2
3
4
5
Ports/name
PA2/DS3-TXCLK/TDMD2-TXCLK(clock20) I I
PA6/DS3-RXSYNC/TDMA1-L1RSYNC I
PA7/DS3-TXSYNC/TDMA1-L1TSYNC I
PA8/DS3-RXD0/TDMA1-L1RXD0 I
PA9/DS3-TXD0/TDMA1-L1TXD0 O
PA14/MIIRXD3/ATM8-RXD4
PA15//MIIRXD2/ATM8-RXD5 II
PA16/MIIRXD1/ATM8-RXD6 II
PA17/MIIRXD0/ATM8-RXD7 II
PA18/MIITXD0/ATM8-TXD7 OO
PA19/MIITXD1/ATM8-TXD6 OO
PA20/MIITXD2/ATM8-TXD5 OO
PA21/MIITXD3/ATM8--TXD4 OO
PA26/MIIRXER/ATM8-RxClav II
PA27/MIIRXDV/ATM8-RxSOC II
PA28/MIITXEN/ATM8-RxEnb OO
PA29/MIITXER/ATM8-TxSOC OO
PA3/DS3-RXD1/TDMD2-RXCLK(clock19) I I
PA30/MIICRS/ATM8-TxClav
PA31/MIICOL/ATM8-TxEnb OI
PB4/MIITXD3/DS3-RXSYNC/TDMA2-L1RSYNC I O I
PB5/MIITXD2/DS3-TXSYNC//TDMA2-L1TSYNC
PB6/MIITXD1/DS3-RXD0/TDMA2-L1RXD0 I
PB7/MIITXD0/DS3-TXD0/TDMA2-L1TXD0 O
PB8/MIIRXD0/TDMD1-L1RSYNC I
PB9/MIIRXD1/DS3-TXD2/TDMD1-L1TSYNC I
PB10/MIIRXD2/TDMD1-L1RXD I
PB11/MIIRXD3/TDMD1-L1TXD O
PB12/MIICRS/TDMC1-L1RSYNC I
PB13/MIICOL/DS3-TXD1/TDMC1-L1TSYNC I
PB14/MIITXEN/TDMC1-L1RXD I
PB15/MIITXER/TDMC1-L1TXD O
PB16/MIIRXER
A1
B1
C1
D1
6
A2
B2
I O I
C2
T1
7
8
D2
FE
ADS
1
ATM8
FCC1
II
II
ADS
FE
FE 0
2
FCC2
FCC3
OI
OO
I
IO
I
I
I
IO
O
O
I
DS3
FCC2
O
TDM2
1
I
I
I
DS3
FCC3
2
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MPC8260TCOM User’s Manual PRELIMINARY
Freescale Semiconductor, Inc.
SOFTWARE AND HARDWARE PREPARATION
Table 2: Ports Function Signals
T1
T1
T1
T1
T1
T1
T1
1
2
3
4
5
Ports/name
PB17/MIIRXDV I
PB18/DS3-RXD2/MIIRXD3
PB19/DS3-RXD3/MIIRXD2
PB20/DS3-TXD1/TDMD2-L1RSYNC/MIIRXD1 I
PB21/DS3-TXD2/TDMD2-L1TSYNC/MIIRXD0 I
PB22/DS3-RXD1/TDMD2-L1RXD/MIITXD0 I
PB23/DS3-RXD2/TDMD2-L1TXD/MIITXD1 O
PB24/DS3-RXD3/TDMC2-L1RSYNC/MIITXD2 I
PB25/DS3-TXD3/TDMC2-L1TSYNC/MIITXD3 I
PB26/TDMC2-L1RXD/MIICRS I
PB27/TDMC2-L1TXD/MIICOL O
PB28/TDMB2-L1TSYNC/MIIRXER I
PB29/TDMB2-L1RSYNC/MIITXEN I
PB30/TDMB2-L1RXD/ATM8-MIIRXDV I
PB31/TDMB2-L1TXD/MIITXER O
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PC9/MIIMDIO
PC10/MIIMDC
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PC11/DS3-TXD3
or
PC16/MIITXCLK(clock16)/TDMB2-TXCLK I
PC17/MIIRXCLK(clock15)/TDMB2-RXCLK I
PC18/TDMA2-TXCLK(clock14)/MIITXCLK I
PC19TDMA2-/RXCLK(clock13)/MIIRXCLK I
PC20/MIITXCLK(clock12)/ATM8-TxClk
PC21/MIIRXCLK(clock11)/ATM8-RxClk II
PC22/TDMB1-TXCLK(clock10) I
PC23/TDMB1-RXCLK(clock9) I
PC24/TDMD1-TXCLK(clock8) I
PC25/TDMD1-RXCLK(clock7) I
PC26/DS3-TXCLK(clock6)/TDMC1-L1TXCLK(clock6) I I
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PC27/DS3-RXCLK(clock5)/TDMC1-L1RXCLK(clock5) I
PC28/TDMC2-TXCLK(clock4) I
PC29/TDMC2-RXCLK(clock3) I
PC30//TDMA1-TXCLK(clock2) I
PC31/DS3-RXCLK(clock1)/TDMA1-RXCLK(clock1) I I
PD10/TDMB1-L1RSYNC I
PD11/TDMB1-L1TSYNC I
PD12/TDMB1-L1RXD I
PD13/TDMB1-L1TXD O
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A1
B1
C1
D1
A2
6
B2
C2
T1
7
8
D2
FE
ADS
1
ATM8
FCC1
X X X
X X X
II
ADS
FE
FE 0
2
FCC2
FCC3
II
II
IO
IO
OI
OI
OI
OO
I
I
I
O
I
O
I
I
I
I
TDM1
DS3
1
FCC2
TDM2
DS3
2
FCC3
O
I
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8
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PRELIMINARY MPC8260TCOM User’s Manual
Freescale Semiconductor, Inc.
SOFTWARE AND HARDWARE PREPARATION
2•1•1 Module Selection.
2•1•1•1 Fast Ethernet selection
As mentioned above, the FE is enabled/disabled by S/W using PC9, PC10 as MII: MDIO and MDC pins.
The FE control is done via the MII internal registers.
FE_1 address = 00001h
FE_2 address = 00010h.
FE_0 address = 00000h (ADS).
2•1•1•2 8 x T1/E1
Each one of the 8 x T1/E1 is enabled by the following ports:
PD4 - T1_1
PD5 - T1_2
PD6 - T1_3
PD7 - T1_4
PD8 - T1_5
PD9 - T1_6
PD18 - T1_7
PD19 - T1_8
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2•1•1•3 2 x DS3
Each one of the 2 x DS3 is enabled/disabled by the following ports:
PD25 - DS3 _1 (DS3_1 is enabled only if T1_1 & T1_7 & T1_8 is disabled and PD25 is low).
PA4 - DS3 _2 (DS3_2 is enabled only if T1_3 & T1_4 &T1_5 & T1_8 is disabled and PA4 is low).
2•2 INDICATORS
The MPC8260TCOM has the following indicators.
2•2•1 Fast Ethernet 1 TXD. LD1
LD1 is light whenever the MPC8260 transmits data to FE_1 (LXT970 - U1).
2•2•2 Fast Ethernet 1 RXD. LD2
LD2 is light whenever the MPC8260 receives data from FE_1 (LXT970 - U1).
2•2•3 Fast Ethernet 2 TXD. LD3
LD3 is light whenever the MPC8260 transmits data to FE_2 (LXT970 - U2).
2•2•4 Fast Ethernet 2 RXD. LD4
LD4 is light whenever the MPC8260 receives data from FE_2 (LXT970 - U2).
2•2•5 Fast Ethernet 1 SPEED. LD5
LD5 is light whenever FE_1 (LXT970 - U1) is configured to Fast Ethernet.
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MPC8260TCOM User’s Manual PRELIMINARY
SOFTWARE AND HARDWARE PREPARATION
Freescale Semiconductor, Inc.
2•2•6 Fast Ethernet 1 LINK/LOCK. LD6
LD6 indicates in 100Mbps a scrambler lock and receipt of valid idle code.
LD6 indicates in 10Mbps a Link Valid status.
2•2•7 Fast Ethernet 1 Collision. LD7
LD7 indicates in default mode a collision.
LXT970 can be programmed for other indications. For detailed description see the LXT970 user’s manual.
2•2•8 Fast Ethernet 2 SPEED. LD8
LD8 is light whenever the FE_2 (LXT970 - U1) is configured to Fast Ethernet.
2•2•9 Fast Ethernet 2 LINK/LOCK. LD9
LD9 indicates in 100Mbps a scrambler lock and receipt of valid idle code. (LXT970 - U2)
LD9 indicates in 10Mbps a Link Valid status.
2•2•10 Fast Ethernet 2 Collision. LD10
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LD10 indicates in default mode a collision.
LXT970 can be programmed for other indications.
2•2•11 DS3 2 FRAME ERROR. LD11
LD11 is light whenever an error on the F-bit or M-bit is occurred.
2•2•12 DS3 2 RXLOS. LD12
LD12 is light whenever 175 ± 75 consecutive zeros appear in incoming data stream.
2•2•13 DS3 2 ENABLE. LD13
LD13 is light whenever DS3 2 is enabled.
2•2•14 DS3 1 FRAME ERROR. LD14
LD14 is light whenever an error on the F-bit or M-bit is occurred.
2•2•15 DS3 1 RXLOS LD15
LD15 is light whenever 175 ± 75 consecutive zeros appear in incoming data stream.
2•2•16 DS3 1 ENABLE. LD16
LD16 is light whenever DS3 2 is enabled.
2•2•17 T1/E1 8 ENABLE. LD17
LD17 is light whenever T1/E1 _8 is enabled.
2•2•18 T1/E1 7 ENABLE. LD18
LD18 is light whenever T1/E1_7 is enabled.
2•2•19 T1/E1 6 ENABLE. LD19
LD19 is light whenever T1/E1_6 is enabled.
2•2•20 T1/E1 5 ENABLE. LD20
LD20 is light whenever T1/E1_5 is enabled.
10
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PRELIMINARY MPC8260TCOM User’s Manual
2•2•21 T1/E1 4 ENABLE. LD21
LD21 is light whenever T1/E1_4 is enabled.
2•2•22 T1/E1 3 ENABLE. LD22
LD22 is light whenever T1/E1_3 is enabled.
2•2•23 T1/E1 2 ENABLE. LD23
LD23 is light whenever T1/E1_2 is enabled.
2•2•24 T1/E1 1 ENABLE. LD24
LD24 is light whenever T1/E1_1 is enabled.
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SOFTWARE AND HARDWARE PREPARATION
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MPC8260TCOM User’s Manual PRELIMINARY
SOFTWARE AND HARDWARE PREPARATION
FE_1 FE_2
DS3_2
Freescale Semiconductor, Inc.
FIGURE 1-2 MPC8260TCOM Board
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T1_8 T1_7 T1_6 T1_5 T1_4 T1_3 T1_2 T1_1
DS3_1
DS3
T1
12
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PRELIMINARY MPC8260TCOM User’s Manual
Freescale Semiconductor, Inc.
FUNCTIONAL DESCRIPTION
CHAPTER 3 - FUNCTIONAL DESCRIPTION
3•1 INTRODUCTION
This chapter details the hardware design of the MPC8260TCOM, and describes each module.
3•2 GENERAL DESCRIPTION
The MPC8260TCOM includes four parts.
• 1. M8260ADS include the MPC8260 device on board.
• 2. Fast Ethernet include the LXT970 devices.
• 3. DS3 include the TXC-03401 framer and 20153G line interface module.
• 4. T1 include the TOCTL framer PM4388 and PM4314 line interface.
The following paragraphs will show the TCOM block diagram and describe each one of the board parts.
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FIGURE 4-1 8260TCOM BLOCK DIAGRAM
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PMC TOCTL
8X FRAMER 3.3V
5v friendly
transformer
8XT1
RJ45
COC
PMC
LIU
X4
PMC
LIU
X4
8
BNC
CON
DS3
MCC
CONT
LOGIC
2
FRAMER
TRAN
SWITCH
TXC-03401
DS3
T3- LINE
INTERFACE
MODULE
TXC-20153D
BNC
CON
MCC
ADS-CONNECTORS
FRAMER
TRAN
SWITCH
TXC-03401
T3- LINE
INTERFACE
MODULE
TXC-20153D
BNC
CON
FCC3
FCC2
data/address/Io/cont
F-Ethernet
LEVL-ONE
LXT970
MII 3v output
2XFAST ETHERNET
HALO
TG22-3506ND
Transformer
RJ45
CON
BNC
CON
5v 3v
FCC1
IN
LINE
IN
LINE
OUT
LINE
OUT
LINE
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FUNCTIONAL DESCRIPTION
Freescale Semiconductor, Inc.
3•3 CONTROL LOGIC BLOCK
MACH
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FE
rst
QDSX
rst
FE
CS/ADD
CSQDSX1
to 8260
2xDS3ENrec
TOCTL
CSTOCTL
T1 signals X 8
ADD/DATA
RESET
2
QDSX
T1 Buffers
CSQDSX2
ALE(GPL0)
READ WRITE (GPL2 GPL3)
8GPIOIN
ENDS3_1
ENDS3_2
GPIO
8
Enable Signals
DIRDATA
CSDS3F1
DS3F DS3F
REC
BUF
to 8260
LIU
LIU
LINE
Transmit
REC
BUF
to 8260
CSDS3F2
LIU
LIU
LINE
Transmit
MII
to 8260
14
MII
to 8260
to 8260
to 8260
8 GPIO
from 8260
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Data Buff
DIRDATA(GPL4)
Add Buff
AddEN(GPL1)
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PRELIMINARY MPC8260TCOM User’s Manual
Freescale Semiconductor, Inc.
FUNCTIONAL DESCRIPTION
3•4 MPC8260ADS
The MPC8260ADS is meant to serve as a platform for S/W and H/W development around the MPC8260.
Using its on board resources and its associated debugger, a developer is able to load his code, run it, set
breakpoints, display memory and registers and connect his own proprietary H/W via the CPM expansion
connectors (P1 and P2 on the MPC8260TCOM), to be incorporated to a desired system with the MPC8260
device.
3•5 Ethernet. - 100BASE-TX and 10BASE-T
Two Fast-Ethernet modules used FCC1 (FE_1) and FCC3 (FE_2) are on this board, together with the Fast
Ethernet on the ADS board it will be possible to run 3 Fast Ethernet modules at the same time or it is
possible to disable each one of them to let the user to use the FCC’s for other uses. The disable can be
done by the MDIO bus. The device that use to perform the transceiver operation is the Level One LXT970.
The LXT970 is an IEEE 802.3 compliant 10/100Mbps Fast Ethernet PHY Transceiver that directly supports
both 100BASE-TX and 10BASE-T applications. Provides a Media Independent Interface (MII) for easy
attachment to 10/100 Media Access Controller (MAC)s. The LXT970 supports full-duplex operation at 10
and 100 Mbps. Its operating condition can be set using autonegotiation panel detection or manual control.
The configuration of the LXT970 can be controlled via the MII serial port (MDIO Interface). This interface
allows upper-layer devices to control or monitor the LXT970. The LXT970 can also be controlled via
external pin settings (Hardware Control Interface). This option is not supported on the 8260TCOM.
The LXT970 is connected to the MPC8260 via the FCC1 and FCC3 that performs MII interface through
the I/O ports.
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3•6 DS3 (T3).
Two DS3 modules are on this board; they use the TDMA1 (FCC2) and TDMA2 (FCC3). Each one of the
DS3 module is composed of Framer and Line Interface Unit. The DS3 Framer is TRAN-SWITCH TXC-
03401. It is a 5V device. The MPC8260 device is a 3.3V device. That is why a 5V to 3.3V translator is
needed in the output direction from the framer, to bridge between the DS3F, (5V) to the MPC8260 (3.3V)
The device used is a 74LXT541.
The DS3F is designed for DS3 framer applications in which broadband payloads are mapped into the
44.736 Mbit/s DS3 frame format. The payload interface is nibble-parallel format.
The Line Interface Unit is a TRAN-SWITCH TXC-20153G, this LIU is a module which include the
transformer and the TRAN SWITCH TXC-02020 LIU device. It connected from one side to the DS3F and
from the other side to BNC connector. It is a 5V device.
Each one of the DS3 module can be isolated by a logic control to let the user to use FCC2 and FCC3 for
other purposes.
The DS3 Line Interface Module (DS3LIM-SN) is a complete and compact full duplex analog line to digital
terminal interface. It converts B3ZS - encoded line signals, in either DS3 asynchronous, to and from NRZ
data and clock signals, in addition to the synchronous signal option.
In order to enable DS3_1, PD4 (T1_1) & PD18 (T1_7) & PD19 (T1_8) should be high -’1’ and then drive
PD25 to be low -’0’. In order to enable DS3_2, PD6 (T1_3) & PD7 (T1_4) & PD8 (T1_5) & PD19 (T1_8)
should be high -’1’ and then drive PA4 to be low -’0’. Each one of the DS3 module has a led to light when
this DS3 module is enable, LD13 for DS3_2 and LD16 for DS3_1. Each DS3 modules also has a Frame
Error and Receive signal loss leds.
Each one of the DS3 module have two loopback capabilities for testing transmit and receive loopback via
the loopback controls block of the TXC-20153G.
Transmit - to - Receive loopback connects the data path from the transmit I/O control block output to the
receive I/O control block input, and disable the external receiver input.
Transmit - to - Receive loopback is activated by placing a low on the TR signal pin.
Receive - to Transmit loopback connects the receive data output path to the transmit input circuits and
disable the NRZ transmit input.
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15
MPC8260TCOM User’s Manual PRELIMINARY
FUNCTIONAL DESCRIPTION
Receive - to - transmit loopback activated by placing a low on RT pin.
For more information see the TXC-20153G and TXC-02020 user manual.
The physical control to the RT, TR signals of both DS3 modules are controlled as follow:
DS3_1 RT will be low if PA5 and PA1 will be low. (if PA1 is high there is no loop back at all)
DS3_1 TR will be low if PA5 will be high and PA1 will be low. (if PA1 is high there is no loop back at all)
DS3_2 RT will be low if PC13 and PA1 will be low. (if PA1 is high there is no loop back at all)
DS3_2 TR will be low if PC13 will be high and PA1 will be low. (if PA1 is high there is no loop back at all)
Freescale Semiconductor, Inc.
3•7 T1
The T1 is a 1.544Mhz serial line; this board can handle up to 8 T1 line simultaneously. All the T1 modules
on this board are composed by one PM4388 (Framer), 2 PM4314 (LIU) and 2 ST5170 transformers. The
PM4388 device includes 8 T1 framers, each framer in this device can be controlled by its own internal
registers. The PM4388 controlled by the MPC8260 data and address bus. It gets its chip select signal from
the control logic. The PM4314, which is a quad line interface unit, is connected from one side to the framer,
PM4388, and from the other side to the line transformer. Each one of the T1 line interface units can be also
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controlled by the internal registers. This device is also connected to the MPC8260 by the address and data
bus. It gets it’s chip select signal from the control logic. The ST5170 includes a 4 transformers, each one
of the ST5170 connected to one PM4314 device.
Each one of the MPC8260 T1 group of signals can be isolate from the framer by buffer. (The PM4388
device can not isolate independently one of the eight T1 signal group). T1_1,2,3,4 modules can be isolated
by PD4-PD7. ’0’ on these signals enables each T1 interface. The T1-5,6,7,8 modules can be isolated by
PD8, PD9, PD18 and PD19. ’0’ on these signals enables each T1 interface. 8 leds are placed on the board
to show which one of the T1 port is enable. Each led lights depend upon the enable T1 signal, for example
if PD4 will be low LD24 (T1_1 enable) will light.
Together with the 8260ADS board it will be possible to operate the8xT1andATM155Mbps or Fast
Ethernet over FCC1.
3•8 Control Logic.
The control logic allows the user to disable each one of the following elements: 8 x T1, 2 x DS3 and 4 x
DS3 loopback options. Although each one of the T1 is enabled directly from the MPC8260, all the T1
enable signals insert to the logic control, in order to disable a DS3 module that share some signal(s) as
T1_x. If one of the T1 enable and it share the same signals as one of the DS3, the appropriate DS3 will be
disable.
Each one of the Fast-Ethernet modules connected to FCC1,FCC2 and FCC3 (on the 8260TCOM or on the
8260ADS) is controlled via the MDIO and MDC signals (PC10, PC9); the SW should be aware that
enabling the Fast Ethernet without disabling the corresponding element that share the same GPIO signals
will damage the board. FE1 share the signals as the ATM module on the ADS, FE0 (the one that is placed
on the 8260ADS) share some of the T1_8, T1_7, T1_6 and T1_5. FE2 share some of the signals of T1_6,
T1_5, T1_4 T1_3
In order to use DS3 the SW should drive PD25 for DS3_1 (FCC2) to low or PA4 for DS3_2 (FCC3) to low.
If no one of the T1 that share the same signal of the desire DS3 is enable, the DS3(x) will be enable. The
user should disable the appropriate T1 channel if the appropriate T1 channel will not be disable the DS3
will not be enable. DS3(1) share the same signals with T1_1, T1_7 and T1_8, DS3(2) share the same
signals with T1_8, T1_5, T1_4, T1_3.
In addition to the above GPIO control signal from the MPC8260 the 8260TCOM Board use PA1, PA5 and
PC13 to select 4 types of DS3 loop-back as describe in the DS3 description paragraph.
The logic control select each one of the following devices by asserting it’s Chip Select signal, The ADS
drive two CS signals to the TCOM CS6 and CS7 called CSBRD1 and CSBRD2.
16
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