Freescale Semiconductor MPC5668EVB User Manual

MPC5668EVB Users Manual

Revision 0.1

May 2009

MPC5668EVB Users Manual Rev 0.1 May 2009

Revision

Date

Author

Comment

0.1 May 2009 D.

McMenamin

Initial Release, RevA PCB’s only

.

Revision History:

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MPC5668EVBUM/D i

© Freescale Semiconductor, 2009; All Rights Reserved

MPC5668EVB Users Manual Rev 0.1 May 2009

INDEX

1. INTRODUCTION ...................................................................................................................................................... 1

2. EVB FEATURES ...................................................................................................................................................... 2

3. CONFIGURATION ................................................................................................................................................... 3

3.1

P

OWER SUPPLY CONFIGURATION

3.1.1 Power Supply Connectors ........................................................................................................................ 4

3.1.2 Power Switch (SW6) .................................................................................................................................. 4

3.1.3 Regulator Power Jumpers (J42, J44, J45 and J46) .............................................................................. 5

3.1.4 Power Status LED’s and Fuse ................................................................................................................. 5

3.1.5 MCU Supply Routing and Jumpers (J41, J42, J43, J44, J45, J46, J47, J48, J49, J50)................. 6

3.1.6 Regulator Power Domains ........................................................................................................................ 8

3.2

MCU C

3.2.1 Main Clock Selection (J85, J87, J61 and J66) ....................................................................................... 9

3.2.2 32Khz External Clock Selection (J67 and J71).................................................................................... 10

3.3

R

3.3.1 Reset LEDs ............................................................................................................................................... 11

3.3.2 Reset Buffering Scheme ......................................................................................................................... 12

3.3.3 Reset Boot Configuration (J69) .............................................................................................................. 13

3.4

ONCE

3.4.1 Debug Connector Pinouts ....................................................................................................................... 14

3.5

CAN C

3.6

RS232 C

3.7

LIN C

J13, J14, J15,J16) ....................................................................................................................................................... 17

3.8

F

3.9

E

3.10

3.11 P

4. MCU PIN USAGE MAP ......................................................................................................................................... 24

LOCK CONTROL

ESET CONTROL (JUMPER

AND NEXUS CONFIGURATION

ONFIGURATION

ONFIGURATION

ONFIGURATION

LEX

RAY C

ONFIGURATION

THERNET

MLB

HANTOM PORTS

....................................................................................................................................................... 20

AND MOST

(J20, J21, J29, J30, J31) ......................................................................................... 15

(J3, J4, J5, J12,........................................................................................................... 17

.............................................................................................................................................. 21

(J76, J77, J78, J79, J80) ................................................................................................. 23

..................................................................................................................................... 9

(J6, J17, J18, J23, J24) ........................................................................................ 16

..................................................................................................................... 4

J75) ..................................................................................................................... 11

(J32, J70) .......................................................................................... 13

(J19, J27, J25, J26, J28) ................................................................................ 18

5. DEFAULT JUMPER SUMMARY TABLE .......................................................................................................... 25

6. USER CONNECTOR DESCRIPTIONS .............................................................................................................. 28

6.1.1 Port A / ADC (Connector J86, RV1, J73 and J74) .............................................................................. 28

6.1.2 Port B / ADC / SPI (P18) ......................................................................................................................... 29

6.1.3 Port C / ADC / FLEXRAY / I2C (P19) .................................................................................................... 29

6.1.4 Port D / CAN / I2C / SCI (P20) ............................................................................................................... 29

6.1.5 Port E / SCI / eMIOS / I2C (P21) ........................................................................................................... 30

6.1.6 Port F / DSPI (P26) .................................................................................................................................. 30

6.1.7 Port G / DSPI / eMIOS / FEC (P27)....................................................................................................... 30

6.1.8 Port H / eMIOS / FEC (P28) ................................................................................................................... 30

6.1.9 Port J / eMIOS / FEC (P29) .................................................................................................................... 31

6.1.10 Port K / RESET / MLB (Connector P30) .......................................................................................... 31

6.2

P

ROTOTYPING AREA AND USER

LED’S / S

WITCHES

...................................................................................... 32

APPENDIX A - SCHEMATICS

MPC5668EVBUM/D ii

MPC5668EVB Users Manual Rev 0.1 May 2009

Index of Figures and Tables

F

IGURE

3-1

EVB F

F

IGURE

3-2

F

IGURE

3-3

F

IGURE

3-4. P

F

IGURE

3-5

F

IGURE

3-6

F

IGURE

3-7 EVB R

F

IGURE

3-8.

F

IGURE

3-9

F

IGURE

3-10

F

IGURE

3-11

F

IGURE

3-12.

F

IGURE

3-13.

T

ABLE

3-1

T

ABLE

3-2

T

ABLE

3-3

T

ABLE

3-4

T

ABLE

3-5

T

ABLE

3-6

T

ABLE

3-7

T

ABLE

3-8

T

ABLE

3-9

T

ABLE

3-10

T

ABLE

3-11

T

ABLE

3-12

T

ABLE

3-13.

T

ABLE

3-14

T

ABLE

3-15

T

ABLE

3-16

T

ABLE

3-17

T

ABLE

3-18

T

ABLE

3-19

T

ABLE

3-20

T

ABLE

3-21

T

ABLE

3-22 INIC P

T

ABLE

3-23 P

T

ABLE

4-1. EVB MCU P

T

ABLE

5-1

T

ABLE

6-1.

T

ABLE

6-2

T

ABLE

6-3.

T

ABLE

6-4.

T

ABLE

6-5.

T

ABLE

6-6.

T

ABLE

6-7.

T

ABLE

6-8.

T

ABLE

6-9.

T

ABLE

6-10.

T

ABLE

6-11.

UNCTIONAL BLOCKS

2.1

MM POWER CONNECTOR

2-L

EVER POWER CONNECTOR

OWER SUPPLY ROUTING

EVB C

LOCK SELECTION

EVB C

LOCK SELECTION

ESET BUFFERING SCHEME

MPC5668 JTAG / ONCE C

CAN P

HYSICAL INTERFACE CONNECTOR

RS232 P
LIN P

INC5668 JTAG C
MLB M

REGULATOR POWER JUMPERS

MCU P
VDDE[1..3] P

POWER SUPPLY DISTRIBUTION
CLOCK SOURCE JUMPER SELECTION

32K
LVI M
LVI C

RESET-OUT CONTROL JUMPER

BOOTCFG C
JTAG / NEXUS T
ONCE / NEXUS TCLK T

NEXUS D
CAN C
RS232 C
LIN C

FLEXRAY
FLEXRAY POWER CONTROL JUMPERS
FLEXRAY CONTROL JUMPERS
PULL UP/ PULL DOWN RESISTORS ON PORTS G AND H FOR ETHERNET PHYSICAL
EHTERNET PHYSICAL INTERFACE POWER SUPPLY ENABLED

HANTOM PORT CONTROL

DEFAULT JUMPER POSITIONS

PORT A CONNECTOR PINOUT

RV1 C

PORT B CONNECTOR PINOUT
PORT C CONNECTOR PINOUT
PORT D CONNECTOR PINOUT
PORT E CONNECTOR PINOUT
PORT F CONNECTOR PINOUT
PORT F CONNECTOR PINOUT
PORT H CONNECTOR PINOUT

PORT J CONNECTOR PINOUT
PORT K CONNECTOR PINOUT

HYSICAL INTERFACE CONNECTOR

HYSICAL INTERFACE CONNECTORS

ONITOR CONNECTOR

OWER SUPPLY JUMPERS

AD GROUPINGS

HZ CRYSTAL JUMPER SELECTION

ONITOR THRESHOLD VOLTAGES

ONTROL JUMPERS

ONTROL

ARGET RESET ROUTING

EBUG CONNECTOR PINOUT

ONTROL JUMPERS

ONTROL JUMPERS

ONTROL JUMPERS

MCU S

OWER SUPPLY CONTROL

ONNECTION JUMPER

IGNAL ROUTING JUMPERS

IN USAGE

............................................................................................................................ 3

.......................................................................................................................... 4

....................................................................................................................... 4

.............................................................................................................................. 6

................................................................................................................................. 9

............................................................................................................................... 10

................................................................................................................ 12

ONNECTOR

.................................................................................................... 14

.................................................................................................... 15

.............................................................................................. 16

.................................................................................................. 17

ONNECTOR

.................................................................................................................. 21

.................................................................................................................... 21

........................................................................................................................ 5

..................................................................................................................... 7

.......................................................................................................................... 8

........................................................................................................................ 8

.............................................................................................................. 9

........................................................................................................... 10

.......................................................................................................... 11

................................................................................................................................. 11

..................................................................................................................... 12

................................................................................................................................. 13

................................................................................................. 13

ERMINATION CONTROL

....................................................................................... 13

....................................................................................................... 14

(J30, J31, J7) .................................................................................................... 15

......................................................................................................................... 16

.............................................................................................................................. 17

(J19, J27) ............................................................................. 18

(J25) .............................................................................................. 18

(J26, J28) ................................................................................................... 19

................................... 20

(J26) ........................................................... 20

(J35, J36, J55) ........................................................................................ 21

(J35, J36, J55) .................................................................................................. 23

................................................................................................................................... 24

........................................................................................................................ 25

(P17) ............................................................................................................ 28

J8 ...................................................................................................................... 28

(P18) ............................................................................................................ 29

(P19) ............................................................................................................ 29

(P20) ............................................................................................................ 29

(P21) ............................................................................................................ 30

(P26) ............................................................................................................ 30

(P27) ............................................................................................................ 30

(P28) ........................................................................................................... 30

(P29) .......................................................................................................... 31

(P30) ......................................................................................................... 31

MPC5668EVBUM/D iii

MPC5668EVB Users Manual Rev 0.1 May 2009

1. Introduction

This user’s manual details the setup and configuration of the Freescale Semiconductor MPC5668 Evaluation
Board (hereafter referred to as the EVB). The EVB is intended to provide a mechanism for easy customer
evaluation of the MPC5668 family of microprocessors, and to facilitate hardware and software development.

At the time of writing this document, the MPC5668 family is offered in a 208MAPBGA package. A
256MAPBGA package supporting Nexus debug is also available for development purposes. For the latest
product information, please speak to your Freescale representative or consult the MPC5668 web pages at

www.freescale.com

The EVB is intended for bench / laboratory use and has been designed using normal temperature specified
components (+70°C).

MPC5668EVBUM/D Page 1 of 29

MPC5668EVB Users Manual Rev 0.1 May 2009

IMPORTANT

2. EVB Features

The EVB provides the following key features:

• MCU Socket supporting the 208BGA production package and the 256BGA development package.

• Single 12-14V external power supply input with on-board regulators to provide all of the necessary

EVB and MCU voltages. Power may be supplied to the EVB via a 2.1mm barrel style power jack or a
2-way level connector. 12V operation allows in-car use if desired.

• Flexible on-board power supply configuration with the option to bypass the internal MCU regulators if
desired.

• Master power switch and regulator status LED’s – Regulators connected to the ADC to allow
monitoring.

• User reset switch with reset status LED’s

• User configurable Low Voltage Inhibit to monitor the status of the 3.3V and 5V regulators.

• Control of the BOOTCFG status via a dedicated jumper.

• Flexible MCU clocking options:

 40MHz Oscillator Crystal
 32Khz Watch Crystal
 SMA connector to allow external clock support
 8Mhz Oscillator circuit.

• SMA connector on MCU-CLKOUT signal for easy access.

• Standard 14-pin ONCE debug connector and 38-pin MICTOR Nexus connectors.

• All MCU signals are accessible on port-ordered groups of 0.1” pitch headers.

• DSPI A signals can be routed to a set of shift registers to allow a 32-bit phantom port to be created.

• SCI channels A and B can be routed to a standard DB9 female connector (PC RS-232 compliant) via

a Maxim physical interface.

• SCI channels C and D can be routed to LIN interface header (0.1”) and molex connectors, both will
full physical transceivers.

• FlexCAN channels A and B can be routed to 0.1” headers and DB9 connector via a Philips high speed
CAN transceiver which supports both 3.3V and 5V inputs.

• FlexCAN channels C, D, E and F are routed to the prototyping area with DB9 connectors to allow
additions CAN physical interfaces to be easily integrated.

• User prototyping area consisting of a 0,1” grid of through hole pads with easy access to the EVB
ground and power supply rails.

• Ethernet signals routed to a National Semiconductor physical interface and Pulsejack RJ45 connector
with integrated magnetics.

• MLB signals routed to SMSC MOST INIC with Tyco Optical Transceiver. INIC JTAG and MLB monitor
ports. Support for optional ROM INIC or MLB150 daughter card from SMSC.

• 4 active low LED’s and 4 pushbutton switches for development purposes.

• Jumper selectable variable resistor connected to ADC channel 0, driving between VRH and VRL.

• Liberal scattering of GND test points (surface mount loops) placed throughout the EVB.

Note – To alleviate confusion between jumpers and headers, all EVB jumpers are implemented as 2mm pitch
whereas headers are 0.1inch (2.54mm). This prevents inadvertently fitting a jumper to a header.

Before the EVB is used or power is applied, please fully read the following
sections on how to correctly configure the board.

Failure to correctly configure the board may cause irreparable component, MCU or EVB
damage.

MPC5668EVBUM/D Page 2 of 29

MPC5668EVB Users Manual Rev 0.1 May 2009

User LEDs and

Connectors

Regulators

JTAG and

Connectors

Jumpers

Reset and

Port

Ethernet

3. Configuration

This section details the configuration of each of the EVB functional blocks.

Throughout this document, all of the default jumper and switch settings are clearly marked with “(D)” and are
shown in blue text. This should allow a more rapid return to the default state of the EVB if required. Note that
the default configuration for 3-way jumpers is a header fitted between pins 1 and 2. On the EVB, 2-way and 3­way jumpers have been aligned such that Pin 1 is either to the top or to the left of the jumper. On 2-way
jumpers, the source of the signal is connected to Pin 1.

The EVB has been designed with ease of use in mind and has been segmented into functional blocks as
shown below. Detailed silkscreen legend has been used throughout the board to identify all switches, jumpers
and user connectors.

MOST and MLB

LIN

Serial (SCI)

Flexray

CAN

Prototype

Area

MCU

Socket

Power Routing

Power

NEXUS

LVI

Voltage

Clock

Circuitry and

SMA In / Out

Phantom

Potentiometer

switches

User

User

Figure 3-1 EVB Functional Blocks

MPC5668EVBUM/D Page 3 of 29

MPC5668EVB Users Manual Rev 0.1 May 2009

3.1 Power Supply Configuration

The Power supply

section is located in
the bottom left area
of the EVB

The EVB requires an external power supply voltage of 12V DC, minimum 1A. This allows the EVB to be easily
used in a vehicle if required. The single input voltage is regulated on-board using 3 switching and 1 linear
regulators to provide the necessary EVB and MCU operating voltages of 5.0V, 3.3V and 2.5V. For flexibility
there are two different power supply input connectors on the EVB as detailed below.

3.1.1 Power Supply Connectors

2.1mm Barrel Connector – P22:

This connector should be used to connect the supplied wall-plug mains adapter. Note – if a replacement or
alternative adapter is used, care must be taken to ensure the 2.1mm plug uses the correct polarisation as
shown below:

Figure 3-2 2.1mm Power Connector

2-Way Lever Connector – P23:

This can be used to connect a bare wire lead to the EVB, typically from a laboratory power supply. The
polarisation of the connectors is clearly marked on the EVB. Care must be taken to ensure correct connection.

V+ (12V)

GND

Figure 3-3 2-Lever Power Connector

V+ (12V)

GND

3.1.2 Power Switch (SW6)

Slide switch SW6 can be used to isolate the power supply input from the EVB voltage regulators if required.

Moving the slide switch to the right (away from connector P23) will turn the EVB on.
Moving the slide switch to the left (towards connector P23) will turn the EVB off.

MPC5668EVBUM/D Page 4 of 29

MPC5668EVB Users Manual Rev 0.1 May 2009

Jumper

Position

PCB

Description

(D)

(D)

(D)

(D)

3.1.3 Regulator Power Jumpers (J42, J44, J45 and J46)

The Power supply control jumpers are located adjacent to the respective regulators.

As mentioned above, the EVB has four voltage regulators on board:

- 2.5V switching regulator (U17) to supply the MCU MLB Pads voltage and the SMSC INIC (U6).

- 3.3V switching regulator (U18) for EVB peripherals and MCU regulator, logic and I/O.

- 5.0V switching regulator (U19) for the MCU regulator and I/O and EVB peripherals.

- 5.0V linear regulator (U14) for the MCU ADC power supply.

All of the regulators have the option of being disabled if they are not required. The table below details the
jumper configurations for enabling and disabling the regulators. By default, all of the regulators are enabled.

Table 3-1 Regulator Power Jumpers

Legend

J81 (2.5V)

J82 (3.3V)

J83 (5.0V)

J84 (5.0V-LINEAR)

FITTED

REMOVED

FITTED

REMOVED

FITTED

REMOVED

FITTED

REMOVED 5.0V linear regulator output is Disabled

DISABLE

DISABLE

DISABLE

ENABLE 5.0V linear regulator output is Enabled

2.5V switching regulator output is
Disabled

2.5V switching regulator output is
Enabled

3.3V switching regulator output is
Disabled

3.3V switching regulator output is
Enabled

5.0V switching regulator output is
Disabled

5.0V switching regulator output is
Enabled

3.1.4 Power Status LED’s and Fuse

When power is applied to the EVB, four green power LED’s adjacent to the voltage regulators show the
presence of the supply voltages as follows:

LED DS8 – Indicates that the 5.0V linear regulator is enabled and working correctly
LED DS9 – Indicates that the 1.5V switching regulator is enabled and working correctly
LED DS10 – Indicates that the 3.3V switching regulator is enabled and working correctly
LED DS11 – Indicates that the 5.0V switching regulator is enabled and working correctly

If no LED’s are illuminated when power is applied to the EVB and the regulators are correctly enabled using
the appropriate jumpers, it is possible that either power switch SW6 is in the “OFF” position or that the fuse F1
has blown. The fuse will blow if power is applied to the EVB in reverse-bias, where a protection diode ensures
that the main fuse blows rather than causing damage to the EVB circuitry. If the fuse has blown, check the
bias of your power supply connection then replace fuse F1 with a 20mm 500mA fast blow fuse.

MPC5668EVBUM/D Page 5 of 29

MPC5668EVB Users Manual Rev 0.1 May 2009

jumpers are located in the

centre of the EVB in a box

MCU Powe

The MCU power supply

3.1.5 MCU Supply Routing and Jumpers
(J41, J42, J43, J44, J45, J46, J47, J48, J49,

titled “MCU Supply”

J50)

The MCU can be operated in 5v and 3.3v modes by changing J46. When in 5v mode MCU has internal
regulators that can generate the 3.3V supplies for VDDSYN and VDD33. Whilst this is the intended mode of
operation for the MCU when VRC = 5v the EVB allows the internal MCU regulators to be disabled by
changing VRCSEL to EXT and applying external voltages to the VDDSYN and VDD33 inputs. When in 3.3v
mode VDDSYN and VDD33 inputs must always be supplied externally.

The VDDE[1..4] pins control the pad voltages over 4 groupings of pads (see the MCU reference manual for
details). Jumpers J41 - J34 allow the VDDEx pins to be connected to the 5.0v or 3.3V switching regulators.
The VDDEMLB domain can be 3.3v or 2.5v selectable by J45.

12V

5V Linear

5V Switcher

J49

1

VDDA

J46

1

VRC

r

3.3V

Switcher

2.5V

Switcher

VRCSEL

1

0

1

J43

VDDE1

1

J42

VDDE2

1

J44

VDDE3

1

J41

VDDE4

1

J45

VDDEMLB

J47

1

INTernal

J50

1

VDDSYN

EXTernal

1

VDD33

J48

MPC5668EVBUM/D Page 6 of 29

VRCSEL

Figure 3-4. Power Supply Routing

MPC5668EVB Users Manual Rev 0.1 May 2009

(D)

5.0V /

J46

(D)

J47

(D)

J43

(D)

J42

(D)

J44

(D)

J41

(D)

J48

J50

3.3v/

J45

(D)

CAUTION

Table 3-2 MCU Power Supply Jumpers

Power

Domain

5.0V J49 (VDDA)

3.3V

Jumper Position PCB

FITTED

REMOVED MCU VDDA User powered from J49 Pin 2

1-2

(VRC)

Description

Legend

MCU VDDA is powered from 5V linear regulator

5V VRC is supplied from the 5V switching regulator

2-3 3.3v VRC is supplied from the 3.3V switching regulator

1-2

(VRCSEL)

INT 3.3 V internal voltage regulator enabled (5 V mode)

2-3 EXT 3.3 V supplied external (3.3 V mode)

1-2

(VDDE1)

5.0v MCU VDDE1 is powered from 5v

2-3 3.3V MCU VDDE1 is powered from 3.3V

1-2

(VDDE2)

5.0v MCU VDDE2 is powered from 5v

2-3 3.3V MCU VDDE2 is powered from 3.3V

3.3V

2.5V

(VDDE3)

(VDDE4)

(VDD33)

(VDDSYN)

(VDDEMLB)

2-3

1-2

2-3

FITTED MCU VDD33 pin is powered from switching regulator

REMOVED
(D)

FITTED MCU VDDSYN pin is powered from switching

REMOVED
(D)

1-2

2-3 3.3V MCU VDD pin is not powered externally

5.0v MCU VDDE3 is powered from 5v

3.3V MCU VDDE3 is powered from 3.3V

5.0v MCU VDDE4 is powered from 5v

3.3V MCU VDDE4 is powered from 3.3V

MCU VDD33 pin is not powered externally

regulator

MCU VDDSYN pin is not powered externally

2.5V MCU VDD pin is powered from 1.5v switching
regulator

1-2

The jumper configuration shown in Table 3-2, details the default state of the EVB. In this configuration all
power is supplied from the Linear and Switching regulators.

- VDDA is connected to the 5.0V Linear regulator

- VRC is connected to the 5.0V switching regulator

- VRCSEL is connected to logic 1 enabling the internal 3.3V regulator – J48 and J50 are removed.

- VDDE[1..4] are connected to the 5.0V switching regulator

When jumper J47 (VRCSEL) is in position 1-2 (INT), the MCU’s 3.3V internal voltage regulators are
enabled and supply power to the 3.3V power domains. In this case, jumpers J48 (VDD33) and J50
(VDDSYN) must be removed.

Similarly, when jumper J47 is removed, no power is supplied to the MCU internal voltage regulators and
jumpers J48 (VDD33) and J50 (VDDSYN) must be fitted to power the respective MCU pins. The 3.3V
regulator must also be enabled in this case.

MPC5668EVBUM/D Page 7 of 29

MPC5668EVB Users Manual Rev 0.1 May 2009

Ethernet

Port G and H

VDDE

3 3.3V

Nexus

Custom Domain

VDDE

NEX 3.3V

Regulator

Used On

2

.5V

3.3V

5.0V

5.0V

3.1.5.1 Changing VDDE[1..4] Voltage

Before changing the VDDEx voltage from the default 5.0V setting, you need to ensure that this will not impact
any of the EVB peripherals that you are using. The table below details what EVB peripherals are tied to a
particular VDDEx grouping and also the MCU pin operating voltage suitable for that peripheral.

Table 3-3 VDDE[1..3] Pad Groupings

Item Port Pins VDDE Group Required Pad Voltage

CANA and CANB Port D VDDE2 5.0V or 3.3V
SCI A and B Port D VDDE2 5.0V or 3.3v
LIN C and D Port E VDDE2 5.0V or 3.3v
FlexRay Port K VDDE2 5.0V or 3.3V
JTAG Dedicated JTAG VDDE2 5.0V or 3.3V

3.1.6 Regulator Power Domains

Before disabling any of the EVB regulators, it is worthwhile considering if any of the EVB components or
peripherals you require will be affected. Table 3-4 details a list of the various EVB components and
peripherals powered by the regulators.

Table 3-4 Power Supply Distribution

MCU VDDEMLB pins

(Switcher)

MLB INIC

1.5V Power section of Prototype area
MCU VDD33 and VDDSYN pins (ONLY use when on-chip MCU regulator is

(Switcher)

disabled)

MCU VDDEx pins (when run in 3.3v mode)
Oscillator Module (U20)
MLB INIC
RS-232 Transceiver (VDDE2 dependant)
LIN transceiver (VDDE2 dependant)
I/O supply for Flexray interface when VIO is 3.3V
LVI circuitry

3.3V Power section of Prototype area
MCU VDDEx (5v mode), VPP and VDDR pins

(Switcher)

LVI circuit main power (affecting Reset Switch)
Reset-In / Reset-Out logic
Reset configuration circuitry
User LED’s and Switches.
RS-232 Transceiver (VDDE2 dependant)
LIN transceiver (VDDE2 dependant)
CAN transceivers
FlexRay transceivers

5.0V Power section of Prototype area
JTAG and Nexus connectors

MCU VDDA pin

(Linear)

LVI circuit monitor

MPC5668EVBUM/D Page 8 of 29

MPC5668EVB Users Manual Rev 0.1 May 2009

Jumper

Position

PCB

Description

(D)

(D)

(D)

(D)

MCU

3.2 MCU Clock Control

The MCU clock

control jumpers are
located close to
crystal oscillator
modules.

3.2.1 Main Clock Selection (J85, J87, J61 and J66)

The EVB supports three possible MCU clock sources:

(1) The local 40MHz ALC pierce oscillator circuit
(2) An oscillator module on the EVB (U20), driving the MCU EXTAL signal
(3) An external clock input to the EVB via the SMA connector (P32), driving the MCU EXTAL signal

The clock circuitry is shown in the diagram below. Please refer to the appropriate daughter card user manual
for specific jumper numbers and circuitry.

Oscillator

Module

(U20)

J85

J87

SMA

(P32)

Figure 3-5 EVB Clock Selection

Table 3-5 Clock Source Jumper Selection

3.3V_SR

Local Crystal

Circuit (Y2)

1

1

GND

EVB Clock Circuitry

J66

EXTAL

XTAL

J61

Legend

J85 (U20 PWR)

J87 (OSC SEL)

J66
Must Match J61
J61
Must Match J66

FITTED

REMOVED

1-2

2-3

1-2

2-3 GND MCU Clock is Selected by J87

1-2

2-3 EVB MCU Clock is Selected by J87

EVB oscillator module U20 is powered

MOD

SMA

Y2 MCU Clock is Y2

Y2 MCU Clock is Y2

EVB oscillator module U20 is not
powered

Daughter card EXT-CLK is routed from
U20

Daughter card EXT-CLK is routed from
P32 SMA Connector

Note that the 3.3V regulator must be enabled when using oscillator module Y1.

CAUTION

The MPC5668 clock circuitry is all 3.3v based. Any external clock signal driven into the SMA connector must
have a maximum voltage of 3.3V.

MPC5668EVBUM/D Page 9 of 29

MPC5668EVB Users Manual Rev 0.1 May 2009

Jumper

Position

PCB

Description

(

D)

(D)

MCU

3.2.2 32Khz External Clock Selection (J67 and J71)

The EVB also supports an external 32KHz watch crystal that can be used as a timing source within the MCU.
The 32Khz crystal can be optionally connected to PA[14] and PA[15] of the MCU. When using the 32KHz
crystal PA[14] and PA[15] will not be visible on P17 Port A header.

PA[14]

PA[15]

32Khz Crystal

Circuit (Y3)

Figure 3-6 EVB Clock Selection

Table 3-6 32Khz Crystal Jumper Selection

32KHz EVB Clock Circuitry

J67

1

J71

1

EXTAL32 / PA[14]

XTAL32 / PA[15]

J67
Must Match J71

J71
Must Match J67

Legend

1-2

Y3 32Khz Crystal (Y2) is connected to MCU

2-3 PA[14] Pin functions as Normal I/O

1-2

2-3

Y3 32Khz Crystal (Y2) is connected to MCU

PA[15]

Pin functions as Normal I/O

MPC5668EVBUM/D Page 10 of 29

MPC5668EVB Users Manual Rev 0.1 May 2009

Regulator

Minimum Voltage Before

MCU

Jumper

Position

PCB Legend

Description

(D)

(D)

3.3 Reset Control (Jumper J75)

The RESET switch (RED)

and LVI circuitry is located
to the t left of the MCU in
the area titled “RESET “

The EVB incorporates an LVI (Low Voltage Inhibit) device to provide under-voltage protection for the two main
switching regulators (5v and 3.3v). When either of these regulator voltages drops below a certain threshold
level, the LVI will assert the MCU reset line to prevent incorrect operation of the MCU (or EVB circuitry).

The table below shows the approximate threshold voltages for each regulator

Table 3-7 LVI Monitor Threshold Voltages

reset

5.0V Switcher 1.47V

3.3V Switcher 1.47V

The LVI is powered from the 5.0V switching regulator and monitors the 3.3V regulator using a 2nd power fail
monitor circuit. The LVI also provides a de-bounced input for EVB reset switch SW5.

Jumpers are provided to disable either the main LVI reset out (which affects the reset from the 5.0V switching
regulator and from the reset switch) or the power fail out circuit (which only affects the reset from the 3.3V
regulator). If the 5v regulator LVI is disabled, the reset switch will not function.

Table 3-8 LVI Control Jumpers

J75

Posn 1-2

FITTED

REMOVED

5.0V switching regulator is monitored, Reset switch
active

5.0V switching regulator is not monitored, Reset
switch inactive

J75

Posn 3-4

FITTED

REMOVED

3.3V switching regulator is monitored

3.3V switching regulator is not monitored

Notes:

- If the 5.0V switching regulator is disabled for any reason, the LVI circuit will attempt to assert the MCU
Reset signal. Jumper shunts on jumper J20 position 1-2 and 3-4 must be removed in this situation.
This will also leave the reset switch SW5 inoperative.

- If the 3.3V regulator is disabled, the shunt on jumper J20 position 3-4 must be removed to prevent the
LVI asserting reset.

3.3.1 Reset LEDs

There are two reset LED’s, DS2 (AMBER) and DS3 (RED), placed adjacent to the EVB RESET switch to
indicate the RESET status of the EVB and MCU.

LED DS3, titled “RST”, will illuminate if the MCU itself issues a reset. In this condition, LED DS2 will not
illuminate.

LED DS2, titled “USR”, will illuminate when one of the following external hardware devices issues a reset to
the MCU:

- LVI circuitry (either an under-voltage detection or the reset switch is being pressed)

- There is a reset being asserted from the user connectors or from the daughter card

- There is a reset being driven from the Nexus or JTAG debug probe

Note that LED DS3 (MCU Reset) will also illuminate during an external (user) reset!

MPC5668EVBUM/D Page 11 of 29

MPC5668EVB Users Manual Rev 0.1 May 2009

Jumper

Position

PCB Legend

Description

(D)

MCU

3.3.2 Reset Buffering Scheme

The MPC5668 family has a single reset pin. This single pin functions as a dual purpose input / output signal,
providing Reset-In and Reset-Out functionality.

There is a lot of circuitry on the EVB that has access to the reset pin. In order to reduce the loading on the pin
(when the MCU is diving the reset signal) and also to allow connection of non open-drain reset inputs, a reset­in and reset-out buffering scheme is implemented as shown in Figure 3-7.

Reset-In - There are 3 possible external sources of reset:

- JTAG / Nexus connector reset

- User reset (from user connectors)

- LVI reset circuitry, including the reset switch.

Each of these reset sources is fed into the input of an AND gate and then converted to an open­drain output which is directly connected to the MCU reset pin.

Reset-Out - The MCU reset pin is buffered to provide a reset-out signal, capable of driving the reset LED and
also multiple devices requiring a reset input.

The reset buffering scheme is detailed below:

Reset IN

From JTAG / Nexus

From TGT

From LVI (5v)

From LVI (3.3v)

J75

Tri State Buffer

GND

J68

RESET

Reset OUT

Reset OUT

(To RED Reset LED, BDM Reset In,
external device reset)

Figure 3-7 EVB Reset Buffering Scheme

Jumper J17 is used to completely disconnect the reset-in buffering if desired. This is for debug purposes only
and should normally be left connected. Disconnecting this jumper will mean no external MCU reset can be
achieved

Table 3-9 Reset-Out Control Jumper

J68
(RST-IN)

MPC5668EVBUM/D Page 12 of 29

FITTED

REMOVED

External reset source (LVI, Debug or Target) will be
able to assert MCU reset

External reset is disabled (Not recommended)

MPC5668EVB Users Manual Rev 0.1 May 2009

Jumper

Position

PCB Legend

Descr

iption

(D)

Jumper

Position

PCB Legend

Description

(D)

Jumper

Position

PCB Legend

Description

(D)

3.3.3 Reset Boot Configuration (J69)

The MPC5668 has a single boot configuration pin (BOOTCFG) which determines the boot location of the
MCU based on the state of the pin at POR (Power On Reset). This is shown in the table below:

Table 3-10 BOOTCFG Control

1-2

J69 (BOOT CFG)

2-3 SERIAL MCU boots from external serial source

3.4 ONCE and Nexus Configuration (J32, J70)

ON

The EVB supports a standard ONCE cable with a 14-pin 0.1” walled header footprint. There is also a 38-pin
MICTOR connector for Nexus debug. Nexus debug is only supported when using a 256MAPBGA MPC5668.

There are two generic jumpers associated with both the ONCE and Nexus, as detailed below

Some debug probes have the ability to assert and also monitor the state of the MCU reset line. This is not
possible when the reset signal is buffered so a jumper (J32) is included to allow routing the debug reset signal
direct to the MCU reset pin or via the EVB Reset-In buffering.

Table 3-11 JTAG / NEXUS Target Reset Routing

FLASH MCU boots from internal flash

The ONCE and NEXUS

connectors are located at
the left hand edge of the

1-2

J32 (JRST)

2-3

BUF

DIR

JTAG reset signal is buffered to MCU RESET pin
(connected to the MCU Reset-In circuitry)

JTAG reset signal is connected direct to MCU
RESET pin

Some debug manufacturers specify whether the debug TCLK signal is pulled low or high. Jumper J70
provides the ability to select whether TCLK is pulled to GND or VDDE2. For low power operation, TCLK

should be pulled to GND.

Table 3-12 ONCE / NEXUS TCLK Termination Control

1-2

J70

(TCLK PULL)

2-3

VDDE2

GND

JTAG / NEXUS TCLK signal is pulled to VDDE2 via
10KΩ

JTAG / NEXUS TCLK signal is pulled to GND via
10KΩ

Note – J70 is located to the right of the reset LED’s, out-with the ONCE / Nexus connector area.

MPC5668EVBUM/D Page 13 of 29