Foxconn M612-1-01 Schematics

5

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3

2

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Schematics Page Index (Title / Revision / Change Date)

Page

01
02
03
04

D D

05
06
07
08
09
10
11
12
13
14
15
16
17
18

C C

19
20
21
22
23
24
25
26
27
28
29
30
31
32

B B

33
34
35
36
37
38
39
40

Title of Schematics Page
Schematics Page Index
Block Diagram
CLOCK GEN (CK505)
MEROM(HOST BUS) 1/2
MEROM(HOST BUS) 2/3
MEROM(Power/Gnd) 3/3
Crestline (HOST) 1/7
Crestline (DMI) 2/7
Crestline (GRAPHIC) 3/7
Crestline (DDRII) 4/7
Crestline (POWER,VCC) 5/7
Crestline (VCC CORE) 6/7
Crestline (VSS) 7/7
DDRII(SO-DIMM_0) 1/3
DDRII(SO-DIMM_1) 2/3
DDRII(Termination) 3/3
VGA(PCI-E)
VGA(STRAP)
VGA(GDDR)
VGA(MULTIUSE)
VGA(LVD/VDAC )
VRAM(GDDR)# 1/4
VRAM(GDDR)# 2/4
VRAM(GDDR)# 3/4
VRAM(GDDR)# 4/4
VGA(POWER) 1/3
VGA(POWER) 2/3

VGA(POWER) 3/3
VRAM(BYPASS) 1/4
VRAM(BYPASS) 2/4
VRAM(BYPASS) 3/4
VRAM(BYPASS) 4/4

TVIN and OUT/Semi-PnP#

CRT

LVDS

HDMI

MINI PCI (TV)

ICH8-M( PCI/USB ) 1/5

ICH8-M(LPC,IDE,SATA)2/5

ICH8-M( GPIO) 3/5

Rev.

1.0

1.0

1.0

2.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

Date

2007/8/24
2007/8/24
2007/8/24

2007/8/30

2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
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2007/8/24
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2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24

Page

41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80

ICH8-M( POWER) 4/5
ICH8-M( GND) 5/5
LAN (88E8055 MARVELL)
EC+KBC (3910)
Flash ROM/XBUS
SATA HDD RAID
PATA CD-ROM
PCI (PCI BUS)
PCI ( ILINK)
PCI (MS-STD/DUO/MDC/SD)
PCI ( PCMCIA)
Bluetooth
Mini-PCIE Card
EXPRESS
USB2.0
CIR Reciver
FAN / HW THERMAL PROTECTION
Daughter Board Conn.
CAM/OIDE

Logo LED

AUDIO(CODEC & POWER)
AUDIO( AMP & HP & SPK)
AUDIO (MUTE & INTMIC)
AUDIO (Second Codec)
Audio BOARD conn
Power Design Diagram
DCIN&Charger
SYS Power (+3_3V/+5V)
SYS Power(+1_5V/+1_05V)
DDR2 Power(+1_8V/+0_9V)
CPU_Vcore ---MAX8771
Others power plan
OVP protection
VGA POWER(+1_1V/ +1_2V)
Inverter Boost Circuit
HOLE & BOSS
HISTORY(DVT)

1.0

1.0

1.0

2.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

2.0

1.0

1.0

1.0

1.0

DateRev.Title of Schematics Page

2007/8/24
2007/8/24
2007/8/24

2007/8/30

2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24
2007/8/24

2007/8/30

2007/8/24
2007/8/24
2007/8/24
2007/8/24

Design byP. Leader Check by

A A

Project Code & Schematics Subject:

5

PCB P/N:M612 PVT Main Board

黃田

翰宇博德

4

3

2

FOXCONN

Title

Index Page

Size Document Number Rev

(M612-1-01 )MainBoard (MBX-176) 2007.8.24

A3

Date: Sheet

HON HAI PRECISION IND. CO., LTD.
CPBG - R&D Division

181Friday, August 31, 2007

1

of

1.0

1

M612(Beagle Santa Rosa )Block Diagram

2

3

4

5

6

7

8

Red texts:
New modified

A A

B B

S-OUT

PAGE 29

LVDS

WSXGA+

PAGE 31

VGA

D-type-15p

PAGE 30

HDMI
(HDCP)

PAGE 32

Audio
Daughter
Board

USB 2.0
CONN

Audio board

S-OUT/LVDS/VGA/HDMI

SPDIF

Audio board

Ext. Mic In
Jack

Audio board

HEAD
PHONE
JACK

Audio board

Int. Speaker

1.0 Walt x 2
PAGE 58

Int. Microphone

PAGE 59

RJ11

SPDIF

APA2068KAI-TRL

PAGE 58

MDC 1.5
Modem

12 pin

PAGE 46

EEPROM

HDMI A KEY

ACL262
CODEC

PAGE 60

CXD9872AKD
CODEC

PAGE 57

ANPEC

GFX

nVIDIA

H

NB8P-GS(HDMI)

M

NB8M-GT(HDMI)

L NB8M-GT(HDMI)

GDDR3 1.8V SDRAM

PAGE 17~31

SPDIF

for

HDMI

AZALIA

AZALIA

AZALIA

USB2.0

33MHZ, 3.3V PCI BUS

M611 BOM configuration

unstuff

NB8P-GS + NB8M-GT
NB8P-GS

NB8M-GT

C C

NB8M-GT

NB8M-GT for L Model

NB8X + Hynix VRAM

NB8M+16Mx32 VRAM

NB8P + 16Mx32bit VRAM

NB8M + 8Mx32bit VRAM

NB8X + Infineon VRAM
NB8X +

Infineon & Samsung VRAM
NB8X +

Hynix & Infineon VRAM

D D

NB8X + 16Mx32bit VRAM

NB8X + 8Mx32bit VRAM

*JP Digital TV Tuner SKU
unstuff

Mini PCI CONN,BT CONN,
IR CONN,FeliCa CONN
unstuff for L Model

NC_
NV_

NV8P_
NV8M_

NV8MM_
NV8ML_
NVH_
NVNEW

NVNOR

NVNOR

NVI_
NVIS_
NVHS_
NV16_
NV8_
JDTVNC_

LNC_

1

PCMCIA
Conn.

PAGE 47
MS DUO

PAGE 46

SD Mini P C I

PAGE 46

i.LINK
PAGE 45

RJ45

PAGE 39

TI PCI8412ZHK

CardBus
CardReader
i.LINK

PAGE 44~47

Transformer
Netswap,
NS682403P,

Mini stereo
PAGE 29

B-CAS

PAGE 33

S-IN

PAGE 29

F/PAL

PAGE 39

JP Digital only

Ethernet G-LAN
88E8055
MARVELL
10/100/1000

(TV)

PAGE 33

PAGE 39

PWM

FAN Lid Switch

PAGE 53

2

3

& LED

PAGE 54 PAGE 54 PAGE 41

4

CPU
Merom
Processor

Micro-FCBGA-478
(Socket 478 -pin Micro FCPGA)

PCIE X16

PAGE 4~6

North Bridge
Crestline

FCBGA-1299pin

PAGE 7~13

Controller
Link0

South Bridge
ICH8M / ICH8M-E

BGA_652pin

SKU(H):Enhanced
SKU(M)(L):Base

PAGE 34~38

LCI

PCIE

ENE KB3910SFC1

LQFP-176

Touchpad

PS/2

Flash BIOS
1MB

5

FSB
800 MHZ

X2/X4 DMI
(Direct Media Interface)

LPC

SMB Channel 1

SMB Channel 2

ISA

IDE ATA 100

PATA
ODD

PAGE 43

BATT CONN.

PAGE 63

USB2.0

PCIE + USB2.0

PCIE

USB2.0

USB2.0

SATA 3Gb/s

SATA
HDD -RAID0

PAGE 42

Thermal Sensor
F75384M
(CPU/GMCH)

uSOP-8

PAGE 4

6

Clock Gen.
CK505

ICS,ICS9LPR358YGLFT

PAGE 3

2

SATA
HDD -RAID1

PAGE 42

Thermal Sensor
F75383M
(VGA/DIMM)

uSOP8

PAGE 20

X,TAL

14.318MHZ

256MB/512MB/1GMB/2GMB

SO-DIMM 0
667 MHZ
DDR(II)

200 pin

PAGE 14

SO-DIMM 1
667 MHZ
DDR(II)

200 pin

PAGE 15

USB 2.0
CONN.X2

PAGE 51

Express Card

PAGE 50

Mini-Card
PCIE

PAGE 49

CAM(1.3M)

PAGE 50

Bluetooth

USB2.0

PAGE 48

Oide

USB2.0

PAGE 50PAGE 40

IR Reciver

USB2.0

PAGE 52

FOXCONN

Title

Block Diagram

Size Document Number Rev

(M612-1-01 )MainBoard (MBX-176) 2007.8.24 1.0

C

Date: Sheet

7

HON HAI PRECISION IND. CO., LTD.
CPBG - R&D Divisio n

281Friday, August 31, 2007

of

8

11/2 backup
for EMI request
close to R46

NC_0.1U_10V_K

0402_X5R

CKG_IO_VOUT

D D

C C

This dumping resistor
and FB should be
placed close to U18,
update for MOR
requirement on12/23.

B B

33 MHz Port
PCI0 (pin1)
PCI1 (pin3)
PCI2 (pin4)
PCI3 (pin5)
PCI4 (pin6)
PCI5-F (pin7)

100 MHz Port
SRC0 (pin13,14)
SRC1 (pin17,18)
SRC2 (pin21,22)
SRC3 (pin24,25)
SRC4 (pin27,28)

A A

SRC6(pin40,41)
SRC7(pin43,44)
SRC8(pin46,47)
SRC9(pin30,31)
SRC10(pin34,35)
SRC11(pin32,33)

+1_25VRUN

C1941

12

R1023
NC_33_J

0402

1 2

1

G

12

0402

C928

NC_100P_50V_K_N

Length as short
as possible.

PCLK_MINI37

5

HCB2012KF-121T30

33P_50V_J_N

CPU_BSEL0

CLK_ICHPCI38

PCLK_CB48

CLK_KBCPCI44

PCLK_JIG45

0402

L6 120R-100MHZ_0805

HCB2012KF-121T30

L10 120R-100MHZ_0805

HCB2012KF-121T30

L15 120R-100MHZ_0805

HCB2012KF-121T30

L13 120R-100MHZ_0805

A0501

C80

R1055 0_J 0402

R59 12.1_F 0402

R62 12.1_F 0402

TP943 26MIL

R_PCLK_MINI

SMB_CLK_SUS14,15,40,54
SMB_DATA_SUS14,15,40,54

R_SRCT1_27M_NON20
R_SRCC1_27M_SS20

R46 0_J 0805

1 2

R47
NC_10_J

0603

1 2
32

D

Q23

NC_BSS138

S

If 9LP505, populate R47,R1023,C928,Q23
and depopulate R46.
Ig 9LP501, populate R46 and depopulate
R47,R1023,C928,Q23.

CLK_CB4848

CLK_USB4840

R71 100_J

1 2

CLK_PCIE_ICH#38

CLK_PCIE_ICH38

M610
NC
NC
Debug card/EC(KBC)
PCI8402
TV tuner
ICH8

M610 setting configuration
GFX PCIE_PEG
(SRC0 /SRC1 only either one)
PCIE SATA
PCIE ICH8
PCIE MINI
PCIE G-LAN
NC
NC
MCH 3GPLL
PCIE EXPRESS
CR#G(MCH)/CR#H(EXPRESS)

5

12

C151

0.1U_16V_Y_Y

0402

12

C135

0.1U_16V_Y_Y

0402

12

C155

0.1U_16V_Y_Y

0402

12

C149

0.1U_16V_Y_Y

0402

Y1

ITTI_L5030-14.31818-20

14.318MHZ_20P_30PPM

1 2

12

0402

1 2
1 2

1 2

R65 2.2K_J 0402
R74 0_J 0402

33
RP6

0404_4P2R

MS90
NC
NC
Debug card
PCI8402
EC(KBC)
ICH8

12

C81
33P_50V_J_N

0402

1 2
1 2

1

R72 22_F 0402

1 2

R68 22_F 0402

1 2

R2203 12.1_F 0402

1 2

R2204 12.1_F 0402

1 2

L150

MMZ1005D241CT

240R-100MHZ_0402

2 3
1

S/W Setting this pin type
(B2b0=0) for use SRC0

(B4b7=1;B5b3=0,B5b1=0) for use SRC3
(B2b1=0) for use SRC4

12

12

12

12

V1P0B
V1P0D
V1P0C
V1P0S

U2_XTALIN

U2_XTALOUT

R_FSLA_USB48M
R_FSLB_TEST_MODECPU_BSEL1

CKG_IO_VOUT

R_PCI_F5_ITP_EN

R_PCI3

R_PCI2_TME

R_PCI4_27M_SEL

R_CLK_PCIE_ICH#
R_CLK_PCIE_ICH

4

R_SRCT1_27M_NON
R_SRCC1_27M_SS

C87
10U_6.3V_M

0805_X5R

C96
10U_6.3V_M

0805_X5R

C97
10U_6.3V_M

0805_X5R

C150
10U_6.3V_M

0805_X5R

(B3b3=1,B6b7=0,B6b6=0) for use SRC7(not control CR#E/F)

(B3b7=0,B3b6=0 for use CLKREQ G,H)

4

+3VRUN

V1P0B

V1P0D

V1P0C

V1P0S

12
49
20
45
36
26

60

59

10
57

48

7

5

4

6

64
63

25
24

17
18

15
19
23
29
42
11
52

8

58

U18

VDD96_IO
VDDCPU_IO
VDDPLL3_IO
VDDSRC_IO3
VDDSRC_IO2
VDDSRC_IO1

X1

X2

FSLA/USB_48MHZ
FSLB/TEST_MODE

NC

PCI_F5/ITP_EN

PCI3

PCI2/TME

PCI4/27_Select

SCLK
SDATA

SRCC3/CR#_D
SRCT3/CR#_C

SRCT1/SE1/27MHZ_nonss
SRCC1/SE2/27MHZ_SS

GND1
GND2
GNDSRC1
GNDSRC2
GNDSRC3
GND48
GNDCPU
GNDPCI
GNDREF

ICS9LPR358YGLFT

12

12

12

+3V_CLK_3F

55

S/W Setting CLKREQ for this pin

CR#A (B5b7=1;B5b6=1)
CR#B (B5b5=1,B5b4=1)

CR#E (not control)
CR#F (not control)

CR#G (B6b5=1)
CR#H (B6b4=1)

4

HCB2012KF-121T30

L17 120R-100MHZ_0805

+3V_CLK_3D

C43

0.01U_16V_K_B

0402

+3V_CLK_3E

C44

0.01U_16V_K_B

0402

+3V_CLK_3F

C45

0.01U_16V_K_B

0402

+3V_CLK_3D

+3V_CLK_3C

+3V_CLK_3A

+3V_CLK_3E

+3V_CLK_3B

2

9

16

61

39

VDD48

VDDPCI

VDDREF

VDDCPU

VDDSRC

VDDPLL3

PCI_STOP#

CPU_STOP#

CPUT1_F
CPUC1_F

SRCT8/CPUT2_ITP

SRCC8/CPUC2_ITP

SRCT7/CR#_F

SRCC11/CR#_G

SRCC7/CR#_E

PCI1/CR#_B

SRCT11/CR#_H

SRCT2/SATAT

SRCC2/SATAC

PCI0/CR#_A

SRCT0/DOTT_96

SRCC0/DOTC_96

CK_PWRGD/PD#

FSLC/REF0/TEST_SEL

SM bus Address :
1101001 (ICH7)
For clock generator

12

C782
1U_25V_K_B

0603

12

C784
1U_25V_K_B

0603

12

C781
1U_25V_K_B

0603

CPUT0
CPUC0

SRCT9
SRCC9

SRCT6
SRCC6

SRCT4
SRCC4

SRCC10
SRCT10

R39
1_F 0402

1 2

R42
1_F 0402

1 2

R43
1_F 0402

1 2

38
37

51
50

54
53

47
46

44

30
31

32

41
40

43

27
28

3

35
34

33

21
22

1

13
14

56
62

12

R_CLK_MCH_BCLK

R_CLK_MCH_BCLK#

R_CLK_CPU_BCLK

R_CLK_CPU_BCLK#

R_SRC8_CPU2ITP
R_SRC8#_CPU2#ITP

R_SRCT7_CR#_F

R_CLK_MCH_3GPLL
R_CLK_MCH_3GPLL#

R_SRCC11_CR#_G

R_SRC6
R_SRC6#

R_SRCC7_CR#_E

R_CLK_PCIE_MINI
R_CLK_PCIE_MINI#

R_PCI1_CR#_B

R_CLK_PCIE_EXP#
R_CLK_PCIE_EXP

R_SRCT11_CR#_H

R_CLK_PCIE_SATA
R_CLK_PCIE_SATA#

R_PCI0_CR#_A

DOT96_OR_SRC0
DOT96#_OR_SRC0#

R_CLK_ICH14

1 2

R2190 10K_J 0402

CPU_BSEL05

CPU_BSEL15

CPU_BSEL25

3

R41
1_F 0402

1 2

R44
1_F 0402

1 2

R45
1_F 0402

1 2

C83
10U_6.3V_M

0805_X5R

RP1

RP2

RP4

RP104

RP7

RP8

RP5

RP9

1 2

R79 33_F 0402

CPU_BSEL2

R83

R91

R86

R2121

R89

R2123

3

+3V_CLK_3A

12

C46

0.01U_16V_K_B

0402

+3V_CLK_3B

12

C47

0.01U_16V_K_B

0402

+3V_CLK_3C

12

C48

0.01U_16V_K_B

0402

4

4

1

TP997 26MIL

1

TP998 26MIL

1

TP999 26MIL

4

4

1

TP1000 26MIL

4

1
2 3

4

4

0_J 0402

1 2

1 2

NC_1K_J 0402

0_J 0402

1 2

1 2

NC_1K_J 0402

0_J 0402

1 2

1 2

NC_1K_J 0402

12

C785
1U_25V_K_B

0603

12

C783
1U_25V_K_B

0603

12

C786
1U_25V_K_B

0603

TP737

1

26MIL

23
1

330404_4P2R

23
1

330404_4P2R

1
23

330404_4P2R

23
1

330404_4P2R

1
23

330404_4P2R

4

330404_4P2R

1
23

330404_4P2R

1
23

330404_4P2R

CLK_EN 40

CLK_ICH14 40

Connect this pin via a 10 K
series resistor to the FSC
pin on the processor

Connect this pin via a 2.2 K
series resistor to the FSA
pin on the processor,

R2119

R2120

R2122

PM_STPPCI# 40
STP_CPU# 40

2007/1/1 Roger request

CLK_MCH_BCLK 7
CLK_MCH_BCLK# 7

CLK_CPU_BCLK 4
CLK_CPU_BCLK# 4

CLK_MCH_3GPLL 8
CLK_MCH_3GPLL# 8

CLK_PCIE_GLAN 43
CLK_PCIE_GLAN# 43

CLK_PCIE_MINI 53
CLK_PCIE_MINI# 53

CLK_PCIE_EXPRESS# 54
CLK_PCIE_EXPRESS 54

CLK_PCIE_SATA 39
CLK_PCIE_SATA# 39

CLK_PCIE_PEG 17
CLK_PCIE_PEG# 17

1 2

NC_1K_J 0402

1 2

NC_1K_J 0402

1 2

NC_1K_J 0402

+1_05VRUN

MCH_BSEL0 8

+1_05VRUN

MCH_BSEL1 8

+1_05VRUN

MCH_BSEL2 8

2

FSB Frequency Table:

FSLC FSLB FSLA CPU SRC[7:0] PCI FSB

1 0 1 100 100 33 /
0 0 1 133 100 33

0 1 1 166 100 33 667
0 1 0 200 100 33 800

0 0 0 266 100 33
1 0 0 333 100 33
1 1 0 400 100 33
1 1 1 (Reserced)

R2113 NC_10K_J0402

1 2

+3VRUN

R2103 NC_10K_J 0402

1 2

R2104 10K_J 0402

1 2

+3VRUN

R2285 NC_10K_J 0402

1 2

R2105 10K_J 0402

1 2

+3VRUN

R2106 NC_10K_J 0402

1 2

R_PCI0_CR#_A

R_PCI1_CR#_B

R_SRCC11_CR#_G

R_SRCT11_CR#_H

Check List 1.301
*.CFG[2:0] do not have internal pullups or pull downs.
Please refer to the latest Crestline EDS volume 1 for
configuration options
*.1 k pull-up or pull-down or direct connect from processor.

MS90
only MCH_BSEL[0..2]pull down 1K

2

R_PCI_F5_ITP_EN

R_PCI2_TME

R_PCI2_TME

R_PCI4_27M_SEL

+3VRUN

475_F 0402

1 2

R2108

+3VRUN

475_F 0402

1 2

R2110

+3VRUN

475_F 0402

1 2

R2116

+3VRUN

475_F 0402

1 2

R2118

close to terminal side (For EMI)

CLK_CB48

12

C1839NC_10P_50V_E_N 0402

CLK_USB48

12

C1841NC_10P_50V_E_N 0402

CLK_KBCPCI

12

C1843NC_10P_50V_E_N 0402

PCLK_CB

12

C1845NC_10P_50V_E_N 0402

FOXCONN

Title

Size Document Number Rev

A3

Date: Sheet

pin7 setting 0=SRC8,1=ITP for pin 46,47

pin4 setting 0= Overclocking of CPU and SRC Allowed
1= Overclock i ng o f C P U a n d S R C N O T al l o w e d

pin6 setting 0= LCD_SST 100MHz differential clock.
for pin17,18 1= 27MHz non-spread SE clock,

R2107 10K_J 0402

1 2

R2109 10K_J 0402

1 2

R2115 10K_J 0402

1 2

R2117 10K_J 0402

1 2

CLOCK GEN(CK505)

(M610-1-01 )MainBoard (MBX-176) 2007.1.4 2.0

1

/

/
/
/

SATACLKREQ# 40

MINI_CARD_DET# 53

MCH_CLK_REQ# 8

EXPRESS_DET# 54

PCLK_MINI

12

C1840NC_10P_50V_E_N 0402

CLK_ICHPCI

12

C1842NC_10P_50V_E_N 0402

CLK_ICH14

12

C1844NC_10P_50V_E_N 0402

PCLK_JIG

12

C1846NC_10P_50V_E_N 0402

HON HAI PRECISION IND. CO., LTD.
CPBG - R&D Division

1

of

381Friday, August 31, 2007

5

H_A#[35..3]7

D D

H_ADSTB#07

H_REQ#[4..0]7

Layout note:
no stub on H_STPCLK TP.
H_STPCLK# to be routed in daisy
chain fashion from ICH to LPC slot
and then to CPU.

+1_05VRUN

12

32

D

G

S

2N7002

Add H_A#[32..35]

TP7 26MIL
TP8 26MIL
TP10 26MIL
TP11 26MIL
TP12 26MIL
TP14 26MIL
TP16 26MIL
TP18 26MIL
TP20 26MIL
TP22 26MIL

PROCHOT#

Q70

C C

H_ADSTB#17

H_A20M#39

H_FERR#39

H_IGNNE#39

H_STPCLK#39

H_INTR39
H_NMI39

H_SMI#39

B B

+3VRUN

Q71

OVT_EC#

A A

B

2

12

R1118

2.2K_J

0402

A0205

C
E

DTC144EUA

1 3

5

R1117

68_J

0402

1

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

TP_CPU_RSVD01

1

TP_CPU_RSVD02

1

TP_CPU_RSVD03

1

TP_CPU_RSVD04

1

TP_CPU_RSVD05

1

TP_CPU_RSVD06

1

TP_CPU_RSVD07

1

TP_CPU_RSVD08

1

TP_CPU_RSVD09

1

TP_CPU_RSVD10

1

Base on BRC change net name

NC_S-80927CLMC-G6XT2G_3.1

1 2

4

4

CD1

C1904
NC_470P_50V_K_B

0402

NC

5

CD

4

U1A

J4

0

A[3]#

L5

A[4]#

L4

A[5]#

K5

A[6]#

M3

A[7]#

N2

A[8]#

J1

A[9]#

N3

A[10]#

P5

A[11]#

P2

A[12]#

L2

A[13]#

P4

A[14]#

P1

A[15]#

R1

A[16]#

M1

ADSTB[0]#

K3

REQ[0]#

H2

REQ[1]#

K2

REQ[2]#

J3

REQ[3]#

L1

REQ[4]#

Y2

A[17]#

U5

A[18]#

R3

1

A[19]#

W6

A[20]#

U4

A[21]#

Y5

A[22]#

U1

A[23]#

R4

A[24]#

T5

A[25]#

T3

A[26]#

W2

A[27]#

W5

A[28]#

Y4

A[29]#

U2

A[30]#

V4

A[31]#

W3

A[32]#

AA4

A[33]#

AB2

A[34]#

AA3

A[35]#

V1

ADSTB[1]#

A6

A20M#

A5

FERR#

C4

IGNNE#

D5

STPCLK#

C6

LINT0

B4

LINT1

A3

SMI#

M4

RSVD[01]

N5

RSVD[02]

T2

RSVD[03]

V3

RSVD[04]

B2

RSVD[05]

C3

RSVD[06]

D2

RSVD[07]

D22

RSVD[08]

D3

RSVD[09]

F6

RSVD[10]

CPU SOCKET_478P

FOX_PZ4782A-274M-01

+ECVCC

23

U154

VDDVSS
OUT

ADDR GROUP

BPRI#

DEFER#

DRDY#
DBSY#

IERR#

LOCK#

CONTROL

RESET#

RS[0]#
RS[1]#
RS[2]#

TRDY#

HITM#

ADDR GROUP

BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#

PRDY#

PREQ#

TRST#

XDP/ITP SIGNALS

THERMAL

PROCHOT#

THERMDA

THERMDC

ICH

THERMTRIP#

H CLK

BCLK[0]
BCLK[1]

RESERVED

1

ADS#
BNR#

BR0#

INIT#

HIT#

TCK

TDI
TDO
TMS

DBR#

+1_05VRUN

H1
E2
G5

H5
F21
E1

F1

H_IERR#

D20
B3

H4

TP721 26MIL

C1

H_RS#0

F3

H_RS#1

F4

H_RS#2

G3
G2

G6
E4

XDP_BPM#0

AD4

XDP_BPM#1

AD3

XDP_BPM#2

AD1

XDP_BPM#3

AC4

XDP_BPM#4

AC2

XDP_BPM#5

AC1

XDP_TCK

AC5

XDP_TDI

AA6

XDP_TDO

AB3

XDP_TMS

AB5

XDP_TRST#

AB6

A0206

C20

PROCHOT#

D21

H_THERMDA

A24

H_THERMDC

B25

PM_THRMTRIP#

C7

A22
A21

R2243

NC_0_J 0402

PLT_RST#8,17,38,43,44,45,47,51,53,54

R1537

1 2

2.2K_J

0402

PM_THRMTRIP#

3

2007/1/1

TP736

1

12

Roger request

26MIL

1

1
1
1
1
1

1

1

ICH8M's GPIO12: VIL---> -0.5V ~ 0.8V
VIH---> 2.0V ~ 3.3+0.5V
MEROM's PROCHOT#: VIL---> -0.1V ~ 0.3*VCCP
VIH---> 0.7*VCCP ~ VCCP+0.1

1

Q4

1

A0203

+ECVCC

G

B

3

H_ADS# 7

H_BNR# 7

H_BPRI# 7

H_DEFER# 7

H_DRDY# 7
H_DBSY# 7

H_BREQ#0 7

H_INIT# 39

H_LOCK# 7

H_CPURST# 7

H_RS#[2..0] 7

H_TRDY# 7

H_HIT# 7

H_HITM# 7

TP126MIL
TP226MIL
TP326MIL
TP426MIL
TP526MIL

TP27626MIL

TP56826MIL

PM_THRMTRIP# 8

CLK_CPU_BCLK 3
CLK_CPU_BCLK# 3

12

R15
47K_J

0402

32

Q3

D

S

2N7002

A0202

C

E

MMBT3904

2 3

TP72 26MIL

TP71 26MIL

+1_05VRUN

12

R1

56_J

0402

1

2200P_50V_K_B

1

OVT_EC#40,44,71

When using Reset IC solution , C3 & R15
need to change to NC condition

12

C3

0.1U_16V_M_B

0402

Close to CPU side

+1_05VRUN

12

R4

56_J

PM_THRMTRIP#

PM_THRMTRIP#
should connect to
ICH7-M and GMCH
without T-ing (No
stub)

C2

0402

ECRST# 20,44

0402

H_THERMDA

12

H_THERMDC

1 2

R12 0_J0402

2

R_OVT_EC#

2

XDP_TDI

XDP_TMS

XDP_BPM#5

XDP_TCK

XDP_TRST#

Debug port not used .
resistors close to CPU.

1 2

1 2

W/S:10/10 (microstrip)

+3VRUN

12

R1116

4.7K_J

0402

12

C1

0.1U_16V_M_B

0402

U2

1

VDD

SMCLK

2

DP

SMDATA

3

DN

ALERT#

4 5

THERM# GND

EMC1402-2-ACZL-TR

null

SM bus Address :
1001101 = 9A
For F75384M

Place Thermal-Sensor near
CPU & GMCH.

11/16 change part from
F75384M
( 15-F75384M-0000) to
G781-1P8f
(15-G7811P8-0000)

FOXCONN

Title

Merom(HOST BUS)1/3

Size Document Number Rev

(M610-1-01 )MainBoard (MBX-176) 2007.1.4 2.0

A3

Date: Sheet

+1_05VRUN

R2150_J0402

12

R339_D0402

12

R2102NC_54.9_F0402

R527_F0402

R6649_F0402

12

R8

4.7K_J

0402

1 2

8
7
6

Friday, August 31, 2007

1

Beagle1=150R(5%)
CRB1.301=54.9R(1%)
Check 1.201=150R(5%)
MS90 EVT=150R(5%)
Beagle1=39R(5%)
CRB1.301=54.9R(1%)
Check 1.201=39R(1%)
MS90 EVT=39R(0.5%)
Beagle1=--­CRB1.301=54.9R(1%)
Check 1.201=--­MS90 EVT=NC_54.9(1%)

Beagle1=27R(5%)
CRB1.301=54.9R(1%)
Check 1.201=27R(1%)
MS90 EVT=27R(5%)
Beagle1=680R(5%)
CRB1.301=649R(1%)
Check 1.201=500~680R(5%)
MS90 EVT=649R(1%)

R9

R10

2.2K_J

2.2K_J

0402

1 2

HON HAI PRECISION IND. CO., LTD.
CPBG - R&D Division

0402

1 2

SMB_THRM_CLK 20,44
SMB_THRM_DATA 20,44

PM_THRM# 44

481

1

of

5

D D

4

3

2

1

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6

H_D#[63..0]7

C C

+1_05VRUN

R19

1K_F

0402

1 2

B B

Place close to CPU

11/02
change from 0603 to 0402

R23

2K_F

0402

1 2

Layout Note:
Zo=55 ohm, 0.5"
max for GTLREF.

H_DSTBN#07
H_DSTBP#07
H_DINV#07

5 mil(microstrip)

H_DSTBN#17
H_DSTBP#17
H_DINV#17

Max Length 0.5 inch

12

C1756

0402_X5R

0402

C1610

NC_0.1U_10V_K

CPU_BSEL03

NC_0.1U_16V_M_B

CPU_BSEL13
CPU_BSEL23

R24 NC_1K_J 0402
R26 NC_1K_J 0402

TP940 26MIL

TP941 26MIL
TP942 26MIL

H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15

H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31

H_GTLREF
CPU_TEST1

12

CPU_TEST2

12

CPU_TEST3

1

CPU_TEST4

12

CPU_TEST5

1

CPU_TEST6

1

U1B

E22

D[0]#

F24

D[1]#

E26

D[2]#

G22

D[3]#

F23

D[4]#

G25

D[5]#

E25

D[6]#

E23

D[7]#

K24

D[8]#

G24

D[9]#

J24

D[10]#

J23

D[11]#

H22

D[12]#

F26

D[13]#

K22

D[14]#

H23

D[15]#

J26

DSTBN[0]#

H26

DSTBP[0]#

H25

DINV[0]#

N22

D[16]#

K25

D[17]#

P26

D[18]#

R23

D[19]#

L23

D[20]#

M24

D[21]#

L22

D[22]#

M23

D[23]#

P25

D[24]#

P23

D[25]#

P22

D[26]#

T24

D[27]#

R24

D[28]#

L25

D[29]#

T25

D[30]#

N25

D[31]#

L26

DSTBN[1]#

M26

DSTBP[1]#

N24

DINV[1]#

AD26

GTLREF

C23

TEST1

D25

TEST2

C24

TEST3

AF26

TEST4

AF1

TEST5

A26

TEST6

B22

BSEL[0]

B23

BSEL[1]

C21

BSEL[2]

CPU SOCKET_478P

FOX_PZ4782A-274M-01

D[32]#
D[33]#
D[34]#

DATA GRP 0

D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#
D[41]#
D[42]#
D[43]#
D[44]#
D[45]#
D[46]#

DATA GRP 2DATA GRP 3

D[47]#

DSTBN[2]#

DSTBP[2]#

DINV[2]#

D[48]#
D[49]#
D[50]#
D[51]#

DATA GRP 1

D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]#

DSTBN[3]#

DSTBP[3]#

DINV[3]#

COMP[0]

MISC

COMP[1]
COMP[2]
COMP[3]

DPRSTP#

DPSLP#

DPWR#

PWRGOOD

SLP#

PSI#

Layout Note:
Comp0,2 connect with Zo=27.4 ohm, make
trace length shorter then 0.5".
Comp1,3 connect with Zo=55 ohm, make
trace length shorter then 0.5".

AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22

AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20

R26
U26
AA1
Y1

E5
B5
D24
D6
D7
AE6

H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47

H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

R20 27.4_F 0402

COMP0

R21 54.9_F 0402

COMP1

R22 27.4_F 0402

COMP2

R25 54.9_F 0402

COMP3

H_D#32

Y22

12
12
12
12

H_DPRSTP# 8,39,71
H_DPSLP# 39

H_CPUSLP# 7
PSI# 71

H_DSTBN#2 7
H_DSTBP#2 7
H_DINV#2 7

H_DSTBN#3 7
H_DSTBP#3 7
H_DINV#3 7

1

H_DPWR# 7
H_PWRGD 39

TP963

1

26MIL

2007/1/1 Roger request

Layout:
Connect test
point with no
stub

TP27 30MIL

A A

FOXCONN

Title

Merom(HOST BUS)2/3

Size Document Number Rev

(M610-1-01 )MainBoard (MBX-176) 2007.1.4 2.0

A3

5

4

3

2

Date: Sheet

HON HAI PRECISION IND. CO., LTD.
CPBG - R&D Division

of

581Friday, August 31, 2007

1

5

4

3

2

1

CPU_VCCA---->130mA
CPU_VCCP----->4.5A

VHCORE VHCORE

VHCORE

D D

C C

B B

12

C4

22U_6.3V_M_B

0805

12

C9

22U_6.3V_M_B

0805

12

C14

22U_6.3V_M_B

0805

12

C19

22U_6.3V_M_B

0805

12

C1642
NC_10U_6.3V_M

0805_X5R

12

C1646
NC_10U_6.3V_M

0805_X5R

12

C1650
NC_10U_6.3V_M

0805_X5R

12

C5

22U_6.3V_M_B

0805

12

C10

22U_6.3V_M_B

0805

12

C15

22U_6.3V_M_B

0805

12

C20

22U_6.3V_M_B

0805

12

12

12

C1643
NC_10U_6.3V_M

0805_X5R

C1647
NC_10U_6.3V_M

0805_X5R

C1651
NC_10U_6.3V_M

0805_X5R

12

C6

22U_6.3V_M_B

0805

12

C11

22U_6.3V_M_B

0805

12

C16

22U_6.3V_M_B

0805

12

C21

22U_6.3V_M_B

0805

12

12

12

VHCORE

VHCORE

VHCORE

C1644
NC_10U_6.3V_M

0805_X5R

C1648
NC_10U_6.3V_M

0805_X5R

C1652
NC_10U_6.3V_M

0805_X5R

12

C7

22U_6.3V_M_B

0805

12

C12

22U_6.3V_M_B

0805

12

C17

22U_6.3V_M_B

0805

12

C22

22U_6.3V_M_B

0805

12

12

12

12

C8

22U_6.3V_M_B

0805

12

C13

22U_6.3V_M_B

0805

12

C18

22U_6.3V_M_B

0805

12

C23

22U_6.3V_M_B

0805

C1645
NC_10U_6.3V_M

0805_X5R

C1649
NC_10U_6.3V_M

0805_X5R

C1653
NC_10U_6.3V_M

0805_X5R

VHCORE

U1C

A7

VCC[001]

A9

VCC[002]

A10

VCC[003]

A12

VCC[004]

A13

VCC[005]

A15

VCC[006]

A17

VCC[007]

A18

VCC[008]

A20

VCC[009]

B7

VCC[010]

B9

VCC[011]

B10

VCC[012]

B12

VCC[013]

B14

VCC[014]

B15

VCC[015]

B17

VCC[016]

B18

VCC[017]

B20

VCC[018]

C9

VCC[019]

C10

VCC[020]

C12

VCC[021]

C13

VCC[022]

C15

VCC[023]

C17

VCC[024]

C18

VCC[025]

D9

VCC[026]

D10

VCC[027]

D12

VCC[028]

D14

VCC[029]

D15

VCC[030]

D17

VCC[031]

D18

VCC[032]

E7

VCC[033]

E9

VCC[034]

E10

VCC[035]

E12

VCC[036]

E13

VCC[037]

E15

VCC[038]

E17

VCC[039]

E18

VCC[040]

E20

VCC[041]

F7

VCC[042]

F9

VCC[043]

F10

VCC[044]

F12

VCC[045]

F14

VCC[046]

F15

VCC[047]

F17

VCC[048]

F18

VCC[049]

F20

VCC[050]

AA7

VCC[051]

AA9

VCC[052]

AA10

VCC[053]

AA12

VCC[054]

AA13

VCC[055]

AA15

VCC[056]

AA17

VCC[057]

AA18

VCC[058]

AA20

VCC[059]

AB9

VCC[060]

AC10

VCC[061]

AB10

VCC[062]

AB12

VCC[063]

AB14

VCC[064]

AB15

VCC[065]

AB17

VCC[066]

AB18

VCC[067]

CPU SOCKET_478P

FOX_PZ4782A-274M-01

VCC[068]
VCC[069]
VCC[070]
VCC[071]
VCC[072]
VCC[073]
VCC[074]
VCC[075]
VCC[076]
VCC[077]
VCC[078]
VCC[079]
VCC[080]
VCC[081]
VCC[082]
VCC[083]
VCC[084]
VCC[085]
VCC[086]
VCC[087]
VCC[088]
VCC[089]
VCC[090]
VCC[091]
VCC[092]
VCC[093]
VCC[094]
VCC[095]
VCC[096]
VCC[097]
VCC[098]
VCC[099]
VCC[100]

VCCP[01]
VCCP[02]
VCCP[03]
VCCP[04]
VCCP[05]
VCCP[06]
VCCP[07]
VCCP[08]
VCCP[09]
VCCP[10]
VCCP[11]
VCCP[12]
VCCP[13]
VCCP[14]
VCCP[15]
VCCP[16]

VCCA[01]
VCCA[02]

VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]

VCCSENSE

VSSSENSE

AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20

G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21

B26
C26

AD6
AF5
AE5
AF4
AE3
AF3
AE2

AF7

AE7

H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6

Backup 10uF capacitors for 22uF shortage.

VHCOREVHCORE

A A

12

C1271

NC_0.1U_16V_M_B

0402

12

C1272

NC_0.1U_16V_M_B

0402

12

C1273

NC_0.1U_16V_M_B

0402

5

12

C1278

1000P_50V_K_B

0402

12

C1279

1000P_50V_K_B

0402

12

C1280

1000P_50V_K_B

0402

4

(Design check 1.301) 2006.9.3
No Stuff 27.4 ± 1% pull-down to GND
near Intel MVP 6 controller for testing purposes.

CPU_VCC------>44A

Beagle1=10U
CRB1.301=NO
Check 1.201=NO
MS90 EVT=NO

1 2
1 2
1 2
1 2
1 2
1 2
1 2

12

C24

0.1U_25V_M_B

0603

+1_5VRUN_A_CPU

12

C35

10U_6.3V_M

0805_X5R

3

12

C1554

NC_10U_6.3V_M

0805_X5R

R29 0_J 0402
R30 0_J 0402
R31 0_J 0402
R32 0_J 0402
R33 0_J 0402
R35 0_J 0402
R36 0_J 0402

VCCSENSE

VSSSENSE

Same Length

Layout Note: Route
VCCSENSE traces at 27.4
Ohms with 50 mil spacing.
Place PU and PD within 1
inch of cpu.

width=18 mil
spacing=7 mil

+1_05VRUN

12

C25

0.1U_25V_M_B

0603

12

C36

0.01U_25V_M_B

0402

VID0 71
VID1 71
VID2 71
VID3 71
VID4 71
VID5 71
VID6 71

12

C26

0.1U_25V_M_B

0603

+1_5VRUN

R28

1 2

0_J 0402

VHCORE

12

12

LAYOUT NOTE:
Place 0.01uF
near PIN B26

R34

100_F

0402

R37

100_F

0402

12

C27

0.1U_25V_M_B

0603

20 mil

VCCSENSE 71

VSSSENSE 71

12

C28

0.1U_25V_M_B

0603

2

100 mil

12

C29

0.1U_25V_M_B

0603

CAP7 move from page11
fix PAD location,but change
CAP val from NC_47U to 330U

+1_05VRUN

FOXCONN

Title

Size Document Number Rev

A3

Date: Sheet

MS90 check

CAP26

330U_2V_T

EEFSX0D331ER

12

+

U1D

A4

VSS[001]

A8

VSS[002]

A11

VSS[003]

A14

VSS[004]

A16

VSS[005]

A19

VSS[006]

A23

VSS[007]

AF2

VSS[008]

B6

VSS[009]

B8

VSS[010]

B11

VSS[011]

B13

VSS[012]

B16

VSS[013]

B19

VSS[014]

B21

VSS[015]

B24

VSS[016]

C5

VSS[017]

C8

VSS[018]

C11

VSS[019]

C14

VSS[020]

C16

VSS[021]

C19

VSS[022]

C2

VSS[023]

C22

VSS[024]

C25

VSS[025]

D1

VSS[026]

D4

VSS[027]

D8

VSS[028]

D11

VSS[029]

D13

VSS[030]

D16

VSS[031]

D19

VSS[032]

D23

VSS[033]

D26

VSS[034]

E3

VSS[035]

E6

VSS[036]

E8

VSS[037]

E11

VSS[038]

E14

VSS[039]

E16

VSS[040]

E19

VSS[041]

E21

VSS[042]

E24

VSS[043]

F5

VSS[044]

F8

VSS[045]

F11

VSS[046]

F13

VSS[047]

F16

VSS[048]

F19

VSS[049]

F2

VSS[050]

F22

VSS[051]

F25

VSS[052]

G4

VSS[053]

G1

VSS[054]

G23

VSS[055]

G26

VSS[056]

H3

VSS[057]

H6

VSS[058]

H21

VSS[059]

H24

VSS[060]

J2

VSS[061]

J5

VSS[062]

J22

VSS[063]

J25

VSS[064]

K1

VSS[065]

K4

VSS[066]

K23

VSS[067]

K26

VSS[068]

L3

VSS[069]

L6

VSS[070]

L21

VSS[071]

L24

VSS[072]

M2

VSS[073]

M5

VSS[074]

M22

VSS[075]

M25

VSS[076]

N1

VSS[077]

N4

VSS[078]

N23

VSS[079]

N26

VSS[080]

P3 A25

VSS[081] VSS[162]

CPU SOCKET_478P

FOX_PZ4782A-274M-01

HON HAI PRECISION IND. CO., LTD.
CPBG - R&D Division

VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]

VSS[163]

P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21

AF25

Merom(POWER/GND)

(M610-1-01 )MainBoard (MBX-176) 2007.1.4 2.0

1

of

681Friday, August 31, 2007

5

4

3

2

1

D D

+1_05VRUN

C C

12

R2094
221_F

0402

W/S = 10/20mil

12

R2095

100_F

0402

H_SWING

C1754

0.1U_16V_M_B

1 2

0402

H_D#[63..0]5

W/S = 10/20mil

12

B B

+1_05VRUN

12

+1_05VRUN

12

Different with 945PM

A A

H_RCOMP

R2096

24.9_F

0402

R2097

54.9_F

0402

H_SCOMP

R2098

54.9_F

0402

H_SCOMP#

Different with 945PM

5

Different with 945PM

H_CPURST#4
H_CPUSLP#5

+1_05VRUN

R2099

1K_F

0402

1 2

R2100

2K_F

0402

1 2

H_D#[63..0]

Place Cap.
near GMCH
within 100
mils.

C1755

0.1U_10V_K

1 2

0402_X5R

TP724 26MIL

R2101
0_J

0402

1 2

4

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8

H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_SWING
H_RCOMP

H_SCOMP
H_SCOMP#

1

H_AVREF

H_DVREF

U4A

E2

H_D#0

G2

H_D#1

G7

H_D#2

M6

H_D#3

H7

H_D#4

H3

H_D#5

G4

H_D#6

F3

H_D#7

N8

H_D#8

H2

H_D#9

M10

H_D#10

N12

H_D#11

N9

H_D#12

H5

H_D#13

P13

H_D#14

K9

H_D#15

M2

H_D#16

W10

H_D#17

Y8

H_D#18

V4

H_D#19

M3

H_D#20

J1

H_D#21

N5

H_D#22

N3

H_D#23

W6

H_D#24

W9

H_D#25

N2

H_D#26

Y7

H_D#27

Y9

H_D#28

P4

H_D#29

W3

H_D#30

N1

H_D#31

AD12

H_D#32

AE3

H_D#33

AD9

H_D#34

AC9

H_D#35

AC7

H_D#36

AC14

H_D#37

AD11

H_D#38

AC11

H_D#39

AB2

H_D#40

AD7

H_D#41

AB1

H_D#42

Y3

H_D#43

AC6

H_D#44

AE2

H_D#45

AC5

H_D#46

AG3

H_D#47

AJ9

H_D#48

AH8

H_D#49

AJ14

H_D#50

AE9

H_D#51

AE11

H_D#52

AH12

H_D#53

AJ5

H_D#54

AH5

H_D#55

AJ6

H_D#56

AE7

H_D#57

AJ7

H_D#58

AJ2

H_D#59

AE5

H_D#60

AJ3

H_D#61

AH2

H_D#62

AH13

H_D#63

B3

H_SWING

C2

H_RCOMP

W1

H_SCOMP

W2

H_SCOMP#

B6

H_CPURST#

E5

H_CPUSLP#

B9

H_AVREF

A9

H_DVREF

Crestline MCH-QN14_ES2

20 mil

12-CRESTL1-ES02

HOST

3

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8

H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

H_ADS#
H_ADSTB#0
H_ADSTB#1

H_BNR#
H_BPRI#

H_BREQ#

H_DEFER#

H_DBSY#

HPLL_CLK

HPLL_CLK#

H_DPWR#

H_DRDY#

H_HIT#

H_HITM#
H_LOCK#
H_TRDY#

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3

H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_RS#0
H_RS#1
H_RS#2

J13
B11
C11
M11
C15
F16
L13
G17
C14
K16
B13
L16
J17
B14
K19
P15
R17
B16
H20
L19
D17
M17
N16
J19
B18
E19
B17
B15
E17
C18
A19
B19
N19

G12
H17
G20
C8
E8
F12
D6
C10
AM5
AM7
H8
K7
E4
C6
G10
B7

K5
L2
AD13
AE13

M7
K3
AD2
AH11

L7
K2
AC2
AJ10

M14
E13
A11
H13
B12

E12
D7
D8

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3

H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_RS#0
H_RS#1
H_RS#2

H_ADS# 4
H_ADSTB#0 4
H_ADSTB#1 4

H_BNR# 4

H_BPRI# 4

H_BREQ#0 4

H_DEFER# 4

H_DBSY# 4

CLK_MCH_BCLK 3

CLK_MCH_BCLK# 3

H_DPWR# 5

H_DRDY# 4

Add H_A#[32..35]

2

H_A#[3..35] 4

H_HIT# 4
H_HITM# 4
H_LOCK# 4
H_TRDY# 4

H_DINV#[3..0] 5

H_DSTBN#[3..0] 5

H_DSTBP#[3..0] 5

H_REQ#[4..0] 4

H_RS#[2..0] 4

Title

Size Document Number Rev

Date: Sheet

FOXCONN

HON HAI PRECISION IND. CO., LTD.
CPBG - R&D Division

Crestline (HOST)1/7

(M610-1-01 )MainBoard (MBX-176) 2007.1.4 2.0

A3

1

781Friday, August 31, 2007

of

5

TP881
TP882
TP883
TP884
TP885
TP902
TP886
TP887
TP888

M_A_A1414,16
M_B_A1415,16

TP889
TP890
TP891
TP892
TP893

TP894
TP895
TP896
TP897
TP898
TP899
TP900
TP901
TP903
TP904
TP905
TP906

TP907
TP908
TP909
TP976
TP977
TP910
TP911
TP912
TP913
TP914
TP915
TP916

D D

DDR SYSTEM MEM

LVDS

C C

CFG[2:0]
010 = FSB 800 MHz
011 = FSB 667 MHz

B B

MS90 /CRB

MS90 /CRB

MCH_CFG_9
(PCIE
Graphics
Lane)

Low = Reverse Lane
High = Normal
operation

For layout convenience

MCH_BSEL03
MCH_BSEL13
MCH_BSEL23

26MIL

TP978

26MIL

TP979

26MIL

TP980

26MIL

TP981

26MIL

TP982

26MIL

TP983

26MIL

TP984

26MIL

TP985

26MIL

TP986

26MIL

TP987

26MIL

TP988

26MIL

TP989

26MIL

TP990

26MIL

TP991

26MIL

TP992

26MIL

TP993

26MIL

TP994

26MIL

TP995

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

Wait to confirm with Page 13 / CRB

PM_BMBUSY#40

H_DPRSTP#5,39,71
PM_EXTTS#014
PM_EXTTS#115

IMVP_PWRGD40,44

PLT_RST#4,17,38,43,44,45,47,51,53,54

PM_THRMTRIP#4

DPRSLPVR40,71

Design check 1.201
DDR2 Connect to PM_EXT_TS#0/1 pins
of GMCH, pull up with 10K to Vcc3_3

+3VRUN

A A

DDR_ALERT#20,44

Form (U8)thermal sanser & (EC)

R2088 10K_J

R2091 10K_J

R1143 0_J

5

1 2

PM_EXTTS#1

0402

PM_EXTTS#0

0402

PM_EXTTS#0

0402

R109 100_J 0402

26MIL
26MIL
26MIL
26MIL
26MIL
26MIL
26MIL
26MIL
26MIL
26MIL
26MIL
26MIL
26MIL
26MIL

26MIL
26MIL
26MIL
26MIL
26MIL
26MIL
26MIL
26MIL
26MIL
26MIL
26MIL
26MIL

26MIL
26MIL
26MIL
26MIL
26MIL
26MIL
26MIL
26MIL
26MIL
26MIL
26MIL
26MIL

MCH_CFG_3
MCH_CFG_4
MCH_CFG_5
MCH_CFG_6
MCH_CFG_7
MCH_CFG_8
MCH_CFG_9
MCH_CFG_10
MCH_CFG_11
MCH_CFG_12
MCH_CFG_13
MCH_CFG_14
MCH_CFG_15
MCH_CFG_16
MCH_CFG_17
MCH_CFG_18
MCH_CFG_19
MCH_CFG_20

1 2

TP923
TP924
TP925
TP926
TP927
TP928
TP929
TP930
TP931
TP932
TP933
TP934
TP935
TP936
TP938
TP939

26MIL
26MIL
26MIL
26MIL
26MIL
26MIL
26MIL
26MIL
26MIL
26MIL
26MIL
26MIL
26MIL
26MIL
26MIL
26MIL

4

1
1
1
1
1
1
1
1
1
1
1
1
1
1

1
1
1
1
1
1
1
1
1
1
1
1

1
1
1
1
1
1
1
1
1
1
1
1

4

MCH_RSVD_1
MCH_RSVD_2
MCH_RSVD_3
MCH_RSVD_4
MCH_RSVD_5
MCH_RSVD_6
MCH_RSVD_7
MCH_RSVD_8
MCH_RSVD_9
MCH_RSVD_10
MCH_RSVD_11
MCH_RSVD_12
MCH_RSVD_13
MCH_RSVD_14

MCH_RSVD_20
MCH_RSVD_21
MCH_RSVD_22
MCH_RSVD_23
MCH_RSVD_24
MCH_RSVD_25
MCH_RSVD_26
MCH_RSVD_27
MCH_RSVD_28
MCH_RSVD_29
MCH_RSVD_30
MCH_RSVD_31
M_A_A14
M_B_A14
MCH_RSVD_34
MCH_RSVD_35
MCH_RSVD_36
GM_ODD_RXIN3­GM_ODD_RXIN3+
MCH_RSVD_39
MCH_RSVD_40
MCH_RSVD_41
MCH_RSVD_42
MCH_RSVD_43
MCH_RSVD_44
MCH_RSVD_45

PLTRST#_R
PM_THRMTRIP#

MCH_NC1

1

MCH_NC2

1

MCH_NC3

1

MCH_NC4

1

MCH_NC5

1

MCH_NC6

1

MCH_NC7

1

MCH_NC8

1

MCH_NC9

1

MCH_NC10

1

MCH_NC11

1

MCH_NC12

1

MCH_NC13

1

MCH_NC14

1

MCH_NC15

1

MCH_NC16

1

3

U4B

P36

RSVD1

P37

RSVD2

R35

RSVD3

N35

RSVD4

AR12

RSVD5

AR13

RSVD6

AM12

RSVD7

AN13

RSVD8

J12

RSVD9

AR37

RSVD10

AM36

RSVD11

AL36

RSVD12

AM37

RSVD13

D20

RSVD14

H10

RSVD20

B51

RSVD21

BJ20

RSVD22

BK22

RSVD23

BF19

RSVD24

BH20

RSVD25

BK18

RSVD26

BJ18

RSVD27

BF23

RSVD28

BG23

RSVD29

BC23

RSVD30

BD24

RSVD31

BJ29

SA_MA14

BE24

SB_MA14

BH39

RSVD34

AW20

RSVD35

BK20

RSVD36

C48

LVDSA_DATA#3

D47

LVDSA_DATA3

B44

RSVD39

C44

RSVD40

A35

RSVD41

B37

RSVD42

B36

RSVD43

B34

RSVD44

C34

RSVD45

P27

CFG0

N27

CFG1

N24

CFG2

C21

CFG3

C23

CFG4

F23

CFG5

N23

CFG6

G23

CFG7

J20

CFG8

C20

CFG9

R24

CFG10

L23

CFG11

J23

CFG12

E23

CFG13

E20

CFG14

K23

CFG15

M20

CFG16

M24

CFG17

L32

CFG18

N33

CFG19

L35

CFG20

G41

PM_BM_BUSY#

L39

PM_DPRSTP#

L36

PM_EXT_TS#0

J36

PM_EXT_TS#1

AW49

PWROK

AV20

RSTIN#

N20

THERMTRIP#

G36

DPRSLPVR

BJ51

NC1

BK51

NC2

BK50

NC3

BL50

NC4

BL49

NC5

BL3

NC6

BL2

NC7

BK1

NC8

BJ1

NC9

E1

NC10

A5

NC11

C51

NC12

B50

NC13

A50

NC14

A49

NC15

BK2 R32

NC16 TEST2

Crestline MCH-QN14_ES2

CFG[20:18] internal pull-down

DDR MUXINGCLKDMI

CFG[17:3] internal pull-up

CFGRSVD

PM

GRAPHICS VIDME

NC

MISC

SM_CK0
SM_CK1
SM_CK3
SM_CK4

SM_CK#0
SM_CK#1
SM_CK#3
SM_CK#4

SM_CKE0
SM_CKE1
SM_CKE3
SM_CKE4

SM_CS#0
SM_CS#1
SM_CS#2
SM_CS#3

SM_ODT0
SM_ODT1
SM_ODT2
SM_ODT3

SM_RCOMP

SM_RCOMP#

SM_RCOMP_VOH

SM_RCOMP_VOL

SM_VREF0
SM_VREF1

DPLL_REF_CLK

DPLL_REF_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

PEG_CLK

PEG_CLK#

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3

GFX_VID0
GFX_VID1
GFX_VID2
GFX_VID3

GFX_VR_EN

CL_CLK

CL_DATA

CL_PWROK

CL_RST#

CL_VREF

SDVO_CTRL_CLK

SDVO_CTRL_DATA

CLKREQ#

ICH_SYNC#

TEST1

3

AV29
BB23
BA25
AV23

AW30
BA23
AW25
AW23

BE29
AY32
BD39
BG37

BG20
BK16
BG16
BE13

BH18
BJ15
BJ14
BE16

BL15
BK14

BK31
BL31

AR49
AW4

B42
C42
H48
H47

K44
K45

AN47
AJ38
AN42
AN46

AM47
AJ39
AN41
AN45

AJ46
AJ41
AM40
AM44

AJ47
AJ42
AM39
AM43

E35
A39
C38
B39
E36

AM49
AK50
AT43
AN49
AM50

H35
K36
G39
G40

A37

SM_RCOMP
SM_RCOMP#

SM_RCOMP_VOH
SM_RCOMP_VOL

SMDDR_VREF

DREFCLK
DREFCLK#
DREFSSCLK
DREFSSCLK#

CLK_MCH_3GPLL 3
CLK_MCH_3GPLL# 3

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

DFGT_VID_0
DFGT_VID_1
DFGT_VID_2
DFGT_VID_3
DFGT_VR_EN

MCH_CLVREF

SDVO_CTRLCLK
SDVO_CTRLDATA
MCH_CLK_REQ#

MCH_TEST_1
MCH_TEST_2

R2076 20_F 0402

1 2

R2077 20_F 0402

1 2

DMI_TXN[3:0] 38

DMI_TXP[3:0] 38

DMI_RXN[3:0] 38

DMI_RXP[3:0] 38

TP97126MIL
TP97226MIL
TP97326MIL
TP97426MIL
TP97526MIL

R2089 NV_0_J 0402
R2090 NV_0_J 0402

MCH_CLK_REQ#

12

R2093
0_J

0402

1 2

1
1
1
1
1

R2092
20K_J

0402

2

M_CLK_DDR0 14
M_CLK_DDR1 14
M_CLK_DDR2 15
M_CLK_DDR3 15

M_CLK_DDR#0 14
M_CLK_DDR#1 14
M_CLK_DDR#2 15
M_CLK_DDR#3 15

M_CKE0 14,16
M_CKE1 14,16
M_CKE2 15,16
M_CKE3 15,16

M_CS#0 14,16
M_CS#1 14,16
M_CS#2 15,16
M_CS#3 15,16

M_ODT0 14,16
M_ODT1 14,16
M_ODT2 15,16
M_ODT3 15,16

+1_8VSUS

CL_CLK0 40
CL_DATA0 40

MPWROK 40

CL_RST#0 40

1 2
1 2

MCH_CLK_REQ# 3

MCH_ICH_SYNC# 40

1

2

1

+1_8VSUS

12

R2073

waiting change 0.1%

1K_F

0402

12

R2074

3.01K_F

0402

12

R2075

waiting change 0.1%

1K_F

0402

Note:If the voltage regulator for the system memory
interface already supplies a VREF output and meets
the voltage tolerance and current requirements for
these pins, then a voltage divider would not be needed.

DDRDIMM_VREF

12

R2079

0_J

0402

C1751

0402

0.1U_16V_M_B

1 2

12

C1745

0.01U_16V_K_B

0402

12

C1747

0.01U_16V_K_B

0402

SMDDR_VREF

C1752

0.1U_16V_M_B

1 2

0402

SM_RCOMP_VOH

12

C1746

2.2U_10V_Y

0603_Y5V

SM_RCOMP_VOL

SM_RCOMP_VOL

12

C1748

2.2U_10V_Y

0603_Y5V

External Graphics (GMCH CRT/TVOUT Disable)

R2082 NV_0_J 0402

R2083 NV_0_J 0402

R2084 NV_0_J 0402

R2085 NV_0_J 0402

TP93726MIL

FOXCONN

Title

Size Document Number Rev

A3

Date: Sheet

1 2

1 2

1 2

1 2

+1_25VRUN

C1753

0.1U_10V_K

1 2

0402_X5R

Crestline (DMI)2/7

(M610-1-01 )MainBoard (MBX-176) 2007.1.4 2.0

DREFCLK

DREFCLK#

DREFSSCLK

DREFSSCLK#

12

R2086

1K_F

0402

12

R2087

392_F

0402

HON HAI PRECISION IND. CO., LTD.
CPBG - R&D Division

1

of

881Friday, August 31, 2007

5

L_BKLT_CTRL

1

26MIL

TP77

26MIL

TP75

Check List=2.4K
CRB=2.37K
MS90=2.37K

R119

1 2

NC_2.4K_F

D D

C C

TYPE is open drawn(Output)
Check list 2.2K to 3.3V
MS90 2.2KK to 3.3V
CRB 2.2KK to 3.3V

10/27
Change NC to stuff

B B

0402

+3VRUN +3VRUN

R1951
NC_2.2K_J

0402

1 2

TP76

TP74

1 2

R1948
NC_2.2K_J

0402

26MIL

26MIL

TV_DCONSEL0
TV_DCONSEL1

GM_BLUE

GM_GREEN

GM_RED

GM_DDCCLK
GM_DDCDATA
GM_HSYNC_R
CRT_IREF
GM_VSYNC_R

L_BKLT_EN

1

L_CTRL_CLK
L_CTRL_DATA
L_DDC_CLK
L_DDC_DATA
L_VDD_EN

1

L_IBG
L_VBG

1

R2306 NC_0_J 0402
R2307 NC_0_J 0402

10/27
FAE suggest NC to GND

GM_DACA
GM_DACB
GM_DACC

1 2
1 2

TV_DCONSEL0
TV_DCONSEL1

4

U4C

J40

L_BKLT_CTRL

H39

L_BKLT_EN

E39

L_CTRL_CLK

E40

L_CTRL_DATA

C37

L_DDC_CLK

D35

L_DDC_DATA

K40

L_VDD_EN

L41

LVDS_IBG

L43

LVDS_VBG

N41

LVDS_VREFH

N40

LVDS_VREFL

D46

LVDSA_CLK#

C45

LVDSA_CLK

D44

LVDSB_CLK#

E42

LVDSB_CLK

G51

LVDSA_DATA#0

E51

LVDSA_DATA#1

F49

LVDSA_DATA#2

G50

LVDSA_DATA0

E50

LVDSA_DATA1

F48

LVDSA_DATA2

G44

LVDSB_DATA#0

B47

LVDSB_DATA#1

B45

LVDSB_DATA#2

E44

LVDSB_DATA0

A47

LVDSB_DATA1

A45

LVDSB_DATA2

E27

TVA_DAC

G27

TVB_DAC

K27

TVC_DAC

F27

TVA_RTN

J27

TVB_RTN

L27

TVC_RTN

M35

TV_DCONSEL0

P33

TV_DCONSEL1

H32

CRT_BLUE

G32

CRT_BLUE#

K29

CRT_GREEN

J29

CRT_GREEN#

F29

CRT_RED

E29

CRT_RED#

K33

CRT_DDC_CLK

G35

CRT_DDC_DATA

F33

CRT_HSYNC

C32

CRT_TVO_IREF

E33

CRT_VSYNC

Crestline MCH-QN14_ES2

3

PEG_COMP

PEG_RX#0
PEG_RX#1
PEG_RX#2
PEG_RX#3
PEG_RX#4
PEG_RX#5
PEG_RX#6
PEG_RX#7
PEG_RX#8
PEG_RX#9

PEG_RX0
PEG_RX1
PEG_RX2
PEG_RX3
PEG_RX4
PEG_RX5
PEG_RX6
PEG_RX7
PEG_RX8

PEG_RX9
PEG_RX10
PEG_RX11
PEG_RX12
PEG_RX13
PEG_RX14
PEG_RX15

PEG_TX#0
PEG_TX#1
PEG_TX#2
PEG_TX#3
PEG_TX#4
PEG_TX#5
PEG_TX#6
PEG_TX#7
PEG_TX#8
PEG_TX#9

PEG_TX0

PEG_TX1

PEG_TX2

PEG_TX3

PEG_TX4

PEG_TX5

PEG_TX6

PEG_TX7

PEG_TX8

PEG_TX9
PEG_TX10
PEG_TX11
PEG_TX12
PEG_TX13
PEG_TX14
PEG_TX15

N43
M43

J51
L51
N47
T45
T50
U40
Y44
Y40
AB51
W49
AD44
AD40
AG46
AH49
AG45
AG41

J50
L50
M47
U44
T49
T41
W45
W41
AB50
Y48
AC45
AC41
AH47
AG49
AH45
AG42

N45
U39
U47
N51
R50
T42
Y43
W46
W38
AD39
AC46
AC49
AC42
AH39
AE49
AH44

M45
T38
T46
N50
R51
U43
W42
Y47
Y39
AC38
AD47
AC50
AD43
AG39
AE50
AH43

PEG_RXN0
PEG_RXN1
PEG_RXN2
PEG_RXN3
PEG_RXN4
PEG_RXN5
PEG_RXN6
PEG_RXN7
PEG_RXN8

PEG_RXN9
PEG_RXN10
PEG_RXN11
PEG_RXN12
PEG_RXN13
PEG_RXN14
PEG_RXN15

PEG_RXP0

PEG_RXP1

PEG_RXP2

PEG_RXP3

PEG_RXP4

PEG_RXP5

PEG_RXP6

PEG_RXP7

PEG_RXP8

PEG_RXP9

PEG_RXP10
PEG_RXP11
PEG_RXP12
PEG_RXP13
PEG_RXP14
PEG_RXP15

PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9
PEG_TXN10
PEG_TXN11
PEG_TXN12
PEG_TXN13
PEG_TXN14
PEG_TXN15

PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
PEG_TXP8
PEG_TXP9
PEG_TXP10
PEG_TXP11
PEG_TXP12
PEG_TXP13
PEG_TXP14
PEG_TXP15

PEG_COMPI

PEG_COMPO

LVDS

PEG_RX#10
PEG_RX#11
PEG_RX#12
PEG_RX#13
PEG_RX#14
PEG_RX#15

TV VGA

PEG_TX#10

PCI-EXPRESS GRAPHICS

PEG_TX#11
PEG_TX#12
PEG_TX#13
PEG_TX#14
PEG_TX#15

R118

24.9_F

1 2

PEG_RXN[15..0] 18

PEG_RXP[15..0] 18

+VCC_PEG

0402

(source)+1_05VRUN

2

PEG_TXN0

PEG_TXN1

PEG_TXN2

PEG_TXN3

PEG_TXN4

PEG_TXN5

PEG_TXN6

PEG_TXN7

PEG_TXN8

PEG_TXN9

PEG_TXN10

PEG_TXN11

PEG_TXN12

PEG_TXN13

PEG_TXN14

PEG_TXN15

PEG_TXP0

PEG_TXP1

PEG_TXP2

PEG_TXP3

PEG_TXP4

PEG_TXP5

PEG_TXP6

PEG_TXP7

PEG_TXP8

PEG_TXP9 PEG_RXP_C9

PEG_TXP10

PEG_TXP11

PEG_TXP12

PEG_TXP13

PEG_TXP14

PEG_TXP15

C100 NV_0.1U_16V_M_B

1 2

C101 NV_0.1U_16V_M_B

1 2

C102 NV_0.1U_16V_M_B

1 2

C103 NV_0.1U_16V_M_B

1 2

C104 NV_0.1U_16V_M_B

1 2

C105 NV_0.1U_16V_M_B

1 2

C106 NV_0.1U_16V_M_B

1 2

C107 NV_0.1U_16V_M_B

1 2

C108 NV_0.1U_16V_M_B

1 2

C109 NV_0.1U_16V_M_B

1 2

C110 NV_0.1U_16V_M_B

1 2

C111 NV_0.1U_16V_M_B

1 2

C112 NV_0.1U_16V_M_B

1 2

C113 NV_0.1U_16V_M_B

1 2

C114 NV_0.1U_16V_M_B

1 2

C115 NV_0.1U_16V_M_B

1 2

C116 NV_0.1U_16V_M_B

1 2

C117 NV_0.1U_16V_M_B

1 2

C118 NV_0.1U_16V_M_B

1 2

C119 NV_0.1U_16V_M_B

1 2

C120 NV_0.1U_16V_M_B

1 2

C121 NV_0.1U_16V_M_B

1 2

C122 NV_0.1U_16V_M_B

1 2

C123 NV_0.1U_16V_M_B

1 2

C124 NV_0.1U_16V_M_B

1 2

C125 NV_0.1U_16V_M_B

1 2

C126 NV_0.1U_16V_M_B

1 2

C127 NV_0.1U_16V_M_B

1 2

C128 NV_0.1U_16V_M_B

1 2

C129 NV_0.1U_16V_M_B

1 2

C130 NV_0.1U_16V_M_B

1 2

C131 NV_0.1U_16V_M_B

1 2

0402

0402

0402

0402

0402

0402

0402

0402

0402

0402

0402

0402

0402

0402

0402

0402

0402

0402

0402

0402

0402

0402

0402

0402

0402

0402

0402

0402

0402

0402

0402

0402

PEG_RXN_C0

PEG_RXN_C1

PEG_RXN_C2

PEG_RXN_C3

PEG_RXN_C4

PEG_RXN_C5

PEG_RXN_C6

PEG_RXN_C7

PEG_RXN_C8

PEG_RXN_C9

PEG_RXN_C10

PEG_RXN_C11

PEG_RXN_C12

PEG_RXN_C13

PEG_RXN_C14

PEG_RXN_C15

PEG_RXP_C0

PEG_RXP_C1

PEG_RXP_C2

PEG_RXP_C3

PEG_RXP_C4

PEG_RXP_C5

PEG_RXP_C6

PEG_RXP_C7

PEG_RXP_C8

PEG_RXP_C10

PEG_RXP_C11

PEG_RXP_C12

PEG_RXP_C13

PEG_RXP_C14

PEG_RXP_C15

1

PEG_RXN_C[15..0] 17

PEG_RXP_C[15..0] 17

External Graphics (GMCH CRT/TVOUT Disable)

R2057 NV_0_J 0402

R2059 NV_0_J 0402

R2061 NV_0_J 0402

R2063 NV_0_J 0402

R2065 NV_0_J 0402

R2067 NV_0_J 0402

R2069 NV_0_J 0402

A A

5

1 2

1 2

1 2

1 2

1 2

1 2

1 2

4

GM_BLUE

GM_GREEN

GM_RED

CRT_IREF

GM_DACA

GM_DACB

GM_DACC

R2056 NV_0_J 0402

R2058 NV_0_J 0402

R2060 NV_0_J 0402

R2062 NV_0_J 0402

R2064 NV_0_J 0402

R2066 NV_0_J 0402

R2068 NV_0_J 0402

R2070 NV_0_J 0402

R2071 NV_0_J 0402

R2072 NV_0_J 0402

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

3

GM_HSYNC_R

GM_VSYNC_R

GM_DDCCLK

GM_DDCDATA

L_DDC_CLK

L_DDC_DATA

TV_DCONSEL0

TV_DCONSEL1

L_CTRL_CLK

L_CTRL_DATA

Base on below document:
Mobile Merom Processor and Crestline Chipset

- Santa Rosa Platform Design Guide-21112,1.0
.pvd.pdf (May 2006/ Rev 1.0)page 193
Table 82. External Graphics (GMCH Integrated Graphics Disable)
Connect these signals to GND

FOXCONN

Title

Crestline(GRAPHIC)3/7

Size Document Number Rev

(M610-1-01 )MainBoard (MBX-176) 2007.1.4 2.0

A3

2

Date: Sheet

HON HAI PRECISION IND. CO., LTD.
CPBG - R&D Division

1

of

981Friday, August 31, 2007

5

D D

M_A_DQ[63..0]14

C C

B B

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

U4D

AR43

SA_DQ0

AW44

SA_DQ1

BA45

SA_DQ2

AY46

SA_DQ3

AR41

SA_DQ4

AR45

SA_DQ5

AT42

SA_DQ6

AW47

SA_DQ7

BB45

SA_DQ8

BF48

SA_DQ9

BG47

SA_DQ10

BJ45

SA_DQ11

BB47

SA_DQ12

BG50

SA_DQ13

BH49

SA_DQ14

BE45

SA_DQ15

AW43

SA_DQ16

BE44

SA_DQ17

BG42

SA_DQ18

BE40

SA_DQ19

BF44

SA_DQ20

BH45

SA_DQ21

BG40

SA_DQ22

BF40

SA_DQ23

AR40

SA_DQ24

AW40

SA_DQ25

AT39

SA_DQ26

AW36

SA_DQ27

AW41

SA_DQ28

AY41

SA_DQ29

AV38

SA_DQ30

AT38

SA_DQ31

AV13

SA_DQ32

AT13

SA_DQ33

AW11

SA_DQ34

AV11

SA_DQ35

AU15

SA_DQ36

AT11

SA_DQ37

BA13

SA_DQ38

BA11

SA_DQ39

BE10

SA_DQ40

BD10

SA_DQ41

BD8

SA_DQ42

AY9

SA_DQ43

BG10

SA_DQ44

AW9

SA_DQ45

BD7

SA_DQ46

BB9

SA_DQ47

BB5

SA_DQ48

AY7

SA_DQ49

AT5

SA_DQ50

AT7

SA_DQ51

AY6

SA_DQ52

BB7

SA_DQ53

AR5

SA_DQ54

AR8

SA_DQ55

AR9

SA_DQ56

AN3

SA_DQ57

AM8

SA_DQ58

AN10

SA_DQ59

AT9

SA_DQ60

AN9

SA_DQ61

AM9

SA_DQ62

AN11

SA_DQ63

Crestline MCH-QN14_ES2

SA_RCVEN#

DDR SYSTEM MEMORY A

SA_BS0
SA_BS1
SA_BS2

SA_CAS#

SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7

SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6

SA_DQS7
SA_DQS#0
SA_DQS#1
SA_DQS#2
SA_DQS#3
SA_DQS#4
SA_DQS#5
SA_DQS#6
SA_DQS#7

SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8

SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13

SA_RAS#

SA_WE#

4

BB19
BK19
BF29

BL17

AT45
BD44
BD42
AW38
AW13
BG8
AY5
AN6

AT46
BE48
BB43
BC37
BB16
BH6
BB2
AP3
AT47
BD47
BC41
BA37
BA16
BH7
BC1
AP2

BJ19
BD20
BK27
BH28
BL24
BK28
BJ27
BJ25
BL28
BA28
BC19
BE28
BG30
BJ16

BE18
AY20

BA19

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13

SA_RCVEN#

M_A_BS0 14,16
M_A_BS1 14,16
M_A_BS2 14,16

M_A_CAS# 14,16
M_A_DM[7..0] 14

M_A_DQS[7..0] 14

M_A_DQS#[7..0] 14

M_A_A[13..0] 14,16

Crestline add SA_MA_14 @ page8

M_A_RAS# 14,16

1

M_A_WE# 14,16

3

M_B_DQ[63..0]15

TP87926MIL

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

U4E

AP49

SB_DQ0

AR51

SB_DQ1

AW50

SB_DQ2

AW51

SB_DQ3

AN51

SB_DQ4

AN50

SB_DQ5

AV50

SB_DQ6

AV49

SB_DQ7

BA50

SB_DQ8

BB50

SB_DQ9

BA49

SB_DQ10

BE50

SB_DQ11

BA51

SB_DQ12

AY49

SB_DQ13

BF50

SB_DQ14

BF49

SB_DQ15

BJ50

SB_DQ16

BJ44

SB_DQ17

BJ43

SB_DQ18

BL43

SB_DQ19

BK47

SB_DQ20

BK49

SB_DQ21

BK43

SB_DQ22

BK42

SB_DQ23

BJ41

SB_DQ24

BL41

SB_DQ25

BJ37

SB_DQ26

BJ36

SB_DQ27

BK41

SB_DQ28

BJ40

SB_DQ29

BL35

SB_DQ30

BK37

SB_DQ31

BK13

SB_DQ32

BE11

SB_DQ33

BK11

SB_DQ34

BC11

SB_DQ35

BC13

SB_DQ36

BE12

SB_DQ37

BC12

SB_DQ38

BG12

SB_DQ39

BJ10

SB_DQ40

BL9

SB_DQ41

BK5

SB_DQ42

BL5

SB_DQ43

BK9

SB_DQ44

BK10

SB_DQ45

BJ8

SB_DQ46

BJ6

SB_DQ47

BF4

SB_DQ48

BH5

SB_DQ49

BG1

SB_DQ50

BC2

SB_DQ51

BK3

SB_DQ52

BE4

SB_DQ53

BD3

SB_DQ54

BJ2

SB_DQ55

BA3

SB_DQ56

BB3

SB_DQ57

AR1

SB_DQ58

AT3

SB_DQ59

AY2

SB_DQ60

AY3

SB_DQ61

AU2

SB_DQ62

AT2

SB_DQ63

Crestline MCH-QN14_ES2

2

AY17

SB_BS0

BG18

SB_BS1

BG36

SB_BS2

BE17

SB_CAS#

SB_DM0
SB_DM1
SB_DM2
SB_DM3
SB_DM4
SB_DM5
SB_DM6
SB_DM7

SB_DQS0
SB_DQS1
SB_DQS2
SB_DQS3
SB_DQS4
SB_DQS5
SB_DQS6

SB_DQS7
SB_DQS#0
SB_DQS#1
SB_DQS#2
SB_DQS#3
SB_DQS#4
SB_DQS#5
SB_DQS#6
SB_DQS#7

SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8

SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13

SB_RAS#

SB_RCVEN#

SB_WE#

DDR SYSTEM MEMORY B

AR50
BD49
BK45
BL39
BH12
BJ7
BF3
AW2

AT50
BD50
BK46
BK39
BJ12
BL7
BE2
AV2
AU50
BC50
BL45
BK38
BK12
BK7
BF2
AV3

BC18
BG28
BG25
AW17
BF25
BE25
BA29
BC28
AY28
BD37
BG17
BE37
BA39
BG13

AV16
AY18

BC17

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13

SB_RCVEN#

M_B_BS0 15,16
M_B_BS1 15,16
M_B_BS2 15,16

M_B_CAS# 15,16
M_B_DM[7..0] 15

M_B_DQS[7..0] 15

M_B_DQS#[7..0] 15

M_B_A[13..0] 15,16

Crestline add SB_MA_14 @ page8

M_B_RAS# 15,16

M_B_WE# 15,16

1

1

TP88026MIL

A A

FOXCONN

Title

Crestline(DDRII)4/7

Size Document Number Rev

(M610-1-01 )MainBoard (MBX-176) 2007.1.4 2.0

A3

5

4

3

2

Date: Sheet

HON HAI PRECISION IND. CO., LTD.
CPBG - R&D Division

of

10 81Friday, August 31, 2007

1

5

4

3

2

1

+1_25VRUN

D D

R2037
0_J

L153

0603

120R-100MHZ_0805

1 2

HCB2012KF-121T30

12

L154
120R-100MHZ_0805

HCB2012KF-121T30

V1.25M_MCH_PLL2

12

C1713
22U_6.3V_M_B

C C

12

C1718

0.022U_16V_M

0402_X7R

+V1.25S_PEGPLL_RC

12

B B

A A

0805_X5R

10U_6.3V_M

C1734

R2041 NV_0_J 0402

R2042 NV_0_J 0402

R2043 NV_0_J 0402

R2044 NV_0_J 0402

R2045 NV_0_J 0402

R2046 NV_0_J 0402

R2047 NV_0_J 0402

R2048 NV_0_J 0402

R2049 NV_0_J 0402

R2051 NV_0_J 0402

R2053 NV_0_J 0402

R2054 NV_0_J 0402

0805

R2038

0603

0.51_F

1 2

12

C1719
10U_10V_M

0805_X5R

L157

BLM18PG181SN1D

180R-100MHZ_0603

R2040

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

5

1_F

0402

12

+V1.25RUN_A_HPLL

C1708

0805

22U_6.3V_M_B

+V1.25RUN_A_MPLL

NFM18CC223R1C3

L155C_FILTER

1

C1720

0.1U_16V_M_B

0402

12

+3VRUN_SYNC

+3VRUN_A_CRTDAC

+V3.3RUN_A_DAC_BG

+V1.25RUN_A_DPLLA

+V1.25RUN_A_DPLLB

+V1.8_TXLVDS

+V1.8_DLVDS

+V1.5S_QDAC

+V1.5S_CRT

+V3.3S_TVDACA

+V3.3S_TVDACB

+V3.3S_TVDACC

50mA

C1709

0402_X5R

0.1U_10V_K

1 2

150mA

C1712

0402_X5R

0.1U_10V_K

1 2

+V1.5S_TVDAC+1_5VRUN

3

66mA

2

11/2 backup
for EMI request
close to CAP36

+V1.25S_PEGPLL+1_25VRUN

12

C1733

0.1U_16V_M_B

0402

1 2

C1942

NC_0.1U_10V_K

+1_25VRUN

+3VRUN

+V1.25S_PEGPLL

+1_25VRUN

12

+

0402_X5R

12

C1729

0805

22U_6.3V_M_B

V1.25M_MCH_PLL2

0.1U_10V_K

0402_X5R

C1739

CAP36

EEFCX0J101R

12

1 2

12

C1721

0805

100U_6.3V_7343

12

C1730

1U_6.3V_Y_Y

0402

+V1.25S_PEGPLL

1 2

4

+3VRUN_SYNC

+3VRUN_A_CRTDAC

+V3.3RUN_A_DAC_BG

+V1.25RUN_A_DPLLA

+V1.25RUN_A_DPLLB

+V1.25RUN_A_HPLL

+V1.25RUN_A_MPLL

+V1.8_TXLVDS

C1714

0.1U_10V_K

0402_X5R

1 2

12

12

C1723

C1722

0805

22U_6.3V_M_B

C1731

1U_6.3V_Y_Y

0402

0402

22U_6.3V_M_B

C1732

1 2

0.1U_10V_K

0402_X5R

+V3.3S_TVDACA

+V3.3S_TVDACB
+V3.3S_TVDACC

+V1.5S_CRT
+V1.5S_TVDAC

+V1.5S_QDAC

250mA
100mA

+V1.8_DLVDS

0.1U_10V_K

0402_X5R

C1740

C1724

1 2

1U_6.3V_Y_Y

0603_X5R

J32

A33
B33

A30

B32

B49

H49

AL2

AM2

A41

B41

K50

K49

U51

AW18

AV19
AU19
AU18
AU17

4.7U_6.3V_K

AT22
AT21
AT19
AT18
AT17
AR17
AR16

BC29
BB29

C25
B25
C27
B27
B28
A28

M32

L29

N28

AN2

U48

J41

H42

U4H

VCC_SYNC

VCCA_CRT_DAC1
VCCA_CRT_DAC2

VCCA_DAC_BG

VSSA_DAC_BG

VCCA_DPLLA

VCCA_DPLLB

VCCA_HPLL

VCCA_MPLL

VCCA_LVDS

VSSA_LVDS

VCCA_PEG_BG

VSSA_PEG_BG

VCCA_PEG_PLL

VCCA_SM1
VCCA_SM2
VCCA_SM3
VCCA_SM4
VCCA_SM5

VCCA_SM7
VCCA_SM8
VCCA_SM9
VCCA_SM10
VCCA_SM11
VCCA_SM_NCTF1
VCCA_SM_NCTF2

VCCA_SM_CK1
VCCA_SM_CK2

VCCA_TVA_DAC1
VCCA_TVA_DAC2
VCCA_TVB_DAC1
VCCA_TVB_DAC2
VCCA_TVC_DAC1
VCCA_TVC_DAC2

VCCD_CRT
VCCD_TVDAC

VCCD_QDAC

VCCD_HPLL

VCCD_PEG_PLL

VCCD_LVDS1
VCCD_LVDS2

Crestline MCH-QN14_ES2

+1_05VRUN+3VRUN

2 1

1 2

CRTPLLA PEGA SMTV

POWER

A CK A LVDS

D TV/CRTLVDS

SCS500V-40-LF
D105

R2052
10_J

0603

1 2

R2055 0_J 0603

3

VTT

VCC_AXD1
VCC_AXD2
VCC_AXD3
VCC_AXD4
VCC_AXD5

AXD

VCC_AXD6

VCC_AXD_NCTF

VCC_AXF1
VCC_AXF2
VCC_AXF3

AXF

VCC_DMI

VCC_SM_CK1
VCC_SM_CK2
VCC_SM_CK3
VCC_SM_CK4

SM CK

VCC_TX_LVDS

VCC_HV1
VCC_HV2

HV

VCC_PEG1
VCC_PEG2
VCC_PEG3
VCC_PEG4

PEG

VCC_PEG5

VCC_RXR_DMI1
VCC_RXR_DMI2

DMI

VTTLF

+V3.3S_HV

VTT1
VTT2
VTT3
VTT4
VTT5
VTT6
VTT7
VTT8

VTT9
VTT10
VTT11
VTT12
VTT13
VTT14
VTT15
VTT16
VTT17
VTT18
VTT19
VTT20
VTT21
VTT22

VTTLF1
VTTLF2
VTTLF3

U13
U12
U11
U9
U8
U7
U5
U3
U2
U1
T13
T11
T10
T9
T7
T6
T5
T3
T2
R3
R2
R1

AT23
AU28
AU24
AT29
AT25
AT30

AR29

B23
B21
A21

AJ50

BK24
BK23
BJ24
BJ23

A43

C40
B40

AD51
W50
W51
V49
V50

AH50
AH51

A7
F2
AH1

+V3.3S_HV

VTTLF_CAP1
VTTLF_CAP2
VTTLF_CAP3

0402

0.47U_6.3V_Y_Y

C1741

C1704

4.7U_6.3V_K

1 2

0603_X5R

12

C1735

0.1U_10V_K

0402_X5R

1 2

12

0402

C1742

850mA

200mA

C1710
1U_6.3V_Y_Y

0402

350mA

12

C1715
10U_6.3V_M

0805_X5R

100mA
200mA

+V1.8_TXLVDS

1200mA

12

250mA

12

0402

0.47U_6.3V_Y_Y
C1743

C1705

4.7U_6.3V_K

1 2

0603_X5R

12

C1711
22U_10V_Y

1206_Y5V

C1736
10U_6.3V_M

0805_X5R

1 2

12

0.47U_6.3V_Y_Y

12

C1716
1U_6.3V_Y_Y

0402

C1738

0402_X5R

2

12

C1706

2.2U_10V_Y_Y

0603

+1_25VRUN

1 2

+VCC_PEG

12

CAP37

+

220U_6.3V_7343

6TPE220MI

12

C1737
10U_6.3V_M

0805_X5R

0.1U_10V_K

12

C1707

0.47U_6.3V_Y_Y

0402

+1_25VRUN

C1717

1 2

0.1U_10V_K

0402_X5R

+1_25VRUN

C1725

0.1U_10V_K

0402_X5R

12

C1726

1 2

0805

22U_6.3V_M_B

L158 0.09UH_0805

SWF2012C-90NM-L01

+VCC_DMI

L1590.09UH_0805

SWF2012C-90NM-L01

12

CAP38

+

220U_6.3V_7343

6TPE220MI

R2050

0603

1 2

NC_0_J

To connect the PEG & DMI to
same rail (VCC_PEG)
Stuff R675 and Remove C223,
CAP26, L119

FOXCONN

Title

Crestline(POWER,VCC)5/7

Size Document Number Rev

(M610-1-01 )MainBoard (MBX-176) 2007.1.4 2.0

A3

Date: Sheet

+1_05VRUN

12

CAP35

+

330U_2V_7343

EEFSL0D331EY

+1_8VSUS+V1.8_SM_CK

L156

1U_0805

EBLS2012-1R0M 0.25A

1 2

R2039

C1727

1_F

0402

0.1U_10V_K

0402_X5R

10U_6.3V_M

+1_05VRUN

+1_05VRUN

+VCC_PEG+VCC_DMI

HON HAI PRECISION IND. CO., LTD.
CPBG - R&D Division

0805_X5R

C1728

12

0402_X5R

1 2

11/2 backup

C1943

for EMI request

NC_0.1U_10V_K

close to L156

of

11 81Friday, August 31, 2007

1

5

+1_05VRUN

D D

Note: All VCCSM
pins shorted
internally.

C C

B B

A A

1.3A

1 2

R2036 0_J 0603

3.318A

VCC_AXG

+1_8VSUS

AW33
AW35

U4G

AT35

VCC1

AT34

VCC2

AH28

VCC3

AC32

VCC5

AC31

VCC4

AK32

VCC6

AJ31

VCC7

AJ28

VCC8

AH32

VCC9

AH31

VCC10

AH29

VCC11

AF32

VCC12

R30

VCC13

AU32

VCC_SM1

AU33

VCC_SM2

AU35

VCC_SM3

AV33

VCC_SM4
VCC_SM5
VCC_SM6

AY35

VCC_SM7

BA32

VCC_SM8

BA33

VCC_SM9

BA35

VCC_SM10

BB33

VCC_SM11

BC32

VCC_SM12

BC33

VCC_SM13

BC35

VCC_SM14

BD32

VCC_SM15

BD35

VCC_SM16

BE32

VCC_SM17

BE33

VCC_SM18

BE35

VCC_SM19

BF33

VCC_SM20

BF34

VCC_SM21

BG32

VCC_SM22

BG33

VCC_SM23

BG35

VCC_SM24

BH32

VCC_SM25

BH34

VCC_SM26

BH35

VCC_SM27

BJ32

VCC_SM28

BJ33

VCC_SM29

BJ34

VCC_SM30

BK32

VCC_SM31

BK33

VCC_SM32

BK34

VCC_SM33

BK35

VCC_SM34

BL33

VCC_SM35

AU30

VCC_SM36

R20

VCC_AXG1

T14

VCC_AXG2

W13

VCC_AXG3

W14

VCC_AXG4

Y12

VCC_AXG5

AA20

VCC_AXG6

AA23

VCC_AXG7

AA26

VCC_AXG8

AA28

VCC_AXG9

AB21

VCC_AXG10

AB24

VCC_AXG11

AB29

VCC_AXG12

AC20

VCC_AXG13

AC21

VCC_AXG14

AC23

VCC_AXG15

AC24

VCC_AXG16

AC26

VCC_AXG17

AC28

VCC_AXG18

AC29

VCC_AXG19

AD20

VCC_AXG20

AD23

VCC_AXG21

AD24

VCC_AXG22

AD28

VCC_AXG23

AF21

VCC_AXG24

AF26

VCC_AXG25

AA31

VCC_AXG26

AH20

VCC_AXG27

AH21

VCC_AXG28

AH23

VCC_AXG29

AH24

VCC_AXG30

AH26

VCC_AXG31

AD31

VCC_AXG32

AJ20

VCC_AXG33

AN14

VCC_AXG34

Crestline MCH-QN14_ES2

5

VCC CORE

POWER

VCC SMVCC GFX

VCC_AXG_NCTF1
VCC_AXG_NCTF2
VCC_AXG_NCTF3
VCC_AXG_NCTF4
VCC_AXG_NCTF5
VCC_AXG_NCTF6
VCC_AXG_NCTF7
VCC_AXG_NCTF8

VCC_AXG_NCTF9
VCC_AXG_NCTF10
VCC_AXG_NCTF11
VCC_AXG_NCTF12
VCC_AXG_NCTF13
VCC_AXG_NCTF14
VCC_AXG_NCTF15
VCC_AXG_NCTF16
VCC_AXG_NCTF17
VCC_AXG_NCTF18
VCC_AXG_NCTF19
VCC_AXG_NCTF20
VCC_AXG_NCTF21
VCC_AXG_NCTF22
VCC_AXG_NCTF23
VCC_AXG_NCTF24
VCC_AXG_NCTF25
VCC_AXG_NCTF26
VCC_AXG_NCTF27
VCC_AXG_NCTF28
VCC_AXG_NCTF29
VCC_AXG_NCTF30
VCC_AXG_NCTF31
VCC_AXG_NCTF32
VCC_AXG_NCTF33
VCC_AXG_NCTF34
VCC_AXG_NCTF35
VCC_AXG_NCTF36
VCC_AXG_NCTF37
VCC_AXG_NCTF38
VCC_AXG_NCTF39
VCC_AXG_NCTF40
VCC_AXG_NCTF41
VCC_AXG_NCTF42
VCC_AXG_NCTF43
VCC_AXG_NCTF44
VCC_AXG_NCTF45
VCC_AXG_NCTF46
VCC_AXG_NCTF47
VCC_AXG_NCTF48
VCC_AXG_NCTF49
VCC_AXG_NCTF50
VCC_AXG_NCTF51
VCC_AXG_NCTF52
VCC_AXG_NCTF53
VCC_AXG_NCTF54

VCC GFX NCTF

VCC_AXG_NCTF55
VCC_AXG_NCTF56
VCC_AXG_NCTF57
VCC_AXG_NCTF58
VCC_AXG_NCTF59
VCC_AXG_NCTF60
VCC_AXG_NCTF61
VCC_AXG_NCTF62
VCC_AXG_NCTF63
VCC_AXG_NCTF64
VCC_AXG_NCTF65
VCC_AXG_NCTF66
VCC_AXG_NCTF67
VCC_AXG_NCTF68
VCC_AXG_NCTF69
VCC_AXG_NCTF70
VCC_AXG_NCTF71
VCC_AXG_NCTF72
VCC_AXG_NCTF73
VCC_AXG_NCTF74
VCC_AXG_NCTF75
VCC_AXG_NCTF76
VCC_AXG_NCTF77
VCC_AXG_NCTF78
VCC_AXG_NCTF79
VCC_AXG_NCTF80
VCC_AXG_NCTF81
VCC_AXG_NCTF82
VCC_AXG_NCTF83

VCC_SM_LF1
VCC_SM_LF2
VCC_SM_LF3
VCC_SM_LF4
VCC_SM_LF5
VCC_SM_LF6
VCC_SM_LF7

VCC SM LF

T17
T18
T19
T21
T22
T23
T25
U15
U16
U17
U19
U20
U21
U23
U26
V16
V17
V19
V20
V21
V23
V24
Y15
Y16
Y17
Y19
Y20
Y21
Y23
Y24
Y26
Y28
Y29
AA16
AA17
AB16
AB19
AC16
AC17
AC19
AD15
AD16
AD17
AF16
AF19
AH15
AH16
AH17
AH19
AJ16
AJ17
AJ19
AK16
AK19
AL16
AL17
AL19
AL20
AL21
AL23
AM15
AM16
AM19
AM20
AM21
AM23
AP15
AP16
AP17
AP19
AP20
AP21
AP23
AP24
AR20
AR21
AR23
AR24
AR26
V26
V28
V29
Y31

AW45
BC39
BE39
BD17
BD4
AW8
AT6

4

VCC_AXG

C1697

0402_X5R

1 2

4

1 2

0.1U_10V_K

1 2

R2205

0_J 0402

DDR2 taps.

C1698

0.1U_10V_K

C1699

12

0402_X5R

0402

0.22U_10V_Y_Y

+1_8VSUS

1 2

C1700

12

0402

C1694

0.1U_10V_K

0402_X5R

0.22U_10V_Y_Y

12

+1_05VRUN

C1701

0.47U_6.3V_Y_Y

0402

1 2

C1702

1U_6.3V_M_B

0402

12

C1703

0402

1 2

308 mils
from the
Edge.

12

C1688
22U_6.3V_M_B

0805

CAP34

+

NC_330U_2V_T

EEFSX0D331ER

1U_6.3V_M_B

3

12

CAP33

+

330U_2.5V_7343

2R5TPE330M9

12

Place on the Edge.Place where LVDS and

3

12

12

C1689

0.22U_10V_Y_Y

0402

C1695
22U_6.3V_M_B

0805

C1686
22U_6.3V_M_B

0805

12

C1696
22U_6.3V_M_B

0805

+1_05VRUN

12

C1683

0.22U_10V_Y_Y

0402

Cavity Capacitors

12

C1690

0.22U_10V_Y_Y

0402

12

C1687

0.22U_10V_Y_Y

0402

C1691

0.1U_10V_K

0402_X5R

1 2

Cavity CapacitorsPlace on the Edge.

2

1 2

C1692

0.1U_10V_K

0402_X5R

1 2

2

C1684

0.1U_10V_K

0402_X5R

C1693

0.1U_10V_K

0402_X5R

1 2

1

U4F

AB33

VCC_NCTF1

AB36

VCC_NCTF2

AB37

VCC_NCTF3

AC33

C1685

NC_0.1U_16V_Y_Y

12

0402

VCC_NCTF4

AC35

VCC_NCTF5

AC36

VCC_NCTF6

AD35

VCC_NCTF7

AD36

VCC_NCTF8

AF33

VCC_NCTF9

AF36

VCC_NCTF10

AH33

VCC_NCTF11

AH35

VCC_NCTF12

AH36

VCC_NCTF13

AH37

VCC_NCTF14

AJ33

VCC_NCTF15

AJ35

VCC_NCTF16

AK33

VCC_NCTF17

AK35

VCC_NCTF18

AK36

VCC_NCTF19

AK37

VCC_NCTF20

AD33

VCC_NCTF21

AJ36

VCC_NCTF22

AM35

VCC_NCTF23

AL33

VCC_NCTF24

AL35

VCC_NCTF25

AA33

VCC_NCTF26

AA35

VCC_NCTF27

AA36

VCC_NCTF28

AP35

VCC_NCTF29

AP36

VCC_NCTF30

AR35

VCC_NCTF31

AR36

VCC_NCTF32

Y32

VCC_NCTF33

Y33

VCC_NCTF34

Y35

VCC_NCTF35

Y36

VCC_NCTF36

Y37 A3

VCC_NCTF37 VSS_SCB1

T30

VCC_NCTF38

T34

VCC_NCTF39

T35

VCC_NCTF40

U29

VCC_NCTF41

U31

VCC_NCTF42

U32

VCC_NCTF43

U33

VCC_NCTF44

U35

VCC_NCTF45

U36

VCC_NCTF46

V32

VCC_NCTF47

V33

VCC_NCTF48

V36

VCC_NCTF49

V37

VCC_NCTF50

AL24

VCC_AXM_NCTF1

AL26

VCC_AXM_NCTF2

AL28

VCC_AXM_NCTF3

AM26

VCC_AXM_NCTF4

AM28

VCC_AXM_NCTF5

AM29

VCC_AXM_NCTF6

AM31

VCC_AXM_NCTF7

AM32

VCC_AXM_NCTF8

AM33

VCC_AXM_NCTF9

AP29

VCC_AXM_NCTF10

AP31

VCC_AXM_NCTF11

AP32

VCC_AXM_NCTF12

AP33

VCC_AXM_NCTF13

AL29

VCC_AXM_NCTF14

AL31

VCC_AXM_NCTF15

AL32

VCC_AXM_NCTF16

AR31

VCC_AXM_NCTF17

AR32

VCC_AXM_NCTF18

AR33

VCC_AXM_NCTF19

Crestline MCH-QN14_ES2

FOXCONN

Title

Crestline(VCC CORE)6/7

Size Document Number Rev

A3

(M610-1-01 )MainBoard (MBX-176) 2007.1.4 2.0

Date: Sheet

VCC NCTF

POWER

HON HAI PRECISION IND. CO., LTD.
CPBG - R&D Division

VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7
VSS_NCTF8

VSS_NCTF9
VSS_NCTF10
VSS_NCTF11
VSS_NCTF12
VSS_NCTF13
VSS_NCTF14
VSS_NCTF15

VSS NCTF

VSS_NCTF16
VSS_NCTF17
VSS_NCTF18
VSS_NCTF19
VSS_NCTF20
VSS_NCTF21

VSS_SCB2
VSS_SCB3
VSS_SCB4
VSS_SCB5
VSS_SCB6

VSS SCBVCC AXM

VCC_AXM1
VCC_AXM2
VCC_AXM3
VCC_AXM4
VCC_AXM5
VCC_AXM6
VCC_AXM7

VCC AXM NCTF

1

T27
T37
U24
U28
V31
V35
AA19
AB17
AB35
AD19
AD37
AF17
AF35
AK17
AM17
AM24
AP26
AP28
AR15
AR19
AR28

B2
C1
BL1
BL51
A51

+1_05VRUN

AT33
AT31
AK29
AK24
AK23
AJ26
AJ23

1.3A

of

12 81Friday, August 31, 2007

5

4

3

2

1

U4I

A13

VSS1

A15

VSS2

A17

VSS3

A24

VSS4

AA21

VSS5

AA24

VSS6

D D

C C

B B

A A

5

AA29

VSS7

AB20

VSS8

AB23

VSS9

AB26

VSS10

AB28

VSS11

AB31

VSS12

AC10

VSS13

AC13

VSS14

AC3

VSS15

AC39

VSS16

AC43

VSS17

AC47

VSS18

AD1

VSS19

AD21

VSS20

AD26

VSS21

AD29

VSS22

AD3

VSS23

AD41

VSS24

AD45

VSS25

AD49

VSS26

AD5

VSS27

AD50

VSS28

AD8

VSS29

AE10

VSS30

AE14

VSS31

AE6

VSS32

AF20

VSS33

AF23

VSS34

AF24

VSS35

AF31

VSS36

AG2

VSS37

AG38

VSS38

AG43

VSS39

AG47

VSS40

AG50

VSS41

AH3

VSS42

AH40

VSS43

AH41

VSS44

AH7

VSS45

AH9

VSS46

AJ11

VSS47

AJ13

VSS48

AJ21

VSS49

AJ24

VSS50

AJ29

VSS51

AJ32

VSS52

AJ43

VSS53

AJ45

VSS54

AJ49

VSS55

AK20

VSS56

AK21

VSS57

AK26

VSS58

AK28

VSS59

AK31

VSS60

AK51

VSS61

AL1

VSS62

AM11

VSS63

AM13

VSS64

AM3

VSS65

AM4

VSS66

AM41

VSS67

AM45

VSS68

AN1

VSS69

AN38

VSS70

AN39

VSS71

AN43

VSS72

AN5

VSS73

AN7

VSS74

AP4

VSS75

AP48

VSS76

AP50

VSS77

AR11

VSS78

AR2

VSS79

AR39

VSS80

AR44

VSS81

AR47

VSS82

AR7

VSS83

AT10

VSS84

AT14

VSS85

AT41

VSS86

AT49

VSS87

AU1

VSS88

AU23

VSS89

AU29

VSS90

AU3

VSS91

AU36

VSS92

AU49

VSS93

AU51

VSS94

AV39

VSS95

AV48

VSS96

AW1

VSS97

AW12

VSS98

AW16

VSS99

Crestline MCH-QN14_ES2

VSS

4

VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198

AW24
AW29
AW32
AW5
AW7
AY10
AY24
AY37
AY42
AY43
AY45
AY47
AY50
B10
B20
B24
B29
B30
B35
B38
B43
B46
B5
B8
BA1
BA17
BA18
BA2
BA24
BB12
BB25
BB40
BB44
BB49
BB8
BC16
BC24
BC25
BC36
BC40
BC51
BD13
BD2
BD28
BD45
BD48
BD5
BE1
BE19
BE23
BE30
BE42
BE51
BE8
BF12
BF16
BF36
BG19
BG2
BG24
BG29
BG39
BG48
BG5
BG51
BH17
BH30
BH44
BH46
BH8
BJ11
BJ13
BJ38
BJ4
BJ42
BJ46
BK15
BK17
BK25
BK29
BK36
BK40
BK44
BK6
BK8
BL11
BL13
BL19
BL22
BL37
BL47
C12
C16
C19
C28
C29
C33
C36
C41

3

U4J

C46

VSS199

C50

VSS200

C7

VSS201

D13

VSS202

D24

VSS203

D3

VSS204

D32

VSS205

D39

VSS206

D45

VSS207

D49

VSS208

E10

VSS209

E16

VSS210

E24

VSS211

E28

VSS212

E32

VSS213

E47

VSS214

F19

VSS215

F36

VSS216

F4

VSS217

F40

VSS218

F50

VSS219

G1

VSS220

G13

VSS221

G16

VSS222

G19

VSS223

G24

VSS224

G28

VSS225

G29

VSS226

G33

VSS227

G42

VSS228

G45

VSS229

G48

VSS230

G8

VSS231

H24

VSS232

H28

VSS233

H4

VSS234

H45

VSS235

J11

VSS236

J16

VSS237

J2

VSS238

J24

VSS239

J28

VSS240

J33

VSS241

J35

VSS242

J39

VSS243

K12

VSS245

K47

VSS246

K8

VSS247

L1

VSS248

L17

VSS249

L20

VSS250

L24

VSS251

L28

VSS252

L3

VSS253

L33

VSS254

L49

VSS255

M28

VSS256

M42

VSS257

M46

VSS258

M49

VSS259

M5

VSS260

M50

VSS261

M9

VSS262

N11

VSS263

N14

VSS264

N17

VSS265

N29

VSS266

N32

VSS267

N36

VSS268

N39

VSS269

N44

VSS270

N49

VSS271

N7

VSS272

P19

VSS273

P2

VSS274

P23

VSS275

P3

VSS276

P50

VSS277

R49

VSS278

T39

VSS279

T43

VSS280

T47

VSS281

U41

VSS282

U45

VSS283

U50

VSS284

V2

VSS285

V3

VSS286

Crestline MCH-QN14_ES2

VSS

VSS287
VSS288
VSS289
VSS290
VSS291
VSS292
VSS293
VSS294
VSS295
VSS296
VSS297
VSS298
VSS299
VSS300
VSS301
VSS302
VSS303
VSS304
VSS305

VSS306
VSS307
VSS308
VSS309
VSS310
VSS311
VSS312
VSS313

2

W11
W39
W43
W47
W5
W7
Y13
Y2
Y41
Y45
Y49
Y5
Y50
Y11
P29
T29
T31
T33
R28

AA32
AB32
AD32
AF28
AF29
AT27
AV25
H50

FOXCONN

Title

Crestline (VSS)7/7

Size Document Number Rev

A3

(M610-1-01 )MainBoard (MBX-176) 2007.1.4 2.0

Date: Sheet

HON HAI PRECISION IND. CO., LTD.
CPBG - R&D Division

of

13 81Friday, August 31, 2007

1

1

12

C231

0.1U_16V_M_B

0402

A A

B B

C C

D D

0.1 µF and 2.2 µF placed
close to VREF pins

+3VRUN

1

12

C232

2.2U_10V_Y_Y

0603

M_CKE08,16

M_A_BS210,16

M_A_BS010,16 M_A_RAS# 10,16

M_A_WE#10,16

M_A_CAS#10,16

M_CS#18,16

M_ODT18,16

SMB_DATA_SUS3,15,40,54
SMB_CLK_SUS3,15,40,54

DDR2_VREF

12

C1078

2.2U_10V_Y_Y

0603

2

2

DDR2_VREF

M_A_DQ0
M_A_DQ1

M_A_DQS#0
M_A_DQS0

M_A_DQ2
M_A_DQ3

M_A_DQ8
M_A_DQ9

M_A_DQS#1
M_A_DQS1

M_A_DQ10
M_A_DQ11

M_A_DQ16
M_A_DQ17

M_A_DQS#2
M_A_DQS2

M_A_DQ18
M_A_DQ19

M_A_DQ24
M_A_DQ25

M_A_DM3

M_A_DQ26
M_A_DQ27

M_A_A12
M_A_A9
M_A_A8

M_A_A5
M_A_A3
M_A_A1

M_A_A10

M_A_DQ32
M_A_DQ33

M_A_DQS#4
M_A_DQS4

M_A_DQ34
M_A_DQ35

M_A_DQ40
M_A_DQ41

M_A_DM5

M_A_DQ42
M_A_DQ43

M_A_DQ48
M_A_DQ49

M_A_DQS#6
M_A_DQS6

M_A_DQ50
M_A_DQ51

M_A_DQ56
M_A_DQ57

M_A_DM7

M_A_DQ58
M_A_DQ59

12

C243

0.1U_16V_M_B

0402

+1_8VSUS

101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

1
3
5
7

9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99

VREF
VSS47
DQ0
DQ1
VSS37
DQS#0
DQS0
VSS48
DQ2
DQ3
VSS38
DQ8
DQ9
VSS49
DQS#1
DQS1
VSS39
DQ10
DQ11
VSS50

VSS18
DQ16
DQ17
VSS1
DQS#2
DQS2
VSS19
DQ18
DQ19
VSS22
DQ24
DQ25
VSS23
DM3
NC4
VSS9
DQ26
DQ27
VSS4
CKE0
VDD7
NC1
A16_BA2
VDD9
A12
A9
A8
VDD5
A5
A3
A1
VDD10
A10/AP
BA0
WE#
VDD2
CAS#
S1#
VDD3
ODT1
VSS11
DQ32
DQ33
VSS26
DQS#4
DQS4
VSS2
DQ34
DQ35
VSS27
DQ40
DQ41
VSS29
DM5
VSS51
DQ42
DQ43
VSS40
DQ48
DQ49
VSS52
NCTEST
VSS30
DQS#6
DQS6
VSS31
DQ50
DQ51
VSS33
DQ56
DQ57
VSS3
DM7
VSS34
DQ58
DQ59
VSS14
SDA
SCL
VDD(SPD)

3

201

202

SMDFIX1

SMDFIX2

PC4800 DDR2

NPTH1

NPTH2

203

204

DIMM_0

3

+1_8VSUS

CN1

2

VSS46

4

DQ4

6

DQ5

8

VSS15

10

DM0

12

VSS5

14

DQ6

16

DQ7

18

VSS16

20

DQ12

22

DQ13

24

VSS17

26

DM1

28

VSS53

30

CK0

32

CK0#

34

VSS41

36

DQ14

38

DQ15

40

VSS54

42

VSS20

44

DQ20

46

DQ21

48

VSS6

50

NC3

52

DM2

54

VSS21

56

DQ22

58

DQ23

60

VSS24

62

DQ28

64

DQ29

66

VSS25

68

DQS#3

70

DQS3

72

VSS10

74

DQ30

76

DQ31

78

VSS8

80

CKE1

82

VDD8

84

A15

86

A14

88

VDD11

90

A11

92

A7

94

A6

96

SDRAM SO-DIMM

(200P)

VDD4

98

A4

100

A2

102

A0

104

VDD12

106

BA1

108

RAS#

110

S0#

112

VDD1

114

ODT0

116

A13

118

VDD6

120

NC2

122

VSS12

124

DQ36

126

DQ37

128

VSS28

130

DM4

132

VSS42

134

DQ38

136

DQ39

138

VSS55

140

DQ44

142

DQ45

144

VSS43

146

DQS#5

148

DQS5

150

VSS56

152

DQ46

154

DQ47

156

VSS44

158

DQ52

160

DQ53

162

VSS57

164

CK1

166

CK1#

168

VSS45

170

DM6

172

VSS32

174

DQ54

176

DQ55

178

VSS35

180

DQ60

182

DQ61

184

VSS7

186

DQS#7

188

DQS7

190

VSS36

192

DQ62

194

DQ63

196

VSS13

198

SA0

200

SA1

SMBus Address: A0(W)/A1(R)

M_A_DQ4
M_A_DQ5

M_A_DM0

M_A_DQ6
M_A_DQ7

M_A_DQ12
M_A_DQ13

M_A_DM1

M_A_DQ14
M_A_DQ15

M_A_DQ20
M_A_DQ21

DDR2_EXTTS#0
M_A_DM2

M_A_DQ22
M_A_DQ23

M_A_DQ28
M_A_DQ29

M_A_DQS#3
M_A_DQS3

M_A_DQ30
M_A_DQ31

R_M_A_A14

M_A_A11
M_A_A7
M_A_A6

M_A_A4
M_A_A2
M_A_A0

M_A_A13

M_A_DQ36
M_A_DQ37

M_A_DM4

M_A_DQ38
M_A_DQ39

M_A_DQ44
M_A_DQ45

M_A_DQS#5
M_A_DQS5

M_A_DQ46
M_A_DQ47

M_A_DQ52
M_A_DQ53

M_A_DM6

M_A_DQ54
M_A_DQ55

M_A_DQ60
M_A_DQ61

M_A_DQS#7
M_A_DQS7

M_A_DQ62
M_A_DQ63

SA0_DIM0
SA1_DIM0

DDR2 SO-DIMM_200P

FOX_AS0A426_N4RC_4F

Place DIMM_0 near GMCH

4

1.8V per DIMM=3.08A

M_CLK_DDR0 8
M_CLK_DDR#0 8

R168

4

1 2

0_J 0402

R2207

1 2

0_J 0402

R174
10K_J 0402

R175
10K_J 0402

M_CKE1 8,16

M_A_BS1 10,16

M_CS#0 8,16

M_ODT0 8,16

M_CLK_DDR1 8
M_CLK_DDR#1 8

12
12

PM_EXTTS#0 8

M_A_A14 8,16

5

12

C234

2.2U_10V_Y_Y

0603

5

6

M_A_DM[0..7] 10
M_A_DQ[0..63] 10
M_A_DQS[0..7] 10
M_A_DQS#[0..7] 10
M_A_A[0..13] 10,16

DDRDIMM_VREF

12

DDR2_VREF

DDR2_VREF

C233

(20 mil)

Place these Caps near So-Dimm0.

12

C235

2.2U_10V_Y_Y

0603

Place these Caps near So-Dimm0.

12

C239

0.1U_16V_Y_Y

0402

6

0.1U_16V_M_B

12

C236

2.2U_10V_Y_Y

0603

12

C240

0.1U_16V_Y_Y

0402

1 2

0402

12

C237

2.2U_10V_Y_Y

0603

12

C241

0.1U_16V_Y_Y

0402

FOXCONN

Title

Size Document Number Rev
A3

Date: Sheet

R166

0_J

0402

7

+1_8VSUS

12

C238

2.2U_10V_Y_Y

0603

+1_8VSUS

12

C242

0.1U_16V_Y_Y

0402

HON HAI PRECISION IND. CO., LTD.
CPBG - R&D Division

8

DDR(II)SO-DIMM_0

(M610-1-01 )MainBoard (MBX-176) 2007.1.4 2.0

14 81Friday, August 31, 2007

7

of

8

1

DDR2_VREF

SMB_DATA_SUS3,14,40,54
SMB_CLK_SUS3,14,40,54

11/3
NC

12

C245

2.2U_10V_Y_Y

0603

M_CKE28,16

M_B_BS210,16

M_B_BS010,16

M_B_WE#10,16

M_B_CAS#10,16

M_CS#38,16

M_ODT38,16

12

C1661

0.1U_16V_M_B

0402

A A

B B

C C

D D

12

C244

0.1U_16V_M_B

0402

0.1 µF and 2.2 µF placed
close to VREF pins

+3VRUN

1

2

12

C1079

NC_2.2U_10V_Y_Y

0603

2

3

+1_8VSUS +1_8VSUS

1

M_B_DQ0
M_B_DQ1

M_B_DQS#0
M_B_DQS0

M_B_DQ2
M_B_DQ3

M_B_DQ8
M_B_DQ9

M_B_DQS#1
M_B_DQS1

M_B_DQ10
M_B_DQ11

M_B_DQ16
M_B_DQ17

M_B_DQS#2
M_B_DQS2

M_B_DQ18
M_B_DQ19

M_B_DQ24
M_B_DQ25

M_B_DM3

M_B_DQ26
M_B_DQ27

M_B_A12
M_B_A9
M_B_A8

M_B_A5
M_B_A3
M_B_A1

M_B_A10

M_B_DQ32
M_B_DQ33

M_B_DQS#4
M_B_DQS4

M_B_DQ35

M_B_DQ40
M_B_DQ41

M_B_DM5

M_B_DQ42
M_B_DQ43

M_B_DQ48
M_B_DQ49

M_B_DQS#6
M_B_DQS6

M_B_DQ50 M_B_DQ54
M_B_DQ51 M_B_DQ55

M_B_DQ56
M_B_DQ57

M_B_DM7

M_B_DQ58
M_B_DQ59

12

C255

0.1U_16V_M_B

0402

3
5
7

9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99

101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

CN2

VREF
VSS47
DQ0
DQ1
VSS37
DQS#0
DQS0
VSS48
DQ2
DQ3
VSS38
DQ8
DQ9
VSS49
DQS#1
DQS1
VSS39
DQ10
DQ11
VSS50

VSS18
DQ16
DQ17
VSS1
DQS#2
DQS2
VSS19
DQ18
DQ19
VSS22
DQ24
DQ25
VSS23
DM3
NC4
VSS9
DQ26
DQ27
VSS4
CKE0
VDD7
NC1
A16_BA2
VDD9
A12
A9
A8
VDD5
A5
A3
A1
VDD10
A10/AP
BA0
WE#
VDD2
CAS#
S1#
VDD3
ODT1
VSS11
DQ32
DQ33
VSS26
DQS#4
DQS4
VSS2
DQ34
DQ35
VSS27
DQ40
DQ41
VSS29
DM5
VSS51
DQ42
DQ43
VSS40
DQ48
DQ49
VSS52
NCTEST
VSS30
DQS#6
DQS6
VSS31
DQ50
DQ51
VSS33
DQ56
DQ57
VSS3
DM7
VSS34
DQ58
DQ59
VSS14
SDA
SCL
VDD(SPD)

DIMM_1

201

202

2

VSS46

4

DQ4

6

DQ5

8

VSS15

SMDFIX1

SMDFIX2

10

DM0

12

VSS5

14

DQ6

16

DQ7

18

VSS16

20

DQ12

22

DQ13

24

VSS17

26

DM1

28

VSS53

30

CK0

32

CK0#

34

VSS41

36

DQ14

38

DQ15

40

VSS54

42

VSS20

44

DQ20

46

DQ21

48

VSS6

50

NC3

52

DM2

54

VSS21

56

DQ22

58

DQ23

60

VSS24

62

DQ28

64

DQ29

66

VSS25

68

DQS#3

70

DQS3

72

VSS10

74

DQ30

76

DQ31

78

VSS8

80

CKE1

82

VDD8

84

A15

86

A14

88

VDD11

90

A11

92

A7

94

A6

96

PC4800 DDR2

SDRAM SO-DIMM

(200P)

VDD4

98

A4

100

A2

102

A0

104

VDD12

106

BA1

108

RAS#

110

S0#

112

VDD1

114

ODT0

116

A13

118

VDD6

120

NC2

122

VSS12

124

DQ36

126

DQ37

128

VSS28

130

DM4

132

VSS42

134

DQ38

136

DQ39

138

VSS55

140

DQ44

142

DQ45

144

VSS43

146

DQS#5

148

DQS5

150

VSS56

152

DQ46

154

DQ47

156

VSS44

158

DQ52

160

DQ53

162

VSS57

164

CK1

166

CK1#

168

VSS45

170

DM6

172

VSS32

174

DQ54

176

DQ55

178

VSS35

180

DQ60

182

DQ61

184

VSS7

186

DQS#7

188

DQS7

190

VSS36

192

DQ62

194

DQ63

196

VSS13

198

SA0

200

SA1

NPTH1

NPTH2

203

204

DDR2 S0-DIMM_200P

FOX_AS0A426_N4SC_4F

4

1.8V per DIMM=3.08A

M_B_DQ4
M_B_DQ5

M_B_DM0

M_B_DQ6
M_B_DQ7

M_B_DQ12
M_B_DQ13

M_B_DM1

M_B_DQ14
M_B_DQ15

M_B_DQ20
M_B_DQ21

DDR2_EXTTS#1
M_B_DM2

M_B_DQ22
M_B_DQ23

M_B_DQ28
M_B_DQ29

M_B_DQS#3
M_B_DQS3

M_B_DQ30
M_B_DQ31

R_M_B_A14

M_B_A11
M_B_A7
M_B_A6

M_B_A4
M_B_A2
M_B_A0

M_B_A13

M_B_DQ36
M_B_DQ37

M_B_DM4

M_B_DQ38
M_B_DQ39M_B_DQ34

M_B_DQ44
M_B_DQ45

M_B_DQS#5
M_B_DQS5

M_B_DQ46
M_B_DQ47

M_B_DQ52
M_B_DQ53

M_B_DM6

M_B_DQ60
M_B_DQ61

M_B_DQS#7
M_B_DQS7

M_B_DQ62
M_B_DQ63

SA0_DIM1

SA1_DIM1

SMBus Address: A4(W)/A5(R)

DIMM_1 is placed farther from the GMCH than DIMM_0

3

4

M_CLK_DDR2 8
M_CLK_DDR#2 8

10/27
Swap strob2,strob3

R1627

0_J 0402

1 2

Change net name
from PM_EXTTS#_L
to DDR2_EXTTS#1

M_CKE3 8,16

R2208

1 2

0_J 0402

M_B_BS1 10,16
M_B_RAS# 10,16
M_CS#2 8,16

M_ODT2 8,16

M_CLK_DDR3 8
M_CLK_DDR#3 8

10/27
Swap strob2,strob3

R177 10K_J

R178 10K_J

0402

12

12

0402

+3VRUN

5

PM_EXTTS#1 8

M_B_A14 8,16

5

6

Place these Caps near So-Dimm1.

12

C246

2.2U_10V_Y_Y

0603

6

12

C247

2.2U_10V_Y_Y

0603

Place these Caps near So-Dimm1.

12

C251

0.1U_16V_Y_Y

0402

7

M_B_DM[0..7] 10
M_B_DQ[0..63] 10
M_B_DQS[0..7] 10
M_B_DQS#[0..7] 10
M_B_A[0..13] 10,16

+1_8VSUS

12

C248

2.2U_10V_Y_Y

0603

12

C252

0.1U_16V_Y_Y

0402

FOXCONN

Title

DDR(II)SO-DIMM_1

Size Document Number Rev

(M610-1-01 )MainBoard (MBX-176) 2007.1.4 2.0

A3

Date: Sheet

7

12

C249

2.2U_10V_Y_Y

0603

+1_8VSUS

12

C253

0.1U_16V_Y_Y

0402

HON HAI PRECISION IND. CO., LTD.
CPBG - R&D Division

12

C250

2.2U_10V_Y_Y

0603

12

C254

0.1U_16V_Y_Y

0402

8

15 81Friday, August 31, 2007

of

8

1

2

3

4

5

6

7

8

R2191 56_J0402

M_B_A148,15

M_A_A148,14

M_B_RAS#10,15

A A

M_B_BS010,15

M_B_BS110,15

M_B_WE#10,15

M_B_CAS#10,15

M_A_A[0..13]10,14

B B

M_B_A[0..13]10,15

M_ODT28,15

M_B_A12
M_B_A9

M_B_A8
M_B_A5

M_B_A3
M_B_A1

M_B_A10

M_B_A7
M_B_A11

M_B_A4
M_B_A6

M_B_A0
M_B_A2

M_B_A13

1 2

R2192 56_J0402

1 2

RP12 56

4

RP13 56

4

RP14 56

4

RP15 56

4

RP16 56

4

RP17 56

4

RP18 56

4

RP19 56

4

RP20 56

4

RP21 56

4

1

0404_4P2R

23

1

0404_4P2R

23

1

0404_4P2R

23

1

0404_4P2R

23

1

0404_4P2R

23

1

0404_4P2R

23

1

0404_4P2R

23

1

0404_4P2R

23

1

0404_4P2R

23

1

0404_4P2R

23

+0_9VSUS

+0_9VSUS

+0_9VSUS

+0_9VSUS

+0_9VSUS

12

C257

0.1U_16V_Y_Y

0402

12

C258

0.1U_16V_Y_Y

0402

12

C259

0.1U_16V_Y_Y

0402

12

C260

0.1U_16V_Y_Y

0402

12

C261

0.1U_16V_Y_Y

0402

12

C262

0.1U_16V_Y_Y

0402

12

C263

0.1U_16V_Y_Y

0402

12

C264

0.1U_16V_Y_Y

0402

12

C265

0.1U_16V_Y_Y

0402

12

C266

0.1U_16V_Y_Y

0402

12

C267

0.1U_16V_Y_Y

0402

12

C268

0.1U_16V_Y_Y

0402

12

C269

0.1U_16V_Y_Y

0402

M_A_A7
M_A_A11

M_A_A4
M_A_A6

M_A_RAS#10,14

M_A_BS110,14

RP22 56

RP23 56

RP24 56

1

4

23

1

4

23

1

4

23

0404_4P2R

0404_4P2R

0404_4P2R

Layout note: Place 1 cap close to every 1 R-pack terminated to +0_9VSUS

+0_9VSUS

M_ODT08,14

M_A_BS210,14

12

C270

C C

0.1U_16V_Y_Y

0402

12

C271

0.1U_16V_Y_Y

0402

12

C272

0.1U_16V_Y_Y

0402

12

C273

0.1U_16V_Y_Y

0402

12

C274

0.1U_16V_Y_Y

0402

12

C275

0.1U_16V_Y_Y

0402

12

C276

0.1U_16V_Y_Y

0402

12

C277

0.1U_16V_Y_Y

0402

12

C278

0.1U_16V_Y_Y

0402

12

C279

0.1U_16V_Y_Y

0402

12

C280

0.1U_16V_Y_Y

0402

12

C281

0.1U_16V_Y_Y

0402

12

C282

0.1U_16V_Y_Y

0402

M_A_A13

M_A_A12

M_A_A9
M_A_A8

M_A_A5
M_A_A3

RP25 56

RP26 56

RP27 56

RP28 56

1

4

23

1

4

23

1

4

23

1

4

23

0404_4P2R

0404_4P2R

0404_4P2R

0404_4P2R

Layout note: Place 1 cap close to every 1 R-pack terminated to +0_9VSUS

M_A_BS010,14

M_A_WE#10,14

M_A_CAS#10,14

M_A_A10

M_A_A0
M_A_A2

RP29 56

RP30 56

RP31 56

1

4

23

1

4

23

1

4

23

0404_4P2R

0404_4P2R

0404_4P2R

+0_9VSUS

+0_9VSUS

R183 56_J0402

+0_9VSUS +0_9VSUS +0_9VSUS

R186 56_J0402

R189 56_J0402

R192 56_J0402

2

1 2

1 2

1 2

1 2

3

M_CKE08,14

M_CKE18,14

D D

M_CKE28,15

M_CKE38,15

1

M_CS#08,14

M_CS#18,14

M_CS#28,15

M_CS#38,15

R181 56_J0402

R184 56_J0402

R187 56_J0402

R190 56_J0402

4

1 2

1 2

1 2

1 2

R182 56_J0402

R185 56_J0402

R188 56_J0402

R191 56_J0402

1 2

1 2

1 2

1 2

6

FOXCONN

Title

DDR(II)Termination

Size Document Number Rev

(M610-1-01 )MainBoard (MBX-176) 2007.1.4 2.0

A3

Date: Sheet

7

HON HAI PRECISION IND. CO., LTD.
CPBG - R&D Division

16 81Friday, August 31, 2007

of

8

M_ODT18,14

M_ODT38,15

M_A_A1

M_B_BS210,15

5

5

4

3

2

1

PEG_RXN[0..15]9

D D

PEG_RXP[0..15]9

PEG_RXP0 TXP0

PEG_RXP1

PEG_RXP2

PEG_RXP3

PEG_RXP4

PEG_RXP5

C C

B B

PEG_RXP6

PEG_RXP7

PEG_RXP8

PEG_RXP9

PEG_RXP10

PEG_RXP11

PEG_RXP13

PEG_RXP14

PEG_RXP15

1 2

C285 NV_0.1U_16V_M_B 0402

1 2

C287 NV_0.1U_16V_M_B 0402

1 2

C289 NV_0.1U_16V_M_B 0402

1 2

C291 NV_0.1U_16V_M_B 0402

1 2

C293 NV_0.1U_16V_M_B 0402

1 2

C295 NV_0.1U_16V_M_B 0402

1 2

C297 NV_0.1U_16V_M_B 0402

1 2

C299 NV_0.1U_16V_M_B 0402

1 2

C301 NV_0.1U_16V_M_B 0402

1 2

C303 NV_0.1U_16V_M_B 0402

1 2

C305 NV_0.1U_16V_M_B 0402

1 2

C307 NV_0.1U_16V_M_B 0402

1 2

C309 NV_0.1U_16V_M_B 0402

1 2

C311 NV_0.1U_16V_M_B 0402

1 2

C313 NV_0.1U_16V_M_B 0402

1 2

C315 NV_0.1U_16V_M_B 0402

TXP1

TXP2

TXP3

TXP4

TXP5

TXP6

TXP7

TXP8

TXP9

TXP10

TXP11

TXP12PEG_RXP12

TXP13

TXP14

TXP15

TXP[0..15] 17

PEG_RXN0

1 2

C286 NV_0.1U_16V_M_B 0402

PEG_RXN1

1 2

C288 NV_0.1U_16V_M_B 0402

PEG_RXN2

1 2

C290 NV_0.1U_16V_M_B 0402

PEG_RXN3

1 2

C292 NV_0.1U_16V_M_B 0402

PEG_RXN4

1 2

C294 NV_0.1U_16V_M_B 0402

PEG_RXN5

1 2

C296 NV_0.1U_16V_M_B 0402

PEG_RXN6

1 2

C298 NV_0.1U_16V_M_B 0402

PEG_RXN7

1 2

C300 NV_0.1U_16V_M_B 0402

PEG_RXN8

1 2

C302 NV_0.1U_16V_M_B 0402

PEG_RXN9

1 2

C304 NV_0.1U_16V_M_B 0402

PEG_RXN10

1 2

C306 NV_0.1U_16V_M_B 0402

PEG_RXN11

1 2

C308 NV_0.1U_16V_M_B 0402

PEG_RXN12

1 2

C310 NV_0.1U_16V_M_B 0402

PEG_RXN13

1 2

C312 NV_0.1U_16V_M_B 0402

PEG_RXN14

1 2

C314 NV_0.1U_16V_M_B 0402

PEG_RXN15

1 2

C316 NV_0.1U_16V_M_B 0402

TXN0

TXN1

TXN2

TXN3

TXN4

TXN5

TXN6

TXN7

TXN8

TXN9

TXN10

TXN11

TXN12

TXN13

TXN14

TXN15

TXN[0..15] 17

NB8X Strap for GDDR3-136ball
0001 16Mx32Infineon
0010 16Mx32Hynix
0011 16Mx32Samsung
0101 8Mx32Infineon
0110 8Mx32Hynix
0111 8Mx32Samsung

SUB_VENDOR
0 (USE SYSTEM BIOS)
1 (USE EXTERNAL ROM)

MIOAD0 is used to set
the PCI Express PLL
termination enable.
DEFAULT "0"

NB8X 3GIO_PADCFG[3:0]
0001

NB8M-GT Device ID setting mismatch between VBIOS and H/W Straps
Change R231 value from NC_ to NV8MH_
Change R232 value from NV_ to NV8P_

NB8X PCI_DEVID[4:0]
NB8P-GS X0111 "X7"
NB8M-GT X0110 "X6"

RAM_CFG0

RAM_CFG1

RAM_CFG2

RAM_CFG3

SUBVENDOR

PEX_PLL_EN_TERM

3GIO_PADCFG0

3GIO_PADCFG1

3GIO_PADCFG2

3GIO_PADCFG3

PCI_DEVID 0

PCI_DEVID 1

PCI_DEVID 2

PCI_DEVID 3

PCI_DEVID 4

12

MIOBD0

MIOBD1

MIOBD8

MIOBD9

MIOAD1

MIOAD0

MIOAD6

MIOAD8

MIOAD9

MIOB_HSYNC

MIOBD4

MIOBD5

MIOBD3

MIOBD11

MIOB_CTL3

1 2

R203 NVH_2K_J 0402

1 2

R205 NVI_2K_J 0402

1 2

R207 NV16_2K_J 0402

1 2

R209 NV_2K_J 0402

R211 NV_2K_J 0402

1 2

R223 NV_2K_J 0402

1 2

R225 NC_2K_J 0402

1 2

R227 NV_2K_J 0402

1 2

R229 NV_2K_J 0402

1 2

R2124 NV_2K_J 0402

1 2

R231 NV8M_2K_J 0402

1 2

R233 NC_2K_J 0402

1 2

R235 NC_2K_J 0402

1 2

R237 NV_2K_J 0402

1 2

R2126 NC_2K_J 0402

1 2

R204 NVIS_2K_J 0402

1 2

R206 NVHS_2K_J 0402

1 2

R208 NV8_2K_J 0402

1 2

R210 NC_2K_J 0402

MIOAD1 17

MIOAD0 17

1 2

R226 NV_2K_J 0402

1 2

R228 NC_2K_J 0402

1 2

R230 NC_2K_J 0402

1 2

R2125 NC_2K_J 0402

1 2

R232 NV8P_2K_J 0402

1 2

R234 NV_2K_J 0402

1 2

R236 NV_2K_J 0402

1 2

R238 NC_2K_J 0402

1 2

R2127 NC_2K_J 0402

+3VRUN

MIOAD6
MIOAD8
MIOAD9

MIOBD0
MIOBD1
MIOBD3
MIOBD4
MIOBD5
MIOBD8
MIOBD9
MIOBD11
MIOB_CTL3
MIOB_HSYNC

A A

5

4

MIOAD6 17
MIOAD8 17
MIOAD9 17

MIOBD0 17
MIOBD1 17
MIOBD3 17
MIOBD4 17
MIOBD5 17
MIOBD8 17
MIOBD9 17

MIOBD11 17
MIOB_CTL3 17
MIOB_HSYNC 17

3

CRYSTAL(NB8X)
0 (27M Hz)
1 (Reserved)

CRYSTAL

2

1 2

R241 NV_2K_J 0402

FOXCONN

Title

Size Document Number Rev
A3

Date: Sheet

MIOBD2

MIOBD2 17

HON HAI PRECISION IND. CO., LTD.
CPBG - R&D Division

VGA (PCI-EXPRESS/STRAP) 2 OF 8

(M610-1-01 )MainBoard (MBX-176) 2007.1.4 2.0

18 81Friday, August 31, 2007

1

of

5

+3VRUN

12

R1908

NV_10K_J

0402

PLT_RST#4,8,38,43,44,45,47,51,53,54

D D

R1909 NC_0_J 0402

1 2

+3VRUN

U127 NV_74AHC1G08GW

53

1

4

2

CLK_PCIE_PEG3
CLK_PCIE_PEG#3

R1910 NV_33_J 0402

1 2

100MHz

TXP[0..15]18

C C

B B

A A

TXN[0..15]18

PEG_RXP_C[0..15]9

PEG_RXN_C[0..15]9

TXP10
TXP11
TXP12
TXP13
TXP14
TXP15

TXN10
TXN11
TXN12
TXN13
TXN14
TXN15

PEG_RXP_C0
PEG_RXP_C1
PEG_RXP_C2
PEG_RXP_C3
PEG_RXP_C4
PEG_RXP_C5
PEG_RXP_C6
PEG_RXP_C7
PEG_RXP_C8

PEG_RXP_C9
PEG_RXP_C10
PEG_RXP_C11
PEG_RXP_C12
PEG_RXP_C13
PEG_RXP_C14
PEG_RXP_C15

PEG_RXN_C0

PEG_RXN_C1

PEG_RXN_C2

PEG_RXN_C3

PEG_RXN_C4

PEG_RXN_C5

PEG_RXN_C6

PEG_RXN_C7

PEG_RXN_C8

PEG_RXN_C9

PEG_RXN_C10
PEG_RXN_C11
PEG_RXN_C12
PEG_RXN_C13
PEG_RXN_C14
PEG_RXN_C15

TXP0
TXP1
TXP2
TXP3
TXP4
TXP5
TXP6
TXP7
TXP8
TXP9

TXN0
TXN1
TXN2
TXN3
TXN4
TXN5
TXN6
TXN7
TXN8
TXN9

4

CLK_PCIE_PEG
CLK_PCIE_PEG#

TXP0
TXN0
TXP1
TXN1
TXP2
TXN2
TXP3
TXN3
TXP4
TXN4
TXP5
TXN5
TXP6
TXN6
TXP7
TXN7
TXP8
TXN8
TXP9
TXN9
TXP10
TXN10
TXP11
TXN11
TXP12
TXN12
TXP13
TXN13
TXP14
TXN14
TXP15
TXN15

PEG_RXP_C0
PEG_RXN_C0
PEG_RXP_C1
PEG_RXN_C1
PEG_RXP_C2
PEG_RXN_C2
PEG_RXP_C3
PEG_RXN_C3
PEG_RXP_C4
PEG_RXN_C4
PEG_RXP_C5
PEG_RXN_C5
PEG_RXP_C6
PEG_RXN_C6
PEG_RXP_C7
PEG_RXN_C7
PEG_RXP_C8
PEG_RXN_C8
PEG_RXP_C9
PEG_RXN_C9
PEG_RXP_C10
PEG_RXN_C10
PEG_RXP_C11
PEG_RXN_C11
PEG_RXP_C12
PEG_RXN_C12
PEG_RXP_C13
PEG_RXN_C13
PEG_RXP_C14
PEG_RXN_C14
PEG_RXP_C15
PEG_RXN_C15

AH15

AH14

AJ14

AJ15
AK15
AH16
AG16
AG17
AH17
AG18
AH18
AK18

AJ18

AJ19
AH19
AG20
AH20
AG21
AH21
AK21

AJ21

AJ22
AH22
AG23
AH23
AK24

AJ24

AJ25
AH25
AH26
AG26
AK27

AJ27

AJ28
AH27

AK13
AK14

AM14
AM15

AL15

AL16
AK16
AK17

AL17

AL18

AM18
AM19

AK19
AK20

AL20

AL21

AM21
AM22

AK22
AK23

AL23

AL24

AM24
AM25

AK25
AK26

AL26

AL27

AM27
AM28

AL28

AL29

U7A

PEX_RST#

PEX_REFCLK
PEX_REFCLK#

PEX_TX0
PEX_TX0#
PEX_TX1
PEX_TX1#
PEX_TX2
PEX_TX2#
PEX_TX3
PEX_TX3#
PEX_TX4
PEX_TX4#
PEX_TX5
PEX_TX5#
PEX_TX6
PEX_TX6#
PEX_TX7
PEX_TX7#
PEX_TX8
PEX_TX8#
PEX_TX9
PEX_TX9#
PEX_TX10
PEX_TX10#
PEX_TX11
PEX_TX11#
PEX_TX12
PEX_TX12#
PEX_TX13
PEX_TX13#
PEX_TX14
PEX_TX14#
PEX_TX15
PEX_TX15#

PEX_RX0
PEX_RX0#
PEX_RX1
PEX_RX1#
PEX_RX2
PEX_RX2#
PEX_RX3
PEX_RX3#
PEX_RX4
PEX_RX4#
PEX_RX5
PEX_RX5#
PEX_RX6
PEX_RX6#
PEX_RX7
PEX_RX7#
PEX_RX8
PEX_RX8#
PEX_RX9
PEX_RX9#
PEX_RX10
PEX_RX10#
PEX_RX11
PEX_RX11#
PEX_RX12
PEX_RX12#
PEX_RX13
PEX_RX13#
PEX_RX14
PEX_RX14#
PEX_RX15
PEX_RX15#

NV_NB8P-GS

3

P2

MIOAD0

N2

MIOAD1

N1

MIOAD2

N3

MIOAD3

M1

MIOAD4

M3

MIOAD5

P5

MIOAD6

N6

MIOAD7

N5

MIOAD8

M4

MIOAD9

L4

MIOAD10

L5

MIOAD11

AC3

MIOBD0

AC1

MIOBD1

AC2

MIOBD2

AB2

MIOBD3

AB1

MIOBD4

AA1

MIOBD5

AB3

MIOBD6

AA3

MIOBD7

AC5

MIOBD8

AB5

MIOBD9

AB4

MIOBD10

AA5

MIOBD11

MIOA_DE

MIOB_DE

R3
R1

P1
P3
R4
P4

L2

L3
L1

AF3
AE3

AD1
AD3
AD4
AD5
AE4
Y2

Y3
Y1

MIOA_HSYNC
MIOA_VSYNC

MIOA_CTL3

MIOA_CLKOUT

PCI EXPRESS

MIOA_CLKOUT#

MIOA_VREF

MULTI-USE I/O INTERFACE

MIOACAL_PU_GND

MIOACAL_PD_VDDQ

MIOB_HSYNC
MIOB_VSYNC

MIOB_CTL3

MIOB_CLKOUT

MIOB_CLKOUT#

MIOB_CLKIN

MIOB_VREF

MIOBCAL_PU_GND

MIOBCAL_PD_VDDQ

MIOAD0
MIOAD1
MIOAD2
MIOAD3
MIOAD4
MIOAD5
MIOAD6
MIOAD7
MIOAD8
MIOAD9
MIOAD10
MIOAD11

MIOBD0
MIOBD1
MIOBD2
MIOBD3
MIOBD4
MIOBD5
MIOBD6
MIOBD7
MIOBD8

MIOBD9
MIOBD10
MIOBD11

MIOA_HSYNC
MIOA_VSYNC

MIOA_DE
MIOA_CTL3
MIOA_CLKOUT
MIOA_CLKOUT#

MIOA_VREF

MIOACAL_PU_GND
MIOACAL_PD_VDDQ

MIOB_HSYNC
MIOB_VSYNC

MIOB_DE
MIOB_CTL3
MIOB_CLKOUT
MIOB_CLKOUT#
MIOB_CLKIN
MIOB_VREF

MIOBCAL_PU_GND
MIOBCAL_PD_VDDQ

MIOAD0 18
MIOAD1 18

MIOAD6 18

MIOAD8 18
MIOAD9 18

MIOBD0 18
MIOBD1 18
MIOBD2 18
MIOBD3 18
MIOBD4 18
MIOBD5 18

MIOBD8 18
MIOBD9 18

MIOBD11 18

R1774 NV_2K_F 0402

1 2

MIOB_HSYNC 18

MIOB_CTL3 18

R1939 NV_10K_J 0402

2

1

TP691 26MIL

1

TP693 26MIL

1

TP692 26MIL

1

TP694 26MIL

1

TP100326MIL

1

TP100426MIL

1

TP672 26MIL

1

TP100526MIL

1

TP682 26MIL

1

TP678 26MIL

[MIOA_HSYNC : SLOT_CLOCK_CFG]

+3VRUN

1

TP673 26MIL

1

TP675 26MIL

1

TP676 26MIL

1

TP677 26MIL

1

TP679 26MIL

1

TP695 26MIL

1

TP680 26MIL

1

TP681 26MIL

1

TP706 26MIL

1

TP688 26MIL

1

TP690 26MIL

1

12

1

1
1

TP699 26MIL

TP684 26MIL

TP685 26MIL
TP841 26MIL

0 GPU and MCH share a common reference clock
1 GPU and MCH do not share a common reference clock

1

FOXCONN

Title

VGA (PCI EXPRESS) 1 OF 8

Size Document Number Rev

(M610-1-01 )MainBoard (MBX-176) 2007.1.4 2.0

A3

5

4

3

2

Date: Sheet

HON HAI PRECISION IND. CO., LTD.
CPBG - R&D Division

17 81Friday, August 31, 2007

1

of

1

2

3

4

5

6

7

8

FBA_RAS#
FBA_BA1
FBA_BA2
FBA_CS0#
FBA_CS1#

FBA_A[0..12] 22,23

FBCD[0:63]24,25

FBB_A[2..5] 22,23

FBA_RAS# 22,23
FBA_BA1 22,23 FBC_BA2 24,25
FBA_BA2 22,23
FBA_CS0# 22

FBA_CS1# 22,23
FBA_CAS# 22,23
FBA_WE# 22,23
FBA_BA0 22,23

FBA_RESET 22,23

FBA_CKE 22,23

FBA_CLK0 22,23
FBA_CLK0# 22,23
FBA_CLK1 22,23
FBA_CLK1# 22,23

FBAWDQS[7..0] 22,23

FBARDQS[7..0] 22,23

FBCDQM[7..0]24,25

FBCD0
FBCD1
FBCD2
FBCD3
FBCD4
FBCD5
FBCD6
FBCD7
FBCD8
FBCD9
FBCD10
FBCD11
FBCD12
FBCD13
FBCD14
FBCD15
FBCD16
FBCD17
FBCD18
FBCD19
FBCD20
FBCD21
FBCD22
FBCD23
FBCD24
FBCD25
FBCD26
FBCD27
FBCD28
FBCD29
FBCD30
FBCD31
FBCD32
FBCD33
FBCD34
FBCD35
FBCD36
FBCD37
FBCD38
FBCD39
FBCD40
FBCD41
FBCD42
FBCD43
FBCD44
FBCD45
FBCD46
FBCD47
FBCD48
FBCD49
FBCD50
FBCD51
FBCD52
FBCD53
FBCD54
FBCD55
FBCD56
FBCD57
FBCD58
FBCD59
FBCD60
FBCD61
FBCD62
FBCD63

FBCDQM0
FBCDQM1
FBCDQM2
FBCDQM3
FBCDQM4
FBCDQM5
FBCDQM6
FBCDQM7

A A

B B

C C

FBAD[0:63]22,23

FBADQM[7..0]22,23

FBAD0
FBAD1
FBAD2
FBAD3
FBAD4
FBAD5
FBAD6
FBAD7
FBAD8
FBAD9
FBAD10
FBAD11
FBAD12
FBAD13
FBAD14
FBAD15
FBAD16
FBAD17
FBAD18
FBAD19
FBAD20
FBAD21
FBAD22
FBAD23
FBAD24
FBAD25
FBAD26
FBAD27
FBAD28
FBAD29
FBAD30
FBAD31
FBAD32
FBAD33
FBAD34
FBAD35
FBAD36
FBAD37
FBAD38
FBAD39
FBAD40
FBAD41
FBAD42
FBAD43
FBAD44
FBAD45
FBAD46
FBAD47
FBAD48
FBAD49
FBAD50
FBAD51
FBAD52
FBAD53
FBAD54
FBAD55
FBAD56
FBAD57
FBAD58
FBAD59
FBAD60
FBAD61
FBAD62
FBAD63

FBADQM0
FBADQM1
FBADQM2
FBADQM3
FBADQM4
FBADQM5
FBADQM6
FBADQM7

N27
M27
N28

L29

K27

K28

P30
N31
N30
N32

L31

L30

L32
H30

K30
H31

F30
H32

E31
D30

E30
H28
H29

E29

F27

E27

E28

F28

AD29
AE29
AD28
AC28
AB29
AA30

Y28

AB30
AM30

AF30
AJ31
AJ30

AJ32
AK29
AM31

AL30
AE32
AE30
AE31
AD30
AC31
AC32
AB32
AB31
AG27

AF28
AH28
AG28
AG29
AD27

AF27
AE28

M29
M30
G30

F29
AA29
AK30
AC30
AG30

J29
J28

J30

J27

U7D

FBAD0
FBAD1
FBAD2
FBAD3
FBAD4
FBAD5
FBAD6
FBAD7
FBAD8
FBAD9
FBAD10
FBAD11
FBAD12
FBAD13
FBAD14
FBAD15
FBAD16
FBAD17
FBAD18
FBAD19
FBAD20
FBAD21
FBAD22
FBAD23
FBAD24
FBAD25
FBAD26
FBAD27
FBAD28
FBAD29
FBAD30
FBAD31
FBAD32
FBAD33
FBAD34
FBAD35
FBAD36
FBAD37
FBAD38
FBAD39
FBAD40
FBAD41
FBAD42
FBAD43
FBAD44
FBAD45
FBAD46
FBAD47
FBAD48
FBAD49
FBAD50
FBAD51
FBAD52
FBAD53
FBAD54
FBAD55
FBAD56
FBAD57
FBAD58
FBAD59
FBAD60
FBAD61
FBAD62
FBAD63

FBADQM0
FBADQM1
FBADQM2
FBADQM3
FBADQM4
FBADQM5
FBADQM6
FBADQM7

NV_NB8P-GS

FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8

FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12

FBA_CMD13

FBA_CMD14
FBA_CMD15

FBA_CMD16
FBA_CMD17
FBA_CMD18

FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25

FBA_CMD26

FBA_CMD27

DDR(A-GROUP)

FBA_CLK0

FBA_CLK0#

FBA_CLK1

FBA_CLK1#

FBADQS_WP0
FBADQS_WP1
FBADQS_WP2
FBADQS_WP3
FBADQS_WP4
FBADQS_WP5
FBADQS_WP6
FBADQS_WP7

FBADQS_RN0
FBADQS_RN1
FBADQS_RN2
FBADQS_RN3
FBADQS_RN4
FBADQS_RN5
FBADQS_RN6
FBADQS_RN7

FBA_RAS#

U27

FBA_A5

P31

FBA_BA1

U30

FBB_A2

Y31

FBB_A4

W32

FBB_A3

W31

FBA_CS1#

T32

FBA_CS0#

V27

FBA_A11

T28

FBA_CAS#

T31

FBA_WE#

U32

FBA_BA0

W29

FBB_A5

W30

FBA_A12

T27

FBA_RESET

V28

FBA_A7

V30

FBA_A10

U31

FBA_CKE

R27

FBA_A0

V29

FBA_A9

T30

FBA_A6

W28

FBA_A2

R29

FBA_A8

R30

FBA_A3

P29

FBA_A1

U28

FBA_A13

Y32

FBA_BA2

Y30

NB8X: Additional memory address bit
to support dual rank 8 bank memory configurations

FBA_CLK0

P28

FBA_CLK0#

R28

FBA_CLK1

Y27

FBA_CLK1#

AA27

FBAWDQS0

L28

FBAWDQS1

K31

FBAWDQS2

G32

FBAWDQS3

G28

FBAWDQS4

AB28

FBAWDQS5

AL32

FBAWDQS6

AF32

FBAWDQS7

AH30

FBARDQS0

M28

FBARDQS1

K32

FBARDQS2

G31

FBARDQS3

G27

FBARDQS4

AA28

FBARDQS5

AL31

FBARDQS6

AF31

FBARDQS7

AH29

FBA_A4

P32

1

TP521 26MIL

D12

E12
D11

C10
B10

A10
C11
C12
A11
B11
B28
C27
C26
B26
C30
B31
C29
A31
D28
D27
F26
D24
E23
E26
E24
F23
B23
A23
C25
C23
A22
C22
C21
B22
E22
D22
D21
E21
E18
D19
D18
E19

E11

C28
F24
C24
E20

B7
A7
C7
A2
B2
C4
A5
B5
F9

F10

D9

E8
D8
E7
F7
D6
D5
D3
E4
C3
B4

C8

A4

F5
C9

U7E

FBCD0
FBCD1
FBCD2
FBCD3
FBCD4
FBCD5
FBCD6
FBCD7
FBCD8
FBCD9
FBCD10
FBCD11
FBCD12
FBCD13
FBCD14
FBCD15
FBCD16
FBCD17
FBCD18
FBCD19
FBCD20
FBCD21
FBCD22
FBCD23
FBCD24
FBCD25
FBCD26
FBCD27
FBCD28
FBCD29
FBCD30
FBCD31
FBCD32
FBCD33
FBCD34
FBCD35
FBCD36
FBCD37
FBCD38
FBCD39
FBCD40
FBCD41
FBCD42
FBCD43
FBCD44
FBCD45
FBCD46
FBCD47
FBCD48
FBCD49
FBCD50
FBCD51
FBCD52
FBCD53
FBCD54
FBCD55
FBCD56
FBCD57
FBCD58
FBCD59
FBCD60
FBCD61
FBCD62
FBCD63

FBCDQM0
FBCDQM1
FBCDQM2
FBCDQM3
FBCDQM4
FBCDQM5
FBCDQM6
FBCDQM7

NV_NB8P-GS

FBC_CMD0
FBC_CMD1
FBC_CMD2
FBC_CMD3
FBC_CMD4
FBC_CMD5
FBC_CMD6
FBC_CMD7
FBC_CMD8

FBC_CMD9
FBC_CMD10
FBC_CMD11
FBC_CMD12

FBC_CMD13

FBC_CMD14
FBC_CMD15

FBC_CMD16
FBC_CMD17
FBC_CMD18

FBC_CMD19
FBC_CMD20
FBC_CMD21
FBC_CMD22
FBC_CMD23
FBC_CMD24
FBC_CMD25

FBC_CMD26

FBC_CMD27

FBC_CLK0

DDR(C-GROUP)

FBC_CLK0#

FBC_CLK1

FBC_CLK1#

FBCDQS_WP0
FBCDQS_WP1
FBCDQS_WP2
FBCDQS_WP3
FBCDQS_WP4
FBCDQS_WP5
FBCDQS_WP6
FBCDQS_WP7

FBCDQS_RN0
FBCDQS_RN1
FBCDQS_RN2
FBCDQS_RN3
FBCDQS_RN4
FBCDQS_RN5
FBCDQS_RN6
FBCDQS_RN7

FBC_RAS#

A16

FBC_A5

A13

FBC_BA1

B17

FBD_A2

B20

FBD_A4

A19

FBD_A3

B19

FBC_CS1#

B14

FBC_CS0#

E16

FBC_A11

A14

FBC_CAS#

C15

FBC_WE#

B16

FBC_BA0

F17

FBD_A5

C19

FBC_A12

D15

FBC_RESET

C17

FBC_A7

A17

FBC_A10

C16

FBC_CKE

D14

FBC_A0

F16

FBC_A9

C14

FBC_A6

C18

FBC_A2

E14

FBC_A8

B13

FBC_A3

E15

FBC_A1

F15

FBC_A13

A20

FBC_BA2

C20

NB8X: Additional memory address bit
to support dual rank 8 bank memory configurations

FBC_CLK0

E13

FBC_CLK0#

F13

FBC_CLK1

F18

FBC_CLK1#

E17

FBCWDQS0

C5

FBCWDQS1

E10

FBCWDQS2

E5

FBCWDQS3

B8

FBCWDQS4

A29

FBCWDQS5

D25

FBCWDQS6

B25

FBCWDQS7

F20

FBCRDQS0

C6

FBCRDQS1

E9

FBCRDQS2

E6

FBCRDQS3

A8

FBCRDQS4

B29

FBCRDQS5

E25

FBCRDQS6

A25

FBCRDQS7

F21

FBC_A4

C13

1

FBC_RAS#
FBC_BA1
FBC_BA2
FBC_CS0#
FBC_CS1#

TP525 26MIL

FBCWDQS[7..0] 24,25

FBCRDQS[7..0] 24,25

FBC_A[0..12] 24,25

FBD_A[2..5] 24,25

FBC_RAS# 24,25
FBC_BA1 24,25

FBC_CS0# 24
FBC_CS1# 24,25

FBC_CAS# 24,25
FBC_WE# 24,25
FBC_BA0 24,25

FBC_RESET 24,25

FBC_CKE 24,25

FBC_CLK0 24,25
FBC_CLK0# 24,25
FBC_CLK1 24,25
FBC_CLK1# 24,25

D D

FOXCONN

Title

VGA (GDDR) 3 OF 8

Size Document Number Rev

(M610-1-01 )MainBoard (MBX-176) 2007.1.4 2.0

A3

1

2

3

4

5

6

Date: Sheet

7

HON HAI PRECISION IND. CO., LTD.
CPBG - R&D Division

19 81Friday, August 31, 2007

of

8

5

Use GPU internal thermal sensor
Change R2328,R2329 form NC to mount

SMB_THRM_CLK4,44

D D

SMB_THRM_DATA4,44

SMB_THRM_CLK
SMB_THRM_DATA

HDMI DDC

CRT DDC

+3VRUN

R1134
NV_10K_J

0402

NV_I2CS_SCL

NV_I2CS_SDA

NV_I2CC_SCL

NV_I2CC_SDA

NV_I2CB_SCL

NV_I2CB_SDA

NV_I2CA_SCL

NV_I2CA_SDA

NV_JTAG_TDI

12

NV_JTAG_TMS

12

NV_JTAG_TRST#

12

NV_JTAG_TCK

12

12

5

+3VRUN

12

R1105
NV_10K_J

0402

HDCP ROM

1 2

R2128 NV_2.2K_J 0402

1 2

R2129 NV_2.2K_J 0402

1 2

R1056 NV_2.2K_J 0402

1 2

R1057 NV_2.2K_J 0402

C C

1 2

R1385 NV_2.2K_J 0402

1 2

R1386 NV_2.2K_J 0402

1 2

R1225 NV_2.2K_J 0402

1 2

R1228 NV_2.2K_J 0402

+3VRUN

R1776 NV_10K_J 0402

B B

A A

R1777 NV_10K_J 0402

R1462 NV_10K_J 0402

R1461 NV_10K_J 0402

HDCP_SCL

HDCP_SDA

R2328 NV_0_J 0402

R2329 NV_0_J 0402

NV_I2CB_SCL36

NV_I2CB_SDA36

NV_I2CA_SCL34
NV_I2CA_SDA34

1 2

R303 NV_10K_J 0402

U82

6
1
2
5

8

SCL

VCC

3

NC1

NC3

7

NC2

NC4

4

SDA

GND

EEPROM_SOIC-8P_8KB

190-00001-0001-003

1 2
1 2

HDCP

Backup

TP60526MIL

TP57026MIL

TP106226MIL

TP68726MIL

TP69726MIL

TP69826MIL

TP60626MIL

TP60726MIL

TP106326MIL

TP106426MIL

TP15026MIL

HDCP_SCL
HDCP_SDA

NV_I2CC_SCL
NV_I2CC_SDA

NV_I2CB_SCL
NV_I2CB_SDA

NV_I2CA_SCL
NV_I2CA_SDA

1

1

1

1

IFPAB_VPROBE

1

IFPCD_VPROBE

1

PEX_TSTCLK_OUT

1

PEX_TSTCLK_OUT#

1

1

1

TESTMODE

NV_JTAG_TCK

NV_JTAG_TMS

NV_JTAG_TDI

NV_JTAG_TDO

1

NV_JTAG_TRST#

12

C1139
NV_0.1U_16V_M_B

0402

NV_I2CS_SCL
NV_I2CS_SDA

ROM_CS#

ROM_SO

TP_ROM_SI

ROM_SCLK

4

U7F

C1

I2CS_SCL

B1

I2CS_SDA

G3

I2CH_SCL

H3

I2CH_SDA

G2

I2CC_SCL

G1

I2CC_SDA

H4

I2CB_SCL

J4

I2CB_SDA

K2

I2CA_SCL

J3

I2CA_SDA

AA4

ROMCS#

AA6

ROM_SO

W2

ROM_SI

AA7

ROM_SCLK

AM4

IFPAB_VPROBE

AK3

IFPCD_VPROBE

AM12

PEX_TSTCLK_OUT

AM11

PEX_TSTCLK_OUT#

AC27

FBA_DEBUG

F12

FBC_DEBUG

H2

TESTMODE

AJ11

JTAG_TCK

AK11

JTAG_TMS

AK12

JTAG_TDI

AL12

JTAG_TDO

AL13

JTAG_TRST_N

NV_NB8P-GS

9/18 FAE suggest If use internal spread function,
U10 and related components can be NC.
10/19 Change R319,R320 from NC_ to NV_ for use internal spread spectrum.

12

R1542
NC_10K_J

0402

SS_S0

12

R1543

XTALOUTBUFF

NC_10K_J

0402

XTALSSIN REFCLK1

4

THERMDN

THERMDP

BUFRST#

I2C

STEREO

SWAPRDY_A

MEMSTRAPSEL0
MEMSTRAPSEL1
MEMSTRAPSEL2

ROM

MEMSTRAPSEL3

GENERAL

SIGNALS

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8

GPIO

GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14

TEST SIGNAL

XTALSSIN

XTALOUTBUFF

XTALIN

XTALOUT

CRYSTAL

12

NV_THERMDN

J1

NV_THERMDP

K1

F3

T3

M6

MEMSTRAPSEL3

AE26

TP_MEMSTRAPSEL2

AD26

MEMSTRAPSEL1

AH31

MEMSTRAPSEL0

AH32

NV_GPIO0

K3

NV_GPIO1

H1

NV_BRADJ

K5

NV_LCDVCC_EN#

G5

NV_INV_EN

E2

VGA_GPIO51

J5

NV_GPIO6

G6

NV_GPIO7

K6

NV_GPIO8

E1

OVT_GFX#

D2

NV_PWR_MIZER

H5

NV_RSET_CTL

F4

NV_GPIO12

E3

NV_GPIO13

U3

NV_GPIO14

U4

T1
T2

NV_XTALIN

U1

U2

NV_XTALOUT

12

NC_27P_50V_J_N

R319

1 2

NC_10K_J 0402

1 2

R316 NC_22_J 0402

R317 NC_22_J

R320
NC_10K_J

0402

12

0402

3

12

C485

0402

NV_2200P_50V_K_B

BUFRST#

STEREO

SWAPRDY

XTALSSIN
XTALOUTBUFF

1 2

1

TP100626MIL

1

TP137 26MIL

1

TP696 26MIL

1

TP139 26MIL

1

TP948 26MIL

1

TP142 26MIL

1

TP143 26MIL

R2130 NV_0_J 0402

1 2

R301 NV_100K_J 0402

1 2

1 2

R2359 NC_0_J0402

R2348 NC_0_J 0402

1 2

R1820 NC_0_J 0402

12

NVIDIA FAE suggestion:
Change GPU thermal alert signal input from GPIO8 to GPIO9.
Delete TP522 and pull-up GPIO8 (R2332 2.2K to +3VRUN)

R1058 0_J 0402

1 2

R1059 0_J 0402

1 2

Y2

NC_27MHZ_20P_20PPM

ITTI_L5020-27.000-20

12

C495

C494

0402

0402

NC_27P_50V_J_N

12

C492

NC_1U_10V_Y_Y

0603

XTALOUTBUFF_R

SS_S0

12

VGA27MSSOUT

R321
NC_10K_J

0402

R316 place near GPU
R317 place near spectrum chip

3

Tis chip can use MK1726 or P1819B

NV_BRADJ 35
NV_LCDVCC_EN# 35
NV_INV_EN 35
VGA_GPIO5 74

1

TP950 26MIL

1

TP713 26MIL

NV_PWR_MIZER 27
HDMI_CEC 36

1

TP951 26MIL

1

TP952 26MIL

1

TP953 26MIL

R_SRCC1_27M_SS 3

R_SRCT1_27M_NON 3

02/12/07 PVT Change

NC_1000P_50V_M_B

U10

1

X1/ICLK

2

GND

3

S0

4 5

SSCLK REFCLK

NC_MK1726-08

NV_HDMI_DET_3 33,36

ECRST# 4,44
OVT_GFX# 44

12

C493

0402

8

X2

7

VDD

6

PD#

2

SM bus Address :
1001100(EC)
For F75383M

+3VRUN

R289

2.2K_J

0402

1 2

R293 NC_0_J 0402

R2347 NC_0_J 0402

GPIO

GPIO2

GPIO5
GPIO8
GPIO9
GPIO10
GPIO11

+3VRUN

1

2

U8

4

THERM#

3

ALERT#

D-

2

D+

1

VCC

G781P8f

12

C486

0.1U_16V_M_B

0402

12

12

Internal

I/O

pull low

I
I
O
O
O
O
O
I
O

I/O

TP156 26MIL

5

GND

DDR_ALERT#

6

SMB_THRM_DATA

7

SDA

SMB_THRM_CLK

8

SCL

11/16 change par t f r o m
F75383M(VERISION:0 . 2 8 P)
( 15-F75383M-1000) to
G781P8f
(15-G781P80-0000)

OVT_GFX#

NV_GPIO8

To GPU

Backup GPIO8 for GPU thermal trigger signal
Change R293 from mount to NC for using internal thermal sensor

DDR_ALERT# 8,44

From EC

2007/1/4 Update

-1.8

-0.6

-2.5

GPIO TABLE

Yes

HDMI Hot Plug Detect 0(HPD0)GPIO0

Yes

DVI Hot Plug Detect 1(HPD1)GPIO1

Yes

LCD BL Brightness(LCD0_BL_PWM)

No

Panel Power(LCD0_VDD)GPIO3

Yes

LCD Backlight enable(LCD0_BL_EN)GPIO4

Yes

GPU Power Downgrade for NV_VDD

No

Thermal Alert Output (>125 Degree)

No

System Power Limit Alert Input

No

Memory Vref switch(MEM_VREF)

HDMI CEC Function Backup

No

NV_BRADJ

NV_INV_EN

SPREAD SPECTRUM SETTING FOR MK

0 = connect to GND
M= unconnected
1 = connect directly to VDD

1 2

R2315NV_10K_J0402

1 2

R2316NV_10K_J0402

Change R2333 from NC to mount for using internal thermal sensor

S0

SPREAD

Spread

DIRECTION

0
M
1

Percentage(%)

DOWN
DOWN
DOWN

FOXCONN

Title

VGA (POWER) 7 OF 8

Size Document Number Rev

(M610-1-01 )MainBoard (MBX-176) 2007.1.4 2.0

A3

Date: Sheet

1

+3VRUN

12

R1778
NC_10K_J

0402

Active High
Active High

Active High
Active Low
Active High
Active Low
Active Low

Active Low
Active High

+3VRUN

NV_GPIO8

OVT_GFX#

1 2

R2332NV_2.2K_J0402

1 2

R2333NV_2.2K_J0402

SPREAD SPECTRUM SETTING FOR P1819B

SRS
PIN3

0
1

SPREAD
DIRECTION

DOWN
DOWN

Spread
Percentage(%)

-1.25

-1.75

nVidia support Down -1.25%

HON HAI PRECISION IND. CO., LTD.
CPBG - R&D Division

20 81Friday, August 31, 2007

1

of

1

2

3

4

5

6

7

8

1 2

R332 NV_150_F 0402

1 2

R334 NV_150_F 0402

1 2

A A

R336 NV_150_F 0402

CLOSE TO GPU

U7H

AA12

GND1

AA2

GND2

AA21

GND3

AA31

GND4

AB27

GND5

AB6

GND6

AC10

GND7

AC23

GND8

AC29

GND9

AC4

GND10

AD16

GND11

AD17

GND12

AD2

GND13

AD31

GND14

AE17

GND15

AE27

GND16

AE6

GND17

AF11

GND18

AF26

GND19

AF29

B B

C C

D D

GND20

AF4

GND21

AF7

GND22

AG10

GND23

AG11

GND24

AG14

GND25

AG15

GND26

AG19

GND27

AG2

GND28

AG22

GND29

AG31

GND30

AG8

GND31

AH24

GND32

AJ10

GND33

AJ13

GND34

AJ16

GND35

AJ17

GND36

AJ20

GND37

AJ23

GND38

AJ26

GND39

AJ29

GND40

AJ4

GND41

AJ7

GND42

AK2

GND43

AK28

GND44

AK31

GND45

AL11

GND46

AL14

GND47

AL19

GND48

AL22

GND49

AL25

GND50

AL3

GND51

AL6

GND52

AL9

GND53

AM13

GND54

AM16

GND55

AM17

GND56

AM20

GND57

AM23

GND58

AM26

GND59

AM29

GND60

B12

GND61

B15

GND62

B18

GND63

B21

GND64

B24

GND65

B27

GND66

B3

GND67

B30

GND68

B6

GND69

B9

GND70

C2

GND71

C31

GND72

D10

GND73

D13

GND74

D16

GND75

D17

GND76

D20

GND77

D23

GND78

D26

GND79

D29

GND80

NV_NB8P-GS

1

GND

GND81
GND82
GND83
GND84
GND85
GND86
GND87
GND88
GND89
GND90
GND91
GND92
GND93
GND94
GND95
GND96
GND97
GND98
GND99

GND100

GND101
GND102
GND103
GND104
GND105
GND106
GND107
GND108
GND109
GND110
GND111
GND112
GND113
GND114
GND115
GND116
GND117
GND118
GND119
GND120

GND121
GND122
GND123
GND124
GND125
GND126
GND127
GND128
GND129
GND130
GND131
GND132
GND133
GND134
GND135
GND136
GND137
GND138
GND139
GND140

GND141
GND142
GND143
GND144
GND145
GND146
GND147
GND148
GND149
GND150
GND151
GND152
GND153
GND154
GND155

D4
D7
F11
F14
F19
F2
F22
F25
F31
F8
G26
G29
G4
G7
H27
H6
J16
J17
J2
J31

K10
K23
K29
K4
L27
L6
M12
M2
M21
M31
N15
N18
N29
N4
P15
P18
P27
P6
R13
R14

R15
R18
R19
R2
R20
R31
T16
T17
T24
T29
T4
U16
U17
U24
U29
U8
V13
V14
V15
V18

V19
V2
V20
V31
W15
W18
W27
W6
Y15
Y18
Y29
Y4
AL10
AG13
AM10

2

GND_SENSE

NV_DACARED

NV_DACAGREEN

NV_DACABLUE

GND_SENSE 28

DACA

DACA-RED R

DACA-GREEN

DACA-BLUE

DACA-HSYNC

DACA-VSYNC

VGA-DDCCLK

VGA-DDCDATA

VGA-CRT

G

B

HSYNC

VSYNC

3

1 2

R330 NV_124_F 0402

NV_DACARED34

NV_DACAGREEN34

NV_DACABLUE34

NV_DACAHSYNC34

NV_DACAVSYNC34

NV_ODD_CLKIN-35
NV_ODD_CLKIN+35

NV_ODD_RXIN0-35
NV_ODD_RXIN0+35

NV_ODD_RXIN1-35
NV_ODD_RXIN1+35

NV_ODD_RXIN2-35
NV_ODD_RXIN2+35

NV_EVEN_CLKIN-35
NV_EVEN_CLKIN+35

NV_EVEN_RXIN0-35
NV_EVEN_RXIN0+35

NV_EVEN_RXIN1-35
NV_EVEN_RXIN1+35

NV_EVEN_RXIN2-35
NV_EVEN_RXIN2+35

I2CA

SCL

SDA

U7G

NV_DACA_RSET

NV_DACARED

NV_DACAGREEN

NV_DACABLUE

70mA

NV_DACAHSYNC
NV_DACAVSYNC

1

TP106526MIL

NV_DACCRED

1

TP52626MIL

TP52426MIL

TP53326MIL

TP53426MIL
TP53526MIL

NV_DACCGREEN

1

NV_DACCBLUE

1

70mA

NV_DACCHSYNC

1

NV_DACCVSYNC

1

NV_ODD_CLKIN­NV_ODD_CLKIN+

NV_ODD_RXIN0­NV_ODD_RXIN0+

NV_ODD_RXIN1­NV_ODD_RXIN1+

NV_ODD_RXIN2­NV_ODD_RXIN2+

IFPA_TXD3#

1

TP15126MIL
TP15526MIL

TP72226MIL
TP72326MIL

TP70026MIL

IFPA_TXD3

1

NV_EVEN_CLKIN­NV_EVEN_CLKIN+

NV_EVEN_RXIN0­NV_EVEN_RXIN0+

NV_EVEN_RXIN1­NV_EVEN_RXIN1+

NV_EVEN_RXIN2­NV_EVEN_RXIN2+

IFPB_TXD7#

1

IFPB_TXD7

1

1

DACB I2CC

DACB-RED

DACB-GREEN

DACB-BLUE

AH9

DACA_RSET

AH11 R6

DACA_RED DACB_RED

AJ12

DACA_GREEN

AH12

DACA_BLUE

AG9

DACA_IDUMP

AF10

DACA_HSYNC

AK10

DACA_VSYNC

AF5

DACC_RSET

AF6

DACC_RED

AG6

DACC_GREEN

AE5

DACC_BLUE

AG4

DACC_IDUMP

AG7

DACC_HSYNC

AG5

DACC_VSYNC

AJ9

IFPA_TXC#

AK9

IFPA_TXC

AJ6

IFPA_TXD0#

AH6

IFPA_TXD0

AH7

IFPA_TXD1#

AH8

IFPA_TXD1

AK8

IFPA_TXD#

AJ8

IFPA_TXD2

AH5

IFPA_TXD3#

AJ5

IFPA_TXD3

AL4

IFPB_TXC#

AK4

IFPB_TXC

AM5

IFPB_TXD4#

AM6

IFPB_TXD4

AL7

IFPB_TXD5#

AM7

IFPB_TXD5

AK5

IFPB_TXD6#

AK6

IFPB_TXD6

AL8

IFPB_TXD7#

AK7

IFPB_TXD7

AL5

IFPAB_RSET

NV_NB8P-GS

COMPOSITES-VIDEO D-CONNECTOR

C

Y

COMPOSITE

4

PR

Y

PB

LINE1

LINE2

LINE3

LVDS

DACB_RSET

DACB_GREEN

DACB_BLUE

DACB_IDUMP

DACB_CSYNC

VIDEO DAC

IFPC_TXC#

IFPC_TXC

IFPC_TXD0#

IFPC_TXD0

IFPC_TXD1#

IFPC_TXD1

IFPC_TXD2#

IFPC_TXD2

TMDS

IFPD_TXC#

IFPD_TXC

IFPD_TXD4#

IFPD_TXD4

IFPD_TXD5#

IFPD_TXD5

IFPD_TXD6#

IFPD_TXD6

IFPCD_RSET

SCL

SDA

5

NV_DACB_RSET

R7

NV_DACBRED

NV_DACBGREEN

T5

NV_DACBBLUE

T6

V7

NV_DACB_CSYNC

U5

R331 NV_124_F 0402

100mA

1 2

NV_DACBRED 33

NV_DACBGREEN 33

1

TP954 26MIL

NV_DACBRED

NV_DACBGREEN

NV_DACBBLUE

NB8X: Add composite sync for SCART support

NV_HDMI_TXC-

AM3
AM2

AE1
AE2

AF2
AF1

AH1
AG1

NV_HDMI_TXC+

NV_TMDS_D0­NV_TMDS_D0+

NV_TMDS_D1­NV_TMDS_D1+

NV_TMDS_D2­NV_TMDS_D2+

NV_HDMI_TXC- 36

NV_HDMI_TXC+ 36

NV_TMDS_D0- 36

NV_TMDS_D0+ 36

NV_TMDS_D1- 36

NV_TMDS_D1+ 36

NV_TMDS_D2- 36

NV_TMDS_D2+ 36

TMDS CLK 154MHz

DVI_TMDS_CLKIN-

AH2

DVI_TMDS_CLKIN+

AG3

DVI_TMDS_D4-

AJ1

DVI_TMDS_D4+

AK1

DVI_TMDS_D5-

AL1

DVI_TMDS_D5+

AL2

DVI_TMDS_D6-

AJ3

DVI_TMDS_D6+

AJ2

IFPCD_RSETIFPAB_RSET

AH3

DACC

DACC-RED

DACC-GREEN

DACC-HSYNC

DACC-VSYNC

1
1
1
1

1
1

1
1

1

DVI-I

R

G

BDACC-BLUE

HSYNC

VSYNC

DVI-DDCCLK

DVI-DDCDATA

TP100926MIL
TP101026MIL
TP101126MIL
TP101226MIL

TP101326MIL
TP101426MIL

TP101526MIL
TP101626MIL

TP701 26MIL

I2CB

6

10/6 Add test point for TMDS channel 2
cause by DVI on docking been cacelled

SCL

SDA

Title

Size Document Number Rev
A3

Date: Sheet

CLOSE TO GPU

1 2

R333 NV_150_F 0402

1 2

R335 NV_150_F 0402

1 2

R2267 NV_150_F 0402

FOXCONN

VGA (POWER) 8 OF 8

(M610-1-01 )MainBoard (MBX-176) 2007.1.4 2.0

7

HON HAI PRECISION IND. CO., LTD.
CPBG - R&D Division

21 81Friday, August 31, 2007

of

8

1

2

3

4

5

6

7

+1_8VRUN+1_8VRUN

8

+1_8VRUN

U11_ZQ

12

R2372

NV_240_F

0402

A11

F12

M12

V11

K12

R10
R11

M10

N11

M11
G10

F11
F10
E11
C10
C11
B10
B11

A2

F1

M1

V2

K1

T3
T2
R3
R2

M3

N2
L3

M2
T10
T11

L10

G3

F2
F3
E2
C3
C2
B3
B2

A4

A A

FBAD21
FBAD23
FBAD19
FBAD22
FBAD17
FBAD16
FBAD18
FBAD20
FBAD30

B B

FBAD[0:63] 19,23

C C

FBADQM[7..0] 19,23

FBARDQS[7..0] 19,23

FBAWDQS[7..0] 19,23

FBAD31
FBAD29
FBAD26
FBAD24
FBAD28
FBAD25
FBAD27
FBAD7
FBAD5
FBAD4
FBAD6
FBAD0
FBAD3
FBAD1
FBAD2
FBAD12
FBAD14
FBAD13
FBAD8
FBAD15
FBAD11
FBAD9
FBAD10

V12V1R12R9R4

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8

VDDA1
VDDA2

DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

ZQ

VSS01

VSS02

VSS03

VSS04

VSS05

A3

A10G1G12L1L12V3V10J1J12B1B12B4B9D1D4D9D12G2G11L2L11P1P4P9P12T1T4T9T12

N12N9N4N1J9J4E12E9E4E1C12C9C4C1A12

R1

VDDQ16

VDDQ20

VDDQ19

VSS08

VSSA01

VDDQ18

VDDQ17

VSSA02

VSSQ01

VDDQ15

VSSQ02

VDDQ22

VDDQ21

VSS06

VSS07

VDDQ14

VDDQ13

VSSQ03

VSSQ04

VDDQ12

VDDQ11

VSSQ05

VSSQ06

VDDQ10

VDDQ09

VSSQ07

VSSQ08

VDDQ08

VSSQ09

VDDQ07

VDDQ06

VSSQ10

VSSQ11

VDDQ05

VDDQ04

VSSQ12

VSSQ13

VDDQ03

VDDQ02

VSSQ14

VSSQ15

A1

U11

VDDQ01

RFU2

BA2
BA1
BA0

RFU1

A11
A10

A9

A8/AP

A7
A6
A5
A4
A3
A2
A1
A0

DM3
DM2
DM1
DM0

RDQS3
RDQS2
RDQS1
RDQS0

RAS#
CAS#

WE#

CS#

CK

CK#

CKE

VREF0

WDQS3
WDQS2
WDQS1
WDQS0

MF

SEN

RESET

VREF1

VSSQ16

VSSQ17

VSSQ18

VSSQ19

VSSQ20

SDRAM_FBGA-136_512MB

K4J52324QE-BC14

J3
H10
G9
G4

J2
L4
K2
M9
K11
L9
K10
H11
K9
M4
K3
H2
K4

N3
N10
E10
E3

P3
P10
D10
D3

H3
F4
H9
F9
J11
J10
H4

VRAM_VREF_1

H12

P2
P11
D11
D2

A9

V4
V9

VRAM_VREF_2

H1

FBA_CS1#
FBA_BA2
FBA_BA1
FBA_BA0

FBADQM2
FBADQM3
FBADQM0
FBADQM1

FBARDQS2
FBARDQS3
FBARDQS0
FBARDQS1

FBA_RAS#
FBA_CAS#

FBA_WE#
FBA_CS0#
FBA_CLK0
FBA_CLK0#
FBA_CKE

FBAWDQS2
FBAWDQS3
FBAWDQS0
FBAWDQS1

FBA_RESET

FBA_CS1# 19,23
FBA_BA2 19,23
FBA_BA1 19,23
FBA_BA0 19,23

FBA_A12
FBA_A11
FBA_A10
FBA_A9
FBA_A8
FBA_A7
FBA_A6
FBA_A5
FBA_A4
FBA_A3
FBA_A2
FBA_A1
FBA_A0

FBA_RAS# 19,23
FBA_CAS# 19,23
FBA_WE# 19,23
FBA_CS0# 19
FBA_CLK0 19,23
FBA_CLK0# 19,23

12

R2370

NV_10K_J

0402

+1_8VRUN

FBA_CKE 19,23

FBA_RESET 19,23

FBAD59
FBAD58
FBAD56
FBAD57
FBAD62
FBAD60
FBAD63
FBAD61
FBAD47
FBAD40
FBAD45
FBAD46
FBAD44
FBAD43
FBAD42
FBAD41
FBAD49
FBAD50
FBAD51
FBAD48
FBAD53
FBAD54
FBAD52
FBAD55
FBAD34
FBAD35
FBAD33
FBAD32
FBAD37
FBAD39
FBAD38
FBAD36

U12_ZQ

12

M12

M10
N11

M11
G10

C10
C11

R2373

NV_240_F

0402

V12V1R12R9R4

A2

VDD1

A11

VDD2

F1

VDD3

F12

VDD4

M1

VDD5
VDD6

V2

VDD7

V11

VDD8

K1

VDDA1

K12

VDDA2

Minimum 200us delay
required prior to applying
any executable command

DQ31

after stable power and clock.

DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

ZQ

VSS01

VSS02

VSS03

VSS04

VSS05

A3

A10G1G12L1L12V3V10J1J12B1B12B4B9D1D4D9D12G2G11L2L11P1P4P9P12T1T4T9T12

T10
T11
R10
R11

L10

F11
F10
E11

B10
B11

T3
T2
R3
R2

M3

N2
L3

M2

G3

F2
F3
E2
C3
C2
B3
B2

A4

N12N9N4N1J9J4E12E9E4E1C12C9C4C1A12

R1

VDDQ16

VDDQ20

VDDQ19

VSS08

VSSA01

VDDQ18

VDDQ17

VSSA02

VSSQ01

VDDQ15

VSSQ02

VDDQ22

VDDQ21

VSS06

VSS07

VDDQ14

VDDQ13

VSSQ03

VSSQ04

VDDQ12

VDDQ11

VSSQ05

VSSQ06

VDDQ10

VDDQ09

VSSQ07

VSSQ08

VDDQ08

VDDQ07

VSSQ09

VSSQ10

VDDQ06

VSSQ11

VDDQ05

VDDQ04

VSSQ12

VSSQ13

VDDQ03

VDDQ02

VSSQ14

VSSQ15

A1

U12

VDDQ01

RFU2

BA2
BA1
BA0

RFU1

A11
A10

A9

A8/AP

A7
A6
A5
A4
A3
A2
A1
A0

DM3
DM2
DM1
DM0

RDQS3
RDQS2
RDQS1
RDQS0

RAS#
CAS#

WE#

CS#

CK

CK#

CKE

VREF0

WDQS3
WDQS2
WDQS1
WDQS0

MF

SEN

RESET

VREF1

VSSQ16

VSSQ17

VSSQ18

VSSQ19

VSSQ20

SDRAM_FBGA-136_512MB

K4J52324QE-BC14

J3
H10
G9
G4

J2
L4
K2
M9
K11
L9
K10
H11
K9
M4
K3
H2
K4

N3
N10
E10
E3

P3
P10
D10
D3

H3
F4
H9
F9
J11
J10
H4

H12

P2
P11
D11
D2

A9

V4
V9

H1

U12
Mirror function on

FBA_CS1#
FBA_RAS#
FBA_BA0
FBA_BA1

FBA_A12
FBA_A7
FBA_A8

FBB_A3

FBA_A10
FBA_A11

FBB_A2

FBA_A1
FBA_A0
FBA_A9

FBA_A6
FBB_A5
FBB_A4

FBADQM7
FBADQM5
FBADQM6
FBADQM4

FBARDQS7
FBARDQS5
FBARDQS6
FBARDQS4

FBA_BA2
FBA_CS0#
FBA_CKE

FBA_CAS#

FBA_CLK1
FBA_CLK1#
FBA_WE#

VRAM_VREF_3

FBAWDQS7
FBAWDQS5
FBAWDQS6
FBAWDQS4

MF2

FBA_RESET

VRAM_VREF_4

R2371 NV_10K_F 0402

1 2

FBA_RESET

FBB_A5
FBB_A4
FBB_A3
FBB_A2

FBA_A[12..0]19,23

FBA_CLK1 19,23
FBA_CLK1# 19,23

+1_8VRUN

R2386 NV_10K_J 0402

1 2

FBB_A[5..2] 19,23

R1397(120 ohm-360 ohm)
240 ohm --> Output impedence 40 ohm

R88

0402

511_F

1 2

VRAM_VREF_1

12

12

0.1U_16V_M_B

2

0603

C1634

12

0402

0402

1.3K_F

C1207

R2361

D D

R1896,R1897,
R1898,R1899

C1608
C1809

1

VRAM_VREF_1 23

NC_1U_10V_K

DDR3(NB8X)

243 ohm

0.01uF

VRAM_VREF is 70%FBVDDQ for GDDR3 1.26V

+1_8VRUN +1_8VRUN +1_8VRUN+1_8VRUN

R2374

0402

511_F

1 2

12

0402

1.3K_F

R2362

0402

1 2

R2387 NV_243_F

3

VRAM_VREF_2 VRAM_VREF_3

12

0402

C1208

12

0603

0.1U_16V_M_B

C1633

FBA_CLK0#FBA_CLK0 FBA_CLK1#FBA_CLK1

NVIDIA FAE suggestion:
Update Single resistor between FBx_CLK and FBx_CLK* to 243ohm

VRAM_VREF_2 23

NC_1U_10V_K

4

0402

1 2

R2388 NV_243_F

5

0402

R2363

R90

0402

511_F

1 2

12

0402

1.3K_F

C1209

12

12

0603

0.1U_16V_M_B

C1630

6

VRAM_VREF_3 23 VRAM_VREF_4 23

NC_1U_10V_K

FOXCONN

Title

VRAM (GDDR) 1 OF 4

Size Document Number Rev

(M610-1-01 )MainBoard (MBX-176) 2007.1.4

Custom

Date: Sheet

7

R2375

0402

511_F

1 2

VRAM_VREF_4VRAM_VREF_4

0402

R2368

12

0402

1.3K_F

C1210

12

12

0603

NC_1U_10V_K

0.1U_16V_M_B

C1631

HON HAI PRECISION IND. CO., LTD.
CPBG - R&D Division

0.1

22 81Friday, August 31, 2007

of

8

1

2

3

4

5

6

7

8

+1_8VRUN

+1_8VRUN

A A

A2

VDD1

A11

VDD2

F1

VDD3

F12

VDD4

M1

VDD5

M12

VDD6

V2

VDD7

V11

VDD8

K1

VDDA1

K12

VDDA2

Minimum 200us delay
required prior to applying

FBAD30
FBAD31
FBAD29

B B

FBAD26
FBAD24
FBAD28
FBAD25
FBAD27
FBAD21
FBAD23
FBAD19
FBAD22
FBAD17
FBAD16
FBAD18
FBAD20
FBAD12
FBAD14
FBAD13
FBAD8
FBAD15
FBAD11
FBAD9
FBAD10
FBAD7
FBAD5
FBAD4
FBAD6
FBAD0

C C

FBAD3
FBAD1
FBAD2

U16_ZQ

12

R2377

NV_240_F

0402

T10

T11
R10
R11
M10
N11

L10
M11
G10
F11
F10
E11
C10
C11
B10
B11

T3
T2
R3
R2

M3

N2
L3

M2

G3

F2
F3
E2
C3
C2
B3
B2

A4

any executable command

DQ31

after stable power and clock.

DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

ZQ

VSS01

VSS02

VSS03

VSS04

VSS05

A3

A10G1G12L1L12V3V10J1J12B1B12B4B9D1D4D9D12G2G11L2L11P1P4P9P12T1T4T9T12

N12N9N4N1J9J4E12E9E4E1C12C9C4C1A12

V12V1R12R9R4

R1

VDDQ21

VDDQ20

VSS07

VSS08

VDDQ19

VDDQ18

VSSA01

VSSA02

VDDQ16

VDDQ17

VSSQ01

VDDQ22

VSS06

VDDQ15

VDDQ14

VSSQ02

VSSQ03

VDDQ13

VDDQ12

VSSQ04

VSSQ05

VDDQ11

VDDQ10

VSSQ06

VSSQ07

VDDQ09

VDDQ08

VSSQ08

VSSQ09

VDDQ07

VDDQ06

VSSQ10

VSSQ11

VDDQ05

VDDQ04

VSSQ12

VSSQ13

VDDQ03

VDDQ02

VSSQ14

VSSQ15

A1

VDDQ01

VSSQ16

RFU2

BA2
BA1
BA0

RFU1

A11
A10

A8/AP

DM3
DM2
DM1
DM0

RDQS3
RDQS2
RDQS1
RDQS0

RAS#
CAS#

WE#

CS#

CK#

CKE

VREF0

WDQS3
WDQS2
WDQS1
WDQS0

SEN

RESET

VREF1

VSSQ17

VSSQ18

U165
Mirror function on

U165

Place on T-Side overlap with U11

U16_RFU
FBA_RAS#
FBA_BA0
FBA_BA1

FBA_BA2
FBA_CS1#
FBA_CKE

FBA_CAS#

FBA_CLK0
FBA_CLK0#
FBA_WE#

R2376 NV_10K_F 0402

1 2

1

FBA_A12
FBA_A7
FBA_A8
FBA_A3
FBA_A10
FBA_A11
FBA_A2
FBA_A1
FBA_A0
FBA_A9
FBA_A6
FBA_A5
FBA_A4

TP107726MIL

FBA_RAS# 19,22

FBA_BA2 19,22
FBA_CS1# 19,22

FBA_CAS# 19,22
FBA_CLK0 19,22
FBA_CLK0# 19,22
FBA_WE# 19,22

VRAM_VREF_2 22

FBA_RESET 19,22

VRAM_VREF_1 22

J3
H10
G9
G4

J2
L4
K2
M9

A9

K11
L9

A7

K10

A6

H11

A5

K9

A4

M4

A3

K3

A2

H2

A1

K4

A0

FBADQM3

N3

FBADQM2

N10

FBADQM1

E10

FBADQM0

E3

FBARDQS3

P3

FBARDQS2

P10

FBARDQS1

D10

FBARDQS0

D3

H3
F4
H9
F9
J11

CK

J10
H4

VRAM_VREF_2

H12

FBAWDQS3

P2

FBAWDQS2

P11

FBAWDQS1

D11

FBAWDQS0

D2

MF5

A9

MF

V4

FBA_RESET

V9

VRAM_VREF_1

H1

VSSQ19

VSSQ20

SDRAM_FBGA-136_512MB
K4J52324QE-BC14

FBA_BA0 19,22
FBA_BA1 19,22

+1_8VRUN

+1_8VRUN

FBAD47
FBAD40
FBAD45
FBAD46
FBAD44
FBAD43
FBAD42
FBAD41
FBAD59
FBAD58
FBAD56
FBAD57
FBAD62
FBAD60
FBAD63
FBAD61
FBAD34
FBAD35
FBAD33
FBAD32
FBAD37
FBAD39
FBAD38
FBAD36
FBAD49
FBAD50
FBAD51
FBAD48
FBAD53
FBAD54
FBAD52
FBAD55

U15_ZQ

12

R2378

NV_240_F

0402

V12V1R12R9R4

A2

VDD1

A11

VDD2

F1

VDD3

F12

VDD4

M1

VDD5

M12

VDD6

V2

VDD7

V11

VDD8

K1

VDDA1

K12

VDDA2

T3

DQ31

T2

DQ30

R3

DQ29

R2

DQ28

M3

DQ27

N2

DQ26

L3

DQ25

M2

DQ24

T10

DQ23

T11

DQ22

R10

DQ21

R11

DQ20

M10

DQ19

N11

DQ18

L10

DQ17

M11

DQ16

G10

DQ15

F11

DQ14

F10

DQ13

E11

DQ12

C10

DQ11

C11

DQ10

B10

DQ9

B11

DQ8

G3

DQ7

F2

DQ6

F3

DQ5

E2

DQ4

C3

DQ3

C2

DQ2

B3

DQ1

B2

DQ0

A4

ZQ

VSS01

VSS02

VSS03

VSS04

VSS05

A3

A10G1G12L1L12V3V10J1J12B1B12B4B9D1D4D9D12G2G11L2L11P1P4P9P12T1T4T9T12

N12N9N4N1J9J4E12E9E4E1C12C9C4C1A12

R1

VDDQ16

VDDQ20

VDDQ19

VSS08

VSSA01

VDDQ18

VDDQ17

VSSA02

VSSQ01

VDDQ15

VSSQ02

VDDQ22

VDDQ21

VSS06

VSS07

VDDQ14

VDDQ13

VSSQ03

VSSQ04

VDDQ12

VDDQ11

VSSQ05

VSSQ06

VDDQ10

VDDQ09

VSSQ07

VSSQ08

VDDQ08

VDDQ07

VSSQ09

VSSQ10

VDDQ06

VDDQ05

VSSQ11

VSSQ12

VDDQ04

VSSQ13

VDDQ03

VDDQ02

VSSQ14

VSSQ15

+1_8VRUN

A1

U166

VDDQ01

RFU2

BA2
BA1
BA0

RFU1

A11
A10

A9

A8/AP

A7
A6
A5
A4
A3
A2
A1
A0

DM3
DM2
DM1
DM0

RDQS3
RDQS2
RDQS1
RDQS0

RAS#
CAS#

WE#

CS#

CK

CK#

CKE

VREF0

WDQS3
WDQS2
WDQS1
WDQS0

MF

SEN

RESET

VREF1

VSSQ16

VSSQ17

VSSQ18

VSSQ19

VSSQ20

SDRAM_FBGA-136_512MB

K4J52324QE-BC14

U166
Place on T-Side overlap with U12

J3
H10
G9
G4

J2
L4
K2
M9
K11
L9
K10
H11
K9
M4
K3
H2
K4

N3
N10
E10
E3

P3
P10
D10
D3

H3
F4
H9
F9
J11
J10
H4

VRAM_VREF_4

H12

P2
P11
D11
D2

A9

V4
V9

VRAM_VREF_3

H1

U15_RFU

FBA_BA2
FBA_BA1
FBA_BA0

FBADQM5
FBADQM7
FBADQM4
FBADQM6

FBARDQS5
FBARDQS7
FBARDQS4
FBARDQS6

FBA_RAS#
FBA_CAS#
FBA_WE#
FBA_CS1#
FBA_CLK1
FBA_CLK1#
FBA_CKE

FBAWDQS5
FBAWDQS7
FBAWDQS4
FBAWDQS6

FBA_RESET

1

FBB_A5
FBB_A4
FBB_A3
FBB_A2

TP107326MIL

FBA_A12
FBA_A11
FBA_A10
FBA_A9
FBA_A8
FBA_A7
FBA_A6

FBA_A1
FBA_A0

FBA_CLK1 19,22
FBA_CLK1# 19,22
FBA_CKE 19,22

VRAM_VREF_4 22

VRAM_VREF_3 22

FBB_A5
FBB_A4
FBB_A3
FBB_A2

FBA_A[12..0]19,22

FBB_A[5..2]19,22

R1397(120 ohm-360 ohm)
240 ohm --> Output impedence 40 ohm

D D

FBAD[0:63] 19,22

FBADQM[7..0] 19,22

FBARDQS[7..0] 19,22

FBAWDQS[7..0] 19,22

1

FOXCONN

Title

VRAM (GDDR) 2 OF 4

Size Document Number Rev

(M610-1-01 )MainBoard (MBX-176) 2007.1.4

Custom

2

3

4

5

6

Date: Sheet

7

HON HAI PRECISION IND. CO., LTD.
CPBG - R&D Division

23 81Friday, August 31, 2007

of

8

0.1

1

2

3

4

5

6

7

+1_8VRUN+1_8VRUN

8

+1_8VRUN

A2

A A

B B

FBCD[0:63] 19,25

C C

FBCDQM[7..0] 19,25

FBCRDQS[7..0] 19,25

FBCWDQS[7..0] 19,25

A11

F1

F12

M1

M12

V2

V11

K1

K12

FBCD7
FBCD4
FBCD5
FBCD3
FBCD1
FBCD6
FBCD2
FBCD0
FBCD22
FBCD21
FBCD20
FBCD23 FBC_CS0#
FBCD17
FBCD19

FBCD16

FBCD18
FBCD14
FBCD8
FBCD15
FBCD11

FBCD9
FBCD12
FBCD13
FBCD24
FBCD26
FBCD25
FBCD29
FBCD27
FBCD31
FBCD28
FBCD30

U13_ZQ

12

R2381

NV_240_F

0402

T10
T11
R10
R11

M10

N11

M11
G10

F11
F10
E11
C10
C11
B10
B11

T3
T2
R3
R2

M3

N2
L3

M2

L10

G3

F2
F3
E2
C3
C2
B3
B2

A4

V12V1R12R9R4

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8

VDDA1
VDDA2

DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

ZQ

VSS01

VSS02

VSS03

VSS04

VSS05

A3

A10G1G12L1L12V3V10J1J12B1B12B4B9D1D4D9D12G2G11L2L11P1P4P9P12T1T4T9T12

N12N9N4N1J9J4E12E9E4E1C12C9C4C1A12

R1

VDDQ16

VDDQ20

VDDQ19

VSS08

VSSA01

VDDQ18

VDDQ17

VSSA02

VSSQ01

VDDQ15

VSSQ02

VDDQ22

VDDQ21

VSS06

VSS07

VDDQ14

VDDQ13

VSSQ03

VSSQ04

VDDQ12

VDDQ11

VSSQ05

VSSQ06

VDDQ10

VDDQ09

VSSQ07

VSSQ08

VDDQ08

VSSQ09

VDDQ07

VDDQ06

VSSQ10

VSSQ11

VDDQ05

VDDQ04

VSSQ12

VSSQ13

VDDQ03

VDDQ02

VSSQ14

VSSQ15

A1

U13

VDDQ01

RFU2

BA2
BA1
BA0

RFU1

A11
A10

A9

A8/AP

A7
A6
A5
A4
A3
A2
A1
A0

DM3
DM2
DM1
DM0

RDQS3
RDQS2
RDQS1
RDQS0

RAS#
CAS#

WE#

CS#

CK

CK#

CKE

VREF0

WDQS3
WDQS2
WDQS1
WDQS0

MF

SEN

RESET

VREF1

VSSQ16

VSSQ17

VSSQ18

VSSQ19

VSSQ20

SDRAM_FBGA-136_512MB

K4J52324QE-BC14

J3
H10
G9
G4

J2
L4
K2
M9
K11
L9
K10
H11
K9
M4
K3
H2
K4

N3
N10
E10
E3

P3
P10
D10
D3

H3
F4
H9
F9
J11
J10
H4

VRAM_VREF_5

H12

P2
P11
D11
D2

A9

V4
V9

VRAM_VREF_6

H1

FBC_CS1#
FBC_BA2
FBC_BA1
FBC_BA0

FBCDQM0
FBCDQM2
FBCDQM1
FBCDQM3

FBCRDQS0
FBCRDQS2
FBCRDQS1
FBCRDQS3

FBC_RAS#
FBC_CAS#

FBC_WE#
FBC_CS0#
FBC_CLK0
FBC_CLK0#
FBC_CKE

FBCWDQS0
FBCWDQS2
FBCWDQS1
FBCWDQS3

FBC_RESET

FBC_CS1# 19,25
FBC_BA2 19,25
FBC_BA1 19,25
FBC_BA0 19,25

FBC_A12
FBC_A11
FBC_A10
FBC_A9
FBC_A8
FBC_A7
FBC_A6
FBC_A5
FBC_A4
FBC_A3
FBC_A2
FBC_A1
FBC_A0

FBC_RAS# 19,25
FBC_CAS# 19,25
FBC_WE# 19,25
FBC_CS0# 19
FBC_CLK0 19,25
FBC_CLK0# 19,25

12

R2379

NV_10K_J

0402

+1_8VRUN

FBC_CKE 19,25

FBC_RESET 19,25

FBCD39
FBCD36
FBCD37
FBCD38
FBCD35
FBCD32
FBCD34
FBCD33
FBCD40
FBCD46
FBCD41
FBCD42
FBCD43
FBCD45
FBCD47
FBCD44
FBCD48
FBCD50
FBCD51
FBCD49
FBCD53FBCD10
FBCD54
FBCD55
FBCD52
FBCD59
FBCD57
FBCD56
FBCD58
FBCD63
FBCD60
FBCD62
FBCD61

U14_ZQ

12

M12

R10
R11
M10
N11

M11
G10

C10
C11

R2382

NV_240_F

0402

V12V1R12R9R4

A2

VDD1

A11

VDD2

F1

VDD3

F12

VDD4

M1

VDD5
VDD6

V2

VDD7

V11

VDD8

K1

VDDA1

K12

VDDA2

Minimum 200us delay
required prior to applying
any executable command

DQ31

after stable power and clock.

DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

ZQ

VSS01

VSS02

VSS03

VSS04

VSS05

A3

A10G1G12L1L12V3V10J1J12B1B12B4B9D1D4D9D12G2G11L2L11P1P4P9P12T1T4T9T12

T10
T11

L10

F11
F10
E11

B10
B11

T3
T2
R3
R2

M3

N2
L3

M2

G3

F2
F3
E2
C3
C2
B3
B2

A4

N12N9N4N1J9J4E12E9E4E1C12C9C4C1A12

R1

VDDQ16

VDDQ20

VDDQ19

VSS08

VSSA01

VDDQ18

VDDQ17

VSSA02

VSSQ01

VDDQ15

VSSQ02

VDDQ22

VDDQ21

VSS06

VSS07

VDDQ14

VDDQ13

VSSQ03

VSSQ04

VDDQ12

VDDQ11

VSSQ05

VSSQ06

VDDQ10

VDDQ09

VSSQ07

VSSQ08

VDDQ08

VDDQ07

VSSQ09

VSSQ10

VDDQ06

VSSQ11

VDDQ05

VDDQ04

VSSQ12

VSSQ13

VDDQ03

VDDQ02

VSSQ14

VSSQ15

A1

U14

VDDQ01

RFU2

BA2
BA1
BA0

RFU1

A11
A10

A9

A8/AP

A7
A6
A5
A4
A3
A2
A1
A0

DM3
DM2
DM1
DM0

RDQS3
RDQS2
RDQS1
RDQS0

RAS#
CAS#

WE#

CS#

CK

CK#

CKE

VREF0

WDQS3
WDQS2
WDQS1
WDQS0

MF

SEN

RESET

VREF1

VSSQ16

VSSQ17

VSSQ18

VSSQ19

VSSQ20

SDRAM_FBGA-136_512MB

K4J52324QE-BC14

J3
H10
G9
G4

J2
L4
K2
M9
K11
L9
K10
H11
K9
M4
K3
H2
K4

N3
N10
E10
E3

P3
P10
D10
D3

H3
F4
H9
F9
J11
J10
H4

H12

P2
P11
D11
D2

A9

V4
V9

H1

U14
Mirror function on

FBC_CS1#
FBC_RAS#
FBC_BA0
FBC_BA1

FBC_A12
FBC_A7
FBC_A8

FBD_A3

FBC_A10
FBC_A11

FBD_A2

FBC_A1
FBC_A0
FBC_A9

FBC_A6
FBD_A5
FBD_A4

FBCDQM4
FBCDQM5
FBCDQM6
FBCDQM7

FBCRDQS4
FBCRDQS5
FBCRDQS6
FBCRDQS7

FBC_BA2

FBC_CKE

FBC_CAS#

FBC_CLK1
FBC_CLK1#
FBC_WE#

VRAM_VREF_7

FBCWDQS4
FBCWDQS5
FBCWDQS6
FBCWDQS7

MF8

FBC_RESET

VRAM_VREF_8

not have this R in reference

R2380 NV_10K_F 0402

1 2

FBC_RESET

FBD_A5
FBD_A4
FBD_A3
FBD_A2

FBC_A[12..0]19,25

FBC_CLK1 19,25
FBC_CLK1# 19,25

+1_8VRUN

R2389 NV_10K_J 0402

1 2

FBD_A[5..2] 19,25

R1397(120 ohm-360 ohm)
240 ohm --> Output impedence 40 ohm

+1_8VRUN

R93

0402

511_F

1 2

VRAM_VREF_5

12

12

0.1U_16V_M_B

0603

C1637

12

NC_1U_10V_K

0402

0402

1.3K_F

C1212

R2364

D D

DDR3(NB8X)

R1896,R1897,
R1898,R1899

C1608
C1809

1

243 ohm

0.01uF

2

VRAM_VREF_5 25 VRAM_VREF_6 25 VRAM_VREF_7 25

VRAM_VREF is 70%FBVDDQ for GDDR3 1.26V

+1_8VRUN +1_8VRUN

R95

0402

511_F

1 2

VRAM_VREF_6 VRAM_VREF_7

12

12

0402

R2365

0402

1 2

R2390 NV_243_F

3

0402

1.3K_F

C1213

12

0603

NC_1U_10V_K

0.1U_16V_M_B

C1635

FBC_CLK0#FBC_CLK0 FBC_CLK1#FBC_CLK1

NVIDIA FAE suggestion:
Update Single resistor between FBx_CLK and FBx_CLK* to 243ohm

4

0402

1 2

R2391 NV_243_F

5

0402

R2366

+1_8VRUN

R92

0402

511_F

1 2

12

12

0.1U_16V_M_B

0603

C1632

6

12

NC_1U_10V_K

FOXCONN

Title

Size Document Number Rev
A3

Date: Sheet

0402

1.3K_F

C1214

R94

0402

511_F

1 2

0402

R2369

VRAM_VREF_8

12

0402

1.3K_F

C1211

12

12

0603

NC_1U_10V_K

0.1U_16V_M_B

C1636

HON HAI PRECISION IND. CO., LTD.
CPBG - R&D Division

VRAM_VREF_8 25

VRAM (GDDR) 3 OF 4

(M610-1-01 )MainBoard (MBX-176) 2007.1.4 2.0

24 81Friday, August 31, 2007

7

of

8