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M
M296
2
M785
10
Maat
mb02
14
mb05w
md02
7
Mini-note CE2A1
MR030
MR031
MY071D
P
P4-865PE MAX
P4-865PE MAX II
P4-865PE Pro
2
P4-865P Ultra
2
P4-875P MAX
P4M800
P4M-800T
P4M-865G MAX
2
P4M-865G Ultra
P4M-865PE MAX
2
P4M-865PE Ultra
P4M-865P Ultra
P4M-910GLD1
P4M-915GD1
P4M-915GVD1
P4M-915PD1
P4MA PRO 533
P4M-RS300
PA-1000
PA-2000
PA-2001
PA-2002
PA-2005
PA-2006
PA-2007
PA-2010+
4
PA-2011
PA-2012
PA-2013
4
PAC-2003
PAG-2130
PAK-2005
PAK-2102
PDA-2000
2
PGX-2000
PMN70D
2
PN-2000
PN-3000
PN-6010
PN-6210
2
PT-2003
PT-2006
PT-2007
PT-2010
2
PT-2011
PT-2012
PTB51
PTBG965EFN LF
PTK-2110
PTM800Pro
PTM800PRO LF
PTM900
PTT50
S
SAHARA-II
SD11
2
SMB-710
SMB-750
SMB-950
spectra
T
Tablet PC
TVB00
TYCOON+
V
VA-501
VA-502
VA-503
4
VA-503A
VB-601
VB-601-V
VB-601-Z
VC11
VC15
VC19
VC19E
2
VC19G
2
VC31
VC35
VC37
VG31
VG31E
VG33
VG33P
VG33V
VI11
VI13
VI31
2
VI35L
VI35VL
VI39C
VI39L
VL-601
3
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PT-2003
User Manual
15 pgs
2.42 Mb
0
Table of contents
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FIC PT-2003 User Manual
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FIC User Manual
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Specifications and Main Features
Frequently Asked Questions
User Manual
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Page 1
Over
view
1
-3
Mainboa
rd
Remote
Contr
ol
Po
we
r
Layo
ut
il
o
Cac
he
Siz
e
!
—
-P
assw
PIIX
Selec
t
JJ
PS
/2
Mo
us
e
Ke
yboard
or
d
r
r
i
Q
i
—
CN8
CN2
cn
Z-4
I
:
PS
/2
M
ou
se
Ou
n
n
ac
to
r
TS
C
J6
SYS
CL
K
J10
I
Power
CPU
Ty
p
e
LED/Ke
ylocki
NO
TE
socket,
socket.
V
RM
CPU
SOCKE
T
jc
i
EFil
'
J11
--
--
--
J9
:
:
When
make
:
Reser
Speaker
JP1
:
HD
D
plugging
sure
LED
that
JPW1
JPW
2
JPW
3
JPW
4
your
SRA
M
Sel
ect
►
_
F
►
__
fz
L
►
_
proces
sor
pin
1
Type
M2
M3
M4
..
MS
M6
---
---
M7
MS
_M9
matches
,.
.
E3
1
JCK
1
JCK2
...J
1
1
J
CP
U
5
into
!
Clock
Bus
that
Cl
ock
the
of
TDP
TDP
CPU
the
(ZI
F)
CPU
PT-20
03
Page 2
:
V
y
/
-
J
Chapte
r
2
The
PT-2003
con
fig
ure
on
the
various
your
Jumper
s
Jum
pe
rs
the
“
set
pin/s
when
used
board
”
a
accordi
ng
the
in
this
are
used
have
jumper
,
black
manua
l
Jumper
Jum
per
has
syst
em
jumper
three
ca
p
sever
al
to
a
black
to
the
has
Ca
p
are
user
-adjusta
ble
to
suit
set
tings
sele
ct
the
metal
pins
ca
p
req
uire
d
been
are
shown
3-p
in
sho
wn
your
requireme
nts.
on
your
operati
on
with
cont
ain
ing
configuration.
placed
below:
Jumper
li
ke
abo
ve
Mainboa
rd
jumpers
This
mainboa
rd.
modes
for
eac
h
pin
repr
esenting
metal
contac
ts
A
on
one
or
two
2
-p
in
Jumper
"
on
your
jumper
of
"
stand
s
the
chapter
sys
tem.
is
its
pins.
board
a
differe
nt
placed
is
sai
d
The
Jumper
fo
r
Settings
that
allow
contains
pi
n
Some
over
to
types
Blo
ck
1
infor
mation
jumpers
functi
on.
the
be
“
of
you
jumper
shor
ted
jumpers
to
on
To
”
Jum
per
Jumpers
NOTE
:
setti
ngs
setti
ngs
ance
.
cap
like
in
a
Blo
ck
Users
not
liste
d
impr
operl
y
above
are
3
2
not
1
encourag
ed
in
this
may
adve
rsel
y
PT-200
3
manu
al.
to
change
Chan
gin
g
affect
system
the
the
jump
er
jump
er
perfor
m
I
Page 3
2-2
CPU
The
spe
ed.
CP
U
Speed
166
150
133
120
100
90
75
Bus
tab
le
Speed
MHz
MHz
MHz
MHz
MHz
MHz
MHz
/
CPU
below
-----
-
-----
Selec
t:
shows
External
Cl
ock
66
MHz
60
MH
z
66
MHz
60
MHz
66
MHz
60
MHz
50
MHz
Clock
-
JCK1,
the
JC
K1
iQ
LJl
1
Ratio:
jumper
I
I
■
LOMU
.
Ipj
al
3LO
I
ro
/i
JC1,
JCK2,
setti
ngs
!
Int.
Multi
ple
2.5
2.5
2
2
1.5
1.5
1.5
JC2
for
J6
C
PU
X
x
x
x
Ext.
x
Ex
t.
x
Ext.
x
Ex
t
the
Ext.
Ext.
Ext.
CPU
Cl
ock
JC1
r«i
iL-
_Y
l
,QJJl
lo
t
based
Ra
te
JC2
Mai
nb
oa
rd
on
its
Bus
'MS
'!
B
Di
"C
a
l
i
~o
O
'
:
ro
~o.
0-u
Se
ttin
gs
inte
rnal
Cl
ock
J6
L
I
SO
iw
o
lo
ssr
!
1
o
~l
cloc
k
Rat
e
Bus/
CPU
1/
2
1/3
2/3
2/5
Clo
ck
'
Rat
io
JC1
JC2
'
o
JCK1,
:
!.o
ri
«
—
>
JCK2
.
J*
,
;®
-.
JC2
JC1
PT-
20
03
Page 4
Main
bo
ard
CPU
Voltage
CP
U
V
ol
tag
e
ST
D
/
V
R
3.3
8V
V
RE
3.5
V
Cache
Size
Se
ttin
gs
Mode
Mod
e
(De
fa
ult
)
Sele
ct:
Selec
t:
JV
R
__
__
—
__
__
pM
|
JS1
JVR
2-
3
Cache
25
6K
B
51
2K
B
Siz
e
(Defa
ult)
JS1
PT-
20
03
Page 5
2-4
Mai
nb
oa
rd
Se
ttin
gs
Pass
w
ord
Pa
ssword
En
ab
le
Disa
bl
e
SRAM
SR
AM
Mixe
d
3.3V
SR
AM
.
...
.
.
-
...
...
Mixe
d
Clear
:
Cle
ar
(De
fa
ul
t)
Ty
pe
V
oltag
e
(Defaul
t)
V
ol
tage
(De
faul
t)
JCP
JCP
Select
:
JPW1
JPW3
..
..
..
..
..
..
..
.
a
JPW
1,
k>
—
I
—
u!
[6
«
i
■
■
JPW2
l
o
wo
l
JPW4
O
—
JPW
2,
I
I
JPW3,
JPW4
JPW1,
JPW3,
JPW2
,
JPW4
3.3V
__
__
__
__
PT
-2
00
3
Page 6
Ma
in
bo
ard
Set
tin
gs
2-5
Disp
lay
Flash
____
____
____
____
____
Type
Displa
y
Type
CGA
Mon
o/V
GA/E
GA
(De
fa
ul
t)
EPRO
M
Prog
ramm
able
EPROM
Intel
Intel
SST
Type
28
F01
0
28F
001
BX-T
29
EE01
0
Sele
ct:
J2
V
Type:
Fl
ash
(Def
au
lt)
J
J2
J3,
J4
J3
J4
s
9
s
B
I
J
PT
-2
00
3
Page 7
2-6
Mainboard
Setti
ngs
Cache
Cache
256KB
512KB
Size
Size
(Defaul
t)
Select:
JS1
JS1
.....
.....
.
M
ill
i
I
PT-2003
Page 8
The
PT-2003
advance
d
and
ca
che
instr
uctions
can
softwa
re
SRAM.
on
be
equipped
application
s.
This
how
to
cha
pter
inst
all
each
with
suf
fic
ient
Memory
desc
ribes
type
on
comes
thes
e
the
System
memory
mainboa
rd.
in
two
the
for
form
types
running
of
of
memo
ry
Memory
even
the
DRAM
(SIMM
s)
and
most
gives
Memor
y
The
board
layout
ca
che
SRAM:
Loc
ation
s
below
shows
the
locat
ions
of
the
DRAM
memo
ry
banks
and
the
PT-200
3
Page 9
3-2
Syste
m
Me
mo
ry
Instal
ling
SIMM
Banks
The
PT-
2003
(Si
ngle-In-L
ine
Bank
0
and
4MB,
8MB,
DRAM
Memo
ry
Configura
tion
ca
n
table:
TOTAL
SMB
16
MB
24MB
32MB
40
MB
48
MB
64MB
72MB
80MB
96MB
32MB
128
MB
DRAM
ca
n
acc
ommodate
Memor
y
Bank
16MB
be
insta
lle
d
MEMOR
Y
1
or
Eac
h
32MB
Modules).
bank
SIM
M
in
a
varie
ty
onboard
The
has
two
in
(72-P
IN
4MB
SMB
8MB
8MB
16MB
16
MB
16
MB
32MB
32MB
32MB
32MB
memory
mainboa
rd
SI
MM
ea
ch
soc
ket.
of
configur
ations,
BA
NK
O
X
2)
L
4MB
&
8MB
&
8MB
&
8MB
&
16MB
&
16MB
&
16MB
&
32MB
&
32MB
&
32MB
&
32MB
&
32MB
fro
m
sockets
8
has
to
whic
h
as
128MB
two
shown
16MB
16MB
32MB
memory
ca
n
in
BA
NK
(72-
PIN
4MB
SM
B
4MB
SMB
4MB
SMB
using
acc
ept
the
x
&
4MB
&
8MB
L
4MB
&
SMB
&
16
MB
&
4MB
&
SMB
&
16MB
&
32MB
SIMMs
banks
either
following
1
2)
—
a
j
—
NOTE
:
All
memo
ry
banks
us
e
72-
pin
memo
ry
modules
.
PT
-2
00
3
Page 10
Syst
em
Mem
ory
3-3
Ins
tallation
—
NOTE
“
Hand
ling
I
2.
Inst
ruct
ions
:
Alw
ay
s
.
Loc
ate
the
Insert
the
obs
erv
e
Pre
cau
tions
SIMM
banks
SIM
M
edge
stati
c
”
at
th
e
on
SIMM1,
SIMM2,
SIM
MS,
SIM
M4
connec
tor
sta
rt
the
mai
nboa
rd.
—
onto
ele
ct
rici
ty
of
this
—
-
the
socke
t.
pre
ca
uti
on
s.
man
ual
.
Se
e
To
re
move
reve
rse
the
3.
Car
efully
reta
inin
g
holes
clips
.
the
SIM
M/s,
proce
dure
in
push
cli
ps
the
SIM
M
pull
abov
e.
of
the
the
SI
MM
the
should
down
socke
t
mat
ch
ret
aining
PT
-20
03
snap,
latc
h
and
holding
the
on
bac
k
pins
both
on
into
the
the
end
s
the
socke
t
SIMM
soc
ket
of
the
in
’
until
plac
e.
s
ret
ai
ning
soc
ket
the
The
and
Page 11
3-4
Syst
em
Mem
ory
Cac
he
The
PT
-2003
SRA
Ms
SR
AM
be
SRAMs
.
pulled
—
ar
e
module
out.
The
Ins
tallin
g
—
If
you
do
not
se
rvic
e
technic
ian
Corre
ct
orie
ntat
ion
Nor
mal
ly,
must
Inst
al
l
be
the
matc
hed
Memory
ca
n
acce
pt
inst
al
le
d,
is
implem
ente
d,
The
onboa
rd
SR
AM
NOTE
:
memo
ry
Tag
NOTE
“
the
chips
SRA
M.
Onboard
Han
dli
ng
have
1.
Loca
te
2.
Be
guided
your
chips
to
indivi
duall
y
3.
Alig
n
chip
are
al
igned
socke
t.
4.
Pr
ess
are
properly
:
Alwa
ys
the
for
desired
of
the
the
onto
the
eithe
r
the
SR
AM
SR
AMs
module
can
Use
the
you
wan
t
Cache
Pre
ca
utio
ns
confide
nce
as
sista
nce
.
the
ca
che
by
the
SRA
M
the
chip
have
eithe
r
marke
r
as
ch
ip
with
the
socke
t,
wi
th
chip
comple
tely
seate
d.
onboa
rd
SRA
Ms
module
ca
n
the
onboard
support
asynchronous
support
sync
hrono
us
corre
ct
to
ad
d.
I
nsta
ll
Mem
ory
obs
erve
”
to
mak
e
mem
ory
Cac
he
SRA
M
co
nfig
ura
tion
.
is
nec
ess
ary
a
curve
d
on
the
soc
ket
follows:
the
marke
r
ensuring
the
corres
ponding
sta
tic
at
on
into
not
ch
not
SR
AMs,
chip
s
the
the
the
setti
ngs
for
on
tha
t
the
or
a
SRA
M
be
used.
for
both
el
ec
tri
ci
ty
star
t
of
installa
tion,
main
boa
rd.
for
the
or
a
dot.
corr
ect
the
soc
ket.
the
pins
connect
ions
soc
ket
module
.
On
the
including
3.
3V/mixed
SR
AMs.
the
amo
unt
the
co
rrec
t
pre
ca
uti
on
s.
thi
s
man
ual
.
you
depe
nding
ca
che
to
This
alignm
ent.
Pre
ss
on
the
on
so
that
If
otherhand,
tag
should
on
opera
te
marke
r
the
ch
ip
the
the
pins
the
onbo
ard
SRAM,
of
Cac
he
consult
properly.
on
if
must
volta
ge
ca
ch
e
an
d
Se
e
the
chip
the
'
a
PT-2
00
3
Page 12
Syste
m
Usi
ng
Cac
he
se
tti
ngs
Mem
ory
Vario
us
soc
ket
s
are
liste
d
M2
Vol
tag
e
to
below
Onb
oar
d
M9
can
take
Jump
er
mix-
volt
age
Jum
per
3.
3V
SRAM
s
3.
3V
se
tti
ng
SRAM
s
JPW1
JPW2
JPW3
JPW4
se
tti
ng
JPW1
JPW2
JPW3
JPW4
SRAM
s
or
f
or
f
or
(M2
-M9
).
mix-v
olta
ge
(M2
-M9
).
SRA
Ms.
The
3-5
jumper
JPW1,
JPW3,
PT
-2
00
3
JPW2.
JPW4
Page 13
3-6
Syst
em
Me
mo
ry
Onb
oar
d
256KB
Cache
Ml
SR
AM
PT-
20
03
Page 14
Syste
m
Memo
ry
3-7
Onboard
512KB
Cache
Ml
SR
AM
PT-2
003
Page 15
3-8
System
Memor
y
Ins
talling
The
PT-
2003
The
jumper
Loca
te
the
inst
all
ati
on.
Cache
256KB
512KB
Size
(Def
ault
)
Cache
allows
set
tings
sl
ot
SRAM
Memory
the
insta
llation
of
JPW1,
on
the
JS1
I
(o
111
’
Module
JPW2,
mainboa
rd,
of
JPW3,
either
the
and
then
256KB
JPW4
inser
t
will
or
your
512KB
not
SRAM
aff
ect
cache
it.
module
module.
for
PT-20
03
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