Fairchild Semiconductor NM27C240NE120, NM27C240VE150, NM27C240VE120, NM27C240V150, NM27C240QE150 Datasheet
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NM27C240 4,194,304-Bit (256k x 16) High Performance CMOS EPROM
NM27C240
4,194,304-Bit (256k x 16) High Performance
CMOS EPROM
General Description
The NM27C240 is a high performance Electrically Programmable
UV erasable ROM (EPROM). It contains 4,194,304 bits configured as 256k x 16 bits. It is offered in both erasable versions for
prototyping and early production applications as well as nonerasable, plastic packaged versions that are ideal for high volume
and automated assembly applications.
The NM27C240 operates from a single 5V ±10% supply in the
read mode.
The NM27C240 is offered in both DIP and surface mount packages. The DIP package is a 40-pin dual-in-line ceramic with a
quartz window to allow erasing. The surface mount package is a
44-pin PLCC that is offered in OTP.
This EPROM is manufactured using Fairchild’s proprietary AMG™
EPROM technology for an excellent combination of speed and
economy while providing excellent reliability.
Block Diagram
July 1998
Features
■ High performance CMOS
—100 ns access time
■ Fast turn-off for microprocessor compatibility
■ Simplified upgrade path
—VPP and PGM are “Don’t Care” during normal read
operation
■ Compatible with 27240 and 27C240 EPROMs
■ JEDEC standard pin configuration
—40-pin DIP package
—44-pin PLCC package
■ Manufacturer’s identification code
■ Fast programming algorithm
AMG™ is a trademark of WSI, Inc.
© 1998 Fairchild Semiconductor Corporation
V
cc
GND
V
pp
OE
CE/PGM
Output Enable
Chip Enable, and
Program Logic
Y
Decoder
X
Decoder
Output
Buffers
4,194,304-Bit
Cell Matrix
A
0 - A17
Address
Inputs
Data Outputs O
0 - O15
DS011949-1
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NM27C240 4,194,304-Bit (256k x 16) High Performance CMOS EPROM
Connection Diagrams
DIP PIN CONFIGURATIONS
Note: Compatible EPROM pin configurations are shown in the blocks adjacent to the NM27C240 pins.
Commercial Temperature Range
(0°C to +70°C) VCC = 5V ±10%
Parameter/Order Number Access Time (ns)
NM27C240 Q, V, N 100 100
NM27C240 Q, V, N 120 120
NM27C240 Q, V, N 150 150
Note: Surface mount PLCC package available for commercial and extended
temperature ranges only.
Package types: NM27C240 Q, V, N XXX
Q = Quartz-Windowed Ceramic DIP Package
V = PLCC Package
N = Plastic DIP Package
• All packages conform to JEDEC standard.
• All versions are guaranteed to function in slower applications.
Pin Names
A0–A15 Addresses
CE/PGM Chip Enable/Program
OE Output Enable
O0–O15 Outputs
XX Don’t Care (During Read)
NC No Connect
Extended Temperature Range
(-40° to +85°C) VCC = 5V ±10%
Parameter/Order Number Access Time (ns)
NM27C240 QE, VE, NE 120 120
NM27C240 QE, VE, NE 150 150
PLCC Pin Configuration
27C210 27C220 27C280
A
18
CE/PGM
O
15
O
14
O
13
O
12
O
11
O
10
O
9
O
8
GND
O
7
O
6
O
5
O
4
O
3
O
2
O
1
O
0
OE/V
PP
XXV
PP
CE
O
15
O
14
O
13
O
12
O
11
O
10
O
9
O
8
GND
O
7
O
6
O
5
O
4
O
3
O
2
O
1
O
0
OE
XXV
PP
CE
O
15
O
14
O
13
O
12
O
11
O
10
O
9
O
8
GND
O
7
O
6
O
5
O
4
O
3
O
2
O
1
O
0
OE
V
CC
A
17
A
16
A
15
A
14
A
13
A
12
A
11
A
10
A
9
GND
A
8
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
V
CC
XX/PGM
NC
A
15
A
14
A
13
A
12
A
11
A
10
A
9
GND
A
8
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
V
CC
PGM
A
16
A
15
A
14
A
13
A
12
A
11
A
10
A
9
GND
A
8
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
XX/V
PP
CE/PGM
O
15
O
14
O
13
O
12
O
11
O
10
O
9
O
8
GND
O
7
O
6
O
5
O
4
O
3
O
2
O
1
O
0
OE
V
CC
A
17
A
16
A
15
A
14
A
13
A
12
A
11
A
10
A
9
GND
A
8
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
27C280 27C220 27C210
O
12
O
11
O
10
O
9
O
8
GND
NC
O
7
O
6
O
5
O
4
A
13
A
12
A
11
A
10
A
9
GND
NC
A
8
A
7
A
6
A
5
O13O14O15CE/PGM
XX/VPPNC
A17A16A15A
14
O3O2O1O
0
OE
NC
A0A1A2A3A
4
1
23456
7
8
9
10
11
12
13
14
15
16
17
4041424344
38
37
36
35
34
33
32
31
30
2221201918 282726252423
29
39
V
CC
DIP
NM27C240
DS011949-3
DS011949-2
Top View
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NM27C240 4,194,304-Bit (256k x 16) High Performance CMOS EPROM
Absolute Maximum Ratings (Note 1)
Storage Temperature -65°C to +150°C
All Input Voltages except A9 with
Respect to Ground (Note 10) -0.6V to +7V
VPP and A9 with
Respect to Ground -0.6V to +14V
VCC Supply Voltage with
Respect to Ground -0.6V to +7V
ESD Protection >2000V
All Output Voltages with Respect
to Ground (Note 10) VCC + 1.0V to GND - 0.6V
Operating Range
Range Temperature V
CC
Tolerance
Commercial 0°C to +70°C +5V ±10%
Industrial -40V°C to +85°C +5V ±10%
DC Read Characteristics Over Operating Range with V
PP
= V
CC
Symbol Parameter Conditions Min Max Units
V
IL
Input Low Level -0.5 0.8 V
V
IH
Input High Level 2.0 VCC +1 V
V
OL
Output Low Voltage IOL = 2.1 mA 0.4 V
V
OH
Output High Voltage IOH = -2.5 mA 3.5 V
I
SB1
VCC Standby Current (CMOS) CE = VCC ±0.3V 100 µA
I
SB2
VCC Standby Current (TTL) CE = V
IH
1mA
ICCVCC Active Current CE = OE = VIL, I/O = 0 mA f=5 MHz 40 mA
I
PP
VPP Supply Current VPP = V
CC
10 µA
I
LI
Input Load Current VIN = 5.5V or GND -1 1 µA
I
LO
Output Leakage Current V
OUT
= 5.5V or GND -10 10 µA
AC Read Characteristics Over Operating Range with V
PP
= V
CC
Symbol Parameter 100 120 150 Units
Min Max Min Max Min Max
t
ACC
Address to Output Delay 100 120 150 ns
t
CE
CE to Output Delay 100 120 150
t
OE
OE to Output Delay 50 50 50
tDF (Note 2) Output Disable to Output Float 35 35 45
tOH (Note 2) Output Hold from Addresses CE or 0 0 0
OE , Whichever Occurred First
Capacitance T
A
= +25˚C, f = 1 MHz (Note 2)
Symbol Parameter Conditions Typ Max Units
C
IN
Input Capacitance VIN = 0V 12 20 pF
C
OUT
Output Capacitance V
OUT
= 0V 13 20 pF
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