Fairchild Semiconductor NDP6020P, NDB6020P Datasheet
NDP6020P / NDB6020P
P-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description Features
September 1997
These logic level P-Channel enhancement mode power field
effect transistors are produced using Fairchild's proprietary,
high cell density, DMOS technology. This very high density
process has been especially tailored to minimize on-state
resistance, provide superior switching performance, and
withstand high energy pulses in the avalanche and
commutation modes. These devices are particularly suited for
low voltage applications such as automotive, DC/DC
converters, PWM motor controls, and other battery powered
circuits where fast switching, low in-line power loss, and
resistance to transients are needed.
-24 A, -20 V. R
R
R
Critical DC electrical parameters specified at elevated
temperature.
Rugged internal source-drain diode can eliminate the need
for an external Zener diode transient suppressor.
175°C maximum junction temperature rating.
High density cell design for extremely low R
= 0.05 Ω @ VGS= -4.5 V.
DS(ON)
= 0.07Ω @ VGS= -2.7 V.
DS(ON)
= 0.075 Ω @ VGS= -2.5 V.
DS(ON)
DS(ON)
.
TO-220 and TO-263 (D2PAK) package for both through
hole and surface mount applications.
________________________________________________________________________________
S
G
D
Absolute Maximum Ratings T
= 25°C unless otherwise noted
C
Symbol Parameter NDP6020P NDB6020P Units
V
DSS
V
GSS
I
D
Drain-Source Voltage -20 V
Gate-Source Voltage - Continuous ±8 V
Drain Current - Continuous -24 A
- Pulsed -70
P
D
Total Power Dissipation @ TC = 25°C
60 W
Derate above 25°C 0.4 W/°C
TJ,T
Operating and Storage Temperature Range -65 to 175 °C
STG
© 1997 Fairchild Semiconductor Corporation
NDP6020P Rev.C1
Electrical Characteristics (T
= 25°C unless otherwise noted)
C
Symbol Parameter Conditions Min Typ Max Units
OFF CHARACTERISTICS
BV
I
I
I
DSS
GSSF
GSSR
Drain-Source Breakdown Voltage VGS = 0 V, ID = -250 µA -20 V
DSS
Zero Gate Voltage Drain Current
VDS = -16 V, V
GS
= 0 V
-1 µA
TJ = 55°C
Gate - Body Leakage, Forward VGS = 8 V, VDS = 0 V 100 nA
Gate - Body Leakage, Reverse
VGS = -8 V, VDS = 0 V
-10 µA
-100 nA
ON CHARACTERISTICS (Note 1)
V
GS(th)
Gate Threshold Voltage VDS = VGS, ID = -250 µA -0.4 -0.7 -1 V
TJ = 125°C -0.3 -0.56 -0.7
R
R
R
I
g
DS(ON)
DS(ON)
DS(ON)
D(on)
FS
Static Drain-Source On-Resistance
VGS = -4.5 V, ID = -12 A
TJ = 125°C
Static Drain-Source On-Resistance VGS = -2.7 V, ID = -10 A 0.059 0.07
Static Drain-Source On-Resistance
VGS = -2.5 V, ID = -10 A
On-State Drain Current VGS = -4.5 V, VDS = -5 V -24 A
Forward Transconductance
VDS = -5 V, ID = -12 A
0.041 0.05
0.06 0.08
0.064 0.075
14 S
Ω
DYNAMIC CHARACTERISTICS
C
iss
C
oss
C
rss
Input Capacitance VDS = -10 V, VGS = 0 V,
Output Capacitance 725 pF
f = 1.0 MHz
Reverse Transfer Capacitance 215 pF
1590 pF
SWITCHING CHARACTERISTICS (Note 1)
t
t
t
t
Q
Q
Q
D(on)
r
D(off)
f
g
gs
gd
Turn - On Delay Time VDD = -20 V, ID = -3 A,
Turn - On Rise Time 27 60 nS
VGS = -5 V, R
GEN
= 6 Ω
15 30 nS
Turn - Off Delay Time 120 250 nS
Turn - Off Fall Time 70 150 nS
Total Gate Charge VDS = -10 V,
Gate-Source Charge 5 nC
ID = -24 A, VGS = -5 V
25 35 nC
Gate-Drain Charge 10 nC
NDP6020P Rev.C1
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