Fairchild Semiconductor NDH8304P Datasheet

May 1997
NDH8304P Dual P-Channel Enhancement Mode Field Effect Transistor
General Description Features
SuperSOTTM-8 P-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage applications such as notebook computer power management and other battery powered circuits where fast high-side switching, and low in-line power loss are needed in a very small outline surface mount package.
-2.7 A, -20 V. R R
Proprietary SuperSOTTM-8 package design using copper lead frame for superior thermal and electrical capabilities.
High density cell design for extremely low R Exceptional on-resistance and maximum DC current
capability.
___________________________________________________________________________________________
= 0.07 @ VGS = -4.5 V
DS(ON)
= 0.095 @ VGS = -2.7 V.
DS(ON)
DS(ON)
.
Absolute Maximum Ratings T
Symbol Parameter
V
DSS
V
GSS
I
D
Drain-Source Voltage -20 V Gate-Source Voltage ±8 V Drain Current - Continuous (Note 1) -2.7 A
- Pulsed -10
P
D
TJ,T
Maximum Power Dissipation (Note 1) 0.8 W Operating and Storage Temperature Range -55 to 150 °C
STG
THERMAL CHARACTERISTICS
R
θJA
R
θJC
Thermal Resistance, Junction-to-Ambient (Note 1) 156 °C/W Thermal Resistance, Junction-to-Case (Note 1) 40 °C/W
= 25°C unless otherwise noted
5
6
7
8
NDH8304P
4
3 2
1
Units
© 1997 Fairchild Semiconductor Corporation
NDH8304P Rev.C
ELECTRICAL CHARACTERISTICS (T
= 25°C unless otherwise noted)
Symbol Parameter Conditions Min Typ Max Units OFF CHARACTERISTICS
BV I
DSS
I
GSSF
I
GSSR
DSS
Drain-Source Breakdown Voltage VGS = 0 V, ID = -250 µA -20 V Zero Gate Voltage Drain Current
VDS = -16 V, V
GS
= 0 V
TJ= 55°C
-1 µA
-10 µA Gate - Body Leakage, Forward VGS = 8 V, VDS = 0 V 100 nA Gate - Body Leakage, Reverse
VGS = -8 V, VDS= 0 V
-100 nA
ON CHARACTERISTICS (Note 2)
V
R
I
g
GS(th)
DS(ON)
D(on)
FS
Gate Threshold Voltage VDS = VGS, ID = - 250 µA -0.4 -0.7 -1 V
TJ= 125°C
-0.3 -0.5 -0.8
Static Drain-Source On-Resistance VGS = -4.5 V, ID = -2.7 A 0.061 0.07
0.087 0.125
0.082 0.095
-10 A
-3 8 S
On-State Drain Current
Forward Transconductance
TJ= 125°C VGS = -2.7 V, ID = -2.3 A VGS = -4.5 V, VDS = -5 V VGS = -2.7 V, VDS = -5 V VDS = -5 V, ID = -2.7 A
DYNAMIC CHARACTERISTICS
C
iss
C
oss
C
rss
Input Capacitance VDS = -10 V, V Output Capacitance 415 pF
f = 1.0 MHz
GS
= 0 V,
865 pF
Reverse Transfer Capacitance 150 pF
SWITCHING CHARACTERISTICS (Note 2)
t t t t Q Q Q
D(on)
r
D(off)
f
Turn - On Delay Time Turn - On Rise Time 25 50 ns
VDD = -5 V, ID = -1 A, VGS = -4.5 V, R
GEN
= 6
Turn - Off Delay Time 78 150 ns Turn - Off Fall Time 55 100 ns
g
gs
gd
Total Gate Charge Gate-Source Charge 2.4 nC Gate-Drain Charge 5.1 nC
VDS = -10 V, ID = -2.7 A, VGS = -4.5 V
11 22 ns
16 23 nC
NDH8304P Rev.C
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