Fairchild Semiconductor NDB7052, NDP7052 Datasheet
June 1997
NDP7052 / NDB7052
N-Channel Enhancement Mode Field Effect Transistor
General Description Features
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, high cell
density, DMOS technology. This very high density process has
been especially tailored to minimize on-state resistance,
provide superior switching performance, and withstand high
energy pulses in the avalanche and commutation modes.
These devices are particularly suited for low voltage
applications such as automotive, DC/DC converters, PWM
motor controls, and other battery powered circuits where fast
switching, low in-line power loss, and resistance to transients
are needed.
________________________________________________________________________________
75 A, 50 V. R
= 0.01 Ω @ VGS= 10 V.
DS(ON)
Critical DC electrical parameters specified at elevated
temperature.
Rugged internal source-drain diode can eliminate the need
for an external Zener diode transient suppressor.
175°C maximum junction temperature rating.
High density cell design for extremely low R
DS(ON)
.
TO-220 and TO-263 (D2PAK) package for both through hole
and surface mount applications.
D
G
S
Absolute Maximum Ratings T
Symbol Parameter NDP7052 NDB7052 Units
V
DSS
V
DGR
V
GSS
I
D
P
D
TJ,T
THERMAL CHARACTERISTICS
R
θJC
R
θ JA
Drain-Source Voltage 50 V
Drain-Gate Voltage (RGS < 1 MΩ)
Gate-Source Voltage - Continuous ±20 V
- Nonrepetitive (tP < 50 µs)
Drain Current - Continuous 75 A
- Pulsed 225
Total Power Dissipation @ TC = 25°C
Derate above 25°C 1 W/°C
Operating and Storage Temperature Range -65 to 175 °C
STG
Thermal Resistance, Junction-to-Case 1 °C/W
Thermal Resistance, Junction-to-Ambient 62.5 °C/W
= 25°C unless otherwise noted
C
50 V
±40
150 W
© 1997 Fairchild Semiconductor Corporation
NDP7052 Rev.B1
Electrical Characteristics (T
= 25°C unless otherwise noted)
C
Symbol Parameter Conditions Min Typ Max Units
DRAIN-SOURCE AVALANCHE RATINGS (Note)
W
DSS
I
AR
Single Pulse Drain-Source Avalanche Energy VDD = 25 V, ID = 75 A 550 mJ
Maximum Drain-Source Avalanche Current 75 A
OFF CHARACTERISTICS
BV
∆BV
I
DSS
DSS
DSS
Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA 50 V
Breakdown Voltage Temp. Coefficient
/∆T
J
Zero Gate Voltage Drain Current
ID = 250 µA, Referenced to 25 o C
VDS = 40 V, V
GS
= 0 V
57
10 µA
mV/oC
TJ = 125°C 1 mA
I
GSSF
I
GSSR
Gate - Body Leakage, Forward
VGS = 20 V, VDS = 0 V
Gate - Body Leakage, Reverse VGS = -20 V, VDS = 0 V -100 nA
100 nA
ON CHARACTERISTICS (Note)
∆V
V
GS(th)
GS(th)
Gate Threshold VoltageTemp. Coefficient
/∆T
J
Gate Threshold Voltage
ID = 250 µA, Referenced to 25 o C
VDS = VGS, ID = 250 µA
-5.2
mV/oC
2 2.2 3 V
TJ = 125°C 1.4 1.55 2.4
R
I
g
D(on)
DS(ON)
FS
Static Drain-Source On-Resistance
VGS = 10 V, ID = 37.5 A
TJ = 125°C
On-State Drain Current VGS = 10 V, VDS= 10 V 60 A
Forward Transconductance
VDS = 10 V, ID = 37.5 A
0.008 0.01
0.011 0.018
52 S
DYNAMIC CHARACTERISTICS
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance 1300 pF
Reverse Transfer Capacitance 460 pF
VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
3400 pF
SWITCHING CHARACTERISTICS (Note)
t
t
t
t
Q
Q
Q
D(on)
r
D(off)
f
Turn - On Delay Time
Turn - On Rise Time 147 250 nS
VDD = 30 V, ID = 75 A,
VGS = 10 V, R
GEN
= 5 Ω
Turn - Off Delay Time 85 150 nS
Turn - Off Fall Time 165 300 nS
g
gs
gd
Total Gate Charge
Gate-Source Charge 12 nC
Gate-Drain Charge 46 nC
VDS = 24 V,
ID = 37.5 A, VGS = 10 V
15 30 nS
117 160 nC
DRAIN-SOURCE DIODE CHARACTERISTICS
I
S
ISM
V
t
rr
I
rr
SD
Maximum Continuos Drain-Source Diode Forward Current 75 A
Maximum Pulsed Drain-Source Diode Forward Current 225 A
Drain-Source Diode Forward Voltage VGS = 0 V, IS = 13 A (Note) 0.9 1.3 V
Reverse Recovery Time
VGS = 0 V, IF = 37.5 A,
75 150 ns
Reverse Recovery Current dIF/dt = 100 A/µs 4 10 A
Note: Pulse Test: Pulse Width < 300 µs, Duty Cycle < 2.0%.
Ω
NDP7052 Rev.B1
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