Fairchild Semiconductor NC7SU04P5, NC7SU04M5X, NC7SU04M5, NC7SU04CW, NC7SU04P5X Datasheet
© 2000 Fairchild Semiconductor Corporation DS012142 www.fairchildsemi.com
October 1995
Revised June 2000
NC7SU04 TinyLogic
HS Unbuffered Inverter
NC7SU04
TinyLogic
HS Unbuffered Inverter
General Description
The NC7SU04 is a singl e special purp ose CMOS Inv erter.
The inverter circuit is designed with a single unbuffered
stage to facilitate use in crystal oscillator applications. It is
not intended for use in logic inversion applications.
Advanced Silicon Gate CMOS fabrication assures high
speed and low pow er circuit operation over a broad V
CC
range. ESD protectio n diodes inherently gu ard both input
and output with respect to the V
CC
and GND rails.
Features
■ Space saving SOT23 or SC70 5-lead package
■ Unbuffered for crystal oscillator applications
■ Low Quiescent Power; I
CC
< 1 µA
■ Balanced Output Drive; 2 mA I
OL
, −2 mA I
OH
■ Broad VCC Operating Range; 2V–6V
■ Balanced Propagation Delays
■ Specified for 3V operation
Ordering Code:
Logic Symbol
IEEE/IEC
Connection Diagram
(Top View)
Pin Descriptions Function Table
H = HIGH Logic Level
L = LOW Logic Level
TinyLogic is a trademark of Fairchild Semiconductor Co rporation.
Order Number
Package Product Code
Package Descript ion Supplied As
Number Top Mark
NC7SU04M5 MA05B 7SU4 5-Lead SOT23, JEDEC MO-178, 1.6mm 250 Units on Tape and Reel
NC7SU04M5X MA05B 7SU4 5-Lead SOT23, JEDEC MO-178, 1.6mm 3k Units on Tape and Reel
NC7SU04P5 MAA05A SU4 5-Lead SC70, EIAJ SC-88a, 1.25mm Wide 250 Units on Tape and Reel
NC7SU04P5X MAA05A SU4 5-Lead SC70, EIAJ SC-88a, 1.25mm Wide 3k Units on Tape and Reel
Pin Names Description
A Input
Y Output
NC No Connect
Y = A
Input Output
AY
LH
HL
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NC7SU04
Absolute Maximum Ratings(Note 1) Recommended Operating
Conditions
(Note 2)
Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power
supply, temperature, and ou tput/inp ut loadi ng varia bles. Fairchild does no t
recommend operat ion of circuits outside dat abook specifications.
Note 2: Unused inputs must be held HIGH or LOW. They ma y not float.
DC Electrical Characteristics
Supply Voltage (VCC) −0.5V to +7.0V
DC Input Diode Current (I
IK
)
@ V
IN
≤ −0.5V −20 mA
@ V
IN
≥ VCC +0.5V +20 mA
DC Input Voltage (V
IN
) −0.5V to VCC + 0.5V
DC Output Diode Current (I
OK
)
@ V
OUT
< −0.5V −20 mA
@ V
OUT
> VCC +0.5V +20 mA
DC Output Voltag e (V
OUT
) −0.5V to VCC + 0.5V
DC Output S ource
or Sink Current (I
OUT
) ±12.5 mA
DC V
CC
or Ground Current
per Output Pin (I
CC
or I
GND
) ±25 mA
Storage Temperature (T
STG
) −65°C to +150°C
Junction Temperature (T
J
)150°C
Lead Temperature (T
L
);
(Soldering, 10 seconds) 260
°C
Supply Voltage (V
CC
) 2.0V to 6.0V
Input Voltage (V
IN
) 0V to V
CC
Output Voltage (V
OUT
) 0V to V
CC
Operating Temperature (TA) −40°C to +85°C
Thermal Resistance (
θ
JA
)
SOT23-5 300
°C/W
SC70-5 425
°C/W
Symbol Parameter
V
CC
TA = +25°CT
A
= −40°C to +85°C
Units Conditions
(V) Min Typ Max Min Max
V
IH
HIGH Level Input Voltage 2.0 1.70 1.70
V
3.0 2.45 2.45
4.5 3.60 3.60
6.0 4.80 4.80
V
IL
LOW Level Input Voltage 2.0 0.30 0.30
V
3.0 0.50 0.50
4.5 0.90 0.90
6.0 1.20 1.20
V
OH
HIGH Level Output Voltage 2.0 1.80 2.0 1.80
V
3.0 2.5 3.0 2.50 I
OH
= −20 µA
4.5 4.00 4.5 4.00 VIN = V
IL
6.0 5.50 5.9 5.50
V
V
IN
= GND
3.0 2.68 2.82 2.63 IOH = −1.3 mA
4.5 4.18 4.33 4.13 IOH = −2 mA
6.0 5.68 5.76 5.63 IOH = −2.6 mA
V
OL
LOW Level Output Voltage 2.0 0.00 0.20 0.20
V
3.0 0.00 0.50 0.50 IOL = 20 µA
4.5 0.01 0.50 0.50 VIN = V
IH
6.0 0.04 0.50 0.50
V
VIN = V
CC
3.0 0.11 0.26 0.33 IOL = 1.3 mA
4.5 0.12 0.26 0.33 IOL = 2 mA
6.0 0.15 0.26 0.33 IOL = 2.6 mA
I
IN
Input Leakage Current 6.0 ±0.1 ±1.0 µAVIN = VCC, GND
I
CC
Quiescent Supply Current 6.0 1.0 10.0 µAVIN = VCC, GND
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NC7SU04
AC Electrical Characteristics
Note 3: CPD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (I
CCD
) at no output
loading and operating at 50% duty cycle. (See Figure 2.) C
PD
is related to I
CCD
dynamic operating cu rrent by the expression:
I
CCD
= (CPD)(VCC)(fIN) + (ICCstatic).
AC Loading and Waveforms
CL includes load and str ay capacitance
Input PR R = 1.0 MHz; t
W
= 500 ns
FIGURE 1. AC Test Circuit
Input = AC Waveform ;
PRR = variable; Duty Cycle = 50%
FIGURE 2. I
CCD
Test Circuit
FIGURE 3. AC Waveforms
Symbol Parameter
V
CC
TA = +25°CT
A
= −40°C to +85°C
Units Conditions Fig. No.
(V) Min Typ Max Min Max
t
PLH
, Propagation Delay 5.0 3 15 ns CL = 15 pF
Figures
1, 3
t
PHL
2.0 17 100 125
CL = 50 pF
3.0 9 27 35
ns
4.5 7 20 25
6.0 6.5 17 21
t
TLH
, Output Transition Time 5.0 4 10 ns CL = 15 pF
Figures
1, 3
t
THL
2.0 25 125 155
CL = 50 pF
3.0 16 35 45
ns
4.5 12 25 31
6.0 10 21 26
CIN Input Capacitance Open 2 10 10 pF
C
PD
Power Dissipation Capacitance 5.0 4 pF (Note 3) Figure 2
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