Fairchild Semiconductor NC7ST04M5X, NC7ST04P5X, NC7ST04P5, NC7ST04M5, NC7ST04CW Datasheet

© 2000 Fairchild Semiconductor Corporation DS012185 www.fairchildsemi.com

February 1997
Revised June 2000

NC7ST04 TinyLogic



HST Inverter

NC7ST04
TinyLogic

 HST Inverter

General Description

The NC7ST04 is a single high performance CMOS
Inverter, with TTL-compatible inputs. Advanced Silicon
Gate CMOS fabrication assures high speed and low power
circuit operation. ES D protection diodes inherently g uard
both input and output with respect to the V

CC

and GND

rails. High gain circuitry offers high noise immunity and
reduced sensitivity to input edge rate. The TTL-compatible
input facilitates TTL to NMOS/CMOS interfacing. Device
performance is similar to M M74HCT but w ith ½ the outp ut
current drive of HC/HCT.

Features

■ Space saving SOT23 or SC70 5-lead package

■ High Speed; t

PD

<7 ns typ, VCC = 5V, CL = 15 pF

■ Low Quiescent Power; I

CC

<1 µA typ, VCC = 5.5V

■ Balanced Output Drive; 2 mA I

OL

, −2 mA I

OH

■ TTL-compatible inputs

Ordering Code:

Logic Symbol

IEEE/IEC

Connection Diagram

(Top View)

Pin Descriptions Function Table

H = HIGH Logic Level
L = LOW Logic Level

TinyLogic is a trademark of Fairchild Semiconductor Co rporation.

Order Package Product Code

Package Descript ion Supplied As

Number Number Top Mark

NC7ST04M5 MA05B 8S04 5-Lead SOT23, JEDEC MO-178, 1.6mm 250 Units on Tape and Reel
NC7ST04M5X MA05B 8S04 5-Lead SOT23, JEDEC MO-178, 1.6mm 3k Units on Tape and Reel
NC7ST04P5 MAA05A T04 5-Lead SC70, EIAJ SC-88a, 1.25mm Wide 250 Units on Tape and Reel
NC7ST04P5X MAA05A T04 5-Lead SC70, EIAJ SC-88a, 1.25mm Wide 3k Units on Tape and Reel

Pin Names Description

A Input
Y Output

NC No Connect

Y = A

Input Output

AY

LH
HL

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NC7ST04

Absolute Maximum Ratings(Note 1) Recommended Operating

Conditions

(Note 2)

Note 1: Absolute Maximum Ratings a re those va lues beyon d which d am­age to the device may occu r. The databook specificati ons should be met ,
without exception, t o ensure that the system design is reliab le over its
power supply, temperature, an d output/input loading variables. Fairc hild
does not recom mend op eration of circuits o utside th e databoo k specific a­tions.

Note 2: Unused inputs must be held HIGH or LOW. They ma y not float.

DC Electrical Characteristics

Supply Voltage (VCC) −0.5V to +7.0V
DC Input Diode Current (I

IK

)

V

IN

< −0.5V −20 mA

V

IN

≥ VCC + 0.5V +20 mA

DC Input Voltage (V

IN

) −0.5V to VCC +0.5V

DC Output Diode Current (I

OK

)

V

OUT

< −0.5V −20 mA

V

OUT

> VCC + 0.5V +20 mA

Output Voltage (V

OUT

) −0.5V to VCC +0.5V

DC Output Source or Sink

Current (I

OUT

) ±12.5 mA

DC V

CC

or Ground Current per

Supply Pin (I

CC

or I

GND

) ±25 mA

Storage Temperature (T

STG

) −65°C to +150°C

Junction Temperature (T

J

)150°C

DC V

CC

or Ground Current per

(Soldering, 10 seconds) 260

°C

Power Dissipation (P

D

) @ +85°C

SOT23-5 200 mW
SC70-5 150 mW

Supply Voltage 4.5V–5.5V

Input Voltage (V

IN

)0V–V

CC

Output Voltage (V

OUT

)0V–V

CC

Operating Temperature (TA) −40°C to +85°C
Input Rise and Fall Time (t

r

, tf)

V

CC

= 5.0V 0–500 ns

Thermal Resistance (

θ

JA

)

SOT23-5 300

°C/W

SC70-5 425

°C/W

Symbol Parameter

V

CC

T

A

= +25°CT

A

= −40°C to +85°C

Units Conditions

(V)MinTypMaxMinMax

V

IH

HIGH Level Input Voltage 4.5–5.5 2.0 2.0 V

V

IL

LOW Level Input Voltage 4.5–5.5 0.8 0.8 V

V

OH

HIGH Level Output Voltage 4.5 4.4 4.5 4.4 V IOH = −20 µA, VIN = VIL,

4.5 4.18 4.35 4.13 V IOH = −2 mA

V

OL

LOW Level Output Voltage 4.5 0 0.1 0.1 V IOL = 20 µA, VIN = VIH,

4.5 0.10 0.26 0.33 V I

OL

= 2 mA

I

IN

Input Leakage Current 5.5 ±0.1 ±1.0 µA0 ≤ VIN ≤ 5.5V

I

CC

Quiescent Supply Current 5.5 1.0 10.0 µAVIN = VCC or GND

I

CCTICC

per Input 5.5 2.0 2.9 mA Input VIN = 0.5V or 2.4V

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NC7ST04

AC Electrical Characteristics

Note 3: CPD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (I

CCD

) at no output

loading and operating at 50% duty cycle. (See Figure 2.) C

PD

is related to I

CCD

dynamic operating cu rrent by the expression:

I

CCD

= (CPD) (VCC) (fIN) + (I

CCstatic

).

AC Loading and Waveforms

CL includes load and str ay capacitance
Input PR R = 1.0 MHz, t

w

= 500 ns

FIGURE 1. AC Test Circuit

Input = AC Waveform ; PRR = Variable; Duty Cycle = 50%

FIGURE 2. I

CCD

Test Circuit

FIGURE 3. AC Waveforms

Symbol Parameter

V

CC

TA = +25°CT

A

= −40°C to +85°C

Units Conditions Fig. No.

(V)MinTypMaxMinMax

t

PLH

, Propagation Delay

5.0

3.5 12
ns C

L

= 15 pF

Figures

1, 3

t

PHL

6.0 17

4.5

6.2 16 20

ns C

L

= 50 pF

11.4 27 31

5.5

4.3 14 18

11.1 26 30

t

TLH

, Output Transition Time 5.0 4 10 ns CL = 15 pF

Figures

1, 3

t

THL

4.5 11 25 31
ns CL = 50 pF

5.5 10 21 26

C

IN

Input Capacitance Open 2 10 pF

C

PD

Power Dissipation Capacitance 5.0 6 pF (Note 3) Figure 2