Fairchild Semiconductor NC7S00P5, NC7S00M5X, NC7S00M5, NC7S00CW, NCWZ00P8X Datasheet
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© 2000 Fairchild Semiconductor Corporation DS012138 www.fairchildsemi.com
October 1995
Revised June 2000
NC7S00 TinyLogic
HS 2-Input NAND Gate
NC7S00
TinyLogic
HS 2-Input NAND Gate
General Description
The NC7S00 is a sing le 2-Input high perfor mance CMOS
NAND Gate. Advanced Silicon Gate CMOS fabrication
assures high speed and low po wer cir cuit oper ation ove r a
broad V
CC
range. ESD protecti on diodes inhe rently guard
both inputs and outpu t with respect to the V
CC
and GND
rails. Three stages of gain between inputs and output
assures high noise immunity and reduced sensitivity to
input edge rate.
Features
■ Space saving SOT23 or SC70 5-lead package
■ High speed: t
PD
3.5 ns typ
■ Low Quiescent Power: I
CC
< 1 µA
■ Balanced Output Drive: 2 mA I
OL
, −2 mA I
OH
■ Broad VCC Operating Range: 2V−6V
■ Balanced Propagation Dela ys
■ Specified for 3V operation
Ordering Code:
Logic Symbol
IEEE/IEC
Connection Diagram
(Top View)
Pin Descriptions Function Table
H = HIGH Logic Level
L = LOW Logic Level
TinyLogic is a trademark of Fairchild Semiconductor Co rporation.
Order Number
Package Product Code
Package Descript ion Supplied As
Number Top Mark
NC7S00M5 MA05B 7S00 5-Lead SOT23, JEDEC MO-178, 1.6mm 250 Units on Tape and Reel
NC7S00M5X MA05B 7S00 5-Lead SOT23, JEDEC MO-178, 1.6mm 3k Units on Tape and Reel
NC7S00P5 MAA05A S00 5-Lead SC70, EIAJ SC-88a, 1.25mm Wide 250 Units on Tape and Reel
NC7S00P5X MAA05A S00 5-Lead SC70, EIAJ SC-88a, 1.25mm Wide 3k Units on Tape and Reel
Pin Names Description
A, B Input
Y Output
Y = AB
Inputs Output
ABY
LLH
LHH
HLH
HHL
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NC7S00
Absolute Maximum Ratings(Note 1) Recommended Operating
Conditions
(Note 2)
Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power
supply, temperature, and ou tput/inp ut loadi ng varia bles. Fairchild does no t
recommend operat ion of circuits outside the dat abook specifications.
Note 2: Unused inputs must be held HIGH or LOW. They ma y not float.
DC Electrical Characteristics
Supply Voltage (VCC) −0.5V to +7.0V
DC Input Diode Current (I
IK
)
@V
IN
≤ −0.5V −20 mA
@V
IN
≥ VCC + 0.5V +20 mA
DC Input Voltage (V
IN
) −0.5V to V
CC
+ 0.5V
DC Output Diode Current (I
OK
)
@V
OUT
< −0.5V −20 mA
@V
OUT
> VCC + 0.5V +20 mA
DC Output Voltage (V
OUT
) −0.5V to V
CC
+ 0.5V
DC Output Source
or Sink Current (I
OUT
) ±12.5 mA
DC V
CC
or Ground Current
per Output Pin (I
CC
or I
GND
) ±25 mA
Storage Temperature (T
STG
) −65°C to +150°C
Junction Temperature (T
J
)150°C
Lead Temperature (T
L
);
(Soldering, 10 seconds) 260
°C
Power Dissipation (P
D
) @ +85°C
SOT23-5 200 mW
SC70-5 150 mW
Supply Voltage (V
CC
)2.0V−6.0V
Input Voltage (V
IN
)0V−V
CC
Output Voltage (V
OUT
)0V−V
CC
Operating Temperature (TA) −40°C to +85°C
Input Rise and Fall Time (t
r
, tf)
V
CC
@ 2.0V 0−1000 ns
V
CC
@ 3.0V 0−750 ns
V
CC
@ 4.5V 0−500 ns
V
CC
@ 6.0V 0−400 ns
Thermal Resistance (
θ
JA
)
SOT23-5 300
°C/W
SC70-5 425
°C/W
Symbol Parameter
V
CC
TA=+25°CT
A
=−40°Cto+85°C
Units Conditions
(V) Min Typ Max Min Max
V
IH
HIGH Level Input Voltage 2.0 1.50 1.50
V
3.0 - 6.0 0.7V
CC
0.7V
CC
V
IL
LOW Level Input Voltage 2.0 0.50 0.50
V
3.0 - 6.0 0.3V
CC
0.3V
CC
V
OH
HIGH Level Output Voltage 2.0 1.90 2.0 1.90
V
3.02.903.0 2.90 I
OH
= −20 µA
4.54.404.5 4.40 V
IN
= V
IL
6.05.906.0 5.90
V
V
IN
= V
IL
3.0 2.68 2.85 2.63 IOH = −1.3 mA
4.5 4.18 4.35 4.13 IOH = −2 mA
6.0 5.68 5.85 5.63 IOH = −2.6 mA
V
OL
LOW Level Output Voltage 2.0 0.0 0.10 0.10
V
3.0 0.0 0.10 0.10 IOL = 20 µA
4.5 0.0 0.10 0.10 VIN = V
IH
6.0 0.0 0.10 0.10
V
VIN = V
IH
3.0 0.1 0.26 0.33 IOL = 1.3 mA
4.5 0.1 0.26 0.33 IOL = 2 mA
6.0 0.1 0.26 0.33 IOL = 2.6 mA
I
IN
Input Leakage Current 6.0 ±0.1 ±1.0 µAVIN = VCC, GND
I
CC
Quiescent Supply Current 6.0 1.0 10.0 µAVIN = VCC, GND
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NC7S00
AC Electrical Characteristics
Note 3: CPD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (I
CCD
) at no output
loading and operating at 50% duty cycle. (See Figure 2.) C
PD
is related to I
CCD
dynamic operating cu rrent by the expression:
I
CCD
= (CPD) (VCC) (fIN) + (ICCstatic).
AC Loading and Waveforms
CL includes load and str ay capacitance
Input PR R = 1.0 MHz, t
w
= 500 ns
FIGURE 1. AC Test Circuit
Input = AC Waveform ;
PRR = variable; Duty Cycle = 50%
FIGURE 2. I
CCD
Test Circuit
FIGURE 3. AC Waveforms
Symbol Parameter
V
CC
TA = +25°CT
A
= −40°C to +85°C
Units Conditions Fig. No.
(V) Min Typ Max Min Max
t
PLH
, Propagation Delay 5.0 3.5 15 ns CL = 15 pF
Figures
1, 3
t
PHL
2.0 19 100 125
ns CL = 50 pF
3.0 10.5 27 35
4.5 7.5 20 25
6.0 6.5 17 21
t
TLH
, Output Transition Time 5.0 3.0 10 ns CL = 15 pF
Figures
1, 3
t
THL
2.0 25 125 155
ns CL = 50 pF
3.0 16 35 45
4.5 11 25 31
6.0 9 21 26
C
IN
Input Capacitance Open 2 10 10 pF
C
PD
Power Dissipation Capacitance 5.0 6 pF (Note 3) Figure 2
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