Fairchild Semiconductor IRLU120A Datasheet
IRLR/U120A
BV
DSS
= 100 V
R
DS(on)
= 0.22Ω
ID = 8.4 A
100
8.4
5
29
±
20
94
8.4
3.5
6.5
2.5
35
0.28
- 55 to +150
300
3.5
50
110
--
--
--
1
♦
Avalanche Rugged Technology
♦
Rugged Gate Oxide Technology
♦
Lower Input Capacitance
♦
Improved Gate Charge
♦
Extended Safe Operating Area
♦
Lower Leakage Current: 10µA (Max.) @ V
DS
= 100V
♦
Lower R
DS(ON)
: 0.176Ω (Typ.)
$GYDQF HG 3RZH U 026)(7
Thermal Resistance
Junction-to-Case
Junction-to-Ambient
Junction-to-Ambient
R
θ
JC
R
θJA
R
θJA
°C/W
Characteristic Max. UnitsSymbol Typ.
FEATURES
*
*
When mounted on the minimum pad size recommended ( PC B Mount).
Absolute Maximum Ratings
Drain-to-Source Voltage
Continuous Drain Current (T
C
=25°C)
Continuous Drain Current (T
C
=100°C)
Drain Current-Pulsed
(1)
Gate-to-Source Volta ge
Single Pulsed Avalanche Energy
(2)
Avalanche Current
(1)
Repetitive Avalanche Energy
(1)
Peak Diode Recovery dv/dt
(3)
Total Power Dissipation (TA=25°C)
Total Power Dissipation (T
C
=25°C)
Linear Derating Factor
Operating Junction and
Storage Temperature Range
Maximum Lead Temp. for Soldering
Purposes, 1/8
from case for 5-seconds
Characteristic Value UnitsSymbol
I
DM
V
GS
E
AS
I
AR
E
AR
dv/dt
P
D
I
D
T
J
, T
STG
T
L
A
V
mJ
A
mJ
V/ns
W
W
W/°C
A
°C
V
DSS
V
*
D-PAK
1. Gate 2. Drain 3. Source
1
2
3
I-PAK
1
3
2
©1999 Fairchild Semiconductor Corporation
Rev. B
IRLR/U120A
100
--
1.0
--
--
--
--
--
0.01
--
--
--
--
--
90
39
5
10
19
9
10.2
1.7
6.0
--
--
2.0
100
-100
10
100
0.22
-440
115
50
20
30
50
30
15
--
--
7.5
340
--
--
--
98
0.34
8.4
29
1.5
--
--
Notes;
(1) Repetitive Rating: Pu lse Width Limited by Maximum Junction Temperatu re
(2) L=2mH, I
AS
=8.4A, VDD=25V, RG=27Ω, Starting TJ =25°C
(3) I
SD
≤
9.2A, di/dt ≤ 300A/µs, V
DD
≤
BV
DSS
, Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essent ially Independent of Operati ng Temperature
2
1&+$11(/
32:(5 026)(7
Electrical Characteristics
(TC=25°C unless otherwise specified)
Drain-Source Breakdown Voltage
Breakdown Voltage Temp. Coeff.
Gate Threshold Voltage
Gate-Source Leakage , Forwar d
Gate-Source Leakage , Revers e
CharacteristicSymbol
Max. UnitsTyp.Min. Test Condition
Static Drain-Source
On-State Resistance
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain (
Miller ) Charge
g
fs
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
Q
g
Q
gs
Q
gd
BV
DSS
∆BV/∆T
J
V
GS(th)
R
DS(on)
I
GSS
I
DSS
V
V/°C
V
nA
µ
A
Ω
Ω
pF
ns
nC
--
--
--
--
--
--
--
--
--
--
--
--
--
V
GS
=0V,ID=250µA
I
D
=250µA
See Fig 7
VDS=5V,ID=250µA
V
GS
=20V
V
GS
=-20V
V
DS
=100V
V
DS
=80V,TC=125°C
V
GS
=5V,ID=4.2A
(4)
VDS=40V,ID=4.2A
(4)
VDD=50V,ID=9.2A,
R
G
=9
Ω
See Fig 13
(4) (5)
VDS=80V,VGS=5V,
I
D
=9.2A
See Fig 6 & Fig 12
(4) (5)
Drain-to-Source Leakage Current
V
GS
=0V,VDS=25V,f =1MHz
See Fig 5
Source-Drain Diode Ratings and Characteristics
Continuous Source Current
Pulsed- S o u rce Curren t
(1)
Diode Forward Voltage
(4)
Reverse Recove ry Tim e
Reverse Recovery Ch arge
I
S
I
SM
V
SD
t
rr
Q
rr
CharacteristicSymbol Max. UnitsTyp.Min. Test Condition
--
--
--
--
--
A
V
ns
µ
C
Integral reverse pn-diode
in the MOSFET
T
J
=25°C,IS=8.4A,VGS=0V
T
J
=25°C,IF=9.2A
di
F
/dt=100A/Ωs
(4)
IRLR/U120A
10
-1
10
0
10
1
10
-1
10
0
10
1
@ Notes :
1. 250 µs Pulse Test
2. TC = 25 oC
V
GS
Top : 7.0 V
6 .0 V
5 .5 V
5 .0 V
4 .5 V
4 .0 V
3 .5 V
Bottom : 3.0 V
I
D
, Drain C urrent [A]
VDS , Drain-S ource Voltage [V]
0 10203040
0.0
0.1
0.2
0.3
0.4
@ Note : TJ = 25 oC
VGS = 10 V
VGS = 5 V
R
DS(on)
, [
Ω
]
Drain-Sour ce On-Resistance
ID , Drain C urrent [A]
024681012
0
2
4
6
VDS = 80 V
VDS = 50 V
VDS = 20 V
@ Notes : ID = 9.2 A
V
GS
, Gate-Source Voltage [V]
QG , Total Gate Charge [nC]
0246810
10
-1
10
0
10
1
25 oC
150 oC
- 55 oC
@ Note s :
1. V
GS
= 0 V
2. V
DS
= 40 V
3. 2 50
µ
s Puls e Test
I
D
, Drain Current [A]
VGS , Gate-Source Voltage [V]
0.40.60.81.01.21.41.61.82.02.2
10
-1
10
0
10
1
150 oC
25 oC
@ Notes :
1. V
GS
= 0 V
2. 250
µ
s Pulse Test
I
DR
, Reverse Drain Current [A]
VSD , Source-Drain Voltage [V]
10
0
10
1
0
120
240
360
480
600
C
iss
= Cgs+ Cgd ( Cds= shorted )
C
oss
= Cds+ C
gd
C
rss
= C
gd
@ Notes :
1. V
GS
= 0 V
2. f = 1 MHz
C
rss
C
oss
C
iss
Capacitanc e [pF]
VDS , Drain-S ource Voltage [V]
3
1&+$11(/
32:(5 026)(7
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
Fig 6. Gate Charge vs. Gate-Source VoltageFig 5. Capacitance vs. Drain-Source Voltage
Fig 4. Source-Drain Diode Forward VoltageFig 3. On-Resistance vs. Drain Current
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