Fairchild Semiconductor ILC7083 Datasheet
www.fairchildsemi.com
ILC7083/ILC7084
150mA SOT-23 Low Noise CMOS RF-LDO™
Regulator
Features
• Ultra low 1mV dropout per 1mA load
• 3% output voltage accuracy
• Only 40µV
• Uses low ESR ceramic output capacitor to minimize noise
and output ripple
• Only 100µA ground current at 100mA load
• Ripple rejection up to 85dB at 1kHz, 60dB at 1MHz
• Excellent line and load transient response
• Over current / over temperature protection
• Guaranteed to 150mA output current
• Industry standard five lead SOT-23 package
• Fixed 2.5V, 2.7V, 2.85V, 3.0V, 3.3V, 3.6V, 5V output
voltage for ILC7083 and adjustable output voltage for
ILC7083/ILC7084
• Metal mask option available for custom voltages between
2.5V and 5.1V
RMS
noise
Applications
• Cellular phones
• Wireless communicators
• PDAs / palmtops / organizers
• Battery powered portable electronics
Description
The ILC7083/ILC7084 is a 150mA low dropout (LDO)
voltage regulator designed to provide a high performance
solution to low power systems. The device offers a typical
combination of low dropout and low quiescent current
expected of CMOS parts, while uniquely providing the low
noise and high ripple rejection characteristics usually only
associated with bipolar LDO regulators.
The device has been optimized to meet the needs of modern
wireless communications design; Low noise, low dropout,
small size, high peak current, high noise immunity.
The ILC7083/ILC7084 is designed to make use of low cost
ceramic capacitors while outperforming other devices that
require tantalum capacitors.
As opposed to ILC7084, the ILC7083 has a built in output
capacitor discharge circuit active in shutdown mode. This
feature is necessary in applications where the output voltage
must decrease quickly to zero volt in shutdown mode.
Typical Applications
V
OUT
C
OUT
V
IN
C
IN
54
SOT-23-5
C
ILC7083
12
3
NOISE
ON
OFF
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ILC7083/ILC7084
Pin Assignments
Fixed Voltage Option
GND
1
ON/OFF
V
V
IN
IN
2
ILC7083-xx
3
4
SOIC-8
Pin Description ILC7083-xx
C
8
NOISE
N/C
7
V
6
OUT
V
5
OUT
V
OUT
5 4
ILC7083-xx
1
2 3
VINGND
SOT-23-5
C
NOISE
ON/OFF
(Fixed voltage version)
Pin Number
Pin Name Pin DescriptionSOIC-8 SOT-23-5
3 and 4 1 V
IN
Connect directly to supply
1 2 GND Ground pin. Local ground for C
2 3 ON/OFF
84C
NOISE
By applying less than 0.6V to this pin the device will be turned off.
Optional noise bypass capacitor may be connected between this pin and
GND. Do not connect C
5 and 6 5 V
OUT
Output Voltage. Connect C
7 – N/C Not Connected
Adjustable Voltage Option
1
V
OUT
5 4
ILC7083ADJ
or ILC7084ADJ
1 2 3
VINGND
SOT-23-5
V
ADJ
ON/OFF
GND
ON/OFF
V
V
2
3
IN
4
IN
and C
NOISE
directly to the main power ground plane.
NOISE
between this pin and GND.
OUT
OUT
.
ILC7083ADJ
SOIC-8
V
8
ADJ
N/C
7
V
6
OUT
V
5
OUT
Pin Description ILC7083-ADJ
(Adjustable voltage version)
Pin Number
Pin Name Pin DescriptionSOIC-8 SOT-23-5
3 and 4 1 V
IN
Connect directly to supply
1 2 GND Ground pin. Local ground for C
2 3 ON/OFF
84V
ADJ
By applying less than 0.6V to this pin the device will be turned off.
Voltage feedback pin to set the adjustable output voltage. Do not connect a
capacitor to this pin.
5 and 6 5 V
OUT
Output Voltage. Connect C
7 – N/C Not Connected
and C
NOISE
between this pin and GND.
OUT
OUT
.
2
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Internal Block Diagram
ILC7083/ILC7084
V
IN
C
NOISE
BANDGAP
REFERENCE
V
REFD
AMPLIFIER
GND
ON/OFF
Absolute Maximum Ratings
Parameter Symbol Ratings Units
Input Voltage
Input Voltage
On/Off
Output Current I
Output Voltage V
Package Power Dissipation (SOT-23-5) P
Maximum Junction Temp Range T
Storage Temperature T
Package Thermal Resistance
ERROR
V
V
ON/OFF
OUT
J(max)
θ
IN
OUT
D
STG
JA
INTERNAL V
FEEDBACK
DD
TRANS-
CONDUCTANCE
AMPLIFIER
V
OUT
-0.3 to +13.5
-0.3 to V
IN
Short circuit protected mA
-0.3 to V
+ 0.3 V
IN
250 (Internally Limited) mW
-40 to +150 °C
-40 to +125 °C
333 °C/W
V
Recommended Operating Conditions
Parameter Min. Typ. Max. Units
Input Voltage V
Operating Ambient Temperature –40 +85 °C
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OUT
+ V
DO
V
+ 1 13 V
OUT
3
2
ILC7083/ILC7084
-4
+4
∆
* ∆
2
35
Electrical Characteristics ILC7083/ILC7084
Unless otherwise specified, all limits are at T
Boldface type denotes specifications which apply over the specified operating temperature range.
Parameter Symbol Conditions Min Typ Max Units
Input Voltage Range V
Output Voltage V
Feedback Voltage
V
(ADJ version)
Line Regulation
Dropout Voltage
(V
V
OUT
– V
V
IN
(Note 3)
Ground Pin Current I
Shutdown (OFF) Current I
ON/OFF
ON/OFF
Input Voltage V
Pin Input
GND
ON/OFF
ON/OFF
I
IN( ON/OFF)
Current
Peak Output Current
I
OUT(peak)
(Note 4)
Output Noise Voltage (RMS) eN BW = 300Hz to 50kHz, C
Ripple Rejection
Dynamic Line Regulation
Dynamic Load Regulation ∆V
V
OUT
V
OUT(line)
OUT(load)IOUT
Short Circuit Current I
Notes:
1. Absolute maximum ratings indicate limits which when exceeded may result in damage to the component. Electrical specifications do not apply
when operating the device outside of its rated operating conditions.
2. Specified Min/Max limits are production tested or guaranteed through correlation based on statistical control methods.
Measurements are taken at constant junction temperature as close to ambient as possible using low duty pulse testing.
3. Dropout voltage is defined as the input to output differential voltage at which the output voltage drops 2% below the nominal value measured
with an IV differential.
4. Guaranteed by design.
IN
OUT
ADJ
OUT
SC
=25°C; V
A
1mA < I
1mA <
/
V
V
OUT
OUT(NOM)
)
IN
I
OUT
I
OUT
I
OUT
I
OUT
I
OUT
I
OUT
I
OUT
I
OUT
I
OUT
I
OUT
V
ON/OFF
High = Regulator On
Low = Regulator Off
V
ON/OFF
V
ON/OFF
V
OUT
tpw = 2ms
C
NOISE
I
OUT
V
C
IN
OUT
I
OUT
V
IN
V
OUT(NOM)
tr/tf = 2µs; I
V
OUT
IN
= V
OUT(NOM)
+1V, I
= 1mA, C
OUT
OUT
= 1µF, V
ON/OFF
= 2V.
213
< 150mA -3 V
OUT
I
150mA
<
OUT
V
+1V <
12V 0.007 0.014
<
IN
1.217
1.204
OUT(NOM)
V
OUT(NOM)
1.255 1.292
+3 %V
(NOM)
1.305
0.032
= 0mA (Note 4) 0.1 1
= 10mA 10 25
= 50mA 50 75
100
= 100mA 100 150
200
= 150mA 150 225
300
= 0mA 95 200
220
= 10mA 100 220
240
= 50mA 100 220
240
= 100mA 100 240
260
= 150mA 115 260
280
= 0V 0.1
1.5
0.6
= 0.6V, regulator OFF
= 2V, regulator ON
0.95V
>
OUT(NOM)
= 0.01µF, C
,
OUT
= 1µF
IN
= 2.2µF,
400 500 mA
0.3
1
40 µV
= 10mA
= 4.7µF,
= 100mA
Freq. = 1kHz 85 dB
Freq. = 10kHz 70
Freq. = 1MHz 60
: V
OUT(NOM)
+ 1V to
14 mV
+ 2V,
= 150mA
OUT
: 1mA to 150mA; tr < 5µS 40 mV
= 0V 600 mA
V
OUT
V
%/V
mV
µA
µA
µA
RMS
∆
/ ∆
∆
4
REV. 1.0.9 1/28/03
Operation
The ILC7083/ILC7084 LDO design is based on an advanced
circuit configuration for which patent protection has been
applied. Typically it is very difficult to drive a capacitive output with an amplifier. The output capacitance produces a
pole in the feedback path, which upsets the carefully tailored
dominant pole of the internal amplifier. Traditionally the
pole of the output capacitor has been “eliminated” by reducing the output impedance of the regulator such that the pole
of the output capacitor is moved well beyond the gain bandwidth product of the regulator. In practice, this is difficult to
do and still maintain high frequency operation. Typically the
output impedance of the regulator is not simply resistive,
such that the reactive output impedance interacts with the
reactive impedance of the load resistance and capacitance.
In addition, it is necessary to place the dominant pole of
the circuit at a sufficiently low frequency such that the gain
of the regulator has fallen below unity before any of the
complex interactions between the output and the load occur.
The ILC7083/ILC7084 does not try to eliminate the output
pole, but incorporates it into the stability scheme. The load
and output capacitor forms a pole, which rolls off the gain of
the regulator below unity. In order to do this the output
impedance of the regulator must be high, looking like a
current source. The output stage of the regulator becomes a
transconductance amplifier, which converts a voltage to a
current with a substantial output impedance. The circuit
which drives the transconductance amplifier is the error
amplifier, which compares the regulator output to the band
gap reference and produces an error voltage as the input to
the transconductance amplifier. The error amplifier has a
dominant pole at low frequency and a “zero” which cancels
out the effects of the pole. The zero allows the regulator
to have gain out to the frequency where the output pole
continues to reduce the gain to unity. The configuration of
the poles and zero are shown in Figure 1. Instead of powering the critical circuits from the unregulated input voltage,
the CMOS RF LDO powers the internal circuits such as the
bandgap, the error amplifier and most of the transconductance amplifier from the boot strapped regulated output
voltage of the regulator. This technique offers extremely high
ripple rejection and excellent line transient response.
ILC7083/ILC7084
DOMINANT POLE
85 dB
OUTPUT POLE
GAIN
COMPENSATING
ZERO
UNITY GAIN
FREQUENCY
Figure 1. ILC7083/ILC7084 RF LDO Frequency Response
A block diagram of the regulator circuit used in the ILC7083
is shown in Figure 2, which shows the input-to-output isolation and the cascaded sequence of amplifiers that implement
the pole-zero scheme outlined above.
The ILC7083/ILC7084 is designed in a CMOS process with
some minor additions, which allow the circuit to be used at
input voltages up to 13V. The resulting circuit exceeds the
frequency response of traditional bipolar circuits. The
ILC7083/ILC7084 is very tolerant of output load conditions
with the inclusion of both short circuit and thermal overload
protection. The device has a very low dropout voltage,
typically a linear response of 1mV per milliamp of load
current, and none of the quasi-saturation characteristics of a
bipolar output devices. All the good features of the frequency
response and regulation are valid right to the point where the
regulator goes out of regulation in a 4 millivolt transition
region. Because there is no base drive, the regulator is
capable of providing high current surges while remaining in
regulation. This is shown in the high peak current of 500mA
which allows for the ILC7083/ILC7084 to be used in
systems that require short burst mode operation.
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