Fairchild Semiconductor HUFA75307T3ST Datasheet

Data Sheet December 2001

HUFA75307T3ST

2.6A, 55V, 0.090 Ohm, N-Channel UltraFE T
Power MOSFET

This N-Channel po wer MOSFET is
manufactured using the innovative
UltraFET® process. This advanced

process technology achieves the
lowest possible on-resistance per silicon area, resulting in
outstanding performance. This device is capable of
withstanding high energy in the avalanche mode and the
diode exhibits very low reverse recovery time and stored
charge. It was designed for use in applications where power
efficiency is important, such as switching regulators,
switching converters, motor drivers, relay drivers, low­voltage bus switches, and power management in portab le
and battery-operated products.

Formerly developmental type TA75307.

Ordering Information

PART NUMBER PACKAGE BRAND

HUFA75307T3ST SOT-223 5307

NOTE: HUFA75307T3ST is available only in tape and reel.

Features

•2.6A, 55V

• Ultra Low On-Resistance, r

DS(ON)

= 0.090Ω

• Diode Exhibits Both High Speed and Soft Recovery

• Temperature Compensating PSPICE

®

Model

• Thermal Impedance SPICE Model

• Peak Cu rrent vs Pulse Width Curve

• UIS Rating Curve

• Related Literature

- TB334, “Guidelines f or Solde ring Surface Mount
Components to PC Boards”

Symbol

D

G

S

Packaging

SOT-223

DRAIN
(FLANGE)

GATE

DRAIN
SOURCE

This product has be en desi gned t o mee t t he ex tre me test con diti ons a nd e nviro nment dema nded by the autom otive indu str y. Fo r a copy

Reliability data can be found at: http://www.fairchildsemi.com/products/discrete/reliability/index.html.

All Fairchild semiconductor products are manufactured, assembled and tested under ISO9000 and QS9000 quality systems certification.

of the requirements, see AEC Q101 at: http://www.aecouncil.com/

©2001 Fairchild Semiconductor Corpo ration HUFA75307T3ST Rev. B

HUFA75307T3ST

Absolute Maximum Ratings

TA = 25oC, Unless Otherwise Specified

UNITS

Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

Drain to Gate Voltage (R

Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

= 20kΩ) (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

GS

Drain Current

Continuous (Figure 2) (Note 2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Pulsed Avalanche Rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E

Power Dissipation (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P

DSS

DGR

GS

D

DM

AS

D

Derate Above 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

Maximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

Package Body for 10s, See Techbrief 334. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

CAUTION: Stresses above those listed in “A bsolute Maximu m Rating s” may cause per manent d amage to t he device. This is a str ess on ly rating and operation o f the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

, T

J

STG

L

pkg

55 V
55 V

±20V V

2.6

Figure 5

Figures 6, 14, 15

1.1

9.09

-55 to 150
300

260

A

W

mW/oC

o

C

o

C

o

C

NOTE:

= 25oC to 125oC.

1. T

J

Electrical Specifications

TA = 25oC, Unless Otherwise Specified

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Drain to Source Breakdown Voltage BV
Gate to Source Threshold Voltage V

GS(TH)VGS

Zero Gate Voltage Drain Current I

Gate to Source Leakage Current I
Drain to Source On Resistance r

DS(ON)ID

Turn-On Time t
Turn-On Delay Time t

d(ON)

Rise Time t
Turn-Off Delay Time t

d(OFF)

Fall Time t
Turn-Off Time t
Total Gate Charge Q

g(TOT)VGS

Gate Charge at 10V Q
Threshold Gate Charge Q

DSSID

DSS

GSS

ON

r

f

OFF

g(10)

g(TH)

= 250µA, VGS = 0V (Figure 11) 55 - - V

= VDS, ID = 250µA (Figure 10) 2 - 4 V
VDS = 50V, VGS = 0V - - 1 µA
V

= 45V, VGS = 0V, TA = 150oC - - 250 µA

DS

VGS = ±20V - - 100 nA

= 2.6A, VGS = 10V) (Figure 9) - 0.070 0.090 Ω

VDD = 30V, ID ≅ 2.6A,

= 11.5Ω, VGS = 10V,

R

L

= 25Ω

R

GS

- - 55 ns

-5-ns

-30-ns

-35-ns

-25-ns

- - 90 ns

= 0V to 20V VDD = 30V,

≅ 2.6A,

I

VGS = 0V to 10V - 8.3 10 nC
VGS = 0V to 2V - 0.6 0.8 nC

D

R

= 11.5Ω

L

I

= 1.0mA

g(REF)

(Figure 13)

-1417nC

Gate to Source Gate Charge Qgs - 1.00 - nC
Gate to Drain “Miller” Charge Qgd - 4.00 - nC
Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C
Thermal Resistance Junction to Ambient R

ISS
OSS
RSS

θJA

VDS = 25V, VGS = 0V,
f = 1MHz
(Figure 12)

Pad Area = 0.171 in2 (see note 2) - - 110
Pad Area = 0.068 in
Pad Area = 0.026 in

2

- - 128

2

- 250 - pF

- 115 - pF

-30-pF

o

C/W

o

C/W

- - 147

o

C/W

Source to Drain Diode Specifications

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Source to Drain Diode Voltage V

SD

Reverse Recovery Time t
Reverse Recovered Charge Q

RR

NOTE:

o

2. 110

©2001 Fairchild Semiconductor Corpo ration HUFA75307T3ST Rev. B

C/W measured using FR-4 board with 0.171in2 footprint for 1000s.

ISD = 2.6A - - 1.25 V
ISD = 2.6A, dISD/dt = 100A/µs--40ns

rr

ISD = 2.6A, dISD/dt = 100A/µs--50nC

Typical Performance Curves

0

0

HUFA75307T3ST

1.2

1.0

0.8

0.6

0.4

0.2

POWER DISSIPATION MULTIPLIER

0

0 50 100 150

T

, AMBIENT TEMPERATURE (oC)

A

FIGURE 1. NORMALIZED POWER DISSIPATION vs AMBIENT

TEMPERATURE

10

DUTY CYCLE - DESCENDING ORDER

0.5

0.2

0.1

0.05

1

0.02

0.01

3.0
R

= 110oC/W

JA

θ

2.5

2.0

1.5

1.0

, DRAIN CURRENT (A)

D

I

0.5

0

25 50 75 100 125 15

TA, AMBIENT TEMPERATURE (oC)

FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs

AMBIENT TEMPERATURE

R

= 110oC/W

JA

θ

0.1

, NORMALIZED

JA

θ

Z

THERMAL IMPEDANCE

0.01

SINGLE PULSE

0.001

-5

10

-4

10

-3

10

-2

10

t, RECTANGULAR PULSE DURATION (s)

FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE

100

10

1

, DRAIN CURRENT (A)

0.1

D

I

OPERATION IN THIS
AREA MAY BE
LIMITED BY r

0.01
110100

DS(ON)

VDS, DRAIN TO SOURCE VOLTAGE (V)

V

DSS(MAX

TJ = MAX RATED

= 25oC

T

A

R

= 110oC/W

JA

θ

100µs

1ms

10ms

) = 55V

20

P

DM

t

1

t

NOTES:
DUTY FACTOR: D = t

PEAK TJ = PDM x Z

-1

10

30

0

10

1

10

TA = 25oC

θ

FOR TEMPERATURES
ABOVE 25
CURRENT AS FOLLOWS:

I

I

=

10

25

2

1/t2

x R

JA

+ T

JA

θ

2

10

o

C DERATE PEAK

150 - T

125

R

= 110oC/W

JA

θ

A

3

10

A

, PEAK CURRENT (A)

DM

I

1

-3

10

-2

10

-1

10

0

10

1

10

2

10

3

10

t, PULSE WIDTH (s)

FIGURE 4. FORWARD BIAS SAFE OPERAT ING AREA FIGURE 5. PEAK CURRENT CAPABILITY

©2001 Fairchild Semiconductor Corpo ration HUFA75307T3ST Rev. B