Fairchild Semiconductor HUF76137P3, HUF76137S3S Datasheet

HUF76137P3, HUF76137S3S

Data Sheet January 2003

75A, 30V, 0.009 Ohm, N-Channel, Logic
Level UltraFET Power MOSFETs

These N-Channel pow er MOSFETs
are manufactured using the
innovati ve UltraFET™ process.

This advanced process technology
achieves the lowest possible on-resistance per silicon ar ea,
resultin g in outstanding performance. This device is capab le
of withstanding hi gh energy in the avalanche mode and the
diode exhibits very low reverse recovery time and stored
charge. It was designed for use in appli cations where power
efficiency is important, such as switching regulators,
switchi ng converters, motor drivers, relay drivers , low­voltage bus switches, and power manage me nt i n po rtab le
and battery-operated products.

Formerly developmental ty pe TA76137.

Ordering Information

PART NUMBER PACKAGE BRAND

HUF76137P3 TO-220AB 76137P
HUF76137S3S TO-263AB 76137S

NOTE: When ordering, use the entire part number. Add the suffix T to
obtain the TO-263AB variant in tape and reel, e.g., HUF76137S3ST.

Features

• Logic Level Gate Drive

• 75A, 30V

• Ultra Low On-Resistance, r

DS(ON)

= 0.009Ω

• Temperatur e Compensating PSPICE™ Model

• Temperatur e Com pensating SABER™ Model

• Thermal Impedance SPICE Model

• Thermal Impedance SABER Model

• Peak Current vs Pulse Width Curve

• UIS Rating Curve

• Related Literature

- TB334, “Guidelines for Soldering Surface Mount
Components to PC Boards”

Symbol

D

G

S

Packaging

JEDEC TO-220AB JEDEC TO-263AB

SOURCE

DRAIN

DRAIN

GATE

(FLANGE)

©2003 Fairchild Semiconductor Corporation HUF76137P3, HUF76137S3S Rev. C1

GATE

SOURCE

DRAIN

(FLANGE)

HUF76137P3, HUF76137S3S

Absolute Maximum Ratings T

= 25oC, Unless Otherwise Specified

C

UNITS

Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

Drain to Gate Voltage (R

= 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

GS

Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

DSS

DGR

GS

30 V
30 V

±20 V

Drain Current

Continuous (T

Continuous (TC = 100oC, VGS = 5V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

= 25oC, VGS = 10V) (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I

C

Continuous (TC = 100oC, VGS = 4.5V) (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Pulsed Avalanche Rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E

Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P

Derate Above 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

, T

J

STG

D
D
D

DM

AS

D

75
55
52

Figure 4

Figures 6, 17, 18

145

1.16

-40 to 150

Maximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T

CAUTION: Stresses above those listed in “Absolute Maximum Rati ngs” may cause permane nt damage to the device. This is a stress only rating and oper ation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

L

pkg

300
260

A
A
A

W

W/oC

o

C

o

C

o

C

NOTE:

= 25oC to 150oC.

1. T

J

Electrical Specifications T

= 25oC, Unless Otherwise Specified

A

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

OFF STATE SPECIFICATIONS

Drain t o Source Breakdown Voltage BV
Zero Gat e V ol tag e D rain Curre nt I

Gate to Sour c e Le ak ag e C urr e nt I

ON STATE SPECIFICATIONS

Gate to Source Threshold Voltage V
Drain to Source On Resistance r

GS(TH)VGS

DS(ON)ID

THERMAL SPECIFICATIONS

Thermal R esis ta nc e Ju ncti on to Case R
Thermal Resistance Junction to Ambient R

SWITCHING SPECIFICATIONS

(V

GS

= 4.5V)
Turn-On Time t
Turn-On Delay Time t

d(ON)

Rise Time t
Turn-Off Delay Time t

d(OFF)

Fall Time t
Turn-Off Time t

DSSID

DSS

GSS

θJC
θJA

ON

r

f

OFF

= 250µA, VGS = 0V (Figure 12) 30 - - V
VDS = 25V, VGS = 0V - - 1 µA
V

= 25V, VGS = 0V, TC = 150oC--250µA

DS

VGS = ±20V - - ±100 nA

= VDS, ID = 250µA (Figure 11) 1 - 3 V

= 75A, VGS = 10V (Figures 9, 10) - 0.0075 0.009 Ω
I

= 55A, VGS = 5V (Figure 9) - 0.010 0.0125 Ω

D

I

= 52A, VGS = 4.5V (Figure 9) - 0.011 0.014 Ω

D

(Figure 3) - - 0.86
TO-22 0 and TO-263 - - 62

VDD = 15V, ID ≅ 52A,
R

= 0.289Ω, VGS = 4.5V,

L

R

= 5.1Ω

GS

(Figures 15, 21, 22)

--420ns

-20-ns

-260- ns

o
o

C/W
C/W

-28-ns

-38-ns

--100ns

©2003 Fairchild Semiconductor Corporation HUF76137P3, HUF76137S3S Rev. C1

HUF76137P3, HUF76137S3S

Electrical Specifications T

= 25oC, Unless Otherwise Specified (Continue d)

A

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

SWITCHING SPECIFICATIONS (VGS = 10V)

Turn-On Time t
Turn-On Delay Time t
Rise Time t
Turn-Off Delay Time t
Fall Time t
Turn-Off Time t

GATE CHARGE SPECIFICATIONS

Total Gate Charg e Q
Gate Charge at 5V Q
Threshold Gat e Ch arg e Q
Gate to Source Gate Charg e Q
Gate to Drai n “M ill er ” C ha r ge Q

CAPACITANCE SPECIFICATIONS

Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C

ON

d(ON)

d(OFF)

OFF

g(TOT)VGS

g(5)

g(TH)

ISS
OSS
RSS

VDD = 15V, ID ≅ 75A,
R
R
(Figures 16, 21, 22)

r

f

VGS = 0V to 5V - 31 40 nC
VGS = 0V to 1V - 2.2 2.9 n C

gs
gd

VDS = 25V, VGS = 0V,
f = 1MHz
(Figur e 13 )

= 0.20Ω, VGS = 10V,

L

= 5.6Ω

GS

= 0V to 10V VDD = 15V,

I

≅ 55A,

D

R

= 0.273Ω

L

I

g(REF)

(Figures 14, 19, 20)

--225ns

-10-ns

-140- ns

-45-ns

-35 -ns

--120ns

-5572nC

= 1.0mA

-6.00- nC

- 15.50 nC

- 2100 - pF

- 1050 - pF

-225- pF

Source to Drain Diode Specifications

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Source to Drain Diode Vol tage V
Reverse Recovery Time t
Reverse Recovered Charge Q

Typical Performance Curves

1.2

1.0

0.8

0.6

0.4

0.2

POWER DISSIPATION MULTIPLIER

0

0 25 50 75 100 150

TC, CASE TEMPERATURE (oC)

SD

rr

RR

ISD = 55A - - 1.25 V
ISD = 55A, dISD/dt = 100A/µs--77ns
ISD = 55A, dISD/dt = 100A/µs - - 143 nC

80

V

= 10V

GS

60

V

= 4.5V

GS

40

, DRAIN CURRENT (A)

20

D

I

125

0

25 50 75 100 125

TC, CASE TEMPERATURE (oC)

150

FIGURE 1. NORMALIZED PO WER DISSIPATION vs CASE

TEMPERATURE

©2003 Fairchild Semiconductor Corporation HUF76137P3, HUF76137S3S Rev. C1

FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs

CASE TEMPERATURE

HUF76137P3, HUF76137S3S

Typical Performance Curves (Continued)

2

DUTY CYCLE - DESCENDING ORDER

0.5

1

0.2

0.1

0.05

0.02

0.01

0.1

, NORMALIZED

JC

θ

Z

THERMAL IMPEDANCE

0.01
10

-5

SINGLE PULSE

-4

10

-3

10

FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE

-2

10

t, RECT ANGULAR PULSE DURATION (s)

NOTES:
DUTY FACTOR: D = t
PEAK TJ = PDM x Z

-1

10

P

DM

t

1

t

2

1/t2

x R

JC

θ

0

10

+ T

JC

C

θ

1

10

1000

100

2000

1000

VGS = 10V

, PEAK CURRENT (A)

DM

I

TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION

50

-5

10

VGS = 5V

-4

10

-3

10

t, PULSE WIDTH (s)

10

-2

FIGURE 4. PEAK CURRENT CAPABILITY

TJ = MAX RATED

= 25oC

T

C

100µs

1ms

2000
1000

100

TC = 25oC

FOR TEMPERATURES
ABOVE 25

o

CURRENT AS FOLLOWS:

I = I

25

-1

10

If R = 0
tAV = (L)(IAS)/(1.3*RATED BV

If R ≠ 0
t

= (L/R)ln[(IAS*R)/(1.3*RATED BV

AV

10

0

C DERATE PEAK

150 - T

C

125

- VDD)

DSS

- VDD) +1]

DSS

STARTING TJ = 25oC

1

10

10

, DRAIN CURRENT (A)

D

I

OPERATION IN THIS
AREA MAY BE
LIMITED BY r

1

DS(ON)

BV

DSS MAX

10

, DRAIN TO SOURCE VOLT AGE (V)

V

DS

= 30V

10ms

10

STARTING TJ = 150oC

, AVALANCHE CURRENT (A)

AS

I

1001

1

0.001

0.01

0.1

110100

tAV, TIME IN AVALANCHE (ms)

NO TE: Refer to Fairchild App lication Notes AN9321 and AN9322.

FIGURE 5. FORWARD BIAS SAFE OPERATING AREA

FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING

CAPABILITY

©2003 Fairchild Semiconductor Corporation HUF76137P3, HUF76137S3S Rev. C1