Fairchild Semiconductor HUF76132P3, HUF76132S3S Datasheet

HUF76132P3, HUF76132S3S

Data Sheet January 2003

75A, 30V, 0.011 Ohm, N-Channel, Logic
Level UltraFET Power MOSFETs

These N -Channe l powe r MOSFETs
are manufactured using the
innovative Ult r aF ET ™ pr ocess. T his

advanced process technolog y
achieves the lowest possible on-resistance per silicon ar ea,
resultin g in outstanding performance. This device is capab le
of withstanding hi gh energy in the avalanche mode and the
diode exhibits very low reverse recovery time and stored
charge. It was designed for use in appli cations where power
efficiency is important, such as switching regulators,
switchi ng converters, motor drivers, relay drivers , low­voltage bus switches, and power manage me nt i n po rtab le
and battery-operated products.

Formerly developmental ty pe TA76132.

Ordering Information

PART NUMBER PACKAGE BRAND

HUF76132P3 TO-220AB 76132P
HUF76132S3S TO-263AB 76132S

NOTE: When ordering, use the entire part number. Add the suffix T to
obtain the TO-263AB variant in tape and reel, e.g., HUF76132S3ST.

Features

• Logic Level Gate Drive

• 75A, 30V

• Ultra Low On-Resistance, r

• Temperatur e Compensating PSPICE

• Temperatur e Compensating SABER

DS(ON)

= 0.011Ω

®

Model

©

Model

• Thermal Impedance SPICE Model

• Thermal Impedance SABER Model

• Peak Current vs Pulse Width Curve

• UIS Rating Curve

• Related Literature

- TB334, “Guidelines for Soldering Surface Mount
Components to PC Boards”

Symbol

D

G

S

Packaging

DRAIN

(FLANGE)

JEDEC TO-220AB JEDEC TO-263AB

SOURCE

DRAIN

GATE

GATE

SOURCE

DRAIN

(FLANGE)

©2003 Fairchild Semiconductor Corporation HUF76132P3, HUF76132S3S Rev. C1

HUF76132P3, HUF76132S3S

Absolute Maximum Ratings T

= 25oC, Unless Otherwise Specified

C

UNITS

Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

Drain to Gat e Voltage (R

= 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

GS

Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

DSS

DGR

GS

30 V
30 V

±20 V

Drain Curr e nt

Continuous (T

Continuous (TC = 100oC, VGS = 5V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I

= 25oC, VGS = 10V) (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I

C

Continuous (TC = 100oC, VGS = 4.5V) (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I

Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Pulsed Avalanche Rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E

Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P

Derate Above 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

, T

J

STG

D
D
D

DM

AS

D

75
44
41

Figure 4

Figures 6, 17, 18

120

0.97

-40 to 150

Maximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

Package Body for 10s, See Techbrief 334. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T

CAUTION: Stresses above those listed in “Absolute Maximum Rati ngs” may cause permane nt damage to the device. This is a stress only rating and oper ation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

L

pkg

300
260

A
A
A

W

W/oC

o

C

o

C

o

C

NOTE:

= 25oC to 150oC.

1. T

J

Electrical Specifications T

= 25oC, Unless Otherwise Specified

A

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

OFF STATE SPECIFICATIONS

Drain t o Source Breakdown Voltage BV
Zero Gat e V ol tag e D rain Curre nt I

Gate to Sour c e Le ak ag e C urr e nt I

ON STATE SPECIFICATIONS

Gate to Source Threshold Voltage V
Drain to Source On Resistance r

GS(TH)VGS

DS(ON)ID

THERMAL SPECIFICATIONS

Thermal R esis ta nc e Ju ncti on to Case R
Thermal Resistance Junction to Ambient R
SWITCHING SPECIFICATIONS (VGS = 4.5V)
Turn-On Time t
Turn-On Delay Time t

d(ON)

Rise Time t
Turn-Off Delay Time t

d(OFF)

Fall Time t
Turn-Off Time t

DSSID

DSS

GSS

θJC
θJA

ON

r

f

OFF

= 250µA, VGS = 0V (Figure 12) 30 - - V
VDS = 25V, VGS = 0V - - 1 µA
V

= 25V, VGS = 0V, TC = 150oC--250µA

DS

VGS = ±20V - - ±100 nA

= VDS, ID = 250µA (Figur e 11) 1 - 3 V
= 75A, VGS = 10V (Figure 9, 10) - 0.0085 0.011 Ω
= 44A, VGS = 5V (Figure 9) - 0.013 0.016 Ω

I

D

I

= 41A, VGS = 4.5V (Figure 9) - 0.015 0.018 Ω

D

(Figure 3) - - 1.03oC/W
TO-220 , TO - 26 2 an d TO - 26 3 - - 62

VDD = 15V, ID ≅ 41A,
R

= 0.366Ω, VGS = 4.5V,

L

R

= 6.2Ω

GS

(Figures 15, 21, 22)

--185ns

-17-ns

-105- ns

o

C/W

-33-ns

-42-ns

--113ns

©2003 Fairchild Semiconductor Corporation HUF76132P3, HUF76132S3S Rev. C1

HUF76132P3, HUF76132S3S

Electrical Specifications T

= 25oC, Unless Otherwise Specified (Continue d)

A

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

SWITCHING SPECIFICATIONS (VGS = 10V)

Turn-On Time t
Turn-On Delay Time t
Rise Time t
Turn-Off Delay Time t
Fall Time t
Turn-Off Time t

GATE CHARGE SPECIFICATIONS

Total Gate Charg e Q
Gate Charge at 5V Q
Threshold Gate Charg e Q
Gate to Source Gate Charg e Q
Gate to Drai n “M ill er ” C ha r ge Q

CAPACITANCE SPECIFICATIONS

Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C

ON

d(ON)

d(OFF)

OFF

g(TOT)VGS

g(5)

g(TH)

ISS
OSS
RSS

VDD = 15V, ID ≅ 75A,
R
R
(Figures 16, 21, 22)

r

f

VGS = 0V to 5V - 25 30 nC
VGS = 0V to 1V - 1.8 2.2 nC

gs
gd

VDS = 25V, VGS = 0V,
f = 1MHz
(Figure 13)

= 0.20, VGS = 10V,

L

= 6.8Ω

GS

= 0V to 10V VDD = 15V, ID ≅ 44A,

R

= 0.341Ω

L

I

= 1.0mA

g(REF)

(Figures 14, 19, 20)

--72ns

-11-ns

-37-ns

-65-ns

-42 -ns

--160ns

-4452nC

-4.80- nC

-13.50- nC

- 1650 - pF

-850-pF

-200-pF

Source to Drain Diode Specifications

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Source to Drain Diode Vol tage V
Reverse Recovery Time t
Reverse Recovered Charge Q

SD

RR

ISD = 44A - - 1.25 V
ISD = 44A, dISD/dt = 100A/µs--71ns

rr

ISD = 44A, dISD/dt = 100A/µs - - 104 nC

Typical Performance Curves Unless Otherwise Specified

1.2

1.0

0.8

0.6

0.4

0.2

POWER DISSIPATION MULTIPLIER

0

0 25 50 75 100 150

TA, AMBIENT TEMPERATURE (oC)

125

80

V

= 10V

GS

60

40

, DRAIN CURRENT (A)

20

D

I

0

25 50 75 100 125 150

VGS = 4.5V

TC, CASE TEMPERATURE (oC)

FIGURE 1. NORMALIZED PO WER DISSIPATION vs CASE

TEMPERATURE

©2003 Fairchild Semiconductor Corporation HUF76132P3, HUF76132S3S Rev. C1

FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs

CASE TEMPERATURE

HUF76132P3, HUF76132S3S

Typical Performance Curves Unless Otherwise Specified (Continued)

2

DUTY CYCLE - DESCENDING ORDER

0.5

1

0.2

0.1

0.05

0.02

0.01

0.1

, NORMALIZED

JC

θ

Z

THERMAL IMPEDANCE

SINGLE PULSE

-4

10

10

-3

10

-2

t, RECTANGULAR PULSE DURATION (s)

FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE

2000

1000

0.01

-5

10

VGS = 10V

NOTES:
DUTY FACTOR: D = t

PEAK TJ = PDM x Z

-1

10

P

DM

t

1

t

2

1/t2

x R

JC

JC

θ

θ

0

10

TC = 25oC

FOR TEMPERATURES
ABOVE 25

o

C DERATE PEAK

CURRENT AS FOLLOWS:

150 - T

I = I

25

C

125

+ T

C

1

10

5

=

V

V

G

S

, PEAK CURRENT (A)

DM

100

I

TRANSCONDUCTANCE
MAY LIMIT CURRENT

IN THIS REGION

50

-5

10

-4

10

10

FIGURE 4. PEAK CURRENT CAPABILITY

1000

100

10

, DRAIN CURRENT (A)

D

I

OPERATION IN THIS
AREA MAY BE
LIMITED BY r

1

BV

DS(ON)

DSS MAX

10

V

, DRAIN TO SOURCE VOLTAGE (V)

DS

TJ = MAX RATED

= 25oC

T

C

100µs

1ms

10ms

= 30V

FIGURE 5. FORWARD BIAS SAFE OPERATING AREA

-3

-2

10

10

-1

0

10

10

1

t, PULSE WIDTH (s)

500

If R = 0
tAV = (L)(IAS)/(1.3*RATED BV

If R ≠ 0
t

= (L/R)ln[(IAS*R)/(1.3*RATED BV

AV

DSS

- VDD)

DSS

- VDD) +1]

100

STARTING TJ = 25oC

, AVALANCHE CURRENT (A)

AS

I

1001

10

STARTING TJ = 150oC

0.01

0.1

110

tAV, TIME IN AVALANCHE (ms)

NO TE: Refer to Fairchild App lication Notes AN9321 and AN9322.

FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING

CAPABILITY

©2003 Fairchild Semiconductor Corporation HUF76132P3, HUF76132S3S Rev. C1