Fairchild Semiconductor HUF76107P3 Datasheet

Data Sheet January 2003

HUF76107P3

20A, 30V, 0.052 Ohm, N-Channel, Logic
Level UltraFET Power MOSFETs

These N-Chann el power
MOSFETs are manufactured using
the innovative UltraFET™ process.

This advanced process technology
achieves the lowest possible on-resistance per silicon area,
resulting in outstanding perfor manc e. This device is
capable of withstanding high energy in the avalanche mode
and the diode exhibits very low reverse recovery time and
stored charge. It was designed for use in applications
where power efficiency is important, such as switching
regulators, switching converters, motor drivers, relay
drivers, low-voltage bus switches, and power management
in portable and battery-operated products.

Formerly developmental ty pe TA76107.

Ordering Information

PART NUMBER PACKAGE BRAND

HUF76107P3 TO-220AB 76107P

Features

• Logic Level Gate Drive

• 20A, 30V

• Ultra Low On-Resist ance, r

• Temperatur e Compensating PSPICE

• Temperatur e Compensating SABER

• Thermal Impedance SPICE Model

• Thermal Impedance SABER Model

• Peak Current vs Pulse Width Curve

• UIS Rating Curve

• Related Literature

- TB334, “Guidelines for Soldering Surface Mount
Components to PC Boards”

DS(ON)

= 0.052Ω

®

Model

©

Model

Symbol

D

G

Packaging

S

JEDEC TO-220AB

SOURCE

DRAIN

GATE

DRAIN

(FLANGE)

©2003 Fairchild Semiconductor Corporation HUF76107P3 Rev. B1

HUF76107P3

Absolute Maximum Ratings T

= 25oC, Unless Otherwise Specified

C

UNITS

Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

Drain to Gate Voltage (R

= 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

GS

Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

DSS

DGR

GS

30 V
30 V

±20 V

Drain Current

Continuous (T

Continuous (TC = 100oC, VGS = 5V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

= 25oC, VGS = 10V) (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

C

Continuous (TC = 100oC, VGS = 4.5V) (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I

Pulsed Avalanche Rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E

Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P

Derate Above 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

, T

J

STG

D
D
D

DM

AS

D

20

10.5
10

Figure 4

Figures 6, 17, 18

35

0.30

-40 to 150

Maximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T

Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

CAUTION: Stresses above those listed in “Absolute Maximum Rati ngs” may cause permane nt damage to the device. This is a stress only rating and oper ation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

L

pkg

300
260

A
A
A

W

W/oC

o

C

o

C

o

C

NOTE:

= 25oC to 150oC.

1. T

J

Electrical Specifications T

= 25oC, Unless Otherwise Specified

A

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

OFF STATE SPECIFICATIONS

Drain t o Source Breakdown Voltage BV
Zero Gat e V ol tag e D rain Current I

Gate to Sour c e Le ak ag e C urr e nt I

ON STATE SPECIFICATIONS

Gate to Source Threshold Voltage V
Drain to Source On Resistance r

GS(TH)VGS

DS(ON)ID

THERMAL SPECIFICATIONS

Thermal R esis ta nc e Ju ncti on to Case R
Thermal Resistance Junction to Ambient R
SWITCHING SPECIFICATIONS (V

GS

= 4.5V)
Turn-On Time t
Turn-On Delay Time t

d(ON)

Rise Time t
Turn-Off Delay Time t

d(OFF)

Fall Time t
Turn-Off Time t

DSSID

DSS

GSS

θJC

θJA

ON

r

f

OFF

= 250µA, VGS = 0V (Figure 12) 30 - - V
VDS = 25V, VGS = 0V - - 1 µA
V

= 25V, VGS = 0V, TC = 150oC--250µA

DS

VGS = ±20V - - ±100 nA

= VDS, ID = 250µA (Figur e 11) 1 - 3 V

= 20A, VGS = 10V (Figure 9, 10) - 0.04 2 0.052 Ω
I

= 10.5A, VGS = 5V (Figure 9) - 0.058 0.080 Ω

D

I

= 10A, VGS = 4.5V (Figure 9) - 0.065 0.085 Ω

D

(Figur e 3) - - 3.3
TO-220 62

VDD = 15V, ID ≅ 10A, RL = 1.50Ω,
V

= 4.5V, RGS = 33Ω

GS

(Figures 15, 21 , 22)

--120ns

-14-ns

o

o

C/W
C/W

-66-ns

-16-ns

-22-ns

--57ns

©2003 Fairchild Semiconductor Corporation HUF76107P3 Rev. B1

HUF76107P3

Electrical Specifications T

= 25oC, Unless Otherwise Specified

A

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

SWITCHING SPECIFICATIONS (VGS = 10V)

Turn-On Time t
Turn-On Delay Time t
Rise Time t
Turn-Off Delay Time t
Fall Time t
Turn-Off Time t

GATE CHARGE SPECIFICATIONS

Total Gate Charg e Q
Gate Charge at 5V Q
Threshold Gate Ch ar g e Q
Gate to Source Gate Charg e Q
Gate to Drai n “M ill er ” C ha r ge Q

CAPACITANCE SPECIFICATIONS

ON

VDD = 15V, ID ≅ 20A, RL =0.75Ω,
V

d(ON)

d(OFF)

OFF

g(TOT)VGS

g(5)

g(TH)

(Figures 16, 21 , 22)

r

f

VGS = 0V to 5V - 4.7 5.7 nC
VGS = 0V to 1V - 0.35 0.42 nC

gs

gd

= 10V, RGS = 33Ω

GS

= 0V to 10V VDD = 15V, ID ≅

10.5A,
R

= 1.43Ω

L

I

= 1.0mA

g(REF)

(Figur es 14, 19, 20 )

--75ns

-18-ns

-30-ns

-62-ns

-20 -ns

--125ns

- 8.6 10.3 nC

-1.00- nC

-2.40- nC

Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C

ISS

OSS

RSS

VDS = 25V, VGS = 0V, f = 1MHz
(Figur e 13 )

Source to Drain Diode Specifications

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Source to Drain Diode Vol tage V
Reverse Recovery Time t
Reverse Recovered Charge Q

SD

RR

ISD = 10.5A - - 1.25 V
ISD = 10.5A, dISD/dt = 100A/µs--39ns

rr

ISD = 10.5A, dISD/dt = 100A/µs--49nC

Typical Performance Curves Unless oth erwise spec if i ed

1.2

1.0

0.8

0.6

0.4

0.2

POWER DISSIPATION MULTIPLIER

0

0 25 50 75 100 150

TA, AMBIENT TEMPERATURE (oC)

125

-315- pF

-170- pF

-30-pF

25

20

15

VGS=4.5V

10

, DRAIN CURRENT (A)

D

I

5

0

25 50 75 100 125

VGS=10V

TC, CASE TEMPERATURE (oC)

150

FIGURE 1. NORMALIZED PO WER DISSIPATION vs CASE

TEMPERATURE

©2003 Fairchild Semiconductor Corporation HUF76107P3 Rev. B1

FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs

CASE TEMPERATURE

HUF76107P3

Typical Performance Curves Unless oth erwise spec if i ed (Continued)

2

DUTY CYCLE - DESCENDING ORDER

0.5

1

0.2

0.1

0.05

0.02

0.01

0.1

, NORMALIZED

JC

θ

Z

THERMAL IMPEDANCE

SINGLE PULSE

-4

10

-3

10

-2

10

t, RECTANGULAR PULSE DURATION (s)

FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE

500

100

0.01

-5

10

VGS = 10V

NOTES:
DUTY FACTOR: D = t

PEAK TJ = PDM x Z

-1

10

P

DM

t

1

t

2

1/t2

x R

JC

JC

θ

θ

0

10

TC = 25oC
FOR TEMPERATURE S
ABOVE 25

o

C DERATE PEAK

CURRENT AS FOLLOWS:

150 - T

I = I

25

C

125

+ T

C

1

10

, PEAK CURRENT (A)

DM

I

TRANSCONDUCTANCE

VGS = 5V

MAY LIMIT CURRENT
IN THIS REGION

10

10

-5

-4

10

-3

10

FIGURE 4. PEAK CURRENT CAPABILITY

200

100

10

, DRAIN CURRENT (A)

D

I

OPERATION IN THIS
AREA MAY BE

1

BV

DS(ON)

DSS MAX

10

, DRAIN TO SOURCE VOLTAGE (V)

V

DS

TJ = MAX RATED

= 25oC

T

C

100µs

1ms

= 30VLIMITED BY r

10ms

FIGURE 5. FORWARD BIAS SAFE OPERATING AREA

-2

10

t, PULSE WIDTH (s)

1001

200

100

-1

10

If R = 0
tAV = (L)(IAS)/(1.3*RATED BV

If R ≠ 0
t

= (L/R)ln[(IAS*R)/(1.3*RATED BV

AV

10

0

10

- VDD)

DSS

- VDD) +1]

DSS

STARTING TJ = 25oC

10

1

STARTING TJ = 150oC

, AVALANCHE CURRENT (A)

AS

I

1

0.001

0.01

0.1

1 10 100

tAV, TIME IN AVALANCHE (ms)

NO TE: Refer to Fairchild Application Notes AN9 321 and AN9322.

FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING

CAPABILITY

©2003 Fairchild Semiconductor Corporation HUF76107P3 Rev. B1