Fairchild Semiconductor FM93CS46TLEMT8, FM93CS46TEN, FM93CS46TEMT8, FM93CS46TEM8, FM93CS46N Datasheet

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FM93C46 Rev. D.1

FM93C46 1024-Bit Serial CMOS EEPROM

(MICROWIRE

Synchronous Bus)

July 2000

FM93C46 1024-Bit Serial CMOS EEPROM (MICROWIRE™ Synchronous Bus)

General Description

FM93C46 is a 1024-bit CMOS non-volatile EEPROM organized as 64 x 16-bit array. This device features MICROWIRE interface which is a 4-wire serial bus with chipselect (CS), clock (SK), data input (DI) and data output (DO) signals. This interface is compatible to many of standard Microcontrollers and Microprocessors. There are 7 instructions implemented on the FM93C46 for various Read, Write, Erase, and Write Enable/Disable operations. This device is fabricated using Fairchild Semiconductor floating-gate CMOS process for high reliability, high endurance and low power consumption.

“LZ” and “L” versions of FM93C46 offer very low standby current making them suitable for low power applications. This device is offered in both SO and TSSOP packages for small space considerations.

Functional Diagram

Features

■ Wide VCC 2.7V - 5.5V

■ Typical active current of 200µA

10µA standby current typical 1µA standby current typical (L)

0.1µA standby current typical (LZ)

■ No Erase instruction required before Write instruction

■ Self timed write cycle

■ Device status during programming cycles

■ 40 year data retention

■ Endurance: 1,000,000 data changes

■ Packages available: 8-pin SO, 8-pin DIP, 8-pin TSSOP

INSTRUCTION

DECODER

CONTROL LOGIC

AND CLOCK

GENERATORS

HIGH VOLTAGE

GENERATOR

AND

PROGRAM

TIMER

INSTRUCTION

ADDRESS

EEPROM ARRAY

READ/WRITE AMPS

DATA IN/OUT REGISTER

16 BITS

DECODER

DATA OUT BUFFER

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FM93C46 Rev. D.1

FM93C46 1024-Bit Serial CMOS EEPROM

(MICROWIRE

Synchronous Bus)

Connection Diagram

Dual-In-Line Package (N)

8–Pin SO (M8) and 8–Pin TSSOP (MT8)

Top View

Package Number

N08E, M08A and MTC08

Pin Names

CS Chip Select

SK Serial Data Clock

DI Serial Data Input

DO Serial Data Output

GND Ground

NC No Connect

Power Supply

NOTE: Pins designated as "NC" are typically unbonded pins. However some of them are bonded for special testing purposes. Hence if a signal is applied to these pins, care should be taken that the voltage applied on these pins does not exceed the VCC applied to the device. This will ensure proper operation.

Ordering Information

FM 93 C XX T LZ E XXX Letter Description

Package N 8-pin DIP

M8 8-pin SO MT8 8-pin TSSOP

Temp. Range None 0 to 70°C

V -40 to +125°C E -40 to +85°C

Voltage Operating Range Blank 4.5V to 5.5V

L 2.7V to 5.5V LZ 2.7V to 5.5V and

<1µA Standby Current

Blank Normal Pinout T Rotated Pinout

Density 46 1024 bits

C CMOS CS Data protect and sequential

read

Interface 93 MICROWIRE

Fairchild Memory Prefix

GND

Normal

Pinout

Rotated

Pinout

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FM93C46 Rev. D.1

FM93C46 1024-Bit Serial CMOS EEPROM

(MICROWIRE

Synchronous Bus)

Absolute Maximum Ratings (Note 1)

Ambient Storage Temperature -65°C to +150°C

All Input or Output Voltages +6.5V to -0.3V

with Respect to Ground

Lead Temperature

(Soldering, 10 sec.) +300°C

ESD rating 2000V

Operating Conditions

Ambient Operating Temperature

FM93C46 0°C to +70°C FM93C46E -40°C to +85°C FM93C46V -40°C to +125°C

Power Supply (V

) 4.5V to 5.5V

DC and AC Electrical Characteristics V

= 4.5V to 5.5V unless otherwise specified

Symbol Parameter Conditions Min Max Units

CCA

Operating Current CS = VIH, SK=1.0 MHz 1 mA

CCS

Standby Current CS = V

50 µA

Input Leakage VIN = 0V to V

±-1 µA

Output Leakage (Note 2)

Input Low Voltage -0.1 0.8 V

Input High Voltage 2 VCC +1

OL1

Output Low Voltage IOL = 2.1 mA 0.4 V

OH1

Output High Voltage IOH = -400 µA 2.4

OL2

Output Low Voltage IOL = 10 µA 0.2 V

OH2

Output High Voltage IOH = -10 µAV

- 0.2

SK Clock Frequency (Note 3) 1 MHz

SKH

SK High Time 0°C to +70°C 250 ns

-40°C to +125°C 300

SKL

SK Low Time 250 ns

Minimum CS Low Time (Note 4) 250 ns

CSS

CS Setup Time 50 ns

DO Hold Time 70 ns

DIS

DI Setup Time 100 ns

CSH

CS Hold Time 0 ns

DIH

DI Hold Time 20 ns

Output Delay 500 ns

CS to Status Valid 500 ns

CS to DO in Hi-Z CS = V

100 ns

Write Cycle Time 10 ms

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FM93C46 Rev. D.1

FM93C46 1024-Bit Serial CMOS EEPROM

(MICROWIRE

Synchronous Bus)

Absolute Maximum Ratings (Note 1)

Ambient Storage Temperature -65°C to +150°C

All Input or Output Voltages +6.5V to -0.3V

with Respect to Ground

Lead Temperature

(Soldering, 10 sec.) +300°C

ESD rating 2000V

Operating Conditions

Ambient Operating Temperature

FM93C46L/LZ 0°C to +70°C FM93C46LE/LZE -40°C to +85°C FM93C46LV/LZV -40°C to +125°C

Power Supply (V

) 2.7V to 5.5V

DC and AC Electrical Characteristics V

= 2.7V to 4.5V unless otherwise specified. Refer to

page 3 for V

= 4.5V to 5.5V.

Symbol Parameter Conditions Min Max Units

CCA

Operating Current CS = VIH, SK=250 KHz 1 mA

CCS

Standby Current CS = V

L 10 µA LZ (2.7V to 4.5V) 1 µA

Input Leakage VIN = 0V to V

±1 µA

Output Leakage (Note 2)

Input Low Voltage -0.1 0.15V

Input High Voltage 0.8V

VCC +1

Output Low Voltage IOL = 10µA 0.1V

Output High Voltage IOH = -10µA 0.9V

SK Clock Frequency (Note 3) 0 250 KHz

SKH

SK High Time 1 µs

SKL

SK Low Time 1 µs

Minimum CS Low Time (Note 4) 1 µs

CSS

CS Setup Time 0.2 µs

DO Hold Time 70 ns

DIS

DI Setup Time 0.4 µs

CSH

CS Hold Time 0 ns

DIH

DI Hold Time 0.4 µs

Output Delay 2 µs

CS to Status Valid 1 µs

CS to DO in Hi-Z CS = V

0.4 µs

Write Cycle Time 15 ms

Capacitance TA = 25°C, f = 1 MHz or 250 KHz (Note 5)

Symbol Test Typ Max Units

OUT

Output Capacitance 5 pF

Input Capacitance 5 pF

Note 1: Stress above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

Note 2: Typical leakage values are in the 20nA range.

Note 3: The shortest allowable SK clock period = 1/f

(as shown under the fSK parameter). Maximum SK clock speed (minimum SK period) is determined by the interaction of several AC parameters stated in the datasheet. Within this SK period, both t

SKH

and t

SKL

limits must be observed. Therefore, it is not

allowable to set 1/fSK = t

SKHminimum

+ t

SKLminimum

for shorter SK cycle time operation.

Note 4: CS (Chip Select) must be brought low (to V

) for an interval of tCS in order to reset all internal device registers (device reset) prior to beginning another opcode cycle. (This is shown in the opcode diagram on the following page.)

Note 5: This parameter is periodically sampled and not 100% tested.

AC Test Conditions

VCC Range VIL/V

VIL/V

VOL/V

IOL/I

Input Levels Timing Level Timing Level

2.7V ≤ VCC ≤ 5.5V 0.3V/1.8V 1.0V 0.8V/1.5V ±10µA

(Extended Voltage Levels)

4.5V ≤ VCC ≤ 5.5V 0.4V/2.4V 1.0V/2.0V 0.4V/2.4V 2.1mA/-0.4mA

(TTL Levels)

Output Load: 1 TTL Gate (CL = 100 pF)

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