Fairchild Semiconductor FM27C512N45L, FM27C512N150, FM27C512N120, FM27C512Q90, FM27C512Q150 Datasheet
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FM27C512 524,288-Bit (64K x 8) High Performance CMOS EPROM
www.fairchildsemi.com
FM27C512
FM27C512
524,288-Bit (64K x 8) High Performance CMOS EPROM
General Description
The FM27C512 is a high performance 512K UV Erasable Electrically Programmable Read Only Memory (EPROM). It is manufactured using Fairchild’s proprietary CMOS AMG™ EPROM technology for an excellent combination of speed and economy while
providing excellent reliability.
The FM27C512 provides microprocessor-based systems storage
capacity for portions of operating system and application software. Its 90 ns access time provides no wait-state operation with
high-performance CPUs. The FM27C512 offers a single chip
solution for the code storage requirements of 100% firmwarebased equipment. Frequently-used software routines are quickly
executed from EPROM storage, greatly enhancing system utility.
The FM27C512 is configured in the standard JEDEC EPROM
pinout which provides an easy upgrade path for systems which are
currently using standard EPROMs.
Block Diagram
January 2000
The FM27C512 is one member of a high density EPROM Family
which range in densities up to 4 Megabit.
Features
■ High performance CMOS
— 90 ns access time
■ Fast turn-off for microprocessor compatibility
■ Manufacturers identification code
■ JEDEC standard pin configuration
— 28-pin PDIP package
— 32-pin chip carrier
— 28-pin CERDIP package
DS800035-1
AMG is a trademark of WSI, Inc.
© 1998 Fairchild Semiconductor Corporation
Output Enable and
Chip Enable Logic
Y Decoder
X Decoder
. . . . . . . . .
Output
Buffers
524,288-Bit
Cell Matrix
Data Outputs O0 - O
7
V
CC
GND
V
PP
OE
CE/PGM
A0 - A
15
Address
Inputs
2
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FM27C512 524,288-Bit (64K x 8) High Performance CMOS EPROM
www.fairchildsemi.com
FM27C512
Connection Diagrams
Compatible EPROM pin configurations are shown in the blocks adjacement to the FM27C512 pins.
Commercial Temp Range (0°C to +70°C)
Parameter/Order Number Access Time (ns)
FM27C512 Q, N, V 90 90
FM27C512 Q, N, V 120 120
FM27C512 Q, N, V 150 150
Industrial Temp Range (-40°C to +85°C)
Parameter/Order Number Access Time (ns)
FM27C512 QE, NE, VE 120 120
FM27C512 QE, NE, VE 150 150
Q = Quartz-Windowed Ceramic DIP Package
N = Plastic DIP Package
V = PLCC Package
• All packages conform to the JEDEC standard.
• All versions are guaranteed to function for slower speeds.
Pin Names
A0–A15 Addresses
CE/PGM Chip Enable/Program
OE Output Enable
O0–O7 Outputs
NC Don’t Care (During Read)
PLCC
DIP
FM27C512
A8
A9
A11
NC
OE/VPP
A10
CE/PGM
O7
O8
A6
A5
A4
A3
A2
A1
A0
NC
O0
A7
A12
A15NCVCC
A14
A13
O1
O2
GND
NC
O3O4O5
5
6
7
8
9
10
11
12
13
29
28
27
26
25
24
23
22
21
14 15 16 17 18 19 20
4 3 2 1 32 31 30
DS800035-2
DS800035-3
A
15
A
12
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
O0
O
1
O
2
GND
V
CC
A
14
A
13
A
8
A
9
A
11
OE/V
PP
A
10
CE/PGM
O7
O
6
O
5
O4
O
3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
CC
XX/PGM
XX
A
14
A
13
A
8
A
9
A
11
OE
A10
CE
O7
O
6
O
5
O4
O
3
V
CC
A
14
A
13
A
8
A
9
A
11
OE
A10
CE/PGM
O7
O
6
O
5
O4
O
3
27C256 27C010 27C040
V
CC
A
18
A
17
A
14
A
13
A
8
A
9
A
11
OE
A10
CE/PGM
O7
O
6
O
5
O4
O
3
27C040 27C010 27C256
XX/
V
PP
A
16
A
15
A
12
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
O
0
O
1
O
2
GND
XX/
V
PP
A
16
A
15
A
12
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
O
0
O
1
O
2
GND
V
PP
A
12
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
O
0
O
1
O
2
GND
3
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FM27C512 524,288-Bit (64K x 8) High Performance CMOS EPROM
www.fairchildsemi.com
FM27C512
Absolute Maximum Ratings (Note 1)
Storage Temperature -65°C to +150°C
All Input Voltages Except A9 with
Respect to Ground -0.6V to +7V
VPP and A9 with Respect to Ground -0.7V to +14V
V
CC
Supply Voltage with
Respect to Ground -0.6V to +7V
ESD Protection
(MIL Std. 883, Method 3015.2) >2000V
All Output Voltages with
Respect to Ground V
CC
+ 1.0V to GND -0.6V
Operating Range
Range Temperature V
CC
Tolerance
Commercial 0°C to +70°C +5V ±10%
Industrial -40°C to +85°C +5V ±10%
Read Operation
DC Electrical Characteristics
Symbol Parameter Test Conditions Min Max Units
V
IL
Input Low Level -0.5 0.8 V
V
IH
Input High Level 2.0 VCC +1 V
V
OL
Output Low Voltage IOL = 2.1 mA 0.4 V
V
OH
Output High Voltage IOH = -2.5 mA 3.5 V
I
SB1
VCC Standby Current (CMOS) CE = VCC ±0.3V 100 µA
I
SB2
VCC Standby Current CE = V
IH
1mA
I
CC1
VCC Active Current CE = OE = V
IL
f = 5 MHz 40 mA
I
CC2
VCC Active Current CE = GND, f = 5 MHz
CMOS Inputs Inputs = VCC or GND, I/O = 0 mA 35 mA
C, E Temp Ranges
I
PP
VPP Supply Current VPP = V
CC
10 µA
V
PP
VPP Read Voltage VCC - 0.7 V
CC
V
I
LI
Input Load Current VIN = 5.5V or GND -1 1 µA
I
LO
Output Leakage Current V
OUT
= 5.5V or GND -10 10 µA
AC Electrical Characteristics
Symbol Parameter 90 120 150 Units
Min Max Min Max Min Max
t
ACC
Address to Output Delay 90 120 150 ns
t
CE
CE to Output Delay 90 120 150
t
OE
OE to Output Delay 40 50 50
t
DF
Output Disable to 35 25 45
Output Float
t
OH
Output Hold from Addresses, CE or OE, 0 0 0
Whichever Occurred First
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