Dual Notebook Power Supply N-Channel PowerTrench SyncFET
May 2000
™
General Description
The FDS6984S is designed to replace two single SO-8
MOSFETs and Schottky diode in synchronous DC:DC
power supplies that provide various peripheral voltages
for notebook computers and other battery powered
electronic devices. FDS6984S contains two unique
30V, N-channel, logic level, PowerTrench MOSFETs
designed to maximize power conversion efficiency.
The high-side switch (Q1) is designed with specific
emphasis on reducing switching losses while the lowside switch (Q2) is optimized to reduce conduction
losses. Q2 also includes an integrated Schottky diode
Features
•Q2:Optimized to minimize conduction lossesIncludes SyncFET Schottky diode
ID = 1 mA, Referenced to 25°C
ID = 250 uA, Referenced to 25°C
VGS = 10 V, ID = 8.5 A
VGS = 10 V, ID = 8.5 A, TJ = 125°C
VGS = 4.5 V, ID = 7 A
VGS = 10 V, ID = 5.5 A
VGS = 10 V, ID = 5.5 A, TJ = 125°C
VGS = 4.5 V, ID = 4.6 A
On-State Drain CurrentVGS = 10 V, VDS = 5 VQ2Q130
Forward TransconductanceVDS = 5 V, ID = 8.5 A
VDS = 5 V, ID = 5.5 A
Q2Q11
1
Q2-6
Q1-4
Q216
24
23
Q135
53
48
20
Q2
Q1
26
40
19
32
27
40
60
55
3
V
3
mV/°C
mΩ
A
S
Dynamic Characteristics
C
iss
C
oss
C
rss
Input CapacitanceQ2
VDS = 15 V, VGS = 0 V,
f = 1.0 MHz
Q1
Output CapacitanceQ2
Q1
Reverse Transfer Capacitance
Q2
Q1
1233
462
344
113
106
40
pF
pF
pF
Switching Characteristics (Note 2)
t
t
t
t
Q
Q
Q
d(on)
r
d(off)
f
g
gs
gd
Turn-On Delay TimeQ2
VDD = 15 V, ID = 1 A,
VGS = 10V, R
GEN
= 6 Ω
Q1
Turn-On Rise TimeQ2
Q1
Turn-Off Delay TimeQ2
Q1
Turn-Off Fall Time
Q2
Q1
Total Gate ChargeQ2
Q2
VDS = 15 V, ID = 8.5 A, VGS =5V
Q1
Gate-Source ChargeQ2
Gate-Drain Charge
Q1
VDS = 15 V, ID = 5.5 A,VGS = 5 V
Q1
Q2
Q1
8
1618ns
10
5
1025ns
14
25
4034ns
21
11
2014ns
7
11
8.51812
5
2.4
4
3.1
nC
nC
nC
FDS6680S Rev B (W)
Electrical Characteristics (continued)T
FDS6984S
= 25°C unless otherwise noted
A
SymbolParameterTest ConditionsType MinTypMax Units
Drain–Source Diode Characteristics and Maximum Ratings
I
S
t
rr
Q
rr
V
SD
Notes:
1. R
θJA
the drain pins. R
Maximum Continuous Drain-Source Diode Forward CurrentQ2
Q1
Reverse Recovery Time17
Reverse Recovery Charge
Drain-Source Diode Forward
Voltage
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
is guaranteed by design while R
θJC
IF = 10A,
diF/dt = 300 A/µs(Note 3)
VGS = 0 V, IS = 3.5 A (Note 2)
VGS = 0 V, IS = 1.3 A (Note 2)Q2Q1
is determined by the user's board design.
θCA
Q2
12.5nC
0.74
0.5
3.0
1.3
ns
0.7
1.2
A
V
a) 78°/W when
mounted on a
0.5 in2 pad of 2 oz
copper
Scale 1 : 1 on letter size paper
2. 2. See “SyncFET Schottky body diode characteristics” below.