Fairchild Semiconductor FDG6335N Datasheet
FDG6335N
FDG6335N
20V N-Channel PowerTrench MOSFET
October 2001
General Description
This N-Channel MOSFET has been designed
specifically to improve the overall efficiency of DC/DC
converters using either synchronous or conventional
switching PWM controllers. It has been optimized use
in small switching regulators, providing an extremely
low R
and gate charge (QG) in a small package.
DS(ON)
Applications
• DC/DC converter
• Power management
• Loadswitch
S
G
D
D
Pin 1
G
S
SC70-6
The pinouts are symmetrical; pin 1 and pin 4 are interchangeable.
Features
• 0.7 A, 20 V. R
• Low gate charge (1.1 nC typical)
• High performance trench technology for extremely
low R
DS(ON)
• Compact industry standard SC70-6 surface mount
package
1 or 4
S
G
2 or 5
3 or 6
D
= 300 mΩ @ VGS = 4.5 V
DS(ON)
R
= 400 mΩ @ VGS = 2.5 V
DS(ON)
6 or 3
5 or 2
4 or 1
Dual N-Channel
D
G
S
Absolute Maximum Ratings T
=25oC unless otherwise noted
A
Symbol Parameter Ratings Units
V
DSS
V
GSS
I
D
P
D
TJ, T
STG
Drain-Source Voltage 20 V
Gate-Source Voltage ± 12 V
Drain Current – Continuous (Note 1) 0.7 A
– Pulsed 2.1
Power Dissipation for Single Operation (Note 1) 0.3 W
Operating and Storage Junction Temperature Range –55 to +150
Thermal Characteristics
R
θJA
Thermal Resistance, Junction-to-Ambient (Note 1) 415 °C/W
Package Marking and Ordering Information
Device Marking Device Reel Size Tape width Quantity
.35 FDG6335N 7’’ 8mm 3000 units
2001 Fairchild Semiconductor Corporation
FDG6335N Rev C (W)
°C
Electrical Characteristics T
FDG6335N
= 25°C unless otherwise noted
A
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
DSS
∆BVDSS
∆T
J
I
DSS
I
GSSF
I
GSSR
Drain–Source Breakdown
VGS = 0 V, ID = 250 µA
20 V
Voltage
Breakdown Voltage Temperature
ID = 250 µA, Referenced to 25°C
14
mV/°C
Coefficient
Zero Gate Voltage Drain Current VDS = 16 V, VGS = 0 V 1
µA
Gate–Body Leakage, Forward VGS = 12 V, VDS = 0 V 100 nA
Gate–Body Leakage, Reverse VGS = –12 V, VDS = 0 V –100 nA
On Characteristics (Note 2)
V
GS(th)
∆VGS(th)
∆T
J
R
DS(on)
I
D(on)
g
FS
Gate Threshold Voltage
Gate Threshold Voltage
VDS = VGS, ID = 250 µA
ID = –250 µA, Referenced to 25°C
0.6 1.1 1.5 V
–2.8
mV/°C
Temperature Coefficient
Static Drain–Source
On–Resistance
VGS = 4.5 V, ID = 0.7 A
VGS = 2.5 V, ID = 0.6 A
VGS = 4.5 V, ID = 0.7 A, TJ=125°C
180
293
247
300
400
442
mΩ
On–State Drain Current VGS = 4.5 V, VDS = 5 V 1 A
Forward Transconductance VDS = 5 V, ID = 0.7 A 2.8 S
Dynamic Characteristics
C
iss
C
oss
C
rss
Input Capacitance 113 pF
Output Capacitance 34 pF
Reverse Transfer Capacitance
VDS = 10 V, V
f = 1.0 MHz
GS
= 0 V,
16 pF
Switching Characteristics (Note 2)
t
t
t
t
Q
Q
Q
d(on)
r
d(off)
f
g
gs
gd
Turn–On Delay Time 5 10 ns
Turn–On Rise Time 7 15 ns
Turn–Off Delay Time 9 18 ns
Turn–Off Fall Time
Total Gate Charge 1.1 1.4 nC
Gate–Source Charge 0.24 nC
Gate–Drain Charge
VDD = 10 V, ID = 1 A,
VGS = 4.5 V, R
GEN
= 6 Ω
VDS = 10 V, ID = 0.7 A,
VGS = 4.5 V
1.5 3 ns
0.3 nC
Drain–Source Diode Characteristics and Maximum Ratings
I
S
V
SD
Notes:
1. R
θJA
the drain pins. R
Maximum Continuous Drain–Source Diode Forward Current 0.25 A
Drain–Source Diode Forward
VGS = 0 V, IS = 0.25 A (Note 2) 0.74 1.2 V
Voltage
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
is guaranteed by design while R
θJC
is determined by the user's board design. R
θJA
= 415°C/W when mounted on a minimum pad .
θJA
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
FDG6335N Rev C (W)
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