Fairchild Semiconductor FDG6331L Datasheet
T
FDG6331L
Integrated Load Switch
FDG6331L
April 2001
General Description
This device is particularly suited for compact power
management in portable electronic equipment where
2.5V to 8V input and 0.8A output current capability are
needed. This load switc h integrates a sm all N-Channel
Features
• –0.8 A, –8 V. R
R
R
= 260 mΩ @ VGS = –4.5 V
DS(ON)
= 330 mΩ @ VGS = –2.5 V
DS(ON)
= 450 mΩ @ VGS = –1.8 V
DS(ON)
power MOSFET (Q1) that drives a large P-Channel
power MOSFET (Q2) in one tiny SC70-6 package.
• Control MOSFET (Q1) includes Zener protection for
ESD ruggedness (>6KV Human body model)
Applications
• Power management
• Load switch
Vin,R1
ON/OFF
Pin 1
R1,C1
SC70-6
Absolute Maximum Ratings T
4
5
6
See Application Circuit
o
=25
C unless otherwise noted
A
• High performance trench te chnology for extremely
low R
DS(ON)
• Compact industry s t andard SC70-6 surface mount
package
Q2
Q1
3
2
1
Vout,C1
Vout,C1
R2
Equivalent Circuit
IN OU
+–
V
DROP
ON/OFF
Symbol Parameter Ratings Units
VIN Gate-Source Voltage (Q2)
V
Gate-Source Voltage (Q1) –0.5 to 8 V
ON/OFF
I
Load Current – Continuous (Note 2) –0.8 A
Load
± 8
– Pulsed (Note 2) –2.4
PD
TJ, T
STG
Maximum Power Dissipation
Operating and Storage Junction Temperature Range –55 to +150
(Note 1) 0.3
V
W
°C
Thermal Characteristics
R
θJA
Thermal Resistance, Junction-to-Ambient
(Note 1a) 415
°C/W
Package Marking and Ordering Information
Device Marking Device Reel Size Tape width Quantity
.31 FDG6331L 7’’ 8mm 3000 units
2001 Fairchild Semiconductor Corporation
FDG6331L Rev B(W)
FDG6331L
Electrical Characteristics T
= 25°C unless otherwise noted
A
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BVIN Vin Breakdown Voltage
I
Zero Gate Voltage Drain Current VIN = –6.4 V, V
Load
IFL Leakage Current, Forward V
IRL Leakage Current, Reverse V
= 0 V, ID = –250 µA
V
ON/OFF
= 0 V, VIN = 8 V 100 nA
ON/OFF
= 0 V, VIN = –8 V –100 nA
ON/OFF
= 0 V –1
ON/OFF
8 V
On Characteristics (Note 2)
V
R
Gat e Threshold Voltage
ON/OFF (th)
Static Drain–Source
DS(on)
On–Resistance (Q2)
R
Static Drain–Source
DS(on)
On–Resistance (Q1)
= V
V
IN
V
= 4.5 V, ID = –0.8 A
IN
=2.5 V, ID = –0.7 A
V
IN
= 1.8 V, ID = –0.6 A
V
IN
= 4.5 V, ID = 0.4A
V
IN
= 2.7 V, ID = 0.2 A
V
IN
, ID = –250 µA
ON/OFF
0.4 0.9 1.5 V
155
193
248
310
380
260
330
450
400
500
Drain–Source Diode Characteristics and Maximum Ratings
IS Maximum Continuous Drain–Source Diode Forward Current –0.25 A
VSD Drain–Source Diode Forward
V
= 0 V, IS = –0.25 A(Note 2) –1.2 V
ON/OFF
Voltage
Notes:
1. R
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
θJA
the drain pins. R
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
is guaranteed by design while R
θJC
is determined by the user’s board design.
θJA
µA
mΩ
mΩ
FDG6331L Load Switch Application Circuit
R1
Q1
Q2
OUT
C1
LOAD
IN
ON/OFF
R2
External Component Recommendation:
For additional in-rush current cont rol , R2 and C1 can be added. For more information, see application note A N1030.
FDG6331L Rev B (W)
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