Fairchild Semiconductor FDG6320C Datasheet
November 1998
FDG6320C
Dual N & P Channel Digital FET
General Description Features
These dual N & P-Channel logic level enhancement mode
field effect transistors are produced using Fairchild's
proprietary, high cell density, DMOS technology. This very
high density process is especially tailored to minimize
on-state resistance. This device has been designed
especially for low voltage applications as a replacement for
bipolar digital transistors and small signal MOSFETS. Since
bias resistors are not required, this dual digital FET can
replace several different digital transistors, with different bias
resistor values.
SC70-6
SOT-23
SuperSOTTM-6
S2
G2
D1
.20
D2
SC70-6
pin
1
G1
S1
N-Ch 0.22 A, 25 V, R
R
P-Ch -0.14 A, -25V, R
R
Very small package outline SC70-6.
Very low level gate drive requirements allowing direct
operation in 3 V circuits (V
Gate-Source Zener for ESD ruggedness
(>6kV Human Body Model).
SOT-8
1
2
3
= 4.0 Ω @ VGS= 4.5 V,
DS(ON)
= 5.0 Ω @ VGS= 2.7 V.
DS(ON)
= 10 Ω @ VGS= -4.5V,
DS(ON)
= 13 Ω @ VGS= -2.7V.
DS(ON)
< 1.5 V).
GS(th)
SO-8
SOIC-14
6
5
4
Absolute Maximum Ratings T
Symbol Parameter N-Channel P-Channel Units
V
S
DS
V
GSS
I
D
P
D
TJ,T
STG
ESD Electrostatic Discharge Rating MIL-STD-883D
THERMAL CHARACTERISTICS
R
θJA
© 1998 Fairchild Semiconductor Corporation
Drain-Source Voltage 25 -25 V
Gate-Source Voltage 8 -8 V
Drain Current - Continuous 0.22 -0.14 A
- Pulsed 0.65 -0.4
Maximum Power Dissipation (Note 1) 0.3 W
Operating and Storage Temperature Ranger -55 to 150 °C
Human Body Model (100pf / 1500 Ohm)
Thermal Resistance, Junction-to-Ambient (Note 1) 415 °C/W
= 25oC unless other wise noted
A
6 kV
FDG6320C Rev. D
Electrical Characteristics (T
= 25 OC unless otherwise noted )
A
Symbol Parameter Conditions
OFF CHARACTERISTICS
BV
DSS
Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA N-Ch 25 V
VGS = 0 V, ID = -250 µA
∆BV
DSS
Breakdown Voltage Temp. Coefficient ID = 250 µA, Referenced to 25 oC N-Ch 25 mV/oC
/∆T
J
ID = -250 µA, Referenced to 25 oC
I
DSS
I
DSS
I
GSS
Zero Gate Voltage Drain Current V
Zero Gate Voltage Drain Current
Gate - Body Leakage Current
= 20 V, V
DS
VDS =-20 V, V
VGS = 8 V, V
VGS = -8 V, V
ON CHARACTERISTICS (Note 2)
V
GS(th)
Gate Threshold Voltage
VDS = VGS, ID = 250 µA
VDS = VGS, ID = -250 µA P-Ch -0.65 -0.82 -1.5
∆V
GS(th)
Gate Threshold Voltage Temp. Coefficient
/∆T
J
ID = 250 µA, Referenced to 25 oC
ID = -250 µA, Referenced to 25 oC P-Ch 2.1
R
DS(ON)
Static Drain-Source On-Resistance
VGS = 4.5 V, ID = 0.22 A
VGS = 2.7 V, ID = 0.19 A
VGS = -4.5 V, ID = -0.14 A P-Ch 7.3 10
VGS = -2.7 V, ID = -0.05 A 10.4 13
I
D(ON)
On-State Drain Current
VGS = 4.5 V, VDS = 5 V
VGS = -4.5 V, VDS = -5 V P-Ch -0.14
g
FS
Forward Transconductance
VDS = 5 V, ID = 0.22 A
VDS = -5 V, ID = -0.14 A P-Ch 0.12
DYNAMIC CHARACTERISTICS
C
iss
C
oss
Input Capacitance N-Channel N-Ch 9.5 pF
V
= 10 V, V
DS
Output Capacitance f = 1.0 MHz N-Ch 6
P-Channel P-Ch 7
C
rss
Reverse Transfer Capacitance
V
= -10 V, VGS = 0 V,
DS
f = 1.0 MHz P-Ch 1.5
Min Typ Max Units
Type
P-Ch -25
P-Ch -19
= 0 V, N-Ch 1 µA
GS
TJ = 55°C 10
GS
= 0 V,
P-Ch -1 µA
TJ = 55°C -10
= 0 V
DS
= 0 V P-Ch -100 nA
DS
N-Ch 100 nA
N-Ch 0.65 0.85 1.5 V
N-Ch -2.1
N-Ch 2.6 4
TJ =125°C 5.3 7
3.7 5
TJ =125°C
11 17
N-Ch 0.22 A
N-Ch 0.2 S
GS
= 0 V,
P-Ch 12
N-Ch 1.3
mV/oC
Ω
FDG6320C Rev. D
Electrical Characteristics (continued)
SWITCHING CHARACTERISTICS (Note 2)
Symbol Parameter Conditions
t
D(on)
Turn - On Delay Time N-Channel N-Ch 5 12 nS
Type
VDD = 5 V, ID = 0.5 A , P-Ch 5 12
t
r
Turn - On Rise Time
VGS = 4.5 V, R
GEN
= 50 Ω
N-Ch 4.5 10 nS
P-Ch 8 16
t
D(off)
Turn - Off Delay Time P-Channel N-Ch 4 8 nS
VDD = -5 V, ID = -0.5 A, P-Ch 9 18
t
f
Turn - Off Fall Time
VGS = -4.5 V, R
= 50 Ω
GEN
N-Ch 3.2 7 nS
P-Ch 5 12
Q
g
Q
gs
Total Gate Charge N-Channel N-Ch 0.29 0.4 nC
V
= 5 V, ID = 0.22 A,
DS
P-Ch 0.22 0.31
Gate-Source Charge VGS = 4.5 V N-Ch 0.12 nC
P- Channel P-Ch 0.12
Q
gd
Gate-Drain Charge
VDS = -5 V, ID = -0.14 A,
VGS = -4.5 V
N-Ch 0.03 nC
P-Ch 0.05
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
I
S
Maximum Continuous Drain-Source Diode Forward Current N-Ch 0.25 A
P-Ch -0.25
V
SD
Notes:
1. R
design while R
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
Drain-Source Diode Forward Voltage VGS = 0 V, IS = 0.5 A
VGS = 0 V, IS = -0.5 A
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
JA
θ
is determined by the user's board design. R
CA
θ
= 415OC/W on minimum mounting pad on FR-4 board in still air.
JA
θ
(Note 2) N-Ch 0.8 1.2 V
(Note 2)
P-Ch -0.8 -1.2
Min Typ Max Units
is guaranteed by
JC
θ
FDG6320C Rev. D
Typical Electrical Characteristics: N-Channel
0.5
0.4
0.3
0.2
0.1
D
I , DRAIN-SOURCE CURRENT (A)
V =4.5V
GS
3.5V
3.0V
2.7V
2.5V
2.0V
0
0 1 2 3 4 5
V , DRAIN-SOURCE VOLTAGE (V)
DS
Figure 1. On-Region Characteristics.
1.8
I = 0.22A
D
1.6
V = 4.5V
GS
1.4
1.2
1
DS(ON)
R , NORMALIZED
0.8
DRAIN-SOURCE ON-RESISTANCE
0.6
-50 -25 0 25 50 75 100 125 150
T , JUNCTION TEMPERATURE (°C)
J
5
4.5
4
V = 2.5V
GS
2.7V
3.0V
3.5
3
DS(ON)
R , NORMALIZED
2.5
DRAIN-SOURCE ON-RESISTANCE
2
0 0.1 0.2 0.3 0.4
I , DRAIN CURRENT (A)
D
3.5V
4.0V
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
20
16
12
8
T =125°C
4
DS(ON)
R , ON-RESISTANCE(OHM)
0
1 2 3 4 5
V ,GATE TO SOURCE VOLTAGE (V)
GS
A
25°C
4.5V
I = 0.10A
D
5.0V
Figure 3. On-Resistance Variation
with Temperature.
0.2
V = 5V
DS
0.15
0.1
0.05
D
I , DRAIN CURRENT (A)
0
0.5 1 1.5 2 2.5 3
V , GATE TO SOURCE VOLTAGE (V)
GS
Figure 5. Transfer Characteristics.
T = -55°C
J
25°C
125°C
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
0.4
V = 0V
GS
0.1
T = 125°C
0.01
0.001
S
I , REVERSE DRAIN CURRENT (A)
0.0001
0 0.2 0.4 0.6 0.8 1 1.2
V , BODY DIODE FORWARD VOLTAGE (V)
SD
J
25°C
-55°C
Figure 6. Body Diode Forward Voltage
Variation with Source Current
and Temperature.
FDG6320C.Rev D
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