Fairchild Semiconductor FDG6316P Datasheet
December 2001
FDG6316P
P-Channel 1.8V Specified PowerTrench
MOSFET
FDG6316P
General Description
This P-Channel 1.8V specified MOSFET uses
Fairchild’s advanced low voltage PowerTrench process.
It has been optimized for battery power management
applications.
Applications
• Battery management
• Load switch
S
G
D
D
Pin 1
G
S
SC70-6
The pinouts are symmetrical; pin 1 and pin 4 are interchangeable.
Features
• –0.7 A, –12 V. R
R
R
• Low gate charge
• High performance trench technology for extremely
low R
• Compact industry standard SC70-6 surface mount
package
DS(ON)
S
G
D
1 or 4
2 or 5
3 or 6
= 270 mΩ @ VGS = –4.5 V
DS(ON)
= 360 mΩ @ VGS = –2.5 V
DS(ON)
= 650 mΩ @ VGS = –1.8 V
DS(ON)
D
6 or 3
G
5 or 2
4 or 1
S
Absolute Maximum Ratings T
o
=25
C unless otherwise noted
A
Symbol Parameter Ratings Units
V
Drain-Source Voltage –12 V
DSS
V
Gate-Source Voltage
GSS
ID Drain Current – Continuous (Note 1) –0.7 A
– Pulsed –1.8
PD Power Dissipation for Single Operation (Note 1) 0.3 W
TJ, T
Operating and Storage Junction Temperature Range –55 to +150
STG
± 8
V
°C
Thermal Characteristics
R
θJA
Thermal Resistance, Junction-to-Ambient
(Note 1) 415
°C/W
Package Marking and Ordering Information
Device Marking Device Reel Size Tape width Quantity
2001 Fairchild Sem iconductor Corporation
.16 FDG6316P 7’’ 8mm 3000 units
FDG6316P Rev D W )
FDG6316P
Electrical Characteristics T
= 25°C unless otherwise noted
A
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
Drain–Source Breakdown
DSS
Voltage
∆BVDSS
∆T
J
I
Zero Gate Voltage Drain Current VDS = –10 V, VGS = 0 V –1
DSS
I
Gate–Body Leakage, Forward VGS = –8 V, VDS = 0 V –100 nA
GSSF
I
GSSR
Breakdown Voltage Temperature
Coefficient
Gate–Body Leakage, Reverse VGS = 8 V, VDS = 0 V 100 nA
V
= 0 V, ID = –250 µA
GS
= –250 µA, Referenced to 25°C
I
D
–12 V
–3.7
mV/°C
µA
On Characteristics (Note 2)
V
Gate Threshold Voltage
GS(th)
∆VGS(th)
∆TJ
R
DS(on)
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
I
On–State Drain Current VGS = –4.5 V, VDS = –5 V –1.8 A
D(on)
V
= VGS, ID = –250 µA
DS
I
= –250 µA, Referenced to 25°C
D
VGS = –4.5 V, ID = –0.7 A
= –2.5 V, ID = –0.5 A
V
GS
V
= –1.8 V, ID = –0.4 A
GS
= –4.5 V, ID = –0.7 A, TJ=125°C
V
GS
–0.4 –0.6 –1.5 V
2
221
297
427
250
270
360
650
348
mV/°C
mΩ
gFS Forward Transconductance VDS = –5 V, ID = –0.7 A 2.5 S
Dynamic Characteristics
C
Input Capacitance 146 pF
iss
C
Output Capacitance 60 pF
oss
C
Reverse Transfer Capacitance
rss
= –6 V, V
V
DS
f = 1.0 MHz
= 0 V,
GS
48 pF
Switching Characteristics (Note 2)
V
= –6 V, ID = 1 A,
t
Turn–On Delay Time 5 10 ns
d(on)
tr Turn–On Rise Time 13 23 ns
t
Turn–Off Delay Time 8 16 ns
d(off)
tf Turn–Off Fall Time
Qg Total Gate Charge 1.7 2.4 nC
Qgs Gate–Source Charge 0.3 nC
Qgd Gate–Drain Charge
DD
= –4.5 V, R
V
GS
V
= –6 V, ID = –0.7 A,
DS
V
= –4.5 V
GS
GEN
= 6 Ω
2 4 ns
0.4 nC
Drain–Source Diode Characteristics and Maximum Ratings
IS Maximum Continuous Drain–Source Diode Forward Current –0.25 A
VSD Drain–Source Diode Forward
Voltage
Notes:
1. R
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
θJA
the drain pins. R
PCB on still air environment
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
is guaranteed by design while R
θJC
VGS = 0 V, IS = –0.25 A(Note 2) –0.7 –1.2 V
is determined by the user's board design. R
θJA
= 415°C/W when mounted on a minimum pad of FR-4
θJA
FDG6316P Rev D (W )
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