Fairchild Semiconductor FDG6308P Datasheet
FDG6308P
P-Channel 1.8V Specified PowerTrench
MOSFET
FDG6308P
October 2000
PRELIMINARY
General Description
This P-Channel 1.8V specified MOSFET uses
Fairchild’s advanced low voltage PowerTrench process.
It has been optimized for battery power management
applications.
Applications
• Battery management
• Load switch
Features
• –0.6 A, –20 V. R
• Low gate charge
• High performance trench technology for extremely
low R
DS(ON)
• Compact industry standard SC70-6 surface mount
package
= 0.40 Ω @ VGS = –4.5 V
DS(ON)
R
= 0.55 Ω @ VGS = –2.5 V
DS(ON)
R
= 0.80 Ω @ VGS = –1.8 V
DS(ON)
S
G
D
S
G
1 or 4
2 or 5
6 or 3
5 or 2
D
G
D
Pin 1
G
S
D
3 or 6
4 or 1
S
SC70-6
The pinouts are symmetric al; pin 1 and pin 4 are int erc ha ng ea bl e.
Absolute Maximum Ratings T
=25oC unless otherwise noted
A
Symbol Parameter Ratings Units
V
DSS
V
GSS
I
D
P
D
TJ, T
STG
Drain-Source Voltage –20 V
Gate-Source Voltage
Drain Current – Continuous (Note 1) –0.6 A
– Pulsed –1.8
Power Dissipation for Single Operation (Note 1) 0.3 W
Operating and Storage Junction Temperature Range –55 to +150
± 8
V
°C
Thermal Characteristics
R
θJA
Thermal Resistance, Junction-to-Ambient (Note 1) 415
Package Marking and Ordering Information
Device Marking Device Reel Size Tape width Quantity
.08 FDG6308P 7’’ 8mm 3000 units
2000 Fairchild Semiconductor Corporation
°C/W
FDG6308P Rev B(W)
FDG6308P
Electrical Characteristics T
= 25°C unless otherwise noted
A
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
DSS
∆BVDSS
===∆T
J
I
DSS
I
GSSF
I
GSSR
Drain–Source Breakdown
Voltage
Breakdown Voltage Temperature
Coefficient
= 0 V, ID = –250 µA
V
GS
= –250 µA, Referenced to 25°C
I
D
Zero Gate Voltage Drain Current VDS = –16 V, VGS = 0 V –1
–20 V
–15
mV/°C
µA
Gate–Body Leakage, Forward VGS = –8 V, VDS = 0 V –100 nA
Gate–Body Leakage, Reverse VGS = 8 V, VDS = 0 V 100 nA
On Characteristics (Note 2)
V
GS(th)
∆VGS(th)
===∆T
J
R
DS(on)
I
D(on)
g
FS
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
V
= VGS,ID = –250 µA
DS
= –250 µA, Referenced to 25°C
I
D
VGS = –4.5 V, ID = –0.6 A
V
= –2.5 V, ID = –0.5 A
GS
= –1.8 V, ID = –0.4 A
V
GS
= –4.5 V, ID = –0.6 A, TJ=125°C
V
GS
–0.4 –0.9 –1.5 V
2
0.27
0.36
0.55
0.35
mV/°C
0.40
0.55
0.80
0.56
On–State Drain Current VGS = –4.5 V, VDS = –5 V –2 A
Forward Transconductance VDS = –5 V, ID = –0.6 A 2.1 S
Ω
Dynamic Characteristics
C
iss
C
oss
C
rss
Input Capacitance 153 pF
Output Capacitance 25 pF
Reverse Transfer Capacitance
= –10 V, V
V
DS
f = 1.0 MHz
GS
= 0 V,
9pF
Switching Characteristics (Note 2)
V
= –10 V, ID = 1 A,
t
t
t
t
Q
Q
Q
d(on)
r
d(off)
f
g
gs
gd
Turn–On Delay Time 5 10 ns
Turn–On Rise Time 15 27 ns
Turn–Off Delay Time 7 14 ns
Turn–Off Fall Time
Total Gate Charge 1.8 2.5 nC
Gate–Source Charge 0.3 nC
Gate–Drain Charge
DD
= –4.5 V, R
V
GS
V
= –10 V, ID = –0.6 A,
DS
= –4.5 V
V
GS
GEN
= 6 Ω
1.6 3.2 ns
0.4 nC
Drain–Source Diode Characteristics and Maximum Ratings
I
S
V
SD
Notes:
1. R
θJA
the drain pins. R
Maximum Continuous Drain–Source Diode Forward Current –0.25 A
Drain–Source Diode Forward
VGS = 0 V, IS = –0.25 A(Note 2) –0.77 –1.2 V
Voltage
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
is guaranteed by design while R
θJC
is determined by the user's board design. R
θJA
= 415°C/W when mounted on a minimum pad .
θJA
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
FDG6308P Rev B (W)
Loading...